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1 /*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17 */
18
19
20 #define DAC960_DriverVersion "2.5.49"
21 #define DAC960_DriverDate "21 Aug 2007"
22
23
24 #include <linux/module.h>
25 #include <linux/types.h>
26 #include <linux/miscdevice.h>
27 #include <linux/blkdev.h>
28 #include <linux/bio.h>
29 #include <linux/completion.h>
30 #include <linux/delay.h>
31 #include <linux/genhd.h>
32 #include <linux/hdreg.h>
33 #include <linux/blkpg.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/interrupt.h>
36 #include <linux/ioport.h>
37 #include <linux/mm.h>
38 #include <linux/slab.h>
39 #include <linux/mutex.h>
40 #include <linux/proc_fs.h>
41 #include <linux/seq_file.h>
42 #include <linux/reboot.h>
43 #include <linux/spinlock.h>
44 #include <linux/timer.h>
45 #include <linux/pci.h>
46 #include <linux/init.h>
47 #include <linux/jiffies.h>
48 #include <linux/random.h>
49 #include <linux/scatterlist.h>
50 #include <asm/io.h>
51 #include <linux/uaccess.h>
52 #include "DAC960.h"
53
54 #define DAC960_GAM_MINOR 252
55
56
57 static DEFINE_MUTEX(DAC960_mutex);
58 static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
59 static int DAC960_ControllerCount;
60 static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
61
62 static long disk_size(DAC960_Controller_T *p, int drive_nr)
63 {
64 if (p->FirmwareType == DAC960_V1_Controller) {
65 if (drive_nr >= p->LogicalDriveCount)
66 return 0;
67 return p->V1.LogicalDriveInformation[drive_nr].
68 LogicalDriveSize;
69 } else {
70 DAC960_V2_LogicalDeviceInfo_T *i =
71 p->V2.LogicalDeviceInformation[drive_nr];
72 if (i == NULL)
73 return 0;
74 return i->ConfigurableDeviceSize;
75 }
76 }
77
78 static int DAC960_open(struct block_device *bdev, fmode_t mode)
79 {
80 struct gendisk *disk = bdev->bd_disk;
81 DAC960_Controller_T *p = disk->queue->queuedata;
82 int drive_nr = (long)disk->private_data;
83 int ret = -ENXIO;
84
85 mutex_lock(&DAC960_mutex);
86 if (p->FirmwareType == DAC960_V1_Controller) {
87 if (p->V1.LogicalDriveInformation[drive_nr].
88 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
89 goto out;
90 } else {
91 DAC960_V2_LogicalDeviceInfo_T *i =
92 p->V2.LogicalDeviceInformation[drive_nr];
93 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
94 goto out;
95 }
96
97 check_disk_change(bdev);
98
99 if (!get_capacity(p->disks[drive_nr]))
100 goto out;
101 ret = 0;
102 out:
103 mutex_unlock(&DAC960_mutex);
104 return ret;
105 }
106
107 static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
108 {
109 struct gendisk *disk = bdev->bd_disk;
110 DAC960_Controller_T *p = disk->queue->queuedata;
111 int drive_nr = (long)disk->private_data;
112
113 if (p->FirmwareType == DAC960_V1_Controller) {
114 geo->heads = p->V1.GeometryTranslationHeads;
115 geo->sectors = p->V1.GeometryTranslationSectors;
116 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
117 LogicalDriveSize / (geo->heads * geo->sectors);
118 } else {
119 DAC960_V2_LogicalDeviceInfo_T *i =
120 p->V2.LogicalDeviceInformation[drive_nr];
121 switch (i->DriveGeometry) {
122 case DAC960_V2_Geometry_128_32:
123 geo->heads = 128;
124 geo->sectors = 32;
125 break;
126 case DAC960_V2_Geometry_255_63:
127 geo->heads = 255;
128 geo->sectors = 63;
129 break;
130 default:
131 DAC960_Error("Illegal Logical Device Geometry %d\n",
132 p, i->DriveGeometry);
133 return -EINVAL;
134 }
135
136 geo->cylinders = i->ConfigurableDeviceSize /
137 (geo->heads * geo->sectors);
138 }
139
140 return 0;
141 }
142
143 static unsigned int DAC960_check_events(struct gendisk *disk,
144 unsigned int clearing)
145 {
146 DAC960_Controller_T *p = disk->queue->queuedata;
147 int drive_nr = (long)disk->private_data;
148
149 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
150 return DISK_EVENT_MEDIA_CHANGE;
151 return 0;
152 }
153
154 static int DAC960_revalidate_disk(struct gendisk *disk)
155 {
156 DAC960_Controller_T *p = disk->queue->queuedata;
157 int unit = (long)disk->private_data;
158
159 set_capacity(disk, disk_size(p, unit));
160 return 0;
161 }
162
163 static const struct block_device_operations DAC960_BlockDeviceOperations = {
164 .owner = THIS_MODULE,
165 .open = DAC960_open,
166 .getgeo = DAC960_getgeo,
167 .check_events = DAC960_check_events,
168 .revalidate_disk = DAC960_revalidate_disk,
169 };
170
171
172 /*
173 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
174 Copyright Notice, and Electronic Mail Address.
175 */
176
177 static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
178 {
179 DAC960_Announce("***** DAC960 RAID Driver Version "
180 DAC960_DriverVersion " of "
181 DAC960_DriverDate " *****\n", Controller);
182 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
183 "<lnz@dandelion.com>\n", Controller);
184 }
185
186
187 /*
188 DAC960_Failure prints a standardized error message, and then returns false.
189 */
190
191 static bool DAC960_Failure(DAC960_Controller_T *Controller,
192 unsigned char *ErrorMessage)
193 {
194 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
195 Controller);
196 if (Controller->IO_Address == 0)
197 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
198 "PCI Address 0x%X\n", Controller,
199 Controller->Bus, Controller->Device,
200 Controller->Function, Controller->PCI_Address);
201 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
202 "0x%X PCI Address 0x%X\n", Controller,
203 Controller->Bus, Controller->Device,
204 Controller->Function, Controller->IO_Address,
205 Controller->PCI_Address);
206 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
207 return false;
208 }
209
210 /*
211 init_dma_loaf() and slice_dma_loaf() are helper functions for
212 aggregating the dma-mapped memory for a well-known collection of
213 data structures that are of different lengths.
214
215 These routines don't guarantee any alignment. The caller must
216 include any space needed for alignment in the sizes of the structures
217 that are passed in.
218 */
219
220 static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
221 size_t len)
222 {
223 void *cpu_addr;
224 dma_addr_t dma_handle;
225
226 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
227 if (cpu_addr == NULL)
228 return false;
229
230 loaf->cpu_free = loaf->cpu_base = cpu_addr;
231 loaf->dma_free =loaf->dma_base = dma_handle;
232 loaf->length = len;
233 memset(cpu_addr, 0, len);
234 return true;
235 }
236
237 static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
238 dma_addr_t *dma_handle)
239 {
240 void *cpu_end = loaf->cpu_free + len;
241 void *cpu_addr = loaf->cpu_free;
242
243 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
244 *dma_handle = loaf->dma_free;
245 loaf->cpu_free = cpu_end;
246 loaf->dma_free += len;
247 return cpu_addr;
248 }
249
250 static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
251 {
252 if (loaf_handle->cpu_base != NULL)
253 pci_free_consistent(dev, loaf_handle->length,
254 loaf_handle->cpu_base, loaf_handle->dma_base);
255 }
256
257
258 /*
259 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
260 data structures for Controller. It returns true on success and false on
261 failure.
262 */
263
264 static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
265 {
266 int CommandAllocationLength, CommandAllocationGroupSize;
267 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
268 void *AllocationPointer = NULL;
269 void *ScatterGatherCPU = NULL;
270 dma_addr_t ScatterGatherDMA;
271 struct pci_pool *ScatterGatherPool;
272 void *RequestSenseCPU = NULL;
273 dma_addr_t RequestSenseDMA;
274 struct pci_pool *RequestSensePool = NULL;
275
276 if (Controller->FirmwareType == DAC960_V1_Controller)
277 {
278 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
279 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
280 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
281 Controller->PCIDevice,
282 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
283 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
284 if (ScatterGatherPool == NULL)
285 return DAC960_Failure(Controller,
286 "AUXILIARY STRUCTURE CREATION (SG)");
287 Controller->ScatterGatherPool = ScatterGatherPool;
288 }
289 else
290 {
291 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
292 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
293 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
294 Controller->PCIDevice,
295 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
296 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
297 if (ScatterGatherPool == NULL)
298 return DAC960_Failure(Controller,
299 "AUXILIARY STRUCTURE CREATION (SG)");
300 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
301 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
302 sizeof(int), 0);
303 if (RequestSensePool == NULL) {
304 pci_pool_destroy(ScatterGatherPool);
305 return DAC960_Failure(Controller,
306 "AUXILIARY STRUCTURE CREATION (SG)");
307 }
308 Controller->ScatterGatherPool = ScatterGatherPool;
309 Controller->V2.RequestSensePool = RequestSensePool;
310 }
311 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
312 Controller->FreeCommands = NULL;
313 for (CommandIdentifier = 1;
314 CommandIdentifier <= Controller->DriverQueueDepth;
315 CommandIdentifier++)
316 {
317 DAC960_Command_T *Command;
318 if (--CommandsRemaining <= 0)
319 {
320 CommandsRemaining =
321 Controller->DriverQueueDepth - CommandIdentifier + 1;
322 if (CommandsRemaining > CommandAllocationGroupSize)
323 CommandsRemaining = CommandAllocationGroupSize;
324 CommandGroupByteCount =
325 CommandsRemaining * CommandAllocationLength;
326 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
327 if (AllocationPointer == NULL)
328 return DAC960_Failure(Controller,
329 "AUXILIARY STRUCTURE CREATION");
330 }
331 Command = (DAC960_Command_T *) AllocationPointer;
332 AllocationPointer += CommandAllocationLength;
333 Command->CommandIdentifier = CommandIdentifier;
334 Command->Controller = Controller;
335 Command->Next = Controller->FreeCommands;
336 Controller->FreeCommands = Command;
337 Controller->Commands[CommandIdentifier-1] = Command;
338 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
339 &ScatterGatherDMA);
340 if (ScatterGatherCPU == NULL)
341 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
342
343 if (RequestSensePool != NULL) {
344 RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
345 &RequestSenseDMA);
346 if (RequestSenseCPU == NULL) {
347 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
348 ScatterGatherDMA);
349 return DAC960_Failure(Controller,
350 "AUXILIARY STRUCTURE CREATION");
351 }
352 }
353 if (Controller->FirmwareType == DAC960_V1_Controller) {
354 Command->cmd_sglist = Command->V1.ScatterList;
355 Command->V1.ScatterGatherList =
356 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
357 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
358 sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
359 } else {
360 Command->cmd_sglist = Command->V2.ScatterList;
361 Command->V2.ScatterGatherList =
362 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
363 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
364 Command->V2.RequestSense =
365 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
366 Command->V2.RequestSenseDMA = RequestSenseDMA;
367 sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
368 }
369 }
370 return true;
371 }
372
373
374 /*
375 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
376 structures for Controller.
377 */
378
379 static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
380 {
381 int i;
382 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
383 struct pci_pool *RequestSensePool = NULL;
384 void *ScatterGatherCPU;
385 dma_addr_t ScatterGatherDMA;
386 void *RequestSenseCPU;
387 dma_addr_t RequestSenseDMA;
388 DAC960_Command_T *CommandGroup = NULL;
389
390
391 if (Controller->FirmwareType == DAC960_V2_Controller)
392 RequestSensePool = Controller->V2.RequestSensePool;
393
394 Controller->FreeCommands = NULL;
395 for (i = 0; i < Controller->DriverQueueDepth; i++)
396 {
397 DAC960_Command_T *Command = Controller->Commands[i];
398
399 if (Command == NULL)
400 continue;
401
402 if (Controller->FirmwareType == DAC960_V1_Controller) {
403 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
404 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
405 RequestSenseCPU = NULL;
406 RequestSenseDMA = (dma_addr_t)0;
407 } else {
408 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
409 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
410 RequestSenseCPU = (void *)Command->V2.RequestSense;
411 RequestSenseDMA = Command->V2.RequestSenseDMA;
412 }
413 if (ScatterGatherCPU != NULL)
414 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
415 if (RequestSenseCPU != NULL)
416 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
417
418 if ((Command->CommandIdentifier
419 % Controller->CommandAllocationGroupSize) == 1) {
420 /*
421 * We can't free the group of commands until all of the
422 * request sense and scatter gather dma structures are free.
423 * Remember the beginning of the group, but don't free it
424 * until we've reached the beginning of the next group.
425 */
426 kfree(CommandGroup);
427 CommandGroup = Command;
428 }
429 Controller->Commands[i] = NULL;
430 }
431 kfree(CommandGroup);
432
433 if (Controller->CombinedStatusBuffer != NULL)
434 {
435 kfree(Controller->CombinedStatusBuffer);
436 Controller->CombinedStatusBuffer = NULL;
437 Controller->CurrentStatusBuffer = NULL;
438 }
439
440 if (ScatterGatherPool != NULL)
441 pci_pool_destroy(ScatterGatherPool);
442 if (Controller->FirmwareType == DAC960_V1_Controller)
443 return;
444
445 if (RequestSensePool != NULL)
446 pci_pool_destroy(RequestSensePool);
447
448 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
449 kfree(Controller->V2.LogicalDeviceInformation[i]);
450 Controller->V2.LogicalDeviceInformation[i] = NULL;
451 }
452
453 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
454 {
455 kfree(Controller->V2.PhysicalDeviceInformation[i]);
456 Controller->V2.PhysicalDeviceInformation[i] = NULL;
457 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
458 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
459 }
460 }
461
462
463 /*
464 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
465 Firmware Controllers.
466 */
467
468 static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
469 {
470 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
471 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
472 Command->V1.CommandStatus = 0;
473 }
474
475
476 /*
477 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
478 Firmware Controllers.
479 */
480
481 static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
482 {
483 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
484 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
485 Command->V2.CommandStatus = 0;
486 }
487
488
489 /*
490 DAC960_AllocateCommand allocates a Command structure from Controller's
491 free list. During driver initialization, a special initialization command
492 has been placed on the free list to guarantee that command allocation can
493 never fail.
494 */
495
496 static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
497 *Controller)
498 {
499 DAC960_Command_T *Command = Controller->FreeCommands;
500 if (Command == NULL) return NULL;
501 Controller->FreeCommands = Command->Next;
502 Command->Next = NULL;
503 return Command;
504 }
505
506
507 /*
508 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
509 free list.
510 */
511
512 static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
513 {
514 DAC960_Controller_T *Controller = Command->Controller;
515
516 Command->Request = NULL;
517 Command->Next = Controller->FreeCommands;
518 Controller->FreeCommands = Command;
519 }
520
521
522 /*
523 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
524 */
525
526 static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
527 {
528 spin_unlock_irq(&Controller->queue_lock);
529 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
530 spin_lock_irq(&Controller->queue_lock);
531 }
532
533 /*
534 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
535 */
536
537 static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
538 {
539 DAC960_Controller_T *Controller = Command->Controller;
540 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
541 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
542 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
543 Controller->V2.NextCommandMailbox;
544
545 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
546 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
547
548 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
549 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
550 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
551
552 Controller->V2.PreviousCommandMailbox2 =
553 Controller->V2.PreviousCommandMailbox1;
554 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
555
556 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
557 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
558
559 Controller->V2.NextCommandMailbox = NextCommandMailbox;
560 }
561
562 /*
563 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
564 */
565
566 static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
567 {
568 DAC960_Controller_T *Controller = Command->Controller;
569 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
570 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
571 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
572 Controller->V2.NextCommandMailbox;
573 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
574 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
575 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
576 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
577 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
578 Controller->V2.PreviousCommandMailbox2 =
579 Controller->V2.PreviousCommandMailbox1;
580 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
581 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
582 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
583 Controller->V2.NextCommandMailbox = NextCommandMailbox;
584 }
585
586
587 /*
588 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
589 */
590
591 static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
592 {
593 DAC960_Controller_T *Controller = Command->Controller;
594 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
595 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
596 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
597 Controller->V2.NextCommandMailbox;
598 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
599 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
600 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
601 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
602 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
603 Controller->V2.PreviousCommandMailbox2 =
604 Controller->V2.PreviousCommandMailbox1;
605 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
606 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
607 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
608 Controller->V2.NextCommandMailbox = NextCommandMailbox;
609 }
610
611
612 /*
613 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
614 Controllers with Dual Mode Firmware.
615 */
616
617 static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
618 {
619 DAC960_Controller_T *Controller = Command->Controller;
620 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
621 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
622 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
623 Controller->V1.NextCommandMailbox;
624 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
625 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
626 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
627 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
628 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
629 Controller->V1.PreviousCommandMailbox2 =
630 Controller->V1.PreviousCommandMailbox1;
631 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
632 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
633 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
634 Controller->V1.NextCommandMailbox = NextCommandMailbox;
635 }
636
637
638 /*
639 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
640 Controllers with Single Mode Firmware.
641 */
642
643 static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
644 {
645 DAC960_Controller_T *Controller = Command->Controller;
646 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
647 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
648 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
649 Controller->V1.NextCommandMailbox;
650 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
651 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
652 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
653 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
654 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
655 Controller->V1.PreviousCommandMailbox2 =
656 Controller->V1.PreviousCommandMailbox1;
657 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
658 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
659 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
660 Controller->V1.NextCommandMailbox = NextCommandMailbox;
661 }
662
663
664 /*
665 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
666 Controllers with Dual Mode Firmware.
667 */
668
669 static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
670 {
671 DAC960_Controller_T *Controller = Command->Controller;
672 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
673 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
674 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
675 Controller->V1.NextCommandMailbox;
676 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
677 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
678 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
679 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
680 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
681 Controller->V1.PreviousCommandMailbox2 =
682 Controller->V1.PreviousCommandMailbox1;
683 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
684 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
685 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
686 Controller->V1.NextCommandMailbox = NextCommandMailbox;
687 }
688
689
690 /*
691 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
692 Controllers with Single Mode Firmware.
693 */
694
695 static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
696 {
697 DAC960_Controller_T *Controller = Command->Controller;
698 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
699 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
700 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
701 Controller->V1.NextCommandMailbox;
702 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
703 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
704 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
705 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
706 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
707 Controller->V1.PreviousCommandMailbox2 =
708 Controller->V1.PreviousCommandMailbox1;
709 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
710 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
711 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
712 Controller->V1.NextCommandMailbox = NextCommandMailbox;
713 }
714
715
716 /*
717 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
718 */
719
720 static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
721 {
722 DAC960_Controller_T *Controller = Command->Controller;
723 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
724 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
725 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
726 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
727 udelay(1);
728 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
729 DAC960_PD_NewCommand(ControllerBaseAddress);
730 }
731
732
733 /*
734 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
735 */
736
737 static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
738 {
739 DAC960_Controller_T *Controller = Command->Controller;
740 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
741 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
742 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
743 switch (CommandMailbox->Common.CommandOpcode)
744 {
745 case DAC960_V1_Enquiry:
746 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
747 break;
748 case DAC960_V1_GetDeviceState:
749 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
750 break;
751 case DAC960_V1_Read:
752 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
753 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
754 break;
755 case DAC960_V1_Write:
756 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
757 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
758 break;
759 case DAC960_V1_ReadWithScatterGather:
760 CommandMailbox->Common.CommandOpcode =
761 DAC960_V1_ReadWithScatterGather_Old;
762 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
763 break;
764 case DAC960_V1_WriteWithScatterGather:
765 CommandMailbox->Common.CommandOpcode =
766 DAC960_V1_WriteWithScatterGather_Old;
767 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
768 break;
769 default:
770 break;
771 }
772 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
773 udelay(1);
774 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
775 DAC960_PD_NewCommand(ControllerBaseAddress);
776 }
777
778
779 /*
780 DAC960_ExecuteCommand executes Command and waits for completion.
781 */
782
783 static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
784 {
785 DAC960_Controller_T *Controller = Command->Controller;
786 DECLARE_COMPLETION_ONSTACK(Completion);
787 unsigned long flags;
788 Command->Completion = &Completion;
789
790 spin_lock_irqsave(&Controller->queue_lock, flags);
791 DAC960_QueueCommand(Command);
792 spin_unlock_irqrestore(&Controller->queue_lock, flags);
793
794 if (in_interrupt())
795 return;
796 wait_for_completion(&Completion);
797 }
798
799
800 /*
801 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
802 Command and waits for completion. It returns true on success and false
803 on failure.
804 */
805
806 static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
807 DAC960_V1_CommandOpcode_T CommandOpcode,
808 dma_addr_t DataDMA)
809 {
810 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
811 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
812 DAC960_V1_CommandStatus_T CommandStatus;
813 DAC960_V1_ClearCommand(Command);
814 Command->CommandType = DAC960_ImmediateCommand;
815 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
816 CommandMailbox->Type3.BusAddress = DataDMA;
817 DAC960_ExecuteCommand(Command);
818 CommandStatus = Command->V1.CommandStatus;
819 DAC960_DeallocateCommand(Command);
820 return (CommandStatus == DAC960_V1_NormalCompletion);
821 }
822
823
824 /*
825 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
826 Command and waits for completion. It returns true on success and false
827 on failure.
828 */
829
830 static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
831 DAC960_V1_CommandOpcode_T CommandOpcode,
832 unsigned char CommandOpcode2,
833 dma_addr_t DataDMA)
834 {
835 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
836 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
837 DAC960_V1_CommandStatus_T CommandStatus;
838 DAC960_V1_ClearCommand(Command);
839 Command->CommandType = DAC960_ImmediateCommand;
840 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
841 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
842 CommandMailbox->Type3B.BusAddress = DataDMA;
843 DAC960_ExecuteCommand(Command);
844 CommandStatus = Command->V1.CommandStatus;
845 DAC960_DeallocateCommand(Command);
846 return (CommandStatus == DAC960_V1_NormalCompletion);
847 }
848
849
850 /*
851 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
852 Command and waits for completion. It returns true on success and false
853 on failure.
854 */
855
856 static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
857 DAC960_V1_CommandOpcode_T CommandOpcode,
858 unsigned char Channel,
859 unsigned char TargetID,
860 dma_addr_t DataDMA)
861 {
862 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
863 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
864 DAC960_V1_CommandStatus_T CommandStatus;
865 DAC960_V1_ClearCommand(Command);
866 Command->CommandType = DAC960_ImmediateCommand;
867 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
868 CommandMailbox->Type3D.Channel = Channel;
869 CommandMailbox->Type3D.TargetID = TargetID;
870 CommandMailbox->Type3D.BusAddress = DataDMA;
871 DAC960_ExecuteCommand(Command);
872 CommandStatus = Command->V1.CommandStatus;
873 DAC960_DeallocateCommand(Command);
874 return (CommandStatus == DAC960_V1_NormalCompletion);
875 }
876
877
878 /*
879 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
880 Reading IOCTL Command and waits for completion. It returns true on success
881 and false on failure.
882
883 Return data in The controller's HealthStatusBuffer, which is dma-able memory
884 */
885
886 static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
887 {
888 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
889 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
890 DAC960_V2_CommandStatus_T CommandStatus;
891 DAC960_V2_ClearCommand(Command);
892 Command->CommandType = DAC960_ImmediateCommand;
893 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
894 CommandMailbox->Common.CommandControlBits
895 .DataTransferControllerToHost = true;
896 CommandMailbox->Common.CommandControlBits
897 .NoAutoRequestSense = true;
898 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
899 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
900 CommandMailbox->Common.DataTransferMemoryAddress
901 .ScatterGatherSegments[0]
902 .SegmentDataPointer =
903 Controller->V2.HealthStatusBufferDMA;
904 CommandMailbox->Common.DataTransferMemoryAddress
905 .ScatterGatherSegments[0]
906 .SegmentByteCount =
907 CommandMailbox->Common.DataTransferSize;
908 DAC960_ExecuteCommand(Command);
909 CommandStatus = Command->V2.CommandStatus;
910 DAC960_DeallocateCommand(Command);
911 return (CommandStatus == DAC960_V2_NormalCompletion);
912 }
913
914
915 /*
916 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
917 Information Reading IOCTL Command and waits for completion. It returns
918 true on success and false on failure.
919
920 Data is returned in the controller's V2.NewControllerInformation dma-able
921 memory buffer.
922 */
923
924 static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
925 {
926 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
927 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
928 DAC960_V2_CommandStatus_T CommandStatus;
929 DAC960_V2_ClearCommand(Command);
930 Command->CommandType = DAC960_ImmediateCommand;
931 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
932 CommandMailbox->ControllerInfo.CommandControlBits
933 .DataTransferControllerToHost = true;
934 CommandMailbox->ControllerInfo.CommandControlBits
935 .NoAutoRequestSense = true;
936 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
937 CommandMailbox->ControllerInfo.ControllerNumber = 0;
938 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
939 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
940 .ScatterGatherSegments[0]
941 .SegmentDataPointer =
942 Controller->V2.NewControllerInformationDMA;
943 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
944 .ScatterGatherSegments[0]
945 .SegmentByteCount =
946 CommandMailbox->ControllerInfo.DataTransferSize;
947 DAC960_ExecuteCommand(Command);
948 CommandStatus = Command->V2.CommandStatus;
949 DAC960_DeallocateCommand(Command);
950 return (CommandStatus == DAC960_V2_NormalCompletion);
951 }
952
953
954 /*
955 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
956 Device Information Reading IOCTL Command and waits for completion. It
957 returns true on success and false on failure.
958
959 Data is returned in the controller's V2.NewLogicalDeviceInformation
960 */
961
962 static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
963 unsigned short LogicalDeviceNumber)
964 {
965 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
966 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
967 DAC960_V2_CommandStatus_T CommandStatus;
968
969 DAC960_V2_ClearCommand(Command);
970 Command->CommandType = DAC960_ImmediateCommand;
971 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
972 DAC960_V2_IOCTL;
973 CommandMailbox->LogicalDeviceInfo.CommandControlBits
974 .DataTransferControllerToHost = true;
975 CommandMailbox->LogicalDeviceInfo.CommandControlBits
976 .NoAutoRequestSense = true;
977 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
978 sizeof(DAC960_V2_LogicalDeviceInfo_T);
979 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
980 LogicalDeviceNumber;
981 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
982 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
983 .ScatterGatherSegments[0]
984 .SegmentDataPointer =
985 Controller->V2.NewLogicalDeviceInformationDMA;
986 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
987 .ScatterGatherSegments[0]
988 .SegmentByteCount =
989 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
990 DAC960_ExecuteCommand(Command);
991 CommandStatus = Command->V2.CommandStatus;
992 DAC960_DeallocateCommand(Command);
993 return (CommandStatus == DAC960_V2_NormalCompletion);
994 }
995
996
997 /*
998 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
999 Physical Device Information" IOCTL Command and waits for completion. It
1000 returns true on success and false on failure.
1001
1002 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
1003 this function is called for a given controller. This will return data
1004 for the "first" device on that controller. The returned data includes a
1005 Channel, TargetID, LogicalUnit that can be passed in to this routine to
1006 get data for the NEXT device on that controller.
1007
1008 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1009 memory buffer.
1010
1011 */
1012
1013 static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1014 unsigned char Channel,
1015 unsigned char TargetID,
1016 unsigned char LogicalUnit)
1017 {
1018 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1019 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1020 DAC960_V2_CommandStatus_T CommandStatus;
1021
1022 DAC960_V2_ClearCommand(Command);
1023 Command->CommandType = DAC960_ImmediateCommand;
1024 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1025 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1026 .DataTransferControllerToHost = true;
1027 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1028 .NoAutoRequestSense = true;
1029 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1030 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1031 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1032 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1033 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1034 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1035 DAC960_V2_GetPhysicalDeviceInfoValid;
1036 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1037 .ScatterGatherSegments[0]
1038 .SegmentDataPointer =
1039 Controller->V2.NewPhysicalDeviceInformationDMA;
1040 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1041 .ScatterGatherSegments[0]
1042 .SegmentByteCount =
1043 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1044 DAC960_ExecuteCommand(Command);
1045 CommandStatus = Command->V2.CommandStatus;
1046 DAC960_DeallocateCommand(Command);
1047 return (CommandStatus == DAC960_V2_NormalCompletion);
1048 }
1049
1050
1051 static void DAC960_V2_ConstructNewUnitSerialNumber(
1052 DAC960_Controller_T *Controller,
1053 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1054 int LogicalUnit)
1055 {
1056 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1057 CommandMailbox->SCSI_10.CommandControlBits
1058 .DataTransferControllerToHost = true;
1059 CommandMailbox->SCSI_10.CommandControlBits
1060 .NoAutoRequestSense = true;
1061 CommandMailbox->SCSI_10.DataTransferSize =
1062 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1063 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1064 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1065 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1066 CommandMailbox->SCSI_10.CDBLength = 6;
1067 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1068 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1069 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1070 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1071 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1072 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1073 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1074 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1075 .ScatterGatherSegments[0]
1076 .SegmentDataPointer =
1077 Controller->V2.NewInquiryUnitSerialNumberDMA;
1078 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1079 .ScatterGatherSegments[0]
1080 .SegmentByteCount =
1081 CommandMailbox->SCSI_10.DataTransferSize;
1082 }
1083
1084
1085 /*
1086 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1087 Inquiry command to a SCSI device identified by Channel number,
1088 Target id, Logical Unit Number. This function Waits for completion
1089 of the command.
1090
1091 The return data includes Unit Serial Number information for the
1092 specified device.
1093
1094 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1095 memory buffer.
1096 */
1097
1098 static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1099 int Channel, int TargetID, int LogicalUnit)
1100 {
1101 DAC960_Command_T *Command;
1102 DAC960_V2_CommandMailbox_T *CommandMailbox;
1103 DAC960_V2_CommandStatus_T CommandStatus;
1104
1105 Command = DAC960_AllocateCommand(Controller);
1106 CommandMailbox = &Command->V2.CommandMailbox;
1107 DAC960_V2_ClearCommand(Command);
1108 Command->CommandType = DAC960_ImmediateCommand;
1109
1110 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1111 Channel, TargetID, LogicalUnit);
1112
1113 DAC960_ExecuteCommand(Command);
1114 CommandStatus = Command->V2.CommandStatus;
1115 DAC960_DeallocateCommand(Command);
1116 return (CommandStatus == DAC960_V2_NormalCompletion);
1117 }
1118
1119
1120 /*
1121 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1122 Operation IOCTL Command and waits for completion. It returns true on
1123 success and false on failure.
1124 */
1125
1126 static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1127 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1128 DAC960_V2_OperationDevice_T
1129 OperationDevice)
1130 {
1131 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1132 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1133 DAC960_V2_CommandStatus_T CommandStatus;
1134 DAC960_V2_ClearCommand(Command);
1135 Command->CommandType = DAC960_ImmediateCommand;
1136 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1137 CommandMailbox->DeviceOperation.CommandControlBits
1138 .DataTransferControllerToHost = true;
1139 CommandMailbox->DeviceOperation.CommandControlBits
1140 .NoAutoRequestSense = true;
1141 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1142 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1143 DAC960_ExecuteCommand(Command);
1144 CommandStatus = Command->V2.CommandStatus;
1145 DAC960_DeallocateCommand(Command);
1146 return (CommandStatus == DAC960_V2_NormalCompletion);
1147 }
1148
1149
1150 /*
1151 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1152 for DAC960 V1 Firmware Controllers.
1153
1154 PD and P controller types have no memory mailbox, but still need the
1155 other dma mapped memory.
1156 */
1157
1158 static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1159 *Controller)
1160 {
1161 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1162 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1163 struct pci_dev *PCI_Device = Controller->PCIDevice;
1164 struct dma_loaf *DmaPages = &Controller->DmaPages;
1165 size_t DmaPagesSize;
1166 size_t CommandMailboxesSize;
1167 size_t StatusMailboxesSize;
1168
1169 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1170 dma_addr_t CommandMailboxesMemoryDMA;
1171
1172 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1173 dma_addr_t StatusMailboxesMemoryDMA;
1174
1175 DAC960_V1_CommandMailbox_T CommandMailbox;
1176 DAC960_V1_CommandStatus_T CommandStatus;
1177 int TimeoutCounter;
1178 int i;
1179
1180 memset(&CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
1181
1182 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1183 return DAC960_Failure(Controller, "DMA mask out of range");
1184 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1185
1186 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1187 CommandMailboxesSize = 0;
1188 StatusMailboxesSize = 0;
1189 } else {
1190 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1191 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1192 }
1193 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1194 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1195 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1196 sizeof(DAC960_V1_RebuildProgress_T) +
1197 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1198 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1199 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1200 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1201
1202 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1203 return false;
1204
1205
1206 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1207 goto skip_mailboxes;
1208
1209 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1210 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1211
1212 /* These are the base addresses for the command memory mailbox array */
1213 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1214 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1215
1216 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1217 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1218 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1219 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1220 Controller->V1.PreviousCommandMailbox2 =
1221 Controller->V1.LastCommandMailbox - 1;
1222
1223 /* These are the base addresses for the status memory mailbox array */
1224 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1225 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1226
1227 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1228 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1229 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1230 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1231 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1232
1233 skip_mailboxes:
1234 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1235 sizeof(DAC960_V1_DCDB_T),
1236 &Controller->V1.MonitoringDCDB_DMA);
1237
1238 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1239 sizeof(DAC960_V1_Enquiry_T),
1240 &Controller->V1.NewEnquiryDMA);
1241
1242 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1243 sizeof(DAC960_V1_ErrorTable_T),
1244 &Controller->V1.NewErrorTableDMA);
1245
1246 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1247 sizeof(DAC960_V1_EventLogEntry_T),
1248 &Controller->V1.EventLogEntryDMA);
1249
1250 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1251 sizeof(DAC960_V1_RebuildProgress_T),
1252 &Controller->V1.RebuildProgressDMA);
1253
1254 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1255 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1256 &Controller->V1.NewLogicalDriveInformationDMA);
1257
1258 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1259 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1260 &Controller->V1.BackgroundInitializationStatusDMA);
1261
1262 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1263 sizeof(DAC960_V1_DeviceState_T),
1264 &Controller->V1.NewDeviceStateDMA);
1265
1266 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1267 sizeof(DAC960_SCSI_Inquiry_T),
1268 &Controller->V1.NewInquiryStandardDataDMA);
1269
1270 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1271 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1272 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1273
1274 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1275 return true;
1276
1277 /* Enable the Memory Mailbox Interface. */
1278 Controller->V1.DualModeMemoryMailboxInterface = true;
1279 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1280 CommandMailbox.TypeX.CommandIdentifier = 0;
1281 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1282 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1283 Controller->V1.FirstCommandMailboxDMA;
1284 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1285 Controller->V1.FirstStatusMailboxDMA;
1286 #define TIMEOUT_COUNT 1000000
1287
1288 for (i = 0; i < 2; i++)
1289 switch (Controller->HardwareType)
1290 {
1291 case DAC960_LA_Controller:
1292 TimeoutCounter = TIMEOUT_COUNT;
1293 while (--TimeoutCounter >= 0)
1294 {
1295 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1296 break;
1297 udelay(10);
1298 }
1299 if (TimeoutCounter < 0) return false;
1300 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1301 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1302 TimeoutCounter = TIMEOUT_COUNT;
1303 while (--TimeoutCounter >= 0)
1304 {
1305 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1306 ControllerBaseAddress))
1307 break;
1308 udelay(10);
1309 }
1310 if (TimeoutCounter < 0) return false;
1311 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1312 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1313 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1314 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1315 Controller->V1.DualModeMemoryMailboxInterface = false;
1316 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1317 break;
1318 case DAC960_PG_Controller:
1319 TimeoutCounter = TIMEOUT_COUNT;
1320 while (--TimeoutCounter >= 0)
1321 {
1322 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1323 break;
1324 udelay(10);
1325 }
1326 if (TimeoutCounter < 0) return false;
1327 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1328 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1329
1330 TimeoutCounter = TIMEOUT_COUNT;
1331 while (--TimeoutCounter >= 0)
1332 {
1333 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1334 ControllerBaseAddress))
1335 break;
1336 udelay(10);
1337 }
1338 if (TimeoutCounter < 0) return false;
1339 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1340 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1341 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1342 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1343 Controller->V1.DualModeMemoryMailboxInterface = false;
1344 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1345 break;
1346 default:
1347 DAC960_Failure(Controller, "Unknown Controller Type\n");
1348 break;
1349 }
1350 return false;
1351 }
1352
1353
1354 /*
1355 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1356 for DAC960 V2 Firmware Controllers.
1357
1358 Aggregate the space needed for the controller's memory mailbox and
1359 the other data structures that will be targets of dma transfers with
1360 the controller. Allocate a dma-mapped region of memory to hold these
1361 structures. Then, save CPU pointers and dma_addr_t values to reference
1362 the structures that are contained in that region.
1363 */
1364
1365 static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1366 *Controller)
1367 {
1368 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1369 struct pci_dev *PCI_Device = Controller->PCIDevice;
1370 struct dma_loaf *DmaPages = &Controller->DmaPages;
1371 size_t DmaPagesSize;
1372 size_t CommandMailboxesSize;
1373 size_t StatusMailboxesSize;
1374
1375 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1376 dma_addr_t CommandMailboxesMemoryDMA;
1377
1378 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1379 dma_addr_t StatusMailboxesMemoryDMA;
1380
1381 DAC960_V2_CommandMailbox_T *CommandMailbox;
1382 dma_addr_t CommandMailboxDMA;
1383 DAC960_V2_CommandStatus_T CommandStatus;
1384
1385 if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(64)))
1386 Controller->BounceBufferLimit = DMA_BIT_MASK(64);
1387 else if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1388 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1389 else
1390 return DAC960_Failure(Controller, "DMA mask out of range");
1391
1392 /* This is a temporary dma mapping, used only in the scope of this function */
1393 CommandMailbox = pci_alloc_consistent(PCI_Device,
1394 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1395 if (CommandMailbox == NULL)
1396 return false;
1397
1398 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1399 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1400 DmaPagesSize =
1401 CommandMailboxesSize + StatusMailboxesSize +
1402 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1403 sizeof(DAC960_V2_ControllerInfo_T) +
1404 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1405 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1406 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1407 sizeof(DAC960_V2_Event_T) +
1408 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1409
1410 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1411 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1412 CommandMailbox, CommandMailboxDMA);
1413 return false;
1414 }
1415
1416 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1417 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1418
1419 /* These are the base addresses for the command memory mailbox array */
1420 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1421 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1422
1423 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1424 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1425 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1426 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1427 Controller->V2.PreviousCommandMailbox2 =
1428 Controller->V2.LastCommandMailbox - 1;
1429
1430 /* These are the base addresses for the status memory mailbox array */
1431 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1432 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1433
1434 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1435 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1436 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1437 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1438 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1439
1440 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1441 sizeof(DAC960_V2_HealthStatusBuffer_T),
1442 &Controller->V2.HealthStatusBufferDMA);
1443
1444 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1445 sizeof(DAC960_V2_ControllerInfo_T),
1446 &Controller->V2.NewControllerInformationDMA);
1447
1448 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1449 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1450 &Controller->V2.NewLogicalDeviceInformationDMA);
1451
1452 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1453 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1454 &Controller->V2.NewPhysicalDeviceInformationDMA);
1455
1456 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1457 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1458 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1459
1460 Controller->V2.Event = slice_dma_loaf(DmaPages,
1461 sizeof(DAC960_V2_Event_T),
1462 &Controller->V2.EventDMA);
1463
1464 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1465 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1466 &Controller->V2.PhysicalToLogicalDeviceDMA);
1467
1468 /*
1469 Enable the Memory Mailbox Interface.
1470
1471 I don't know why we can't just use one of the memory mailboxes
1472 we just allocated to do this, instead of using this temporary one.
1473 Try this change later.
1474 */
1475 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1476 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1477 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1478 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1479 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1480 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1481 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1482 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1483 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1484 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1485 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1486 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1487 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1488 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1489 Controller->V2.HealthStatusBufferDMA;
1490 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1491 Controller->V2.FirstCommandMailboxDMA;
1492 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1493 Controller->V2.FirstStatusMailboxDMA;
1494 switch (Controller->HardwareType)
1495 {
1496 case DAC960_GEM_Controller:
1497 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1498 udelay(1);
1499 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1500 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1501 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1502 udelay(1);
1503 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1504 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1505 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1506 break;
1507 case DAC960_BA_Controller:
1508 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1509 udelay(1);
1510 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1511 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1512 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1513 udelay(1);
1514 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1515 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1516 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1517 break;
1518 case DAC960_LP_Controller:
1519 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1520 udelay(1);
1521 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1522 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1523 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1524 udelay(1);
1525 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1526 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1527 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1528 break;
1529 default:
1530 DAC960_Failure(Controller, "Unknown Controller Type\n");
1531 CommandStatus = DAC960_V2_AbormalCompletion;
1532 break;
1533 }
1534 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1535 CommandMailbox, CommandMailboxDMA);
1536 return (CommandStatus == DAC960_V2_NormalCompletion);
1537 }
1538
1539
1540 /*
1541 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1542 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1543 */
1544
1545 static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1546 *Controller)
1547 {
1548 DAC960_V1_Enquiry2_T *Enquiry2;
1549 dma_addr_t Enquiry2DMA;
1550 DAC960_V1_Config2_T *Config2;
1551 dma_addr_t Config2DMA;
1552 int LogicalDriveNumber, Channel, TargetID;
1553 struct dma_loaf local_dma;
1554
1555 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1556 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1557 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1558
1559 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1560 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1561
1562 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1563 Controller->V1.NewEnquiryDMA)) {
1564 free_dma_loaf(Controller->PCIDevice, &local_dma);
1565 return DAC960_Failure(Controller, "ENQUIRY");
1566 }
1567 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1568 sizeof(DAC960_V1_Enquiry_T));
1569
1570 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1571 free_dma_loaf(Controller->PCIDevice, &local_dma);
1572 return DAC960_Failure(Controller, "ENQUIRY2");
1573 }
1574
1575 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1576 free_dma_loaf(Controller->PCIDevice, &local_dma);
1577 return DAC960_Failure(Controller, "READ CONFIG2");
1578 }
1579
1580 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1581 Controller->V1.NewLogicalDriveInformationDMA)) {
1582 free_dma_loaf(Controller->PCIDevice, &local_dma);
1583 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1584 }
1585 memcpy(&Controller->V1.LogicalDriveInformation,
1586 Controller->V1.NewLogicalDriveInformation,
1587 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1588
1589 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1590 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1591 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1592 Channel, TargetID,
1593 Controller->V1.NewDeviceStateDMA)) {
1594 free_dma_loaf(Controller->PCIDevice, &local_dma);
1595 return DAC960_Failure(Controller, "GET DEVICE STATE");
1596 }
1597 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1598 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1599 }
1600 /*
1601 Initialize the Controller Model Name and Full Model Name fields.
1602 */
1603 switch (Enquiry2->HardwareID.SubModel)
1604 {
1605 case DAC960_V1_P_PD_PU:
1606 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1607 strcpy(Controller->ModelName, "DAC960PU");
1608 else strcpy(Controller->ModelName, "DAC960PD");
1609 break;
1610 case DAC960_V1_PL:
1611 strcpy(Controller->ModelName, "DAC960PL");
1612 break;
1613 case DAC960_V1_PG:
1614 strcpy(Controller->ModelName, "DAC960PG");
1615 break;
1616 case DAC960_V1_PJ:
1617 strcpy(Controller->ModelName, "DAC960PJ");
1618 break;
1619 case DAC960_V1_PR:
1620 strcpy(Controller->ModelName, "DAC960PR");
1621 break;
1622 case DAC960_V1_PT:
1623 strcpy(Controller->ModelName, "DAC960PT");
1624 break;
1625 case DAC960_V1_PTL0:
1626 strcpy(Controller->ModelName, "DAC960PTL0");
1627 break;
1628 case DAC960_V1_PRL:
1629 strcpy(Controller->ModelName, "DAC960PRL");
1630 break;
1631 case DAC960_V1_PTL1:
1632 strcpy(Controller->ModelName, "DAC960PTL1");
1633 break;
1634 case DAC960_V1_1164P:
1635 strcpy(Controller->ModelName, "DAC1164P");
1636 break;
1637 default:
1638 free_dma_loaf(Controller->PCIDevice, &local_dma);
1639 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1640 }
1641 strcpy(Controller->FullModelName, "Mylex ");
1642 strcat(Controller->FullModelName, Controller->ModelName);
1643 /*
1644 Initialize the Controller Firmware Version field and verify that it
1645 is a supported firmware version. The supported firmware versions are:
1646
1647 DAC1164P 5.06 and above
1648 DAC960PTL/PRL/PJ/PG 4.06 and above
1649 DAC960PU/PD/PL 3.51 and above
1650 DAC960PU/PD/PL/P 2.73 and above
1651 */
1652 #if defined(CONFIG_ALPHA)
1653 /*
1654 DEC Alpha machines were often equipped with DAC960 cards that were
1655 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1656 the last custom FW revision to be released by DEC for these older
1657 controllers, appears to work quite well with this driver.
1658
1659 Cards tested successfully were several versions each of the PD and
1660 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1661 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1662 back of the board, of:
1663
1664 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1665 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1666 */
1667 # define FIRMWARE_27X "2.70"
1668 #else
1669 # define FIRMWARE_27X "2.73"
1670 #endif
1671
1672 if (Enquiry2->FirmwareID.MajorVersion == 0)
1673 {
1674 Enquiry2->FirmwareID.MajorVersion =
1675 Controller->V1.Enquiry.MajorFirmwareVersion;
1676 Enquiry2->FirmwareID.MinorVersion =
1677 Controller->V1.Enquiry.MinorFirmwareVersion;
1678 Enquiry2->FirmwareID.FirmwareType = '0';
1679 Enquiry2->FirmwareID.TurnID = 0;
1680 }
1681 snprintf(Controller->FirmwareVersion, sizeof(Controller->FirmwareVersion),
1682 "%d.%02d-%c-%02d",
1683 Enquiry2->FirmwareID.MajorVersion,
1684 Enquiry2->FirmwareID.MinorVersion,
1685 Enquiry2->FirmwareID.FirmwareType,
1686 Enquiry2->FirmwareID.TurnID);
1687 if (!((Controller->FirmwareVersion[0] == '5' &&
1688 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1689 (Controller->FirmwareVersion[0] == '4' &&
1690 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1691 (Controller->FirmwareVersion[0] == '3' &&
1692 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1693 (Controller->FirmwareVersion[0] == '2' &&
1694 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1695 {
1696 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1697 DAC960_Error("Firmware Version = '%s'\n", Controller,
1698 Controller->FirmwareVersion);
1699 free_dma_loaf(Controller->PCIDevice, &local_dma);
1700 return false;
1701 }
1702 /*
1703 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1704 Enclosure Management Enabled fields.
1705 */
1706 Controller->Channels = Enquiry2->ActualChannels;
1707 Controller->Targets = Enquiry2->MaxTargets;
1708 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1709 Controller->V1.SAFTE_EnclosureManagementEnabled =
1710 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1711 /*
1712 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1713 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1714 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1715 less than the Controller Queue Depth to allow for an automatic drive
1716 rebuild operation.
1717 */
1718 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1719 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1720 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1721 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1722 Controller->LogicalDriveCount =
1723 Controller->V1.Enquiry.NumberOfLogicalDrives;
1724 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1725 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1726 Controller->DriverScatterGatherLimit =
1727 Controller->ControllerScatterGatherLimit;
1728 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1729 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1730 /*
1731 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1732 */
1733 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1734 >> (10 - DAC960_BlockSizeBits);
1735 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1736 >> (10 - DAC960_BlockSizeBits);
1737 switch (Config2->DriveGeometry)
1738 {
1739 case DAC960_V1_Geometry_128_32:
1740 Controller->V1.GeometryTranslationHeads = 128;
1741 Controller->V1.GeometryTranslationSectors = 32;
1742 break;
1743 case DAC960_V1_Geometry_255_63:
1744 Controller->V1.GeometryTranslationHeads = 255;
1745 Controller->V1.GeometryTranslationSectors = 63;
1746 break;
1747 default:
1748 free_dma_loaf(Controller->PCIDevice, &local_dma);
1749 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1750 }
1751 /*
1752 Initialize the Background Initialization Status.
1753 */
1754 if ((Controller->FirmwareVersion[0] == '4' &&
1755 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1756 (Controller->FirmwareVersion[0] == '5' &&
1757 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1758 {
1759 Controller->V1.BackgroundInitializationStatusSupported = true;
1760 DAC960_V1_ExecuteType3B(Controller,
1761 DAC960_V1_BackgroundInitializationControl, 0x20,
1762 Controller->
1763 V1.BackgroundInitializationStatusDMA);
1764 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1765 Controller->V1.BackgroundInitializationStatus,
1766 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1767 }
1768 /*
1769 Initialize the Logical Drive Initially Accessible flag.
1770 */
1771 for (LogicalDriveNumber = 0;
1772 LogicalDriveNumber < Controller->LogicalDriveCount;
1773 LogicalDriveNumber++)
1774 if (Controller->V1.LogicalDriveInformation
1775 [LogicalDriveNumber].LogicalDriveState !=
1776 DAC960_V1_LogicalDrive_Offline)
1777 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1778 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1779 free_dma_loaf(Controller->PCIDevice, &local_dma);
1780 return true;
1781 }
1782
1783
1784 /*
1785 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1786 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1787 */
1788
1789 static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1790 *Controller)
1791 {
1792 DAC960_V2_ControllerInfo_T *ControllerInfo =
1793 &Controller->V2.ControllerInformation;
1794 unsigned short LogicalDeviceNumber = 0;
1795 int ModelNameLength;
1796
1797 /* Get data into dma-able area, then copy into permanent location */
1798 if (!DAC960_V2_NewControllerInfo(Controller))
1799 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1800 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1801 sizeof(DAC960_V2_ControllerInfo_T));
1802
1803
1804 if (!DAC960_V2_GeneralInfo(Controller))
1805 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1806
1807 /*
1808 Initialize the Controller Model Name and Full Model Name fields.
1809 */
1810 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1811 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1812 ModelNameLength = sizeof(Controller->ModelName)-1;
1813 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1814 ModelNameLength);
1815 ModelNameLength--;
1816 while (Controller->ModelName[ModelNameLength] == ' ' ||
1817 Controller->ModelName[ModelNameLength] == '\0')
1818 ModelNameLength--;
1819 Controller->ModelName[++ModelNameLength] = '\0';
1820 strcpy(Controller->FullModelName, "Mylex ");
1821 strcat(Controller->FullModelName, Controller->ModelName);
1822 /*
1823 Initialize the Controller Firmware Version field.
1824 */
1825 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1826 ControllerInfo->FirmwareMajorVersion,
1827 ControllerInfo->FirmwareMinorVersion,
1828 ControllerInfo->FirmwareTurnNumber);
1829 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1830 ControllerInfo->FirmwareMinorVersion == 0 &&
1831 ControllerInfo->FirmwareTurnNumber < 1)
1832 {
1833 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1834 Controller, Controller->FirmwareVersion);
1835 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1836 Controller);
1837 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1838 Controller);
1839 }
1840 /*
1841 Initialize the Controller Channels, Targets, and Memory Size.
1842 */
1843 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1844 Controller->Targets =
1845 ControllerInfo->MaximumTargetsPerChannel
1846 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1847 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1848 /*
1849 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1850 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1851 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1852 less than the Controller Queue Depth to allow for an automatic drive
1853 rebuild operation.
1854 */
1855 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1856 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1857 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1858 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1859 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1860 Controller->MaxBlocksPerCommand =
1861 ControllerInfo->MaximumDataTransferSizeInBlocks;
1862 Controller->ControllerScatterGatherLimit =
1863 ControllerInfo->MaximumScatterGatherEntries;
1864 Controller->DriverScatterGatherLimit =
1865 Controller->ControllerScatterGatherLimit;
1866 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1867 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1868 /*
1869 Initialize the Logical Device Information.
1870 */
1871 while (true)
1872 {
1873 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1874 Controller->V2.NewLogicalDeviceInformation;
1875 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1876 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1877
1878 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1879 break;
1880 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1881 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1882 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1883 Controller, LogicalDeviceNumber);
1884 break;
1885 }
1886 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1887 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1888 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1889 LogicalDeviceNumber++;
1890 continue;
1891 }
1892 PhysicalDevice.Controller = 0;
1893 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1894 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1895 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1896 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1897 PhysicalDevice;
1898 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1899 DAC960_V2_LogicalDevice_Offline)
1900 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1901 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1902 GFP_ATOMIC);
1903 if (LogicalDeviceInfo == NULL)
1904 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1905 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1906 LogicalDeviceInfo;
1907 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1908 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1909 LogicalDeviceNumber++;
1910 }
1911 return true;
1912 }
1913
1914
1915 /*
1916 DAC960_ReportControllerConfiguration reports the Configuration Information
1917 for Controller.
1918 */
1919
1920 static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1921 *Controller)
1922 {
1923 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1924 Controller, Controller->ModelName);
1925 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1926 Controller, Controller->FirmwareVersion,
1927 Controller->Channels, Controller->MemorySize);
1928 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1929 Controller, Controller->Bus,
1930 Controller->Device, Controller->Function);
1931 if (Controller->IO_Address == 0)
1932 DAC960_Info("Unassigned\n", Controller);
1933 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1934 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1935 Controller, Controller->PCI_Address,
1936 (unsigned long) Controller->BaseAddress,
1937 Controller->IRQ_Channel);
1938 DAC960_Info(" Controller Queue Depth: %d, "
1939 "Maximum Blocks per Command: %d\n",
1940 Controller, Controller->ControllerQueueDepth,
1941 Controller->MaxBlocksPerCommand);
1942 DAC960_Info(" Driver Queue Depth: %d, "
1943 "Scatter/Gather Limit: %d of %d Segments\n",
1944 Controller, Controller->DriverQueueDepth,
1945 Controller->DriverScatterGatherLimit,
1946 Controller->ControllerScatterGatherLimit);
1947 if (Controller->FirmwareType == DAC960_V1_Controller)
1948 {
1949 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1950 "BIOS Geometry: %d/%d\n", Controller,
1951 Controller->V1.StripeSize,
1952 Controller->V1.SegmentSize,
1953 Controller->V1.GeometryTranslationHeads,
1954 Controller->V1.GeometryTranslationSectors);
1955 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1956 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1957 }
1958 return true;
1959 }
1960
1961
1962 /*
1963 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1964 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1965 Inquiry Unit Serial Number information for each device connected to
1966 Controller.
1967 */
1968
1969 static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1970 *Controller)
1971 {
1972 struct dma_loaf local_dma;
1973
1974 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1975 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1976
1977 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1978 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1979
1980 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1981 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1982
1983 struct completion Completions[DAC960_V1_MaxChannels];
1984 unsigned long flags;
1985 int Channel, TargetID;
1986
1987 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1988 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1989 sizeof(DAC960_SCSI_Inquiry_T) +
1990 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1991 return DAC960_Failure(Controller,
1992 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1993
1994 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1995 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1996 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1997 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1998 sizeof(DAC960_SCSI_Inquiry_T),
1999 SCSI_Inquiry_dma + Channel);
2000 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
2001 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
2002 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
2003 }
2004
2005 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2006 {
2007 /*
2008 * For each channel, submit a probe for a device on that channel.
2009 * The timeout interval for a device that is present is 10 seconds.
2010 * With this approach, the timeout periods can elapse in parallel
2011 * on each channel.
2012 */
2013 for (Channel = 0; Channel < Controller->Channels; Channel++)
2014 {
2015 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2016 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2017 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2018 DAC960_Command_T *Command = Controller->Commands[Channel];
2019 struct completion *Completion = &Completions[Channel];
2020
2021 init_completion(Completion);
2022 DAC960_V1_ClearCommand(Command);
2023 Command->CommandType = DAC960_ImmediateCommand;
2024 Command->Completion = Completion;
2025 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2026 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2027 DCDB->Channel = Channel;
2028 DCDB->TargetID = TargetID;
2029 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2030 DCDB->EarlyStatus = false;
2031 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2032 DCDB->NoAutomaticRequestSense = false;
2033 DCDB->DisconnectPermitted = true;
2034 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2035 DCDB->BusAddress = NewInquiryStandardDataDMA;
2036 DCDB->CDBLength = 6;
2037 DCDB->TransferLengthHigh4 = 0;
2038 DCDB->SenseLength = sizeof(DCDB->SenseData);
2039 DCDB->CDB[0] = 0x12; /* INQUIRY */
2040 DCDB->CDB[1] = 0; /* EVPD = 0 */
2041 DCDB->CDB[2] = 0; /* Page Code */
2042 DCDB->CDB[3] = 0; /* Reserved */
2043 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2044 DCDB->CDB[5] = 0; /* Control */
2045
2046 spin_lock_irqsave(&Controller->queue_lock, flags);
2047 DAC960_QueueCommand(Command);
2048 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2049 }
2050 /*
2051 * Wait for the problems submitted in the previous loop
2052 * to complete. On the probes that are successful,
2053 * get the serial number of the device that was found.
2054 */
2055 for (Channel = 0; Channel < Controller->Channels; Channel++)
2056 {
2057 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2058 &Controller->V1.InquiryStandardData[Channel][TargetID];
2059 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2060 dma_addr_t NewInquiryUnitSerialNumberDMA =
2061 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2062 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2063 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2064 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2065 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2066 DAC960_Command_T *Command = Controller->Commands[Channel];
2067 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2068 struct completion *Completion = &Completions[Channel];
2069
2070 wait_for_completion(Completion);
2071
2072 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2073 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2074 InquiryStandardData->PeripheralDeviceType = 0x1F;
2075 continue;
2076 } else
2077 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2078
2079 /* Preserve Channel and TargetID values from the previous loop */
2080 Command->Completion = Completion;
2081 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2082 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2083 DCDB->SenseLength = sizeof(DCDB->SenseData);
2084 DCDB->CDB[0] = 0x12; /* INQUIRY */
2085 DCDB->CDB[1] = 1; /* EVPD = 1 */
2086 DCDB->CDB[2] = 0x80; /* Page Code */
2087 DCDB->CDB[3] = 0; /* Reserved */
2088 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2089 DCDB->CDB[5] = 0; /* Control */
2090
2091 spin_lock_irqsave(&Controller->queue_lock, flags);
2092 DAC960_QueueCommand(Command);
2093 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2094 wait_for_completion(Completion);
2095
2096 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2097 memset(InquiryUnitSerialNumber, 0,
2098 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2099 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2100 } else
2101 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2102 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2103 }
2104 }
2105 free_dma_loaf(Controller->PCIDevice, &local_dma);
2106 return true;
2107 }
2108
2109
2110 /*
2111 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2112 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2113 Information and SCSI Inquiry Unit Serial Number information for each
2114 device connected to Controller.
2115 */
2116
2117 static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
2118 *Controller)
2119 {
2120 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2121 unsigned short PhysicalDeviceIndex = 0;
2122
2123 while (true)
2124 {
2125 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2126 Controller->V2.NewPhysicalDeviceInformation;
2127 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2128 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2129 Controller->V2.NewInquiryUnitSerialNumber;
2130 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2131
2132 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2133 break;
2134
2135 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2136 GFP_ATOMIC);
2137 if (PhysicalDeviceInfo == NULL)
2138 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2139 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2140 PhysicalDeviceInfo;
2141 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2142 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2143
2144 InquiryUnitSerialNumber = kmalloc(
2145 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
2146 if (InquiryUnitSerialNumber == NULL) {
2147 kfree(PhysicalDeviceInfo);
2148 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2149 }
2150 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2151 InquiryUnitSerialNumber;
2152
2153 Channel = NewPhysicalDeviceInfo->Channel;
2154 TargetID = NewPhysicalDeviceInfo->TargetID;
2155 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2156
2157 /*
2158 Some devices do NOT have Unit Serial Numbers.
2159 This command fails for them. But, we still want to
2160 remember those devices are there. Construct a
2161 UnitSerialNumber structure for the failure case.
2162 */
2163 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2164 memset(InquiryUnitSerialNumber, 0,
2165 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2166 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2167 } else
2168 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2169 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2170
2171 PhysicalDeviceIndex++;
2172 LogicalUnit++;
2173 }
2174 return true;
2175 }
2176
2177
2178 /*
2179 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2180 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2181 Unit Serial Number structures.
2182 */
2183
2184 static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2185 *InquiryStandardData,
2186 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2187 *InquiryUnitSerialNumber,
2188 unsigned char *Vendor,
2189 unsigned char *Model,
2190 unsigned char *Revision,
2191 unsigned char *SerialNumber)
2192 {
2193 int SerialNumberLength, i;
2194 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2195 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2196 {
2197 unsigned char VendorCharacter =
2198 InquiryStandardData->VendorIdentification[i];
2199 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2200 ? VendorCharacter : ' ');
2201 }
2202 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2203 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2204 {
2205 unsigned char ModelCharacter =
2206 InquiryStandardData->ProductIdentification[i];
2207 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2208 ? ModelCharacter : ' ');
2209 }
2210 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2211 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2212 {
2213 unsigned char RevisionCharacter =
2214 InquiryStandardData->ProductRevisionLevel[i];
2215 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2216 ? RevisionCharacter : ' ');
2217 }
2218 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2219 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2220 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2221 if (SerialNumberLength >
2222 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2223 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2224 for (i = 0; i < SerialNumberLength; i++)
2225 {
2226 unsigned char SerialNumberCharacter =
2227 InquiryUnitSerialNumber->ProductSerialNumber[i];
2228 SerialNumber[i] =
2229 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2230 ? SerialNumberCharacter : ' ');
2231 }
2232 SerialNumber[SerialNumberLength] = '\0';
2233 }
2234
2235
2236 /*
2237 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2238 Information for DAC960 V1 Firmware Controllers.
2239 */
2240
2241 static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
2242 *Controller)
2243 {
2244 int LogicalDriveNumber, Channel, TargetID;
2245 DAC960_Info(" Physical Devices:\n", Controller);
2246 for (Channel = 0; Channel < Controller->Channels; Channel++)
2247 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2248 {
2249 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2250 &Controller->V1.InquiryStandardData[Channel][TargetID];
2251 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2252 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2253 DAC960_V1_DeviceState_T *DeviceState =
2254 &Controller->V1.DeviceState[Channel][TargetID];
2255 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2256 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2257 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2258 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2259 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2260 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2261 ->ProductSerialNumber)];
2262 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2263 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2264 Vendor, Model, Revision, SerialNumber);
2265 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2266 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2267 Vendor, Model, Revision);
2268 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2269 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2270 if (DeviceState->Present &&
2271 DeviceState->DeviceType == DAC960_V1_DiskType)
2272 {
2273 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2274 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2275 Controller,
2276 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2277 ? "Dead"
2278 : DeviceState->DeviceState
2279 == DAC960_V1_Device_WriteOnly
2280 ? "Write-Only"
2281 : DeviceState->DeviceState
2282 == DAC960_V1_Device_Online
2283 ? "Online" : "Standby"),
2284 DeviceState->DiskSize,
2285 Controller->V1.DeviceResetCount[Channel][TargetID]);
2286 else
2287 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2288 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2289 ? "Dead"
2290 : DeviceState->DeviceState
2291 == DAC960_V1_Device_WriteOnly
2292 ? "Write-Only"
2293 : DeviceState->DeviceState
2294 == DAC960_V1_Device_Online
2295 ? "Online" : "Standby"),
2296 DeviceState->DiskSize);
2297 }
2298 if (ErrorEntry->ParityErrorCount > 0 ||
2299 ErrorEntry->SoftErrorCount > 0 ||
2300 ErrorEntry->HardErrorCount > 0 ||
2301 ErrorEntry->MiscErrorCount > 0)
2302 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2303 "Hard: %d, Misc: %d\n", Controller,
2304 ErrorEntry->ParityErrorCount,
2305 ErrorEntry->SoftErrorCount,
2306 ErrorEntry->HardErrorCount,
2307 ErrorEntry->MiscErrorCount);
2308 }
2309 DAC960_Info(" Logical Drives:\n", Controller);
2310 for (LogicalDriveNumber = 0;
2311 LogicalDriveNumber < Controller->LogicalDriveCount;
2312 LogicalDriveNumber++)
2313 {
2314 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2315 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2316 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2317 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2318 LogicalDriveInformation->RAIDLevel,
2319 (LogicalDriveInformation->LogicalDriveState
2320 == DAC960_V1_LogicalDrive_Online
2321 ? "Online"
2322 : LogicalDriveInformation->LogicalDriveState
2323 == DAC960_V1_LogicalDrive_Critical
2324 ? "Critical" : "Offline"),
2325 LogicalDriveInformation->LogicalDriveSize,
2326 (LogicalDriveInformation->WriteBack
2327 ? "Write Back" : "Write Thru"));
2328 }
2329 return true;
2330 }
2331
2332
2333 /*
2334 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2335 Information for DAC960 V2 Firmware Controllers.
2336 */
2337
2338 static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
2339 *Controller)
2340 {
2341 int PhysicalDeviceIndex, LogicalDriveNumber;
2342 DAC960_Info(" Physical Devices:\n", Controller);
2343 for (PhysicalDeviceIndex = 0;
2344 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2345 PhysicalDeviceIndex++)
2346 {
2347 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2348 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2349 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2350 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2351 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2352 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2353 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2354 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2355 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2356 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2357 if (PhysicalDeviceInfo == NULL) break;
2358 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2359 Vendor, Model, Revision, SerialNumber);
2360 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2361 Controller,
2362 PhysicalDeviceInfo->Channel,
2363 PhysicalDeviceInfo->TargetID,
2364 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2365 Vendor, Model, Revision);
2366 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2367 DAC960_Info(" %sAsynchronous\n", Controller,
2368 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2369 ? "Wide " :""));
2370 else
2371 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2372 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2373 ? "Wide " :""),
2374 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2375 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2376 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2377 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2378 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2379 DAC960_V2_Device_Unconfigured)
2380 continue;
2381 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2382 (PhysicalDeviceInfo->PhysicalDeviceState
2383 == DAC960_V2_Device_Online
2384 ? "Online"
2385 : PhysicalDeviceInfo->PhysicalDeviceState
2386 == DAC960_V2_Device_Rebuild
2387 ? "Rebuild"
2388 : PhysicalDeviceInfo->PhysicalDeviceState
2389 == DAC960_V2_Device_Missing
2390 ? "Missing"
2391 : PhysicalDeviceInfo->PhysicalDeviceState
2392 == DAC960_V2_Device_Critical
2393 ? "Critical"
2394 : PhysicalDeviceInfo->PhysicalDeviceState
2395 == DAC960_V2_Device_Dead
2396 ? "Dead"
2397 : PhysicalDeviceInfo->PhysicalDeviceState
2398 == DAC960_V2_Device_SuspectedDead
2399 ? "Suspected-Dead"
2400 : PhysicalDeviceInfo->PhysicalDeviceState
2401 == DAC960_V2_Device_CommandedOffline
2402 ? "Commanded-Offline"
2403 : PhysicalDeviceInfo->PhysicalDeviceState
2404 == DAC960_V2_Device_Standby
2405 ? "Standby" : "Unknown"),
2406 PhysicalDeviceInfo->ConfigurableDeviceSize);
2407 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2408 PhysicalDeviceInfo->SoftErrors == 0 &&
2409 PhysicalDeviceInfo->HardErrors == 0 &&
2410 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2411 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2412 PhysicalDeviceInfo->Retries == 0 &&
2413 PhysicalDeviceInfo->Aborts == 0 &&
2414 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2415 continue;
2416 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2417 "Hard: %d, Misc: %d\n", Controller,
2418 PhysicalDeviceInfo->ParityErrors,
2419 PhysicalDeviceInfo->SoftErrors,
2420 PhysicalDeviceInfo->HardErrors,
2421 PhysicalDeviceInfo->MiscellaneousErrors);
2422 DAC960_Info(" Timeouts: %d, Retries: %d, "
2423 "Aborts: %d, Predicted: %d\n", Controller,
2424 PhysicalDeviceInfo->CommandTimeouts,
2425 PhysicalDeviceInfo->Retries,
2426 PhysicalDeviceInfo->Aborts,
2427 PhysicalDeviceInfo->PredictedFailuresDetected);
2428 }
2429 DAC960_Info(" Logical Drives:\n", Controller);
2430 for (LogicalDriveNumber = 0;
2431 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2432 LogicalDriveNumber++)
2433 {
2434 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2435 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2436 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2437 "Read Cache Enabled",
2438 "Read Ahead Enabled",
2439 "Intelligent Read Ahead Enabled",
2440 "-", "-", "-", "-" };
2441 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2442 "Logical Device Read Only",
2443 "Write Cache Enabled",
2444 "Intelligent Write Cache Enabled",
2445 "-", "-", "-", "-" };
2446 unsigned char *GeometryTranslation;
2447 if (LogicalDeviceInfo == NULL) continue;
2448 switch (LogicalDeviceInfo->DriveGeometry)
2449 {
2450 case DAC960_V2_Geometry_128_32:
2451 GeometryTranslation = "128/32";
2452 break;
2453 case DAC960_V2_Geometry_255_63:
2454 GeometryTranslation = "255/63";
2455 break;
2456 default:
2457 GeometryTranslation = "Invalid";
2458 DAC960_Error("Illegal Logical Device Geometry %d\n",
2459 Controller, LogicalDeviceInfo->DriveGeometry);
2460 break;
2461 }
2462 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2463 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2464 LogicalDeviceInfo->RAIDLevel,
2465 (LogicalDeviceInfo->LogicalDeviceState
2466 == DAC960_V2_LogicalDevice_Online
2467 ? "Online"
2468 : LogicalDeviceInfo->LogicalDeviceState
2469 == DAC960_V2_LogicalDevice_Critical
2470 ? "Critical" : "Offline"),
2471 LogicalDeviceInfo->ConfigurableDeviceSize);
2472 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2473 Controller,
2474 (LogicalDeviceInfo->LogicalDeviceControl
2475 .LogicalDeviceInitialized
2476 ? "Initialized" : "Uninitialized"),
2477 GeometryTranslation);
2478 if (LogicalDeviceInfo->StripeSize == 0)
2479 {
2480 if (LogicalDeviceInfo->CacheLineSize == 0)
2481 DAC960_Info(" Stripe Size: N/A, "
2482 "Segment Size: N/A\n", Controller);
2483 else
2484 DAC960_Info(" Stripe Size: N/A, "
2485 "Segment Size: %dKB\n", Controller,
2486 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2487 }
2488 else
2489 {
2490 if (LogicalDeviceInfo->CacheLineSize == 0)
2491 DAC960_Info(" Stripe Size: %dKB, "
2492 "Segment Size: N/A\n", Controller,
2493 1 << (LogicalDeviceInfo->StripeSize - 2));
2494 else
2495 DAC960_Info(" Stripe Size: %dKB, "
2496 "Segment Size: %dKB\n", Controller,
2497 1 << (LogicalDeviceInfo->StripeSize - 2),
2498 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2499 }
2500 DAC960_Info(" %s, %s\n", Controller,
2501 ReadCacheStatus[
2502 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2503 WriteCacheStatus[
2504 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2505 if (LogicalDeviceInfo->SoftErrors > 0 ||
2506 LogicalDeviceInfo->CommandsFailed > 0 ||
2507 LogicalDeviceInfo->DeferredWriteErrors)
2508 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2509 "Deferred Write: %d\n", Controller,
2510 LogicalDeviceInfo->SoftErrors,
2511 LogicalDeviceInfo->CommandsFailed,
2512 LogicalDeviceInfo->DeferredWriteErrors);
2513
2514 }
2515 return true;
2516 }
2517
2518 /*
2519 DAC960_RegisterBlockDevice registers the Block Device structures
2520 associated with Controller.
2521 */
2522
2523 static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
2524 {
2525 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2526 int n;
2527
2528 /*
2529 Register the Block Device Major Number for this DAC960 Controller.
2530 */
2531 if (register_blkdev(MajorNumber, "dac960") < 0)
2532 return false;
2533
2534 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2535 struct gendisk *disk = Controller->disks[n];
2536 struct request_queue *RequestQueue;
2537
2538 /* for now, let all request queues share controller's lock */
2539 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2540 if (!RequestQueue) {
2541 printk("DAC960: failure to allocate request queue\n");
2542 continue;
2543 }
2544 Controller->RequestQueue[n] = RequestQueue;
2545 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2546 RequestQueue->queuedata = Controller;
2547 blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2548 blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2549 disk->queue = RequestQueue;
2550 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
2551 disk->major = MajorNumber;
2552 disk->first_minor = n << DAC960_MaxPartitionsBits;
2553 disk->fops = &DAC960_BlockDeviceOperations;
2554 }
2555 /*
2556 Indicate the Block Device Registration completed successfully,
2557 */
2558 return true;
2559 }
2560
2561
2562 /*
2563 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2564 associated with Controller.
2565 */
2566
2567 static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2568 {
2569 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2570 int disk;
2571
2572 /* does order matter when deleting gendisk and cleanup in request queue? */
2573 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2574 del_gendisk(Controller->disks[disk]);
2575 blk_cleanup_queue(Controller->RequestQueue[disk]);
2576 Controller->RequestQueue[disk] = NULL;
2577 }
2578
2579 /*
2580 Unregister the Block Device Major Number for this DAC960 Controller.
2581 */
2582 unregister_blkdev(MajorNumber, "dac960");
2583 }
2584
2585 /*
2586 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2587 Information Partition Sector Counts and Block Sizes.
2588 */
2589
2590 static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2591 {
2592 int disk;
2593 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2594 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2595 }
2596
2597 /*
2598 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2599 the Error Status Register when the driver performs the BIOS handshaking.
2600 It returns true for fatal errors and false otherwise.
2601 */
2602
2603 static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2604 unsigned char ErrorStatus,
2605 unsigned char Parameter0,
2606 unsigned char Parameter1)
2607 {
2608 switch (ErrorStatus)
2609 {
2610 case 0x00:
2611 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2612 Controller, Parameter1, Parameter0);
2613 break;
2614 case 0x08:
2615 if (Controller->DriveSpinUpMessageDisplayed) break;
2616 DAC960_Notice("Spinning Up Drives\n", Controller);
2617 Controller->DriveSpinUpMessageDisplayed = true;
2618 break;
2619 case 0x30:
2620 DAC960_Notice("Configuration Checksum Error\n", Controller);
2621 break;
2622 case 0x60:
2623 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2624 break;
2625 case 0x70:
2626 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2627 break;
2628 case 0x90:
2629 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2630 Controller, Parameter1, Parameter0);
2631 break;
2632 case 0xA0:
2633 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2634 break;
2635 case 0xB0:
2636 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2637 break;
2638 case 0xD0:
2639 DAC960_Notice("New Controller Configuration Found\n", Controller);
2640 break;
2641 case 0xF0:
2642 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2643 return true;
2644 default:
2645 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2646 Controller, ErrorStatus);
2647 return true;
2648 }
2649 return false;
2650 }
2651
2652
2653 /*
2654 * DAC960_DetectCleanup releases the resources that were allocated
2655 * during DAC960_DetectController(). DAC960_DetectController can
2656 * has several internal failure points, so not ALL resources may
2657 * have been allocated. It's important to free only
2658 * resources that HAVE been allocated. The code below always
2659 * tests that the resource has been allocated before attempting to
2660 * free it.
2661 */
2662 static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2663 {
2664 int i;
2665
2666 /* Free the memory mailbox, status, and related structures */
2667 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2668 if (Controller->MemoryMappedAddress) {
2669 switch(Controller->HardwareType)
2670 {
2671 case DAC960_GEM_Controller:
2672 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2673 break;
2674 case DAC960_BA_Controller:
2675 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2676 break;
2677 case DAC960_LP_Controller:
2678 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2679 break;
2680 case DAC960_LA_Controller:
2681 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2682 break;
2683 case DAC960_PG_Controller:
2684 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2685 break;
2686 case DAC960_PD_Controller:
2687 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2688 break;
2689 case DAC960_P_Controller:
2690 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2691 break;
2692 }
2693 iounmap(Controller->MemoryMappedAddress);
2694 }
2695 if (Controller->IRQ_Channel)
2696 free_irq(Controller->IRQ_Channel, Controller);
2697 if (Controller->IO_Address)
2698 release_region(Controller->IO_Address, 0x80);
2699 pci_disable_device(Controller->PCIDevice);
2700 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2701 put_disk(Controller->disks[i]);
2702 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2703 kfree(Controller);
2704 }
2705
2706
2707 /*
2708 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2709 PCI RAID Controllers by interrogating the PCI Configuration Space for
2710 Controller Type.
2711 */
2712
2713 static DAC960_Controller_T *
2714 DAC960_DetectController(struct pci_dev *PCI_Device,
2715 const struct pci_device_id *entry)
2716 {
2717 struct DAC960_privdata *privdata =
2718 (struct DAC960_privdata *)entry->driver_data;
2719 irq_handler_t InterruptHandler = privdata->InterruptHandler;
2720 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2721 DAC960_Controller_T *Controller = NULL;
2722 unsigned char DeviceFunction = PCI_Device->devfn;
2723 unsigned char ErrorStatus, Parameter0, Parameter1;
2724 unsigned int IRQ_Channel;
2725 void __iomem *BaseAddress;
2726 int i;
2727
2728 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2729 if (Controller == NULL) {
2730 DAC960_Error("Unable to allocate Controller structure for "
2731 "Controller at\n", NULL);
2732 return NULL;
2733 }
2734 Controller->ControllerNumber = DAC960_ControllerCount;
2735 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2736 Controller->Bus = PCI_Device->bus->number;
2737 Controller->FirmwareType = privdata->FirmwareType;
2738 Controller->HardwareType = privdata->HardwareType;
2739 Controller->Device = DeviceFunction >> 3;
2740 Controller->Function = DeviceFunction & 0x7;
2741 Controller->PCIDevice = PCI_Device;
2742 strcpy(Controller->FullModelName, "DAC960");
2743
2744 if (pci_enable_device(PCI_Device))
2745 goto Failure;
2746
2747 switch (Controller->HardwareType)
2748 {
2749 case DAC960_GEM_Controller:
2750 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2751 break;
2752 case DAC960_BA_Controller:
2753 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2754 break;
2755 case DAC960_LP_Controller:
2756 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2757 break;
2758 case DAC960_LA_Controller:
2759 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2760 break;
2761 case DAC960_PG_Controller:
2762 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2763 break;
2764 case DAC960_PD_Controller:
2765 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2766 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2767 break;
2768 case DAC960_P_Controller:
2769 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2770 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2771 break;
2772 }
2773
2774 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2775 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2776 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2777 if (!Controller->disks[i])
2778 goto Failure;
2779 Controller->disks[i]->private_data = (void *)((long)i);
2780 }
2781 init_waitqueue_head(&Controller->CommandWaitQueue);
2782 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2783 spin_lock_init(&Controller->queue_lock);
2784 DAC960_AnnounceDriver(Controller);
2785 /*
2786 Map the Controller Register Window.
2787 */
2788 if (MemoryWindowSize < PAGE_SIZE)
2789 MemoryWindowSize = PAGE_SIZE;
2790 Controller->MemoryMappedAddress =
2791 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2792 Controller->BaseAddress =
2793 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2794 if (Controller->MemoryMappedAddress == NULL)
2795 {
2796 DAC960_Error("Unable to map Controller Register Window for "
2797 "Controller at\n", Controller);
2798 goto Failure;
2799 }
2800 BaseAddress = Controller->BaseAddress;
2801 switch (Controller->HardwareType)
2802 {
2803 case DAC960_GEM_Controller:
2804 DAC960_GEM_DisableInterrupts(BaseAddress);
2805 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2806 udelay(1000);
2807 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2808 {
2809 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2810 &Parameter0, &Parameter1) &&
2811 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2812 Parameter0, Parameter1))
2813 goto Failure;
2814 udelay(10);
2815 }
2816 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2817 {
2818 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2819 "for Controller at\n", Controller);
2820 goto Failure;
2821 }
2822 DAC960_GEM_EnableInterrupts(BaseAddress);
2823 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2824 Controller->ReadControllerConfiguration =
2825 DAC960_V2_ReadControllerConfiguration;
2826 Controller->ReadDeviceConfiguration =
2827 DAC960_V2_ReadDeviceConfiguration;
2828 Controller->ReportDeviceConfiguration =
2829 DAC960_V2_ReportDeviceConfiguration;
2830 Controller->QueueReadWriteCommand =
2831 DAC960_V2_QueueReadWriteCommand;
2832 break;
2833 case DAC960_BA_Controller:
2834 DAC960_BA_DisableInterrupts(BaseAddress);
2835 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2836 udelay(1000);
2837 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2838 {
2839 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2840 &Parameter0, &Parameter1) &&
2841 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2842 Parameter0, Parameter1))
2843 goto Failure;
2844 udelay(10);
2845 }
2846 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2847 {
2848 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2849 "for Controller at\n", Controller);
2850 goto Failure;
2851 }
2852 DAC960_BA_EnableInterrupts(BaseAddress);
2853 Controller->QueueCommand = DAC960_BA_QueueCommand;
2854 Controller->ReadControllerConfiguration =
2855 DAC960_V2_ReadControllerConfiguration;
2856 Controller->ReadDeviceConfiguration =
2857 DAC960_V2_ReadDeviceConfiguration;
2858 Controller->ReportDeviceConfiguration =
2859 DAC960_V2_ReportDeviceConfiguration;
2860 Controller->QueueReadWriteCommand =
2861 DAC960_V2_QueueReadWriteCommand;
2862 break;
2863 case DAC960_LP_Controller:
2864 DAC960_LP_DisableInterrupts(BaseAddress);
2865 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2866 udelay(1000);
2867 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2868 {
2869 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2870 &Parameter0, &Parameter1) &&
2871 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2872 Parameter0, Parameter1))
2873 goto Failure;
2874 udelay(10);
2875 }
2876 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2877 {
2878 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2879 "for Controller at\n", Controller);
2880 goto Failure;
2881 }
2882 DAC960_LP_EnableInterrupts(BaseAddress);
2883 Controller->QueueCommand = DAC960_LP_QueueCommand;
2884 Controller->ReadControllerConfiguration =
2885 DAC960_V2_ReadControllerConfiguration;
2886 Controller->ReadDeviceConfiguration =
2887 DAC960_V2_ReadDeviceConfiguration;
2888 Controller->ReportDeviceConfiguration =
2889 DAC960_V2_ReportDeviceConfiguration;
2890 Controller->QueueReadWriteCommand =
2891 DAC960_V2_QueueReadWriteCommand;
2892 break;
2893 case DAC960_LA_Controller:
2894 DAC960_LA_DisableInterrupts(BaseAddress);
2895 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2896 udelay(1000);
2897 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2898 {
2899 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2900 &Parameter0, &Parameter1) &&
2901 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2902 Parameter0, Parameter1))
2903 goto Failure;
2904 udelay(10);
2905 }
2906 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2907 {
2908 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2909 "for Controller at\n", Controller);
2910 goto Failure;
2911 }
2912 DAC960_LA_EnableInterrupts(BaseAddress);
2913 if (Controller->V1.DualModeMemoryMailboxInterface)
2914 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2915 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2916 Controller->ReadControllerConfiguration =
2917 DAC960_V1_ReadControllerConfiguration;
2918 Controller->ReadDeviceConfiguration =
2919 DAC960_V1_ReadDeviceConfiguration;
2920 Controller->ReportDeviceConfiguration =
2921 DAC960_V1_ReportDeviceConfiguration;
2922 Controller->QueueReadWriteCommand =
2923 DAC960_V1_QueueReadWriteCommand;
2924 break;
2925 case DAC960_PG_Controller:
2926 DAC960_PG_DisableInterrupts(BaseAddress);
2927 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2928 udelay(1000);
2929 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2930 {
2931 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2932 &Parameter0, &Parameter1) &&
2933 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2934 Parameter0, Parameter1))
2935 goto Failure;
2936 udelay(10);
2937 }
2938 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2939 {
2940 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2941 "for Controller at\n", Controller);
2942 goto Failure;
2943 }
2944 DAC960_PG_EnableInterrupts(BaseAddress);
2945 if (Controller->V1.DualModeMemoryMailboxInterface)
2946 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2947 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2948 Controller->ReadControllerConfiguration =
2949 DAC960_V1_ReadControllerConfiguration;
2950 Controller->ReadDeviceConfiguration =
2951 DAC960_V1_ReadDeviceConfiguration;
2952 Controller->ReportDeviceConfiguration =
2953 DAC960_V1_ReportDeviceConfiguration;
2954 Controller->QueueReadWriteCommand =
2955 DAC960_V1_QueueReadWriteCommand;
2956 break;
2957 case DAC960_PD_Controller:
2958 if (!request_region(Controller->IO_Address, 0x80,
2959 Controller->FullModelName)) {
2960 DAC960_Error("IO port 0x%lx busy for Controller at\n",
2961 Controller, Controller->IO_Address);
2962 goto Failure;
2963 }
2964 DAC960_PD_DisableInterrupts(BaseAddress);
2965 DAC960_PD_AcknowledgeStatus(BaseAddress);
2966 udelay(1000);
2967 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2968 {
2969 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2970 &Parameter0, &Parameter1) &&
2971 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2972 Parameter0, Parameter1))
2973 goto Failure;
2974 udelay(10);
2975 }
2976 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2977 {
2978 DAC960_Error("Unable to allocate DMA mapped memory "
2979 "for Controller at\n", Controller);
2980 goto Failure;
2981 }
2982 DAC960_PD_EnableInterrupts(BaseAddress);
2983 Controller->QueueCommand = DAC960_PD_QueueCommand;
2984 Controller->ReadControllerConfiguration =
2985 DAC960_V1_ReadControllerConfiguration;
2986 Controller->ReadDeviceConfiguration =
2987 DAC960_V1_ReadDeviceConfiguration;
2988 Controller->ReportDeviceConfiguration =
2989 DAC960_V1_ReportDeviceConfiguration;
2990 Controller->QueueReadWriteCommand =
2991 DAC960_V1_QueueReadWriteCommand;
2992 break;
2993 case DAC960_P_Controller:
2994 if (!request_region(Controller->IO_Address, 0x80,
2995 Controller->FullModelName)){
2996 DAC960_Error("IO port 0x%lx busy for Controller at\n",
2997 Controller, Controller->IO_Address);
2998 goto Failure;
2999 }
3000 DAC960_PD_DisableInterrupts(BaseAddress);
3001 DAC960_PD_AcknowledgeStatus(BaseAddress);
3002 udelay(1000);
3003 while (DAC960_PD_InitializationInProgressP(BaseAddress))
3004 {
3005 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
3006 &Parameter0, &Parameter1) &&
3007 DAC960_ReportErrorStatus(Controller, ErrorStatus,
3008 Parameter0, Parameter1))
3009 goto Failure;
3010 udelay(10);
3011 }
3012 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3013 {
3014 DAC960_Error("Unable to allocate DMA mapped memory"
3015 "for Controller at\n", Controller);
3016 goto Failure;
3017 }
3018 DAC960_PD_EnableInterrupts(BaseAddress);
3019 Controller->QueueCommand = DAC960_P_QueueCommand;
3020 Controller->ReadControllerConfiguration =
3021 DAC960_V1_ReadControllerConfiguration;
3022 Controller->ReadDeviceConfiguration =
3023 DAC960_V1_ReadDeviceConfiguration;
3024 Controller->ReportDeviceConfiguration =
3025 DAC960_V1_ReportDeviceConfiguration;
3026 Controller->QueueReadWriteCommand =
3027 DAC960_V1_QueueReadWriteCommand;
3028 break;
3029 }
3030 /*
3031 Acquire shared access to the IRQ Channel.
3032 */
3033 IRQ_Channel = PCI_Device->irq;
3034 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
3035 Controller->FullModelName, Controller) < 0)
3036 {
3037 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3038 Controller, Controller->IRQ_Channel);
3039 goto Failure;
3040 }
3041 Controller->IRQ_Channel = IRQ_Channel;
3042 Controller->InitialCommand.CommandIdentifier = 1;
3043 Controller->InitialCommand.Controller = Controller;
3044 Controller->Commands[0] = &Controller->InitialCommand;
3045 Controller->FreeCommands = &Controller->InitialCommand;
3046 return Controller;
3047
3048 Failure:
3049 if (Controller->IO_Address == 0)
3050 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3051 "PCI Address 0x%X\n", Controller,
3052 Controller->Bus, Controller->Device,
3053 Controller->Function, Controller->PCI_Address);
3054 else
3055 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3056 "0x%X PCI Address 0x%X\n", Controller,
3057 Controller->Bus, Controller->Device,
3058 Controller->Function, Controller->IO_Address,
3059 Controller->PCI_Address);
3060 DAC960_DetectCleanup(Controller);
3061 DAC960_ControllerCount--;
3062 return NULL;
3063 }
3064
3065 /*
3066 DAC960_InitializeController initializes Controller.
3067 */
3068
3069 static bool
3070 DAC960_InitializeController(DAC960_Controller_T *Controller)
3071 {
3072 if (DAC960_ReadControllerConfiguration(Controller) &&
3073 DAC960_ReportControllerConfiguration(Controller) &&
3074 DAC960_CreateAuxiliaryStructures(Controller) &&
3075 DAC960_ReadDeviceConfiguration(Controller) &&
3076 DAC960_ReportDeviceConfiguration(Controller) &&
3077 DAC960_RegisterBlockDevice(Controller))
3078 {
3079 /*
3080 Initialize the Monitoring Timer.
3081 */
3082 timer_setup(&Controller->MonitoringTimer,
3083 DAC960_MonitoringTimerFunction, 0);
3084 Controller->MonitoringTimer.expires =
3085 jiffies + DAC960_MonitoringTimerInterval;
3086 add_timer(&Controller->MonitoringTimer);
3087 Controller->ControllerInitialized = true;
3088 return true;
3089 }
3090 return false;
3091 }
3092
3093
3094 /*
3095 DAC960_FinalizeController finalizes Controller.
3096 */
3097
3098 static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3099 {
3100 if (Controller->ControllerInitialized)
3101 {
3102 unsigned long flags;
3103
3104 /*
3105 * Acquiring and releasing lock here eliminates
3106 * a very low probability race.
3107 *
3108 * The code below allocates controller command structures
3109 * from the free list without holding the controller lock.
3110 * This is safe assuming there is no other activity on
3111 * the controller at the time.
3112 *
3113 * But, there might be a monitoring command still
3114 * in progress. Setting the Shutdown flag while holding
3115 * the lock ensures that there is no monitoring command
3116 * in the interrupt handler currently, and any monitoring
3117 * commands that complete from this time on will NOT return
3118 * their command structure to the free list.
3119 */
3120
3121 spin_lock_irqsave(&Controller->queue_lock, flags);
3122 Controller->ShutdownMonitoringTimer = 1;
3123 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3124
3125 del_timer_sync(&Controller->MonitoringTimer);
3126 if (Controller->FirmwareType == DAC960_V1_Controller)
3127 {
3128 DAC960_Notice("Flushing Cache...", Controller);
3129 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3130 DAC960_Notice("done\n", Controller);
3131
3132 if (Controller->HardwareType == DAC960_PD_Controller)
3133 release_region(Controller->IO_Address, 0x80);
3134 }
3135 else
3136 {
3137 DAC960_Notice("Flushing Cache...", Controller);
3138 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3139 DAC960_V2_RAID_Controller);
3140 DAC960_Notice("done\n", Controller);
3141 }
3142 }
3143 DAC960_UnregisterBlockDevice(Controller);
3144 DAC960_DestroyAuxiliaryStructures(Controller);
3145 DAC960_DestroyProcEntries(Controller);
3146 DAC960_DetectCleanup(Controller);
3147 }
3148
3149
3150 /*
3151 DAC960_Probe verifies controller's existence and
3152 initializes the DAC960 Driver for that controller.
3153 */
3154
3155 static int
3156 DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3157 {
3158 int disk;
3159 DAC960_Controller_T *Controller;
3160
3161 if (DAC960_ControllerCount == DAC960_MaxControllers)
3162 {
3163 DAC960_Error("More than %d DAC960 Controllers detected - "
3164 "ignoring from Controller at\n",
3165 NULL, DAC960_MaxControllers);
3166 return -ENODEV;
3167 }
3168
3169 Controller = DAC960_DetectController(dev, entry);
3170 if (!Controller)
3171 return -ENODEV;
3172
3173 if (!DAC960_InitializeController(Controller)) {
3174 DAC960_FinalizeController(Controller);
3175 return -ENODEV;
3176 }
3177
3178 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3179 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3180 add_disk(Controller->disks[disk]);
3181 }
3182 DAC960_CreateProcEntries(Controller);
3183 return 0;
3184 }
3185
3186
3187 /*
3188 DAC960_Finalize finalizes the DAC960 Driver.
3189 */
3190
3191 static void DAC960_Remove(struct pci_dev *PCI_Device)
3192 {
3193 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3194 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3195 if (Controller != NULL)
3196 DAC960_FinalizeController(Controller);
3197 }
3198
3199
3200 /*
3201 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3202 DAC960 V1 Firmware Controllers.
3203 */
3204
3205 static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3206 {
3207 DAC960_Controller_T *Controller = Command->Controller;
3208 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3209 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3210 Command->V1.ScatterGatherList;
3211 struct scatterlist *ScatterList = Command->V1.ScatterList;
3212
3213 DAC960_V1_ClearCommand(Command);
3214
3215 if (Command->SegmentCount == 1)
3216 {
3217 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3218 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3219 else
3220 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3221
3222 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3223 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3224 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3225 CommandMailbox->Type5.BusAddress =
3226 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3227 }
3228 else
3229 {
3230 int i;
3231
3232 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3233 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3234 else
3235 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3236
3237 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3238 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3239 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3240 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3241
3242 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3243
3244 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3245 ScatterGatherList->SegmentDataPointer =
3246 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3247 ScatterGatherList->SegmentByteCount =
3248 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3249 }
3250 }
3251 DAC960_QueueCommand(Command);
3252 }
3253
3254
3255 /*
3256 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3257 DAC960 V2 Firmware Controllers.
3258 */
3259
3260 static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3261 {
3262 DAC960_Controller_T *Controller = Command->Controller;
3263 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3264 struct scatterlist *ScatterList = Command->V2.ScatterList;
3265
3266 DAC960_V2_ClearCommand(Command);
3267
3268 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3269 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3270 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3271 CommandMailbox->SCSI_10.DataTransferSize =
3272 Command->BlockCount << DAC960_BlockSizeBits;
3273 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3274 CommandMailbox->SCSI_10.PhysicalDevice =
3275 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3276 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3277 CommandMailbox->SCSI_10.CDBLength = 10;
3278 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3279 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3280 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3281 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3282 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3283 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3284 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3285 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3286
3287 if (Command->SegmentCount == 1)
3288 {
3289 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3290 .ScatterGatherSegments[0]
3291 .SegmentDataPointer =
3292 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3293 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3294 .ScatterGatherSegments[0]
3295 .SegmentByteCount =
3296 CommandMailbox->SCSI_10.DataTransferSize;
3297 }
3298 else
3299 {
3300 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3301 int i;
3302
3303 if (Command->SegmentCount > 2)
3304 {
3305 ScatterGatherList = Command->V2.ScatterGatherList;
3306 CommandMailbox->SCSI_10.CommandControlBits
3307 .AdditionalScatterGatherListMemory = true;
3308 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3309 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3310 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3311 .ExtendedScatterGather.ScatterGatherList0Address =
3312 Command->V2.ScatterGatherListDMA;
3313 }
3314 else
3315 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3316 .ScatterGatherSegments;
3317
3318 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3319 ScatterGatherList->SegmentDataPointer =
3320 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3321 ScatterGatherList->SegmentByteCount =
3322 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3323 }
3324 }
3325 DAC960_QueueCommand(Command);
3326 }
3327
3328
3329 static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3330 {
3331 struct request *Request;
3332 DAC960_Command_T *Command;
3333
3334 while(1) {
3335 Request = blk_peek_request(req_q);
3336 if (!Request)
3337 return 1;
3338
3339 Command = DAC960_AllocateCommand(Controller);
3340 if (Command == NULL)
3341 return 0;
3342
3343 if (rq_data_dir(Request) == READ) {
3344 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3345 Command->CommandType = DAC960_ReadCommand;
3346 } else {
3347 Command->DmaDirection = PCI_DMA_TODEVICE;
3348 Command->CommandType = DAC960_WriteCommand;
3349 }
3350 Command->Completion = Request->end_io_data;
3351 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3352 Command->BlockNumber = blk_rq_pos(Request);
3353 Command->BlockCount = blk_rq_sectors(Request);
3354 Command->Request = Request;
3355 blk_start_request(Request);
3356 Command->SegmentCount = blk_rq_map_sg(req_q,
3357 Command->Request, Command->cmd_sglist);
3358 /* pci_map_sg MAY change the value of SegCount */
3359 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3360 Command->SegmentCount, Command->DmaDirection);
3361
3362 DAC960_QueueReadWriteCommand(Command);
3363 }
3364 }
3365
3366 /*
3367 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3368 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3369 this function should wait for a Command to become available if necessary.
3370 This function returns true if an I/O Request was queued and false otherwise.
3371 */
3372 static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3373 {
3374 int i;
3375
3376 if (!controller->ControllerInitialized)
3377 return;
3378
3379 /* Do this better later! */
3380 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3381 struct request_queue *req_q = controller->RequestQueue[i];
3382
3383 if (req_q == NULL)
3384 continue;
3385
3386 if (!DAC960_process_queue(controller, req_q)) {
3387 controller->req_q_index = i;
3388 return;
3389 }
3390 }
3391
3392 if (controller->req_q_index == 0)
3393 return;
3394
3395 for (i = 0; i < controller->req_q_index; i++) {
3396 struct request_queue *req_q = controller->RequestQueue[i];
3397
3398 if (req_q == NULL)
3399 continue;
3400
3401 if (!DAC960_process_queue(controller, req_q)) {
3402 controller->req_q_index = i;
3403 return;
3404 }
3405 }
3406 }
3407
3408
3409 /*
3410 DAC960_queue_partial_rw extracts one bio from the request already
3411 associated with argument command, and construct a new command block to retry I/O
3412 only on that bio. Queue that command to the controller.
3413
3414 This function re-uses a previously-allocated Command,
3415 there is no failure mode from trying to allocate a command.
3416 */
3417
3418 static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3419 {
3420 DAC960_Controller_T *Controller = Command->Controller;
3421 struct request *Request = Command->Request;
3422 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3423
3424 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3425 Command->CommandType = DAC960_ReadRetryCommand;
3426 else
3427 Command->CommandType = DAC960_WriteRetryCommand;
3428
3429 /*
3430 * We could be more efficient with these mapping requests
3431 * and map only the portions that we need. But since this
3432 * code should almost never be called, just go with a
3433 * simple coding.
3434 */
3435 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3436
3437 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3438 /*
3439 * Resubmitting the request sector at a time is really tedious.
3440 * But, this should almost never happen. So, we're willing to pay
3441 * this price so that in the end, as much of the transfer is completed
3442 * successfully as possible.
3443 */
3444 Command->SegmentCount = 1;
3445 Command->BlockNumber = blk_rq_pos(Request);
3446 Command->BlockCount = 1;
3447 DAC960_QueueReadWriteCommand(Command);
3448 return;
3449 }
3450
3451 /*
3452 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3453 */
3454
3455 static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3456 {
3457 DAC960_ProcessRequest(RequestQueue->queuedata);
3458 }
3459
3460 /*
3461 DAC960_ProcessCompletedBuffer performs completion processing for an
3462 individual Buffer.
3463 */
3464
3465 static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3466 bool SuccessfulIO)
3467 {
3468 struct request *Request = Command->Request;
3469 blk_status_t Error = SuccessfulIO ? BLK_STS_OK : BLK_STS_IOERR;
3470
3471 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3472 Command->SegmentCount, Command->DmaDirection);
3473
3474 if (!__blk_end_request(Request, Error, Command->BlockCount << 9)) {
3475 if (Command->Completion) {
3476 complete(Command->Completion);
3477 Command->Completion = NULL;
3478 }
3479 return true;
3480 }
3481 return false;
3482 }
3483
3484 /*
3485 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3486 when an error occurs on a Read or Write operation.
3487 */
3488
3489 static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3490 {
3491 DAC960_Controller_T *Controller = Command->Controller;
3492 unsigned char *CommandName = "UNKNOWN";
3493 switch (Command->CommandType)
3494 {
3495 case DAC960_ReadCommand:
3496 case DAC960_ReadRetryCommand:
3497 CommandName = "READ";
3498 break;
3499 case DAC960_WriteCommand:
3500 case DAC960_WriteRetryCommand:
3501 CommandName = "WRITE";
3502 break;
3503 case DAC960_MonitoringCommand:
3504 case DAC960_ImmediateCommand:
3505 case DAC960_QueuedCommand:
3506 break;
3507 }
3508 switch (Command->V1.CommandStatus)
3509 {
3510 case DAC960_V1_IrrecoverableDataError:
3511 DAC960_Error("Irrecoverable Data Error on %s:\n",
3512 Controller, CommandName);
3513 break;
3514 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3515 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3516 Controller, CommandName);
3517 break;
3518 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3519 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3520 "on %s:\n", Controller, CommandName);
3521 break;
3522 case DAC960_V1_BadDataEncountered:
3523 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3524 break;
3525 default:
3526 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3527 Controller, Command->V1.CommandStatus, CommandName);
3528 break;
3529 }
3530 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3531 Controller, Controller->ControllerNumber,
3532 Command->LogicalDriveNumber, Command->BlockNumber,
3533 Command->BlockNumber + Command->BlockCount - 1);
3534 }
3535
3536
3537 /*
3538 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3539 for DAC960 V1 Firmware Controllers.
3540 */
3541
3542 static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3543 {
3544 DAC960_Controller_T *Controller = Command->Controller;
3545 DAC960_CommandType_T CommandType = Command->CommandType;
3546 DAC960_V1_CommandOpcode_T CommandOpcode =
3547 Command->V1.CommandMailbox.Common.CommandOpcode;
3548 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3549
3550 if (CommandType == DAC960_ReadCommand ||
3551 CommandType == DAC960_WriteCommand)
3552 {
3553
3554 #ifdef FORCE_RETRY_DEBUG
3555 CommandStatus = DAC960_V1_IrrecoverableDataError;
3556 #endif
3557
3558 if (CommandStatus == DAC960_V1_NormalCompletion) {
3559
3560 if (!DAC960_ProcessCompletedRequest(Command, true))
3561 BUG();
3562
3563 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3564 CommandStatus == DAC960_V1_BadDataEncountered)
3565 {
3566 /*
3567 * break the command down into pieces and resubmit each
3568 * piece, hoping that some of them will succeed.
3569 */
3570 DAC960_queue_partial_rw(Command);
3571 return;
3572 }
3573 else
3574 {
3575 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3576 DAC960_V1_ReadWriteError(Command);
3577
3578 if (!DAC960_ProcessCompletedRequest(Command, false))
3579 BUG();
3580 }
3581 }
3582 else if (CommandType == DAC960_ReadRetryCommand ||
3583 CommandType == DAC960_WriteRetryCommand)
3584 {
3585 bool normal_completion;
3586 #ifdef FORCE_RETRY_FAILURE_DEBUG
3587 static int retry_count = 1;
3588 #endif
3589 /*
3590 Perform completion processing for the portion that was
3591 retried, and submit the next portion, if any.
3592 */
3593 normal_completion = true;
3594 if (CommandStatus != DAC960_V1_NormalCompletion) {
3595 normal_completion = false;
3596 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3597 DAC960_V1_ReadWriteError(Command);
3598 }
3599
3600 #ifdef FORCE_RETRY_FAILURE_DEBUG
3601 if (!(++retry_count % 10000)) {
3602 printk("V1 error retry failure test\n");
3603 normal_completion = false;
3604 DAC960_V1_ReadWriteError(Command);
3605 }
3606 #endif
3607
3608 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3609 DAC960_queue_partial_rw(Command);
3610 return;
3611 }
3612 }
3613
3614 else if (CommandType == DAC960_MonitoringCommand)
3615 {
3616 if (Controller->ShutdownMonitoringTimer)
3617 return;
3618 if (CommandOpcode == DAC960_V1_Enquiry)
3619 {
3620 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3621 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3622 unsigned int OldCriticalLogicalDriveCount =
3623 OldEnquiry->CriticalLogicalDriveCount;
3624 unsigned int NewCriticalLogicalDriveCount =
3625 NewEnquiry->CriticalLogicalDriveCount;
3626 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3627 {
3628 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3629 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3630 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3631 "Now Exists\n", Controller,
3632 LogicalDriveNumber,
3633 Controller->ControllerNumber,
3634 LogicalDriveNumber);
3635 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3636 DAC960_ComputeGenericDiskInfo(Controller);
3637 }
3638 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3639 {
3640 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3641 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3642 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3643 "No Longer Exists\n", Controller,
3644 LogicalDriveNumber,
3645 Controller->ControllerNumber,
3646 LogicalDriveNumber);
3647 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3648 DAC960_ComputeGenericDiskInfo(Controller);
3649 }
3650 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3651 OldEnquiry->StatusFlags.DeferredWriteError)
3652 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3653 (NewEnquiry->StatusFlags.DeferredWriteError
3654 ? "TRUE" : "FALSE"));
3655 if ((NewCriticalLogicalDriveCount > 0 ||
3656 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3657 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3658 NewEnquiry->OfflineLogicalDriveCount !=
3659 OldEnquiry->OfflineLogicalDriveCount) ||
3660 (NewEnquiry->DeadDriveCount > 0 ||
3661 NewEnquiry->DeadDriveCount !=
3662 OldEnquiry->DeadDriveCount) ||
3663 (NewEnquiry->EventLogSequenceNumber !=
3664 OldEnquiry->EventLogSequenceNumber) ||
3665 Controller->MonitoringTimerCount == 0 ||
3666 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3667 + DAC960_SecondaryMonitoringInterval))
3668 {
3669 Controller->V1.NeedLogicalDriveInformation = true;
3670 Controller->V1.NewEventLogSequenceNumber =
3671 NewEnquiry->EventLogSequenceNumber;
3672 Controller->V1.NeedErrorTableInformation = true;
3673 Controller->V1.NeedDeviceStateInformation = true;
3674 Controller->V1.StartDeviceStateScan = true;
3675 Controller->V1.NeedBackgroundInitializationStatus =
3676 Controller->V1.BackgroundInitializationStatusSupported;
3677 Controller->SecondaryMonitoringTime = jiffies;
3678 }
3679 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3680 NewEnquiry->RebuildFlag
3681 == DAC960_V1_BackgroundRebuildInProgress ||
3682 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3683 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3684 {
3685 Controller->V1.NeedRebuildProgress = true;
3686 Controller->V1.RebuildProgressFirst =
3687 (NewEnquiry->CriticalLogicalDriveCount <
3688 OldEnquiry->CriticalLogicalDriveCount);
3689 }
3690 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3691 switch (NewEnquiry->RebuildFlag)
3692 {
3693 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3694 DAC960_Progress("Consistency Check Completed Successfully\n",
3695 Controller);
3696 break;
3697 case DAC960_V1_StandbyRebuildInProgress:
3698 case DAC960_V1_BackgroundRebuildInProgress:
3699 break;
3700 case DAC960_V1_BackgroundCheckInProgress:
3701 Controller->V1.NeedConsistencyCheckProgress = true;
3702 break;
3703 case DAC960_V1_StandbyRebuildCompletedWithError:
3704 DAC960_Progress("Consistency Check Completed with Error\n",
3705 Controller);
3706 break;
3707 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3708 DAC960_Progress("Consistency Check Failed - "
3709 "Physical Device Failed\n", Controller);
3710 break;
3711 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3712 DAC960_Progress("Consistency Check Failed - "
3713 "Logical Drive Failed\n", Controller);
3714 break;
3715 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3716 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3717 Controller);
3718 break;
3719 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3720 DAC960_Progress("Consistency Check Successfully Terminated\n",
3721 Controller);
3722 break;
3723 }
3724 else if (NewEnquiry->RebuildFlag
3725 == DAC960_V1_BackgroundCheckInProgress)
3726 Controller->V1.NeedConsistencyCheckProgress = true;
3727 Controller->MonitoringAlertMode =
3728 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3729 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3730 NewEnquiry->DeadDriveCount > 0);
3731 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3732 {
3733 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3734 Controller->V1.RebuildFlagPending = true;
3735 }
3736 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3737 sizeof(DAC960_V1_Enquiry_T));
3738 }
3739 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3740 {
3741 static char
3742 *DAC960_EventMessages[] =
3743 { "killed because write recovery failed",
3744 "killed because of SCSI bus reset failure",
3745 "killed because of double check condition",
3746 "killed because it was removed",
3747 "killed because of gross error on SCSI chip",
3748 "killed because of bad tag returned from drive",
3749 "killed because of timeout on SCSI command",
3750 "killed because of reset SCSI command issued from system",
3751 "killed because busy or parity error count exceeded limit",
3752 "killed because of 'kill drive' command from system",
3753 "killed because of selection timeout",
3754 "killed due to SCSI phase sequence error",
3755 "killed due to unknown status" };
3756 DAC960_V1_EventLogEntry_T *EventLogEntry =
3757 Controller->V1.EventLogEntry;
3758 if (EventLogEntry->SequenceNumber ==
3759 Controller->V1.OldEventLogSequenceNumber)
3760 {
3761 unsigned char SenseKey = EventLogEntry->SenseKey;
3762 unsigned char AdditionalSenseCode =
3763 EventLogEntry->AdditionalSenseCode;
3764 unsigned char AdditionalSenseCodeQualifier =
3765 EventLogEntry->AdditionalSenseCodeQualifier;
3766 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3767 AdditionalSenseCode == 0x80 &&
3768 AdditionalSenseCodeQualifier <
3769 ARRAY_SIZE(DAC960_EventMessages))
3770 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3771 EventLogEntry->Channel,
3772 EventLogEntry->TargetID,
3773 DAC960_EventMessages[
3774 AdditionalSenseCodeQualifier]);
3775 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3776 AdditionalSenseCode == 0x29)
3777 {
3778 if (Controller->MonitoringTimerCount > 0)
3779 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3780 [EventLogEntry->TargetID]++;
3781 }
3782 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3783 (SenseKey == DAC960_SenseKey_NotReady &&
3784 AdditionalSenseCode == 0x04 &&
3785 (AdditionalSenseCodeQualifier == 0x01 ||
3786 AdditionalSenseCodeQualifier == 0x02))))
3787 {
3788 DAC960_Critical("Physical Device %d:%d Error Log: "
3789 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3790 Controller,
3791 EventLogEntry->Channel,
3792 EventLogEntry->TargetID,
3793 SenseKey,
3794 AdditionalSenseCode,
3795 AdditionalSenseCodeQualifier);
3796 DAC960_Critical("Physical Device %d:%d Error Log: "
3797 "Information = %02X%02X%02X%02X "
3798 "%02X%02X%02X%02X\n",
3799 Controller,
3800 EventLogEntry->Channel,
3801 EventLogEntry->TargetID,
3802 EventLogEntry->Information[0],
3803 EventLogEntry->Information[1],
3804 EventLogEntry->Information[2],
3805 EventLogEntry->Information[3],
3806 EventLogEntry->CommandSpecificInformation[0],
3807 EventLogEntry->CommandSpecificInformation[1],
3808 EventLogEntry->CommandSpecificInformation[2],
3809 EventLogEntry->CommandSpecificInformation[3]);
3810 }
3811 }
3812 Controller->V1.OldEventLogSequenceNumber++;
3813 }
3814 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3815 {
3816 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3817 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3818 int Channel, TargetID;
3819 for (Channel = 0; Channel < Controller->Channels; Channel++)
3820 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3821 {
3822 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3823 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3824 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3825 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3826 if ((NewErrorEntry->ParityErrorCount !=
3827 OldErrorEntry->ParityErrorCount) ||
3828 (NewErrorEntry->SoftErrorCount !=
3829 OldErrorEntry->SoftErrorCount) ||
3830 (NewErrorEntry->HardErrorCount !=
3831 OldErrorEntry->HardErrorCount) ||
3832 (NewErrorEntry->MiscErrorCount !=
3833 OldErrorEntry->MiscErrorCount))
3834 DAC960_Critical("Physical Device %d:%d Errors: "
3835 "Parity = %d, Soft = %d, "
3836 "Hard = %d, Misc = %d\n",
3837 Controller, Channel, TargetID,
3838 NewErrorEntry->ParityErrorCount,
3839 NewErrorEntry->SoftErrorCount,
3840 NewErrorEntry->HardErrorCount,
3841 NewErrorEntry->MiscErrorCount);
3842 }
3843 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3844 sizeof(DAC960_V1_ErrorTable_T));
3845 }
3846 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3847 {
3848 DAC960_V1_DeviceState_T *OldDeviceState =
3849 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3850 [Controller->V1.DeviceStateTargetID];
3851 DAC960_V1_DeviceState_T *NewDeviceState =
3852 Controller->V1.NewDeviceState;
3853 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3854 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3855 Controller->V1.DeviceStateChannel,
3856 Controller->V1.DeviceStateTargetID,
3857 (NewDeviceState->DeviceState
3858 == DAC960_V1_Device_Dead
3859 ? "DEAD"
3860 : NewDeviceState->DeviceState
3861 == DAC960_V1_Device_WriteOnly
3862 ? "WRITE-ONLY"
3863 : NewDeviceState->DeviceState
3864 == DAC960_V1_Device_Online
3865 ? "ONLINE" : "STANDBY"));
3866 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3867 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3868 {
3869 Controller->V1.NeedDeviceInquiryInformation = true;
3870 Controller->V1.NeedDeviceSerialNumberInformation = true;
3871 Controller->V1.DeviceResetCount
3872 [Controller->V1.DeviceStateChannel]
3873 [Controller->V1.DeviceStateTargetID] = 0;
3874 }
3875 memcpy(OldDeviceState, NewDeviceState,
3876 sizeof(DAC960_V1_DeviceState_T));
3877 }
3878 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3879 {
3880 int LogicalDriveNumber;
3881 for (LogicalDriveNumber = 0;
3882 LogicalDriveNumber < Controller->LogicalDriveCount;
3883 LogicalDriveNumber++)
3884 {
3885 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3886 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3887 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3888 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3889 if (NewLogicalDriveInformation->LogicalDriveState !=
3890 OldLogicalDriveInformation->LogicalDriveState)
3891 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3892 "is now %s\n", Controller,
3893 LogicalDriveNumber,
3894 Controller->ControllerNumber,
3895 LogicalDriveNumber,
3896 (NewLogicalDriveInformation->LogicalDriveState
3897 == DAC960_V1_LogicalDrive_Online
3898 ? "ONLINE"
3899 : NewLogicalDriveInformation->LogicalDriveState
3900 == DAC960_V1_LogicalDrive_Critical
3901 ? "CRITICAL" : "OFFLINE"));
3902 if (NewLogicalDriveInformation->WriteBack !=
3903 OldLogicalDriveInformation->WriteBack)
3904 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3905 "is now %s\n", Controller,
3906 LogicalDriveNumber,
3907 Controller->ControllerNumber,
3908 LogicalDriveNumber,
3909 (NewLogicalDriveInformation->WriteBack
3910 ? "WRITE BACK" : "WRITE THRU"));
3911 }
3912 memcpy(&Controller->V1.LogicalDriveInformation,
3913 Controller->V1.NewLogicalDriveInformation,
3914 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3915 }
3916 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3917 {
3918 unsigned int LogicalDriveNumber =
3919 Controller->V1.RebuildProgress->LogicalDriveNumber;
3920 unsigned int LogicalDriveSize =
3921 Controller->V1.RebuildProgress->LogicalDriveSize;
3922 unsigned int BlocksCompleted =
3923 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3924 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3925 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3926 CommandStatus = DAC960_V1_RebuildSuccessful;
3927 switch (CommandStatus)
3928 {
3929 case DAC960_V1_NormalCompletion:
3930 Controller->EphemeralProgressMessage = true;
3931 DAC960_Progress("Rebuild in Progress: "
3932 "Logical Drive %d (/dev/rd/c%dd%d) "
3933 "%d%% completed\n",
3934 Controller, LogicalDriveNumber,
3935 Controller->ControllerNumber,
3936 LogicalDriveNumber,
3937 (100 * (BlocksCompleted >> 7))
3938 / (LogicalDriveSize >> 7));
3939 Controller->EphemeralProgressMessage = false;
3940 break;
3941 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3942 DAC960_Progress("Rebuild Failed due to "
3943 "Logical Drive Failure\n", Controller);
3944 break;
3945 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3946 DAC960_Progress("Rebuild Failed due to "
3947 "Bad Blocks on Other Drives\n", Controller);
3948 break;
3949 case DAC960_V1_RebuildFailed_NewDriveFailed:
3950 DAC960_Progress("Rebuild Failed due to "
3951 "Failure of Drive Being Rebuilt\n", Controller);
3952 break;
3953 case DAC960_V1_NoRebuildOrCheckInProgress:
3954 break;
3955 case DAC960_V1_RebuildSuccessful:
3956 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3957 break;
3958 case DAC960_V1_RebuildSuccessfullyTerminated:
3959 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3960 break;
3961 }
3962 Controller->V1.LastRebuildStatus = CommandStatus;
3963 if (CommandType != DAC960_MonitoringCommand &&
3964 Controller->V1.RebuildStatusPending)
3965 {
3966 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3967 Controller->V1.RebuildStatusPending = false;
3968 }
3969 else if (CommandType == DAC960_MonitoringCommand &&
3970 CommandStatus != DAC960_V1_NormalCompletion &&
3971 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3972 {
3973 Controller->V1.PendingRebuildStatus = CommandStatus;
3974 Controller->V1.RebuildStatusPending = true;
3975 }
3976 }
3977 else if (CommandOpcode == DAC960_V1_RebuildStat)
3978 {
3979 unsigned int LogicalDriveNumber =
3980 Controller->V1.RebuildProgress->LogicalDriveNumber;
3981 unsigned int LogicalDriveSize =
3982 Controller->V1.RebuildProgress->LogicalDriveSize;
3983 unsigned int BlocksCompleted =
3984 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3985 if (CommandStatus == DAC960_V1_NormalCompletion)
3986 {
3987 Controller->EphemeralProgressMessage = true;
3988 DAC960_Progress("Consistency Check in Progress: "
3989 "Logical Drive %d (/dev/rd/c%dd%d) "
3990 "%d%% completed\n",
3991 Controller, LogicalDriveNumber,
3992 Controller->ControllerNumber,
3993 LogicalDriveNumber,
3994 (100 * (BlocksCompleted >> 7))
3995 / (LogicalDriveSize >> 7));
3996 Controller->EphemeralProgressMessage = false;
3997 }
3998 }
3999 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
4000 {
4001 unsigned int LogicalDriveNumber =
4002 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
4003 unsigned int LogicalDriveSize =
4004 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
4005 unsigned int BlocksCompleted =
4006 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
4007 switch (CommandStatus)
4008 {
4009 case DAC960_V1_NormalCompletion:
4010 switch (Controller->V1.BackgroundInitializationStatus->Status)
4011 {
4012 case DAC960_V1_BackgroundInitializationInvalid:
4013 break;
4014 case DAC960_V1_BackgroundInitializationStarted:
4015 DAC960_Progress("Background Initialization Started\n",
4016 Controller);
4017 break;
4018 case DAC960_V1_BackgroundInitializationInProgress:
4019 if (BlocksCompleted ==
4020 Controller->V1.LastBackgroundInitializationStatus.
4021 BlocksCompleted &&
4022 LogicalDriveNumber ==
4023 Controller->V1.LastBackgroundInitializationStatus.
4024 LogicalDriveNumber)
4025 break;
4026 Controller->EphemeralProgressMessage = true;
4027 DAC960_Progress("Background Initialization in Progress: "
4028 "Logical Drive %d (/dev/rd/c%dd%d) "
4029 "%d%% completed\n",
4030 Controller, LogicalDriveNumber,
4031 Controller->ControllerNumber,
4032 LogicalDriveNumber,
4033 (100 * (BlocksCompleted >> 7))
4034 / (LogicalDriveSize >> 7));
4035 Controller->EphemeralProgressMessage = false;
4036 break;
4037 case DAC960_V1_BackgroundInitializationSuspended:
4038 DAC960_Progress("Background Initialization Suspended\n",
4039 Controller);
4040 break;
4041 case DAC960_V1_BackgroundInitializationCancelled:
4042 DAC960_Progress("Background Initialization Cancelled\n",
4043 Controller);
4044 break;
4045 }
4046 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4047 Controller->V1.BackgroundInitializationStatus,
4048 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4049 break;
4050 case DAC960_V1_BackgroundInitSuccessful:
4051 if (Controller->V1.BackgroundInitializationStatus->Status ==
4052 DAC960_V1_BackgroundInitializationInProgress)
4053 DAC960_Progress("Background Initialization "
4054 "Completed Successfully\n", Controller);
4055 Controller->V1.BackgroundInitializationStatus->Status =
4056 DAC960_V1_BackgroundInitializationInvalid;
4057 break;
4058 case DAC960_V1_BackgroundInitAborted:
4059 if (Controller->V1.BackgroundInitializationStatus->Status ==
4060 DAC960_V1_BackgroundInitializationInProgress)
4061 DAC960_Progress("Background Initialization Aborted\n",
4062 Controller);
4063 Controller->V1.BackgroundInitializationStatus->Status =
4064 DAC960_V1_BackgroundInitializationInvalid;
4065 break;
4066 case DAC960_V1_NoBackgroundInitInProgress:
4067 break;
4068 }
4069 }
4070 else if (CommandOpcode == DAC960_V1_DCDB)
4071 {
4072 /*
4073 This is a bit ugly.
4074
4075 The InquiryStandardData and
4076 the InquiryUntitSerialNumber information
4077 retrieval operations BOTH use the DAC960_V1_DCDB
4078 commands. the test above can't distinguish between
4079 these two cases.
4080
4081 Instead, we rely on the order of code later in this
4082 function to ensure that DeviceInquiryInformation commands
4083 are submitted before DeviceSerialNumber commands.
4084 */
4085 if (Controller->V1.NeedDeviceInquiryInformation)
4086 {
4087 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4088 &Controller->V1.InquiryStandardData
4089 [Controller->V1.DeviceStateChannel]
4090 [Controller->V1.DeviceStateTargetID];
4091 if (CommandStatus != DAC960_V1_NormalCompletion)
4092 {
4093 memset(InquiryStandardData, 0,
4094 sizeof(DAC960_SCSI_Inquiry_T));
4095 InquiryStandardData->PeripheralDeviceType = 0x1F;
4096 }
4097 else
4098 memcpy(InquiryStandardData,
4099 Controller->V1.NewInquiryStandardData,
4100 sizeof(DAC960_SCSI_Inquiry_T));
4101 Controller->V1.NeedDeviceInquiryInformation = false;
4102 }
4103 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4104 {
4105 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4106 &Controller->V1.InquiryUnitSerialNumber
4107 [Controller->V1.DeviceStateChannel]
4108 [Controller->V1.DeviceStateTargetID];
4109 if (CommandStatus != DAC960_V1_NormalCompletion)
4110 {
4111 memset(InquiryUnitSerialNumber, 0,
4112 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4113 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4114 }
4115 else
4116 memcpy(InquiryUnitSerialNumber,
4117 Controller->V1.NewInquiryUnitSerialNumber,
4118 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4119 Controller->V1.NeedDeviceSerialNumberInformation = false;
4120 }
4121 }
4122 /*
4123 Begin submitting new monitoring commands.
4124 */
4125 if (Controller->V1.NewEventLogSequenceNumber
4126 - Controller->V1.OldEventLogSequenceNumber > 0)
4127 {
4128 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4129 DAC960_V1_PerformEventLogOperation;
4130 Command->V1.CommandMailbox.Type3E.OperationType =
4131 DAC960_V1_GetEventLogEntry;
4132 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4133 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4134 Controller->V1.OldEventLogSequenceNumber;
4135 Command->V1.CommandMailbox.Type3E.BusAddress =
4136 Controller->V1.EventLogEntryDMA;
4137 DAC960_QueueCommand(Command);
4138 return;
4139 }
4140 if (Controller->V1.NeedErrorTableInformation)
4141 {
4142 Controller->V1.NeedErrorTableInformation = false;
4143 Command->V1.CommandMailbox.Type3.CommandOpcode =
4144 DAC960_V1_GetErrorTable;
4145 Command->V1.CommandMailbox.Type3.BusAddress =
4146 Controller->V1.NewErrorTableDMA;
4147 DAC960_QueueCommand(Command);
4148 return;
4149 }
4150 if (Controller->V1.NeedRebuildProgress &&
4151 Controller->V1.RebuildProgressFirst)
4152 {
4153 Controller->V1.NeedRebuildProgress = false;
4154 Command->V1.CommandMailbox.Type3.CommandOpcode =
4155 DAC960_V1_GetRebuildProgress;
4156 Command->V1.CommandMailbox.Type3.BusAddress =
4157 Controller->V1.RebuildProgressDMA;
4158 DAC960_QueueCommand(Command);
4159 return;
4160 }
4161 if (Controller->V1.NeedDeviceStateInformation)
4162 {
4163 if (Controller->V1.NeedDeviceInquiryInformation)
4164 {
4165 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4166 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4167
4168 dma_addr_t NewInquiryStandardDataDMA =
4169 Controller->V1.NewInquiryStandardDataDMA;
4170
4171 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4172 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4173 DCDB->Channel = Controller->V1.DeviceStateChannel;
4174 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4175 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4176 DCDB->EarlyStatus = false;
4177 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4178 DCDB->NoAutomaticRequestSense = false;
4179 DCDB->DisconnectPermitted = true;
4180 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4181 DCDB->BusAddress = NewInquiryStandardDataDMA;
4182 DCDB->CDBLength = 6;
4183 DCDB->TransferLengthHigh4 = 0;
4184 DCDB->SenseLength = sizeof(DCDB->SenseData);
4185 DCDB->CDB[0] = 0x12; /* INQUIRY */
4186 DCDB->CDB[1] = 0; /* EVPD = 0 */
4187 DCDB->CDB[2] = 0; /* Page Code */
4188 DCDB->CDB[3] = 0; /* Reserved */
4189 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4190 DCDB->CDB[5] = 0; /* Control */
4191 DAC960_QueueCommand(Command);
4192 return;
4193 }
4194 if (Controller->V1.NeedDeviceSerialNumberInformation)
4195 {
4196 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4197 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4198 dma_addr_t NewInquiryUnitSerialNumberDMA =
4199 Controller->V1.NewInquiryUnitSerialNumberDMA;
4200
4201 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4202 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4203 DCDB->Channel = Controller->V1.DeviceStateChannel;
4204 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4205 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4206 DCDB->EarlyStatus = false;
4207 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4208 DCDB->NoAutomaticRequestSense = false;
4209 DCDB->DisconnectPermitted = true;
4210 DCDB->TransferLength =
4211 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4212 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4213 DCDB->CDBLength = 6;
4214 DCDB->TransferLengthHigh4 = 0;
4215 DCDB->SenseLength = sizeof(DCDB->SenseData);
4216 DCDB->CDB[0] = 0x12; /* INQUIRY */
4217 DCDB->CDB[1] = 1; /* EVPD = 1 */
4218 DCDB->CDB[2] = 0x80; /* Page Code */
4219 DCDB->CDB[3] = 0; /* Reserved */
4220 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4221 DCDB->CDB[5] = 0; /* Control */
4222 DAC960_QueueCommand(Command);
4223 return;
4224 }
4225 if (Controller->V1.StartDeviceStateScan)
4226 {
4227 Controller->V1.DeviceStateChannel = 0;
4228 Controller->V1.DeviceStateTargetID = 0;
4229 Controller->V1.StartDeviceStateScan = false;
4230 }
4231 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4232 {
4233 Controller->V1.DeviceStateChannel++;
4234 Controller->V1.DeviceStateTargetID = 0;
4235 }
4236 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4237 {
4238 Controller->V1.NewDeviceState->DeviceState =
4239 DAC960_V1_Device_Dead;
4240 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4241 DAC960_V1_GetDeviceState;
4242 Command->V1.CommandMailbox.Type3D.Channel =
4243 Controller->V1.DeviceStateChannel;
4244 Command->V1.CommandMailbox.Type3D.TargetID =
4245 Controller->V1.DeviceStateTargetID;
4246 Command->V1.CommandMailbox.Type3D.BusAddress =
4247 Controller->V1.NewDeviceStateDMA;
4248 DAC960_QueueCommand(Command);
4249 return;
4250 }
4251 Controller->V1.NeedDeviceStateInformation = false;
4252 }
4253 if (Controller->V1.NeedLogicalDriveInformation)
4254 {
4255 Controller->V1.NeedLogicalDriveInformation = false;
4256 Command->V1.CommandMailbox.Type3.CommandOpcode =
4257 DAC960_V1_GetLogicalDriveInformation;
4258 Command->V1.CommandMailbox.Type3.BusAddress =
4259 Controller->V1.NewLogicalDriveInformationDMA;
4260 DAC960_QueueCommand(Command);
4261 return;
4262 }
4263 if (Controller->V1.NeedRebuildProgress)
4264 {
4265 Controller->V1.NeedRebuildProgress = false;
4266 Command->V1.CommandMailbox.Type3.CommandOpcode =
4267 DAC960_V1_GetRebuildProgress;
4268 Command->V1.CommandMailbox.Type3.BusAddress =
4269 Controller->V1.RebuildProgressDMA;
4270 DAC960_QueueCommand(Command);
4271 return;
4272 }
4273 if (Controller->V1.NeedConsistencyCheckProgress)
4274 {
4275 Controller->V1.NeedConsistencyCheckProgress = false;
4276 Command->V1.CommandMailbox.Type3.CommandOpcode =
4277 DAC960_V1_RebuildStat;
4278 Command->V1.CommandMailbox.Type3.BusAddress =
4279 Controller->V1.RebuildProgressDMA;
4280 DAC960_QueueCommand(Command);
4281 return;
4282 }
4283 if (Controller->V1.NeedBackgroundInitializationStatus)
4284 {
4285 Controller->V1.NeedBackgroundInitializationStatus = false;
4286 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4287 DAC960_V1_BackgroundInitializationControl;
4288 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4289 Command->V1.CommandMailbox.Type3B.BusAddress =
4290 Controller->V1.BackgroundInitializationStatusDMA;
4291 DAC960_QueueCommand(Command);
4292 return;
4293 }
4294 Controller->MonitoringTimerCount++;
4295 Controller->MonitoringTimer.expires =
4296 jiffies + DAC960_MonitoringTimerInterval;
4297 add_timer(&Controller->MonitoringTimer);
4298 }
4299 if (CommandType == DAC960_ImmediateCommand)
4300 {
4301 complete(Command->Completion);
4302 Command->Completion = NULL;
4303 return;
4304 }
4305 if (CommandType == DAC960_QueuedCommand)
4306 {
4307 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4308 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4309 Command->V1.KernelCommand = NULL;
4310 if (CommandOpcode == DAC960_V1_DCDB)
4311 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4312 [KernelCommand->DCDB->TargetID] =
4313 false;
4314 DAC960_DeallocateCommand(Command);
4315 KernelCommand->CompletionFunction(KernelCommand);
4316 return;
4317 }
4318 /*
4319 Queue a Status Monitoring Command to the Controller using the just
4320 completed Command if one was deferred previously due to lack of a
4321 free Command when the Monitoring Timer Function was called.
4322 */
4323 if (Controller->MonitoringCommandDeferred)
4324 {
4325 Controller->MonitoringCommandDeferred = false;
4326 DAC960_V1_QueueMonitoringCommand(Command);
4327 return;
4328 }
4329 /*
4330 Deallocate the Command.
4331 */
4332 DAC960_DeallocateCommand(Command);
4333 /*
4334 Wake up any processes waiting on a free Command.
4335 */
4336 wake_up(&Controller->CommandWaitQueue);
4337 }
4338
4339
4340 /*
4341 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4342 when an error occurs on a Read or Write operation.
4343 */
4344
4345 static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4346 {
4347 DAC960_Controller_T *Controller = Command->Controller;
4348 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4349 "NOT READY", "MEDIUM ERROR",
4350 "HARDWARE ERROR", "ILLEGAL REQUEST",
4351 "UNIT ATTENTION", "DATA PROTECT",
4352 "BLANK CHECK", "VENDOR-SPECIFIC",
4353 "COPY ABORTED", "ABORTED COMMAND",
4354 "EQUAL", "VOLUME OVERFLOW",
4355 "MISCOMPARE", "RESERVED" };
4356 unsigned char *CommandName = "UNKNOWN";
4357 switch (Command->CommandType)
4358 {
4359 case DAC960_ReadCommand:
4360 case DAC960_ReadRetryCommand:
4361 CommandName = "READ";
4362 break;
4363 case DAC960_WriteCommand:
4364 case DAC960_WriteRetryCommand:
4365 CommandName = "WRITE";
4366 break;
4367 case DAC960_MonitoringCommand:
4368 case DAC960_ImmediateCommand:
4369 case DAC960_QueuedCommand:
4370 break;
4371 }
4372 DAC960_Error("Error Condition %s on %s:\n", Controller,
4373 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4374 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4375 Controller, Controller->ControllerNumber,
4376 Command->LogicalDriveNumber, Command->BlockNumber,
4377 Command->BlockNumber + Command->BlockCount - 1);
4378 }
4379
4380
4381 /*
4382 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4383 occurs.
4384 */
4385
4386 static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4387 DAC960_V2_Event_T *Event)
4388 {
4389 DAC960_SCSI_RequestSense_T *RequestSense =
4390 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4391 unsigned char MessageBuffer[DAC960_LineBufferSize];
4392 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4393 { /* Physical Device Events (0x0000 - 0x007F) */
4394 { 0x0001, "P Online" },
4395 { 0x0002, "P Standby" },
4396 { 0x0005, "P Automatic Rebuild Started" },
4397 { 0x0006, "P Manual Rebuild Started" },
4398 { 0x0007, "P Rebuild Completed" },
4399 { 0x0008, "P Rebuild Cancelled" },
4400 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4401 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4402 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4403 { 0x000C, "S Offline" },
4404 { 0x000D, "P Found" },
4405 { 0x000E, "P Removed" },
4406 { 0x000F, "P Unconfigured" },
4407 { 0x0010, "P Expand Capacity Started" },
4408 { 0x0011, "P Expand Capacity Completed" },
4409 { 0x0012, "P Expand Capacity Failed" },
4410 { 0x0013, "P Command Timed Out" },
4411 { 0x0014, "P Command Aborted" },
4412 { 0x0015, "P Command Retried" },
4413 { 0x0016, "P Parity Error" },
4414 { 0x0017, "P Soft Error" },
4415 { 0x0018, "P Miscellaneous Error" },
4416 { 0x0019, "P Reset" },
4417 { 0x001A, "P Active Spare Found" },
4418 { 0x001B, "P Warm Spare Found" },
4419 { 0x001C, "S Sense Data Received" },
4420 { 0x001D, "P Initialization Started" },
4421 { 0x001E, "P Initialization Completed" },
4422 { 0x001F, "P Initialization Failed" },
4423 { 0x0020, "P Initialization Cancelled" },
4424 { 0x0021, "P Failed because Write Recovery Failed" },
4425 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4426 { 0x0023, "P Failed because of Double Check Condition" },
4427 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4428 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4429 { 0x0026, "P Failed because of Bad Tag from Device" },
4430 { 0x0027, "P Failed because of Command Timeout" },
4431 { 0x0028, "P Failed because of System Reset" },
4432 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4433 { 0x002A, "P Failed because Host Set Device to Failed State" },
4434 { 0x002B, "P Failed because of Selection Timeout" },
4435 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4436 { 0x002D, "P Failed because Device Returned Unknown Status" },
4437 { 0x002E, "P Failed because Device Not Ready" },
4438 { 0x002F, "P Failed because Device Not Found at Startup" },
4439 { 0x0030, "P Failed because COD Write Operation Failed" },
4440 { 0x0031, "P Failed because BDT Write Operation Failed" },
4441 { 0x0039, "P Missing at Startup" },
4442 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4443 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4444 { 0x003D, "P Standby Rebuild Started" },
4445 /* Logical Device Events (0x0080 - 0x00FF) */
4446 { 0x0080, "M Consistency Check Started" },
4447 { 0x0081, "M Consistency Check Completed" },
4448 { 0x0082, "M Consistency Check Cancelled" },
4449 { 0x0083, "M Consistency Check Completed With Errors" },
4450 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4451 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4452 { 0x0086, "L Offline" },
4453 { 0x0087, "L Critical" },
4454 { 0x0088, "L Online" },
4455 { 0x0089, "M Automatic Rebuild Started" },
4456 { 0x008A, "M Manual Rebuild Started" },
4457 { 0x008B, "M Rebuild Completed" },
4458 { 0x008C, "M Rebuild Cancelled" },
4459 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4460 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4461 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4462 { 0x0090, "M Initialization Started" },
4463 { 0x0091, "M Initialization Completed" },
4464 { 0x0092, "M Initialization Cancelled" },
4465 { 0x0093, "M Initialization Failed" },
4466 { 0x0094, "L Found" },
4467 { 0x0095, "L Deleted" },
4468 { 0x0096, "M Expand Capacity Started" },
4469 { 0x0097, "M Expand Capacity Completed" },
4470 { 0x0098, "M Expand Capacity Failed" },
4471 { 0x0099, "L Bad Block Found" },
4472 { 0x009A, "L Size Changed" },
4473 { 0x009B, "L Type Changed" },
4474 { 0x009C, "L Bad Data Block Found" },
4475 { 0x009E, "L Read of Data Block in BDT" },
4476 { 0x009F, "L Write Back Data for Disk Block Lost" },
4477 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4478 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4479 { 0x00A2, "L Standby Rebuild Started" },
4480 /* Fault Management Events (0x0100 - 0x017F) */
4481 { 0x0140, "E Fan %d Failed" },
4482 { 0x0141, "E Fan %d OK" },
4483 { 0x0142, "E Fan %d Not Present" },
4484 { 0x0143, "E Power Supply %d Failed" },
4485 { 0x0144, "E Power Supply %d OK" },
4486 { 0x0145, "E Power Supply %d Not Present" },
4487 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4488 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4489 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4490 { 0x0149, "E Temperature Sensor %d Not Present" },
4491 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4492 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4493 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4494 /* Controller Events (0x0180 - 0x01FF) */
4495 { 0x0181, "C Cache Write Back Error" },
4496 { 0x0188, "C Battery Backup Unit Found" },
4497 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4498 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4499 { 0x0193, "C Installation Aborted" },
4500 { 0x0195, "C Battery Backup Unit Physically Removed" },
4501 { 0x0196, "C Memory Error During Warm Boot" },
4502 { 0x019E, "C Memory Soft ECC Error Corrected" },
4503 { 0x019F, "C Memory Hard ECC Error Corrected" },
4504 { 0x01A2, "C Battery Backup Unit Failed" },
4505 { 0x01AB, "C Mirror Race Recovery Failed" },
4506 { 0x01AC, "C Mirror Race on Critical Drive" },
4507 /* Controller Internal Processor Events */
4508 { 0x0380, "C Internal Controller Hung" },
4509 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4510 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4511 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4512 { 0, "" } };
4513 int EventListIndex = 0, EventCode;
4514 unsigned char EventType, *EventMessage;
4515 if (Event->EventCode == 0x1C &&
4516 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4517 (RequestSense->AdditionalSenseCode == 0x80 ||
4518 RequestSense->AdditionalSenseCode == 0x81))
4519 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4520 RequestSense->AdditionalSenseCodeQualifier;
4521 while (true)
4522 {
4523 EventCode = EventList[EventListIndex].EventCode;
4524 if (EventCode == Event->EventCode || EventCode == 0) break;
4525 EventListIndex++;
4526 }
4527 EventType = EventList[EventListIndex].EventMessage[0];
4528 EventMessage = &EventList[EventListIndex].EventMessage[2];
4529 if (EventCode == 0)
4530 {
4531 DAC960_Critical("Unknown Controller Event Code %04X\n",
4532 Controller, Event->EventCode);
4533 return;
4534 }
4535 switch (EventType)
4536 {
4537 case 'P':
4538 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4539 Event->Channel, Event->TargetID, EventMessage);
4540 break;
4541 case 'L':
4542 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4543 Event->LogicalUnit, Controller->ControllerNumber,
4544 Event->LogicalUnit, EventMessage);
4545 break;
4546 case 'M':
4547 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4548 Event->LogicalUnit, Controller->ControllerNumber,
4549 Event->LogicalUnit, EventMessage);
4550 break;
4551 case 'S':
4552 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4553 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4554 RequestSense->AdditionalSenseCode == 0x04 &&
4555 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4556 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4557 break;
4558 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4559 Event->Channel, Event->TargetID, EventMessage);
4560 DAC960_Critical("Physical Device %d:%d Request Sense: "
4561 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4562 Controller,
4563 Event->Channel,
4564 Event->TargetID,
4565 RequestSense->SenseKey,
4566 RequestSense->AdditionalSenseCode,
4567 RequestSense->AdditionalSenseCodeQualifier);
4568 DAC960_Critical("Physical Device %d:%d Request Sense: "
4569 "Information = %02X%02X%02X%02X "
4570 "%02X%02X%02X%02X\n",
4571 Controller,
4572 Event->Channel,
4573 Event->TargetID,
4574 RequestSense->Information[0],
4575 RequestSense->Information[1],
4576 RequestSense->Information[2],
4577 RequestSense->Information[3],
4578 RequestSense->CommandSpecificInformation[0],
4579 RequestSense->CommandSpecificInformation[1],
4580 RequestSense->CommandSpecificInformation[2],
4581 RequestSense->CommandSpecificInformation[3]);
4582 break;
4583 case 'E':
4584 if (Controller->SuppressEnclosureMessages) break;
4585 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4586 DAC960_Critical("Enclosure %d %s\n", Controller,
4587 Event->TargetID, MessageBuffer);
4588 break;
4589 case 'C':
4590 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4591 break;
4592 default:
4593 DAC960_Critical("Unknown Controller Event Code %04X\n",
4594 Controller, Event->EventCode);
4595 break;
4596 }
4597 }
4598
4599
4600 /*
4601 DAC960_V2_ReportProgress prints an appropriate progress message for
4602 Logical Device Long Operations.
4603 */
4604
4605 static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4606 unsigned char *MessageString,
4607 unsigned int LogicalDeviceNumber,
4608 unsigned long BlocksCompleted,
4609 unsigned long LogicalDeviceSize)
4610 {
4611 Controller->EphemeralProgressMessage = true;
4612 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4613 "%d%% completed\n", Controller,
4614 MessageString,
4615 LogicalDeviceNumber,
4616 Controller->ControllerNumber,
4617 LogicalDeviceNumber,
4618 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4619 Controller->EphemeralProgressMessage = false;
4620 }
4621
4622
4623 /*
4624 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4625 for DAC960 V2 Firmware Controllers.
4626 */
4627
4628 static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4629 {
4630 DAC960_Controller_T *Controller = Command->Controller;
4631 DAC960_CommandType_T CommandType = Command->CommandType;
4632 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4633 DAC960_V2_IOCTL_Opcode_T IOCTLOpcode = CommandMailbox->Common.IOCTL_Opcode;
4634 DAC960_V2_CommandOpcode_T CommandOpcode = CommandMailbox->SCSI_10.CommandOpcode;
4635 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4636
4637 if (CommandType == DAC960_ReadCommand ||
4638 CommandType == DAC960_WriteCommand)
4639 {
4640
4641 #ifdef FORCE_RETRY_DEBUG
4642 CommandStatus = DAC960_V2_AbormalCompletion;
4643 #endif
4644 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4645
4646 if (CommandStatus == DAC960_V2_NormalCompletion) {
4647
4648 if (!DAC960_ProcessCompletedRequest(Command, true))
4649 BUG();
4650
4651 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4652 {
4653 /*
4654 * break the command down into pieces and resubmit each
4655 * piece, hoping that some of them will succeed.
4656 */
4657 DAC960_queue_partial_rw(Command);
4658 return;
4659 }
4660 else
4661 {
4662 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4663 DAC960_V2_ReadWriteError(Command);
4664 /*
4665 Perform completion processing for all buffers in this I/O Request.
4666 */
4667 (void)DAC960_ProcessCompletedRequest(Command, false);
4668 }
4669 }
4670 else if (CommandType == DAC960_ReadRetryCommand ||
4671 CommandType == DAC960_WriteRetryCommand)
4672 {
4673 bool normal_completion;
4674
4675 #ifdef FORCE_RETRY_FAILURE_DEBUG
4676 static int retry_count = 1;
4677 #endif
4678 /*
4679 Perform completion processing for the portion that was
4680 retried, and submit the next portion, if any.
4681 */
4682 normal_completion = true;
4683 if (CommandStatus != DAC960_V2_NormalCompletion) {
4684 normal_completion = false;
4685 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4686 DAC960_V2_ReadWriteError(Command);
4687 }
4688
4689 #ifdef FORCE_RETRY_FAILURE_DEBUG
4690 if (!(++retry_count % 10000)) {
4691 printk("V2 error retry failure test\n");
4692 normal_completion = false;
4693 DAC960_V2_ReadWriteError(Command);
4694 }
4695 #endif
4696
4697 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4698 DAC960_queue_partial_rw(Command);
4699 return;
4700 }
4701 }
4702 else if (CommandType == DAC960_MonitoringCommand)
4703 {
4704 if (Controller->ShutdownMonitoringTimer)
4705 return;
4706 if (IOCTLOpcode == DAC960_V2_GetControllerInfo)
4707 {
4708 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4709 Controller->V2.NewControllerInformation;
4710 DAC960_V2_ControllerInfo_T *ControllerInfo =
4711 &Controller->V2.ControllerInformation;
4712 Controller->LogicalDriveCount =
4713 NewControllerInfo->LogicalDevicesPresent;
4714 Controller->V2.NeedLogicalDeviceInformation = true;
4715 Controller->V2.NeedPhysicalDeviceInformation = true;
4716 Controller->V2.StartLogicalDeviceInformationScan = true;
4717 Controller->V2.StartPhysicalDeviceInformationScan = true;
4718 Controller->MonitoringAlertMode =
4719 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4720 NewControllerInfo->LogicalDevicesOffline > 0 ||
4721 NewControllerInfo->PhysicalDisksCritical > 0 ||
4722 NewControllerInfo->PhysicalDisksOffline > 0);
4723 memcpy(ControllerInfo, NewControllerInfo,
4724 sizeof(DAC960_V2_ControllerInfo_T));
4725 }
4726 else if (IOCTLOpcode == DAC960_V2_GetEvent)
4727 {
4728 if (CommandStatus == DAC960_V2_NormalCompletion) {
4729 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4730 }
4731 Controller->V2.NextEventSequenceNumber++;
4732 }
4733 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4734 CommandStatus == DAC960_V2_NormalCompletion)
4735 {
4736 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4737 Controller->V2.NewPhysicalDeviceInformation;
4738 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4739 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4740 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4741 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4742 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4743 unsigned int DeviceIndex;
4744 while (PhysicalDeviceInfo != NULL &&
4745 (NewPhysicalDeviceInfo->Channel >
4746 PhysicalDeviceInfo->Channel ||
4747 (NewPhysicalDeviceInfo->Channel ==
4748 PhysicalDeviceInfo->Channel &&
4749 (NewPhysicalDeviceInfo->TargetID >
4750 PhysicalDeviceInfo->TargetID ||
4751 (NewPhysicalDeviceInfo->TargetID ==
4752 PhysicalDeviceInfo->TargetID &&
4753 NewPhysicalDeviceInfo->LogicalUnit >
4754 PhysicalDeviceInfo->LogicalUnit)))))
4755 {
4756 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4757 Controller,
4758 PhysicalDeviceInfo->Channel,
4759 PhysicalDeviceInfo->TargetID);
4760 Controller->V2.PhysicalDeviceInformation
4761 [PhysicalDeviceIndex] = NULL;
4762 Controller->V2.InquiryUnitSerialNumber
4763 [PhysicalDeviceIndex] = NULL;
4764 kfree(PhysicalDeviceInfo);
4765 kfree(InquiryUnitSerialNumber);
4766 for (DeviceIndex = PhysicalDeviceIndex;
4767 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4768 DeviceIndex++)
4769 {
4770 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4771 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4772 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4773 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4774 }
4775 Controller->V2.PhysicalDeviceInformation
4776 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4777 Controller->V2.InquiryUnitSerialNumber
4778 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4779 PhysicalDeviceInfo =
4780 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4781 InquiryUnitSerialNumber =
4782 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4783 }
4784 if (PhysicalDeviceInfo == NULL ||
4785 (NewPhysicalDeviceInfo->Channel !=
4786 PhysicalDeviceInfo->Channel) ||
4787 (NewPhysicalDeviceInfo->TargetID !=
4788 PhysicalDeviceInfo->TargetID) ||
4789 (NewPhysicalDeviceInfo->LogicalUnit !=
4790 PhysicalDeviceInfo->LogicalUnit))
4791 {
4792 PhysicalDeviceInfo =
4793 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4794 InquiryUnitSerialNumber =
4795 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4796 GFP_ATOMIC);
4797 if (InquiryUnitSerialNumber == NULL ||
4798 PhysicalDeviceInfo == NULL)
4799 {
4800 kfree(InquiryUnitSerialNumber);
4801 InquiryUnitSerialNumber = NULL;
4802 kfree(PhysicalDeviceInfo);
4803 PhysicalDeviceInfo = NULL;
4804 }
4805 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4806 Controller,
4807 NewPhysicalDeviceInfo->Channel,
4808 NewPhysicalDeviceInfo->TargetID,
4809 (PhysicalDeviceInfo != NULL
4810 ? "" : " - Allocation Failed"));
4811 if (PhysicalDeviceInfo != NULL)
4812 {
4813 memset(PhysicalDeviceInfo, 0,
4814 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4815 PhysicalDeviceInfo->PhysicalDeviceState =
4816 DAC960_V2_Device_InvalidState;
4817 memset(InquiryUnitSerialNumber, 0,
4818 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4819 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4820 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4821 DeviceIndex > PhysicalDeviceIndex;
4822 DeviceIndex--)
4823 {
4824 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4825 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4826 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4827 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4828 }
4829 Controller->V2.PhysicalDeviceInformation
4830 [PhysicalDeviceIndex] =
4831 PhysicalDeviceInfo;
4832 Controller->V2.InquiryUnitSerialNumber
4833 [PhysicalDeviceIndex] =
4834 InquiryUnitSerialNumber;
4835 Controller->V2.NeedDeviceSerialNumberInformation = true;
4836 }
4837 }
4838 if (PhysicalDeviceInfo != NULL)
4839 {
4840 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4841 PhysicalDeviceInfo->PhysicalDeviceState)
4842 DAC960_Critical(
4843 "Physical Device %d:%d is now %s\n", Controller,
4844 NewPhysicalDeviceInfo->Channel,
4845 NewPhysicalDeviceInfo->TargetID,
4846 (NewPhysicalDeviceInfo->PhysicalDeviceState
4847 == DAC960_V2_Device_Online
4848 ? "ONLINE"
4849 : NewPhysicalDeviceInfo->PhysicalDeviceState
4850 == DAC960_V2_Device_Rebuild
4851 ? "REBUILD"
4852 : NewPhysicalDeviceInfo->PhysicalDeviceState
4853 == DAC960_V2_Device_Missing
4854 ? "MISSING"
4855 : NewPhysicalDeviceInfo->PhysicalDeviceState
4856 == DAC960_V2_Device_Critical
4857 ? "CRITICAL"
4858 : NewPhysicalDeviceInfo->PhysicalDeviceState
4859 == DAC960_V2_Device_Dead
4860 ? "DEAD"
4861 : NewPhysicalDeviceInfo->PhysicalDeviceState
4862 == DAC960_V2_Device_SuspectedDead
4863 ? "SUSPECTED-DEAD"
4864 : NewPhysicalDeviceInfo->PhysicalDeviceState
4865 == DAC960_V2_Device_CommandedOffline
4866 ? "COMMANDED-OFFLINE"
4867 : NewPhysicalDeviceInfo->PhysicalDeviceState
4868 == DAC960_V2_Device_Standby
4869 ? "STANDBY" : "UNKNOWN"));
4870 if ((NewPhysicalDeviceInfo->ParityErrors !=
4871 PhysicalDeviceInfo->ParityErrors) ||
4872 (NewPhysicalDeviceInfo->SoftErrors !=
4873 PhysicalDeviceInfo->SoftErrors) ||
4874 (NewPhysicalDeviceInfo->HardErrors !=
4875 PhysicalDeviceInfo->HardErrors) ||
4876 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4877 PhysicalDeviceInfo->MiscellaneousErrors) ||
4878 (NewPhysicalDeviceInfo->CommandTimeouts !=
4879 PhysicalDeviceInfo->CommandTimeouts) ||
4880 (NewPhysicalDeviceInfo->Retries !=
4881 PhysicalDeviceInfo->Retries) ||
4882 (NewPhysicalDeviceInfo->Aborts !=
4883 PhysicalDeviceInfo->Aborts) ||
4884 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4885 PhysicalDeviceInfo->PredictedFailuresDetected))
4886 {
4887 DAC960_Critical("Physical Device %d:%d Errors: "
4888 "Parity = %d, Soft = %d, "
4889 "Hard = %d, Misc = %d\n",
4890 Controller,
4891 NewPhysicalDeviceInfo->Channel,
4892 NewPhysicalDeviceInfo->TargetID,
4893 NewPhysicalDeviceInfo->ParityErrors,
4894 NewPhysicalDeviceInfo->SoftErrors,
4895 NewPhysicalDeviceInfo->HardErrors,
4896 NewPhysicalDeviceInfo->MiscellaneousErrors);
4897 DAC960_Critical("Physical Device %d:%d Errors: "
4898 "Timeouts = %d, Retries = %d, "
4899 "Aborts = %d, Predicted = %d\n",
4900 Controller,
4901 NewPhysicalDeviceInfo->Channel,
4902 NewPhysicalDeviceInfo->TargetID,
4903 NewPhysicalDeviceInfo->CommandTimeouts,
4904 NewPhysicalDeviceInfo->Retries,
4905 NewPhysicalDeviceInfo->Aborts,
4906 NewPhysicalDeviceInfo
4907 ->PredictedFailuresDetected);
4908 }
4909 if ((PhysicalDeviceInfo->PhysicalDeviceState
4910 == DAC960_V2_Device_Dead ||
4911 PhysicalDeviceInfo->PhysicalDeviceState
4912 == DAC960_V2_Device_InvalidState) &&
4913 NewPhysicalDeviceInfo->PhysicalDeviceState
4914 != DAC960_V2_Device_Dead)
4915 Controller->V2.NeedDeviceSerialNumberInformation = true;
4916 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4917 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4918 }
4919 NewPhysicalDeviceInfo->LogicalUnit++;
4920 Controller->V2.PhysicalDeviceIndex++;
4921 }
4922 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4923 {
4924 unsigned int DeviceIndex;
4925 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4926 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4927 DeviceIndex++)
4928 {
4929 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4930 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4931 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4932 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4933 if (PhysicalDeviceInfo == NULL) break;
4934 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4935 Controller,
4936 PhysicalDeviceInfo->Channel,
4937 PhysicalDeviceInfo->TargetID);
4938 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4939 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4940 kfree(PhysicalDeviceInfo);
4941 kfree(InquiryUnitSerialNumber);
4942 }
4943 Controller->V2.NeedPhysicalDeviceInformation = false;
4944 }
4945 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4946 CommandStatus == DAC960_V2_NormalCompletion)
4947 {
4948 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4949 Controller->V2.NewLogicalDeviceInformation;
4950 unsigned short LogicalDeviceNumber =
4951 NewLogicalDeviceInfo->LogicalDeviceNumber;
4952 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4953 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4954 if (LogicalDeviceInfo == NULL)
4955 {
4956 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4957 PhysicalDevice.Controller = 0;
4958 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4959 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4960 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4961 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4962 PhysicalDevice;
4963 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4964 GFP_ATOMIC);
4965 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4966 LogicalDeviceInfo;
4967 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4968 "Now Exists%s\n", Controller,
4969 LogicalDeviceNumber,
4970 Controller->ControllerNumber,
4971 LogicalDeviceNumber,
4972 (LogicalDeviceInfo != NULL
4973 ? "" : " - Allocation Failed"));
4974 if (LogicalDeviceInfo != NULL)
4975 {
4976 memset(LogicalDeviceInfo, 0,
4977 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4978 DAC960_ComputeGenericDiskInfo(Controller);
4979 }
4980 }
4981 if (LogicalDeviceInfo != NULL)
4982 {
4983 unsigned long LogicalDeviceSize =
4984 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4985 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4986 LogicalDeviceInfo->LogicalDeviceState)
4987 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4988 "is now %s\n", Controller,
4989 LogicalDeviceNumber,
4990 Controller->ControllerNumber,
4991 LogicalDeviceNumber,
4992 (NewLogicalDeviceInfo->LogicalDeviceState
4993 == DAC960_V2_LogicalDevice_Online
4994 ? "ONLINE"
4995 : NewLogicalDeviceInfo->LogicalDeviceState
4996 == DAC960_V2_LogicalDevice_Critical
4997 ? "CRITICAL" : "OFFLINE"));
4998 if ((NewLogicalDeviceInfo->SoftErrors !=
4999 LogicalDeviceInfo->SoftErrors) ||
5000 (NewLogicalDeviceInfo->CommandsFailed !=
5001 LogicalDeviceInfo->CommandsFailed) ||
5002 (NewLogicalDeviceInfo->DeferredWriteErrors !=
5003 LogicalDeviceInfo->DeferredWriteErrors))
5004 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
5005 "Soft = %d, Failed = %d, Deferred Write = %d\n",
5006 Controller, LogicalDeviceNumber,
5007 Controller->ControllerNumber,
5008 LogicalDeviceNumber,
5009 NewLogicalDeviceInfo->SoftErrors,
5010 NewLogicalDeviceInfo->CommandsFailed,
5011 NewLogicalDeviceInfo->DeferredWriteErrors);
5012 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5013 DAC960_V2_ReportProgress(Controller,
5014 "Consistency Check",
5015 LogicalDeviceNumber,
5016 NewLogicalDeviceInfo
5017 ->ConsistencyCheckBlockNumber,
5018 LogicalDeviceSize);
5019 else if (NewLogicalDeviceInfo->RebuildInProgress)
5020 DAC960_V2_ReportProgress(Controller,
5021 "Rebuild",
5022 LogicalDeviceNumber,
5023 NewLogicalDeviceInfo
5024 ->RebuildBlockNumber,
5025 LogicalDeviceSize);
5026 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5027 DAC960_V2_ReportProgress(Controller,
5028 "Background Initialization",
5029 LogicalDeviceNumber,
5030 NewLogicalDeviceInfo
5031 ->BackgroundInitializationBlockNumber,
5032 LogicalDeviceSize);
5033 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5034 DAC960_V2_ReportProgress(Controller,
5035 "Foreground Initialization",
5036 LogicalDeviceNumber,
5037 NewLogicalDeviceInfo
5038 ->ForegroundInitializationBlockNumber,
5039 LogicalDeviceSize);
5040 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5041 DAC960_V2_ReportProgress(Controller,
5042 "Data Migration",
5043 LogicalDeviceNumber,
5044 NewLogicalDeviceInfo
5045 ->DataMigrationBlockNumber,
5046 LogicalDeviceSize);
5047 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5048 DAC960_V2_ReportProgress(Controller,
5049 "Patrol Operation",
5050 LogicalDeviceNumber,
5051 NewLogicalDeviceInfo
5052 ->PatrolOperationBlockNumber,
5053 LogicalDeviceSize);
5054 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5055 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5056 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5057 "Background Initialization %s\n",
5058 Controller,
5059 LogicalDeviceNumber,
5060 Controller->ControllerNumber,
5061 LogicalDeviceNumber,
5062 (NewLogicalDeviceInfo->LogicalDeviceControl
5063 .LogicalDeviceInitialized
5064 ? "Completed" : "Failed"));
5065 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5066 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5067 }
5068 Controller->V2.LogicalDriveFoundDuringScan
5069 [LogicalDeviceNumber] = true;
5070 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5071 }
5072 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5073 {
5074 int LogicalDriveNumber;
5075 for (LogicalDriveNumber = 0;
5076 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5077 LogicalDriveNumber++)
5078 {
5079 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5080 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5081 if (LogicalDeviceInfo == NULL ||
5082 Controller->V2.LogicalDriveFoundDuringScan
5083 [LogicalDriveNumber])
5084 continue;
5085 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5086 "No Longer Exists\n", Controller,
5087 LogicalDriveNumber,
5088 Controller->ControllerNumber,
5089 LogicalDriveNumber);
5090 Controller->V2.LogicalDeviceInformation
5091 [LogicalDriveNumber] = NULL;
5092 kfree(LogicalDeviceInfo);
5093 Controller->LogicalDriveInitiallyAccessible
5094 [LogicalDriveNumber] = false;
5095 DAC960_ComputeGenericDiskInfo(Controller);
5096 }
5097 Controller->V2.NeedLogicalDeviceInformation = false;
5098 }
5099 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5100 {
5101 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5102 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5103
5104 if (CommandStatus != DAC960_V2_NormalCompletion) {
5105 memset(InquiryUnitSerialNumber,
5106 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5107 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5108 } else
5109 memcpy(InquiryUnitSerialNumber,
5110 Controller->V2.NewInquiryUnitSerialNumber,
5111 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5112
5113 Controller->V2.NeedDeviceSerialNumberInformation = false;
5114 }
5115
5116 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5117 - Controller->V2.NextEventSequenceNumber > 0)
5118 {
5119 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5120 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5121 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5122 Controller->V2.NextEventSequenceNumber >> 16;
5123 CommandMailbox->GetEvent.ControllerNumber = 0;
5124 CommandMailbox->GetEvent.IOCTL_Opcode =
5125 DAC960_V2_GetEvent;
5126 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5127 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5128 CommandMailbox->GetEvent.DataTransferMemoryAddress
5129 .ScatterGatherSegments[0]
5130 .SegmentDataPointer =
5131 Controller->V2.EventDMA;
5132 CommandMailbox->GetEvent.DataTransferMemoryAddress
5133 .ScatterGatherSegments[0]
5134 .SegmentByteCount =
5135 CommandMailbox->GetEvent.DataTransferSize;
5136 DAC960_QueueCommand(Command);
5137 return;
5138 }
5139 if (Controller->V2.NeedPhysicalDeviceInformation)
5140 {
5141 if (Controller->V2.NeedDeviceSerialNumberInformation)
5142 {
5143 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5144 Controller->V2.NewInquiryUnitSerialNumber;
5145 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5146
5147 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5148 Controller->V2.NewPhysicalDeviceInformation->Channel,
5149 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5150 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5151
5152
5153 DAC960_QueueCommand(Command);
5154 return;
5155 }
5156 if (Controller->V2.StartPhysicalDeviceInformationScan)
5157 {
5158 Controller->V2.PhysicalDeviceIndex = 0;
5159 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5160 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5161 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5162 Controller->V2.StartPhysicalDeviceInformationScan = false;
5163 }
5164 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5165 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5166 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5167 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5168 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5169 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5170 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5171 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5172 Controller->V2.NewPhysicalDeviceInformation->Channel;
5173 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5174 DAC960_V2_GetPhysicalDeviceInfoValid;
5175 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5176 .ScatterGatherSegments[0]
5177 .SegmentDataPointer =
5178 Controller->V2.NewPhysicalDeviceInformationDMA;
5179 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5180 .ScatterGatherSegments[0]
5181 .SegmentByteCount =
5182 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5183 DAC960_QueueCommand(Command);
5184 return;
5185 }
5186 if (Controller->V2.NeedLogicalDeviceInformation)
5187 {
5188 if (Controller->V2.StartLogicalDeviceInformationScan)
5189 {
5190 int LogicalDriveNumber;
5191 for (LogicalDriveNumber = 0;
5192 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5193 LogicalDriveNumber++)
5194 Controller->V2.LogicalDriveFoundDuringScan
5195 [LogicalDriveNumber] = false;
5196 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5197 Controller->V2.StartLogicalDeviceInformationScan = false;
5198 }
5199 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5200 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5201 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5202 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5203 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5204 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5205 DAC960_V2_GetLogicalDeviceInfoValid;
5206 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5207 .ScatterGatherSegments[0]
5208 .SegmentDataPointer =
5209 Controller->V2.NewLogicalDeviceInformationDMA;
5210 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5211 .ScatterGatherSegments[0]
5212 .SegmentByteCount =
5213 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5214 DAC960_QueueCommand(Command);
5215 return;
5216 }
5217 Controller->MonitoringTimerCount++;
5218 Controller->MonitoringTimer.expires =
5219 jiffies + DAC960_HealthStatusMonitoringInterval;
5220 add_timer(&Controller->MonitoringTimer);
5221 }
5222 if (CommandType == DAC960_ImmediateCommand)
5223 {
5224 complete(Command->Completion);
5225 Command->Completion = NULL;
5226 return;
5227 }
5228 if (CommandType == DAC960_QueuedCommand)
5229 {
5230 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5231 KernelCommand->CommandStatus = CommandStatus;
5232 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5233 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5234 Command->V2.KernelCommand = NULL;
5235 DAC960_DeallocateCommand(Command);
5236 KernelCommand->CompletionFunction(KernelCommand);
5237 return;
5238 }
5239 /*
5240 Queue a Status Monitoring Command to the Controller using the just
5241 completed Command if one was deferred previously due to lack of a
5242 free Command when the Monitoring Timer Function was called.
5243 */
5244 if (Controller->MonitoringCommandDeferred)
5245 {
5246 Controller->MonitoringCommandDeferred = false;
5247 DAC960_V2_QueueMonitoringCommand(Command);
5248 return;
5249 }
5250 /*
5251 Deallocate the Command.
5252 */
5253 DAC960_DeallocateCommand(Command);
5254 /*
5255 Wake up any processes waiting on a free Command.
5256 */
5257 wake_up(&Controller->CommandWaitQueue);
5258 }
5259
5260 /*
5261 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5262 Controllers.
5263 */
5264
5265 static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
5266 void *DeviceIdentifier)
5267 {
5268 DAC960_Controller_T *Controller = DeviceIdentifier;
5269 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5270 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5271 unsigned long flags;
5272
5273 spin_lock_irqsave(&Controller->queue_lock, flags);
5274 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5275 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5276 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5277 {
5278 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5279 NextStatusMailbox->Fields.CommandIdentifier;
5280 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5281 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5282 Command->V2.RequestSenseLength =
5283 NextStatusMailbox->Fields.RequestSenseLength;
5284 Command->V2.DataTransferResidue =
5285 NextStatusMailbox->Fields.DataTransferResidue;
5286 NextStatusMailbox->Words[0] = 0;
5287 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5288 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5289 DAC960_V2_ProcessCompletedCommand(Command);
5290 }
5291 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5292 /*
5293 Attempt to remove additional I/O Requests from the Controller's
5294 I/O Request Queue and queue them to the Controller.
5295 */
5296 DAC960_ProcessRequest(Controller);
5297 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5298 return IRQ_HANDLED;
5299 }
5300
5301 /*
5302 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5303 Controllers.
5304 */
5305
5306 static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
5307 void *DeviceIdentifier)
5308 {
5309 DAC960_Controller_T *Controller = DeviceIdentifier;
5310 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5311 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5312 unsigned long flags;
5313
5314 spin_lock_irqsave(&Controller->queue_lock, flags);
5315 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5316 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5317 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5318 {
5319 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5320 NextStatusMailbox->Fields.CommandIdentifier;
5321 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5322 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5323 Command->V2.RequestSenseLength =
5324 NextStatusMailbox->Fields.RequestSenseLength;
5325 Command->V2.DataTransferResidue =
5326 NextStatusMailbox->Fields.DataTransferResidue;
5327 NextStatusMailbox->Words[0] = 0;
5328 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5329 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5330 DAC960_V2_ProcessCompletedCommand(Command);
5331 }
5332 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5333 /*
5334 Attempt to remove additional I/O Requests from the Controller's
5335 I/O Request Queue and queue them to the Controller.
5336 */
5337 DAC960_ProcessRequest(Controller);
5338 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5339 return IRQ_HANDLED;
5340 }
5341
5342
5343 /*
5344 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5345 Controllers.
5346 */
5347
5348 static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
5349 void *DeviceIdentifier)
5350 {
5351 DAC960_Controller_T *Controller = DeviceIdentifier;
5352 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5353 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5354 unsigned long flags;
5355
5356 spin_lock_irqsave(&Controller->queue_lock, flags);
5357 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5358 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5359 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5360 {
5361 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5362 NextStatusMailbox->Fields.CommandIdentifier;
5363 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5364 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5365 Command->V2.RequestSenseLength =
5366 NextStatusMailbox->Fields.RequestSenseLength;
5367 Command->V2.DataTransferResidue =
5368 NextStatusMailbox->Fields.DataTransferResidue;
5369 NextStatusMailbox->Words[0] = 0;
5370 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5371 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5372 DAC960_V2_ProcessCompletedCommand(Command);
5373 }
5374 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5375 /*
5376 Attempt to remove additional I/O Requests from the Controller's
5377 I/O Request Queue and queue them to the Controller.
5378 */
5379 DAC960_ProcessRequest(Controller);
5380 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5381 return IRQ_HANDLED;
5382 }
5383
5384
5385 /*
5386 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5387 Controllers.
5388 */
5389
5390 static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
5391 void *DeviceIdentifier)
5392 {
5393 DAC960_Controller_T *Controller = DeviceIdentifier;
5394 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5395 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5396 unsigned long flags;
5397
5398 spin_lock_irqsave(&Controller->queue_lock, flags);
5399 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5400 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5401 while (NextStatusMailbox->Fields.Valid)
5402 {
5403 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5404 NextStatusMailbox->Fields.CommandIdentifier;
5405 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5406 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5407 NextStatusMailbox->Word = 0;
5408 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5409 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5410 DAC960_V1_ProcessCompletedCommand(Command);
5411 }
5412 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5413 /*
5414 Attempt to remove additional I/O Requests from the Controller's
5415 I/O Request Queue and queue them to the Controller.
5416 */
5417 DAC960_ProcessRequest(Controller);
5418 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5419 return IRQ_HANDLED;
5420 }
5421
5422
5423 /*
5424 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5425 Controllers.
5426 */
5427
5428 static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
5429 void *DeviceIdentifier)
5430 {
5431 DAC960_Controller_T *Controller = DeviceIdentifier;
5432 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5433 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5434 unsigned long flags;
5435
5436 spin_lock_irqsave(&Controller->queue_lock, flags);
5437 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5438 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5439 while (NextStatusMailbox->Fields.Valid)
5440 {
5441 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5442 NextStatusMailbox->Fields.CommandIdentifier;
5443 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5444 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5445 NextStatusMailbox->Word = 0;
5446 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5447 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5448 DAC960_V1_ProcessCompletedCommand(Command);
5449 }
5450 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5451 /*
5452 Attempt to remove additional I/O Requests from the Controller's
5453 I/O Request Queue and queue them to the Controller.
5454 */
5455 DAC960_ProcessRequest(Controller);
5456 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5457 return IRQ_HANDLED;
5458 }
5459
5460
5461 /*
5462 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5463 Controllers.
5464 */
5465
5466 static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
5467 void *DeviceIdentifier)
5468 {
5469 DAC960_Controller_T *Controller = DeviceIdentifier;
5470 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5471 unsigned long flags;
5472
5473 spin_lock_irqsave(&Controller->queue_lock, flags);
5474 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5475 {
5476 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5477 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5478 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5479 Command->V1.CommandStatus =
5480 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5481 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5482 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5483 DAC960_V1_ProcessCompletedCommand(Command);
5484 }
5485 /*
5486 Attempt to remove additional I/O Requests from the Controller's
5487 I/O Request Queue and queue them to the Controller.
5488 */
5489 DAC960_ProcessRequest(Controller);
5490 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5491 return IRQ_HANDLED;
5492 }
5493
5494
5495 /*
5496 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5497 Controllers.
5498
5499 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5500 on the data having been placed into DAC960_Controller_T, rather than
5501 an arbitrary buffer.
5502 */
5503
5504 static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
5505 void *DeviceIdentifier)
5506 {
5507 DAC960_Controller_T *Controller = DeviceIdentifier;
5508 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5509 unsigned long flags;
5510
5511 spin_lock_irqsave(&Controller->queue_lock, flags);
5512 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5513 {
5514 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5515 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5516 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5517 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5518 DAC960_V1_CommandOpcode_T CommandOpcode =
5519 CommandMailbox->Common.CommandOpcode;
5520 Command->V1.CommandStatus =
5521 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5522 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5523 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5524 switch (CommandOpcode)
5525 {
5526 case DAC960_V1_Enquiry_Old:
5527 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5528 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5529 break;
5530 case DAC960_V1_GetDeviceState_Old:
5531 Command->V1.CommandMailbox.Common.CommandOpcode =
5532 DAC960_V1_GetDeviceState;
5533 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5534 break;
5535 case DAC960_V1_Read_Old:
5536 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5537 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5538 break;
5539 case DAC960_V1_Write_Old:
5540 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5541 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5542 break;
5543 case DAC960_V1_ReadWithScatterGather_Old:
5544 Command->V1.CommandMailbox.Common.CommandOpcode =
5545 DAC960_V1_ReadWithScatterGather;
5546 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5547 break;
5548 case DAC960_V1_WriteWithScatterGather_Old:
5549 Command->V1.CommandMailbox.Common.CommandOpcode =
5550 DAC960_V1_WriteWithScatterGather;
5551 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5552 break;
5553 default:
5554 break;
5555 }
5556 DAC960_V1_ProcessCompletedCommand(Command);
5557 }
5558 /*
5559 Attempt to remove additional I/O Requests from the Controller's
5560 I/O Request Queue and queue them to the Controller.
5561 */
5562 DAC960_ProcessRequest(Controller);
5563 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5564 return IRQ_HANDLED;
5565 }
5566
5567
5568 /*
5569 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5570 Firmware Controllers.
5571 */
5572
5573 static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5574 {
5575 DAC960_Controller_T *Controller = Command->Controller;
5576 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5577 DAC960_V1_ClearCommand(Command);
5578 Command->CommandType = DAC960_MonitoringCommand;
5579 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5580 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5581 DAC960_QueueCommand(Command);
5582 }
5583
5584
5585 /*
5586 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5587 Firmware Controllers.
5588 */
5589
5590 static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5591 {
5592 DAC960_Controller_T *Controller = Command->Controller;
5593 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5594 DAC960_V2_ClearCommand(Command);
5595 Command->CommandType = DAC960_MonitoringCommand;
5596 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5597 CommandMailbox->ControllerInfo.CommandControlBits
5598 .DataTransferControllerToHost = true;
5599 CommandMailbox->ControllerInfo.CommandControlBits
5600 .NoAutoRequestSense = true;
5601 CommandMailbox->ControllerInfo.DataTransferSize =
5602 sizeof(DAC960_V2_ControllerInfo_T);
5603 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5604 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5605 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5606 .ScatterGatherSegments[0]
5607 .SegmentDataPointer =
5608 Controller->V2.NewControllerInformationDMA;
5609 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5610 .ScatterGatherSegments[0]
5611 .SegmentByteCount =
5612 CommandMailbox->ControllerInfo.DataTransferSize;
5613 DAC960_QueueCommand(Command);
5614 }
5615
5616
5617 /*
5618 DAC960_MonitoringTimerFunction is the timer function for monitoring
5619 the status of DAC960 Controllers.
5620 */
5621
5622 static void DAC960_MonitoringTimerFunction(struct timer_list *t)
5623 {
5624 DAC960_Controller_T *Controller = from_timer(Controller, t, MonitoringTimer);
5625 DAC960_Command_T *Command;
5626 unsigned long flags;
5627
5628 if (Controller->FirmwareType == DAC960_V1_Controller)
5629 {
5630 spin_lock_irqsave(&Controller->queue_lock, flags);
5631 /*
5632 Queue a Status Monitoring Command to Controller.
5633 */
5634 Command = DAC960_AllocateCommand(Controller);
5635 if (Command != NULL)
5636 DAC960_V1_QueueMonitoringCommand(Command);
5637 else Controller->MonitoringCommandDeferred = true;
5638 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5639 }
5640 else
5641 {
5642 DAC960_V2_ControllerInfo_T *ControllerInfo =
5643 &Controller->V2.ControllerInformation;
5644 unsigned int StatusChangeCounter =
5645 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
5646 bool ForceMonitoringCommand = false;
5647 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5648 + DAC960_SecondaryMonitoringInterval))
5649 {
5650 int LogicalDriveNumber;
5651 for (LogicalDriveNumber = 0;
5652 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5653 LogicalDriveNumber++)
5654 {
5655 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5656 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5657 if (LogicalDeviceInfo == NULL) continue;
5658 if (!LogicalDeviceInfo->LogicalDeviceControl
5659 .LogicalDeviceInitialized)
5660 {
5661 ForceMonitoringCommand = true;
5662 break;
5663 }
5664 }
5665 Controller->SecondaryMonitoringTime = jiffies;
5666 }
5667 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5668 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5669 == Controller->V2.NextEventSequenceNumber &&
5670 (ControllerInfo->BackgroundInitializationsActive +
5671 ControllerInfo->LogicalDeviceInitializationsActive +
5672 ControllerInfo->PhysicalDeviceInitializationsActive +
5673 ControllerInfo->ConsistencyChecksActive +
5674 ControllerInfo->RebuildsActive +
5675 ControllerInfo->OnlineExpansionsActive == 0 ||
5676 time_before(jiffies, Controller->PrimaryMonitoringTime
5677 + DAC960_MonitoringTimerInterval)) &&
5678 !ForceMonitoringCommand)
5679 {
5680 Controller->MonitoringTimer.expires =
5681 jiffies + DAC960_HealthStatusMonitoringInterval;
5682 add_timer(&Controller->MonitoringTimer);
5683 return;
5684 }
5685 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5686 Controller->PrimaryMonitoringTime = jiffies;
5687
5688 spin_lock_irqsave(&Controller->queue_lock, flags);
5689 /*
5690 Queue a Status Monitoring Command to Controller.
5691 */
5692 Command = DAC960_AllocateCommand(Controller);
5693 if (Command != NULL)
5694 DAC960_V2_QueueMonitoringCommand(Command);
5695 else Controller->MonitoringCommandDeferred = true;
5696 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5697 /*
5698 Wake up any processes waiting on a Health Status Buffer change.
5699 */
5700 wake_up(&Controller->HealthStatusWaitQueue);
5701 }
5702 }
5703
5704 /*
5705 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5706 additional bytes in the Combined Status Buffer and grows the buffer if
5707 necessary. It returns true if there is enough room and false otherwise.
5708 */
5709
5710 static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
5711 unsigned int ByteCount)
5712 {
5713 unsigned char *NewStatusBuffer;
5714 if (Controller->InitialStatusLength + 1 +
5715 Controller->CurrentStatusLength + ByteCount + 1 <=
5716 Controller->CombinedStatusBufferLength)
5717 return true;
5718 if (Controller->CombinedStatusBufferLength == 0)
5719 {
5720 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5721 while (NewStatusBufferLength < ByteCount)
5722 NewStatusBufferLength *= 2;
5723 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5724 GFP_ATOMIC);
5725 if (Controller->CombinedStatusBuffer == NULL) return false;
5726 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5727 return true;
5728 }
5729 NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5730 GFP_ATOMIC);
5731 if (NewStatusBuffer == NULL)
5732 {
5733 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5734 Controller);
5735 return false;
5736 }
5737 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5738 Controller->CombinedStatusBufferLength);
5739 kfree(Controller->CombinedStatusBuffer);
5740 Controller->CombinedStatusBuffer = NewStatusBuffer;
5741 Controller->CombinedStatusBufferLength *= 2;
5742 Controller->CurrentStatusBuffer =
5743 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5744 return true;
5745 }
5746
5747
5748 /*
5749 DAC960_Message prints Driver Messages.
5750 */
5751
5752 static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5753 unsigned char *Format,
5754 DAC960_Controller_T *Controller,
5755 ...)
5756 {
5757 static unsigned char Buffer[DAC960_LineBufferSize];
5758 static bool BeginningOfLine = true;
5759 va_list Arguments;
5760 int Length = 0;
5761 va_start(Arguments, Controller);
5762 Length = vsprintf(Buffer, Format, Arguments);
5763 va_end(Arguments);
5764 if (Controller == NULL)
5765 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5766 DAC960_ControllerCount, Buffer);
5767 else if (MessageLevel == DAC960_AnnounceLevel ||
5768 MessageLevel == DAC960_InfoLevel)
5769 {
5770 if (!Controller->ControllerInitialized)
5771 {
5772 if (DAC960_CheckStatusBuffer(Controller, Length))
5773 {
5774 strcpy(&Controller->CombinedStatusBuffer
5775 [Controller->InitialStatusLength],
5776 Buffer);
5777 Controller->InitialStatusLength += Length;
5778 Controller->CurrentStatusBuffer =
5779 &Controller->CombinedStatusBuffer
5780 [Controller->InitialStatusLength + 1];
5781 }
5782 if (MessageLevel == DAC960_AnnounceLevel)
5783 {
5784 static int AnnouncementLines = 0;
5785 if (++AnnouncementLines <= 2)
5786 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5787 Buffer);
5788 }
5789 else
5790 {
5791 if (BeginningOfLine)
5792 {
5793 if (Buffer[0] != '\n' || Length > 1)
5794 printk("%sDAC960#%d: %s",
5795 DAC960_MessageLevelMap[MessageLevel],
5796 Controller->ControllerNumber, Buffer);
5797 }
5798 else printk("%s", Buffer);
5799 }
5800 }
5801 else if (DAC960_CheckStatusBuffer(Controller, Length))
5802 {
5803 strcpy(&Controller->CurrentStatusBuffer[
5804 Controller->CurrentStatusLength], Buffer);
5805 Controller->CurrentStatusLength += Length;
5806 }
5807 }
5808 else if (MessageLevel == DAC960_ProgressLevel)
5809 {
5810 strcpy(Controller->ProgressBuffer, Buffer);
5811 Controller->ProgressBufferLength = Length;
5812 if (Controller->EphemeralProgressMessage)
5813 {
5814 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5815 + DAC960_ProgressReportingInterval))
5816 {
5817 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5818 Controller->ControllerNumber, Buffer);
5819 Controller->LastProgressReportTime = jiffies;
5820 }
5821 }
5822 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5823 Controller->ControllerNumber, Buffer);
5824 }
5825 else if (MessageLevel == DAC960_UserCriticalLevel)
5826 {
5827 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5828 Buffer);
5829 Controller->UserStatusLength += Length;
5830 if (Buffer[0] != '\n' || Length > 1)
5831 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5832 Controller->ControllerNumber, Buffer);
5833 }
5834 else
5835 {
5836 if (BeginningOfLine)
5837 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5838 Controller->ControllerNumber, Buffer);
5839 else printk("%s", Buffer);
5840 }
5841 BeginningOfLine = (Buffer[Length-1] == '\n');
5842 }
5843
5844
5845 /*
5846 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5847 Channel:TargetID specification from a User Command string. It updates
5848 Channel and TargetID and returns true on success and false on failure.
5849 */
5850
5851 static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
5852 char *UserCommandString,
5853 unsigned char *Channel,
5854 unsigned char *TargetID)
5855 {
5856 char *NewUserCommandString = UserCommandString;
5857 unsigned long XChannel, XTargetID;
5858 while (*UserCommandString == ' ') UserCommandString++;
5859 if (UserCommandString == NewUserCommandString)
5860 return false;
5861 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5862 if (NewUserCommandString == UserCommandString ||
5863 *NewUserCommandString != ':' ||
5864 XChannel >= Controller->Channels)
5865 return false;
5866 UserCommandString = ++NewUserCommandString;
5867 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5868 if (NewUserCommandString == UserCommandString ||
5869 *NewUserCommandString != '\0' ||
5870 XTargetID >= Controller->Targets)
5871 return false;
5872 *Channel = XChannel;
5873 *TargetID = XTargetID;
5874 return true;
5875 }
5876
5877
5878 /*
5879 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5880 specification from a User Command string. It updates LogicalDriveNumber and
5881 returns true on success and false on failure.
5882 */
5883
5884 static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
5885 char *UserCommandString,
5886 unsigned char *LogicalDriveNumber)
5887 {
5888 char *NewUserCommandString = UserCommandString;
5889 unsigned long XLogicalDriveNumber;
5890 while (*UserCommandString == ' ') UserCommandString++;
5891 if (UserCommandString == NewUserCommandString)
5892 return false;
5893 XLogicalDriveNumber =
5894 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5895 if (NewUserCommandString == UserCommandString ||
5896 *NewUserCommandString != '\0' ||
5897 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5898 return false;
5899 *LogicalDriveNumber = XLogicalDriveNumber;
5900 return true;
5901 }
5902
5903
5904 /*
5905 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5906 DAC960 V1 Firmware Controllers.
5907 */
5908
5909 static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5910 DAC960_Command_T *Command,
5911 unsigned char Channel,
5912 unsigned char TargetID,
5913 DAC960_V1_PhysicalDeviceState_T
5914 DeviceState,
5915 const unsigned char *DeviceStateString)
5916 {
5917 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5918 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5919 CommandMailbox->Type3D.Channel = Channel;
5920 CommandMailbox->Type3D.TargetID = TargetID;
5921 CommandMailbox->Type3D.DeviceState = DeviceState;
5922 CommandMailbox->Type3D.Modifier = 0;
5923 DAC960_ExecuteCommand(Command);
5924 switch (Command->V1.CommandStatus)
5925 {
5926 case DAC960_V1_NormalCompletion:
5927 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5928 DeviceStateString, Channel, TargetID);
5929 break;
5930 case DAC960_V1_UnableToStartDevice:
5931 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5932 "Unable to Start Device\n", Controller,
5933 DeviceStateString, Channel, TargetID);
5934 break;
5935 case DAC960_V1_NoDeviceAtAddress:
5936 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5937 "No Device at Address\n", Controller,
5938 DeviceStateString, Channel, TargetID);
5939 break;
5940 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5941 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5942 "Invalid Channel or Target or Modifier\n",
5943 Controller, DeviceStateString, Channel, TargetID);
5944 break;
5945 case DAC960_V1_ChannelBusy:
5946 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5947 "Channel Busy\n", Controller,
5948 DeviceStateString, Channel, TargetID);
5949 break;
5950 default:
5951 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5952 "Unexpected Status %04X\n", Controller,
5953 DeviceStateString, Channel, TargetID,
5954 Command->V1.CommandStatus);
5955 break;
5956 }
5957 }
5958
5959
5960 /*
5961 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5962 Controllers.
5963 */
5964
5965 static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
5966 unsigned char *UserCommand)
5967 {
5968 DAC960_Command_T *Command;
5969 DAC960_V1_CommandMailbox_T *CommandMailbox;
5970 unsigned long flags;
5971 unsigned char Channel, TargetID, LogicalDriveNumber;
5972
5973 spin_lock_irqsave(&Controller->queue_lock, flags);
5974 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5975 DAC960_WaitForCommand(Controller);
5976 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5977 Controller->UserStatusLength = 0;
5978 DAC960_V1_ClearCommand(Command);
5979 Command->CommandType = DAC960_ImmediateCommand;
5980 CommandMailbox = &Command->V1.CommandMailbox;
5981 if (strcmp(UserCommand, "flush-cache") == 0)
5982 {
5983 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5984 DAC960_ExecuteCommand(Command);
5985 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5986 }
5987 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5988 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5989 &Channel, &TargetID))
5990 {
5991 DAC960_V1_DeviceState_T *DeviceState =
5992 &Controller->V1.DeviceState[Channel][TargetID];
5993 if (DeviceState->Present &&
5994 DeviceState->DeviceType == DAC960_V1_DiskType &&
5995 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5996 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5997 DAC960_V1_Device_Dead, "Kill");
5998 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5999 Controller, Channel, TargetID);
6000 }
6001 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6002 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6003 &Channel, &TargetID))
6004 {
6005 DAC960_V1_DeviceState_T *DeviceState =
6006 &Controller->V1.DeviceState[Channel][TargetID];
6007 if (DeviceState->Present &&
6008 DeviceState->DeviceType == DAC960_V1_DiskType &&
6009 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6010 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6011 DAC960_V1_Device_Online, "Make Online");
6012 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6013 Controller, Channel, TargetID);
6014
6015 }
6016 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6017 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6018 &Channel, &TargetID))
6019 {
6020 DAC960_V1_DeviceState_T *DeviceState =
6021 &Controller->V1.DeviceState[Channel][TargetID];
6022 if (DeviceState->Present &&
6023 DeviceState->DeviceType == DAC960_V1_DiskType &&
6024 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6025 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6026 DAC960_V1_Device_Standby, "Make Standby");
6027 else DAC960_UserCritical("Make Standby of Physical "
6028 "Device %d:%d Illegal\n",
6029 Controller, Channel, TargetID);
6030 }
6031 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6032 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6033 &Channel, &TargetID))
6034 {
6035 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6036 CommandMailbox->Type3D.Channel = Channel;
6037 CommandMailbox->Type3D.TargetID = TargetID;
6038 DAC960_ExecuteCommand(Command);
6039 switch (Command->V1.CommandStatus)
6040 {
6041 case DAC960_V1_NormalCompletion:
6042 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6043 Controller, Channel, TargetID);
6044 break;
6045 case DAC960_V1_AttemptToRebuildOnlineDrive:
6046 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6047 "Attempt to Rebuild Online or "
6048 "Unresponsive Drive\n",
6049 Controller, Channel, TargetID);
6050 break;
6051 case DAC960_V1_NewDiskFailedDuringRebuild:
6052 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6053 "New Disk Failed During Rebuild\n",
6054 Controller, Channel, TargetID);
6055 break;
6056 case DAC960_V1_InvalidDeviceAddress:
6057 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6058 "Invalid Device Address\n",
6059 Controller, Channel, TargetID);
6060 break;
6061 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6062 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6063 "Rebuild or Consistency Check Already "
6064 "in Progress\n", Controller, Channel, TargetID);
6065 break;
6066 default:
6067 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6068 "Unexpected Status %04X\n", Controller,
6069 Channel, TargetID, Command->V1.CommandStatus);
6070 break;
6071 }
6072 }
6073 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6074 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6075 &LogicalDriveNumber))
6076 {
6077 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6078 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6079 CommandMailbox->Type3C.AutoRestore = true;
6080 DAC960_ExecuteCommand(Command);
6081 switch (Command->V1.CommandStatus)
6082 {
6083 case DAC960_V1_NormalCompletion:
6084 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6085 "(/dev/rd/c%dd%d) Initiated\n",
6086 Controller, LogicalDriveNumber,
6087 Controller->ControllerNumber,
6088 LogicalDriveNumber);
6089 break;
6090 case DAC960_V1_DependentDiskIsDead:
6091 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6092 "(/dev/rd/c%dd%d) Failed - "
6093 "Dependent Physical Device is DEAD\n",
6094 Controller, LogicalDriveNumber,
6095 Controller->ControllerNumber,
6096 LogicalDriveNumber);
6097 break;
6098 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6099 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6100 "(/dev/rd/c%dd%d) Failed - "
6101 "Invalid or Nonredundant Logical Drive\n",
6102 Controller, LogicalDriveNumber,
6103 Controller->ControllerNumber,
6104 LogicalDriveNumber);
6105 break;
6106 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6107 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6108 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6109 "Consistency Check Already in Progress\n",
6110 Controller, LogicalDriveNumber,
6111 Controller->ControllerNumber,
6112 LogicalDriveNumber);
6113 break;
6114 default:
6115 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6116 "(/dev/rd/c%dd%d) Failed - "
6117 "Unexpected Status %04X\n",
6118 Controller, LogicalDriveNumber,
6119 Controller->ControllerNumber,
6120 LogicalDriveNumber, Command->V1.CommandStatus);
6121 break;
6122 }
6123 }
6124 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6125 strcmp(UserCommand, "cancel-consistency-check") == 0)
6126 {
6127 /*
6128 the OldRebuildRateConstant is never actually used
6129 once its value is retrieved from the controller.
6130 */
6131 unsigned char *OldRebuildRateConstant;
6132 dma_addr_t OldRebuildRateConstantDMA;
6133
6134 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6135 sizeof(char), &OldRebuildRateConstantDMA);
6136 if (OldRebuildRateConstant == NULL) {
6137 DAC960_UserCritical("Cancellation of Rebuild or "
6138 "Consistency Check Failed - "
6139 "Out of Memory",
6140 Controller);
6141 goto failure;
6142 }
6143 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6144 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6145 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6146 DAC960_ExecuteCommand(Command);
6147 switch (Command->V1.CommandStatus)
6148 {
6149 case DAC960_V1_NormalCompletion:
6150 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6151 Controller);
6152 break;
6153 default:
6154 DAC960_UserCritical("Cancellation of Rebuild or "
6155 "Consistency Check Failed - "
6156 "Unexpected Status %04X\n",
6157 Controller, Command->V1.CommandStatus);
6158 break;
6159 }
6160 failure:
6161 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6162 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6163 }
6164 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6165 Controller, UserCommand);
6166
6167 spin_lock_irqsave(&Controller->queue_lock, flags);
6168 DAC960_DeallocateCommand(Command);
6169 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6170 return true;
6171 }
6172
6173
6174 /*
6175 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6176 TargetID into a Logical Device. It returns true on success and false
6177 on failure.
6178 */
6179
6180 static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
6181 unsigned char Channel,
6182 unsigned char TargetID,
6183 unsigned short
6184 *LogicalDeviceNumber)
6185 {
6186 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6187 DAC960_Controller_T *Controller = Command->Controller;
6188
6189 CommandMailbox = &Command->V2.CommandMailbox;
6190 memcpy(&SavedCommandMailbox, CommandMailbox,
6191 sizeof(DAC960_V2_CommandMailbox_T));
6192
6193 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6194 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6195 .DataTransferControllerToHost = true;
6196 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6197 .NoAutoRequestSense = true;
6198 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6199 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6200 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6201 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6202 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6203 DAC960_V2_TranslatePhysicalToLogicalDevice;
6204 CommandMailbox->Common.DataTransferMemoryAddress
6205 .ScatterGatherSegments[0]
6206 .SegmentDataPointer =
6207 Controller->V2.PhysicalToLogicalDeviceDMA;
6208 CommandMailbox->Common.DataTransferMemoryAddress
6209 .ScatterGatherSegments[0]
6210 .SegmentByteCount =
6211 CommandMailbox->Common.DataTransferSize;
6212
6213 DAC960_ExecuteCommand(Command);
6214 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6215
6216 memcpy(CommandMailbox, &SavedCommandMailbox,
6217 sizeof(DAC960_V2_CommandMailbox_T));
6218 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6219 }
6220
6221
6222 /*
6223 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6224 Controllers.
6225 */
6226
6227 static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
6228 unsigned char *UserCommand)
6229 {
6230 DAC960_Command_T *Command;
6231 DAC960_V2_CommandMailbox_T *CommandMailbox;
6232 unsigned long flags;
6233 unsigned char Channel, TargetID, LogicalDriveNumber;
6234 unsigned short LogicalDeviceNumber;
6235
6236 spin_lock_irqsave(&Controller->queue_lock, flags);
6237 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6238 DAC960_WaitForCommand(Controller);
6239 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6240 Controller->UserStatusLength = 0;
6241 DAC960_V2_ClearCommand(Command);
6242 Command->CommandType = DAC960_ImmediateCommand;
6243 CommandMailbox = &Command->V2.CommandMailbox;
6244 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6245 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6246 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6247 if (strcmp(UserCommand, "flush-cache") == 0)
6248 {
6249 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6250 CommandMailbox->DeviceOperation.OperationDevice =
6251 DAC960_V2_RAID_Controller;
6252 DAC960_ExecuteCommand(Command);
6253 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6254 }
6255 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6256 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6257 &Channel, &TargetID) &&
6258 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6259 &LogicalDeviceNumber))
6260 {
6261 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6262 LogicalDeviceNumber;
6263 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6264 DAC960_V2_SetDeviceState;
6265 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6266 DAC960_V2_Device_Dead;
6267 DAC960_ExecuteCommand(Command);
6268 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6269 Controller, Channel, TargetID,
6270 (Command->V2.CommandStatus
6271 == DAC960_V2_NormalCompletion
6272 ? "Succeeded" : "Failed"));
6273 }
6274 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6275 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6276 &Channel, &TargetID) &&
6277 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6278 &LogicalDeviceNumber))
6279 {
6280 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6281 LogicalDeviceNumber;
6282 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6283 DAC960_V2_SetDeviceState;
6284 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6285 DAC960_V2_Device_Online;
6286 DAC960_ExecuteCommand(Command);
6287 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6288 Controller, Channel, TargetID,
6289 (Command->V2.CommandStatus
6290 == DAC960_V2_NormalCompletion
6291 ? "Succeeded" : "Failed"));
6292 }
6293 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6294 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6295 &Channel, &TargetID) &&
6296 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6297 &LogicalDeviceNumber))
6298 {
6299 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6300 LogicalDeviceNumber;
6301 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6302 DAC960_V2_SetDeviceState;
6303 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6304 DAC960_V2_Device_Standby;
6305 DAC960_ExecuteCommand(Command);
6306 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6307 Controller, Channel, TargetID,
6308 (Command->V2.CommandStatus
6309 == DAC960_V2_NormalCompletion
6310 ? "Succeeded" : "Failed"));
6311 }
6312 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6313 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6314 &Channel, &TargetID) &&
6315 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6316 &LogicalDeviceNumber))
6317 {
6318 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6319 LogicalDeviceNumber;
6320 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6321 DAC960_V2_RebuildDeviceStart;
6322 DAC960_ExecuteCommand(Command);
6323 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6324 Controller, Channel, TargetID,
6325 (Command->V2.CommandStatus
6326 == DAC960_V2_NormalCompletion
6327 ? "Initiated" : "Not Initiated"));
6328 }
6329 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6330 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6331 &Channel, &TargetID) &&
6332 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6333 &LogicalDeviceNumber))
6334 {
6335 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6336 LogicalDeviceNumber;
6337 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6338 DAC960_V2_RebuildDeviceStop;
6339 DAC960_ExecuteCommand(Command);
6340 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6341 Controller, Channel, TargetID,
6342 (Command->V2.CommandStatus
6343 == DAC960_V2_NormalCompletion
6344 ? "Cancelled" : "Not Cancelled"));
6345 }
6346 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6347 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6348 &LogicalDriveNumber))
6349 {
6350 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6351 LogicalDriveNumber;
6352 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6353 DAC960_V2_ConsistencyCheckStart;
6354 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6355 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6356 DAC960_ExecuteCommand(Command);
6357 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6358 "(/dev/rd/c%dd%d) %s\n",
6359 Controller, LogicalDriveNumber,
6360 Controller->ControllerNumber,
6361 LogicalDriveNumber,
6362 (Command->V2.CommandStatus
6363 == DAC960_V2_NormalCompletion
6364 ? "Initiated" : "Not Initiated"));
6365 }
6366 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6367 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6368 &LogicalDriveNumber))
6369 {
6370 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6371 LogicalDriveNumber;
6372 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6373 DAC960_V2_ConsistencyCheckStop;
6374 DAC960_ExecuteCommand(Command);
6375 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6376 "(/dev/rd/c%dd%d) %s\n",
6377 Controller, LogicalDriveNumber,
6378 Controller->ControllerNumber,
6379 LogicalDriveNumber,
6380 (Command->V2.CommandStatus
6381 == DAC960_V2_NormalCompletion
6382 ? "Cancelled" : "Not Cancelled"));
6383 }
6384 else if (strcmp(UserCommand, "perform-discovery") == 0)
6385 {
6386 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6387 DAC960_ExecuteCommand(Command);
6388 DAC960_UserCritical("Discovery %s\n", Controller,
6389 (Command->V2.CommandStatus
6390 == DAC960_V2_NormalCompletion
6391 ? "Initiated" : "Not Initiated"));
6392 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6393 {
6394 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6395 CommandMailbox->ControllerInfo.CommandControlBits
6396 .DataTransferControllerToHost = true;
6397 CommandMailbox->ControllerInfo.CommandControlBits
6398 .NoAutoRequestSense = true;
6399 CommandMailbox->ControllerInfo.DataTransferSize =
6400 sizeof(DAC960_V2_ControllerInfo_T);
6401 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6402 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6403 DAC960_V2_GetControllerInfo;
6404 /*
6405 * How does this NOT race with the queued Monitoring
6406 * usage of this structure?
6407 */
6408 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6409 .ScatterGatherSegments[0]
6410 .SegmentDataPointer =
6411 Controller->V2.NewControllerInformationDMA;
6412 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6413 .ScatterGatherSegments[0]
6414 .SegmentByteCount =
6415 CommandMailbox->ControllerInfo.DataTransferSize;
6416 while (1) {
6417 DAC960_ExecuteCommand(Command);
6418 if (!Controller->V2.NewControllerInformation->PhysicalScanActive)
6419 break;
6420 msleep(1000);
6421 }
6422 DAC960_UserCritical("Discovery Completed\n", Controller);
6423 }
6424 }
6425 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6426 Controller->SuppressEnclosureMessages = true;
6427 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6428 Controller, UserCommand);
6429
6430 spin_lock_irqsave(&Controller->queue_lock, flags);
6431 DAC960_DeallocateCommand(Command);
6432 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6433 return true;
6434 }
6435
6436 static int dac960_proc_show(struct seq_file *m, void *v)
6437 {
6438 unsigned char *StatusMessage = "OK\n";
6439 int ControllerNumber;
6440 for (ControllerNumber = 0;
6441 ControllerNumber < DAC960_ControllerCount;
6442 ControllerNumber++)
6443 {
6444 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6445 if (Controller == NULL) continue;
6446 if (Controller->MonitoringAlertMode)
6447 {
6448 StatusMessage = "ALERT\n";
6449 break;
6450 }
6451 }
6452 seq_puts(m, StatusMessage);
6453 return 0;
6454 }
6455
6456 static int dac960_proc_open(struct inode *inode, struct file *file)
6457 {
6458 return single_open(file, dac960_proc_show, NULL);
6459 }
6460
6461 static const struct file_operations dac960_proc_fops = {
6462 .owner = THIS_MODULE,
6463 .open = dac960_proc_open,
6464 .read = seq_read,
6465 .llseek = seq_lseek,
6466 .release = single_release,
6467 };
6468
6469 static int dac960_initial_status_proc_show(struct seq_file *m, void *v)
6470 {
6471 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6472 seq_printf(m, "%.*s", Controller->InitialStatusLength, Controller->CombinedStatusBuffer);
6473 return 0;
6474 }
6475
6476 static int dac960_initial_status_proc_open(struct inode *inode, struct file *file)
6477 {
6478 return single_open(file, dac960_initial_status_proc_show, PDE_DATA(inode));
6479 }
6480
6481 static const struct file_operations dac960_initial_status_proc_fops = {
6482 .owner = THIS_MODULE,
6483 .open = dac960_initial_status_proc_open,
6484 .read = seq_read,
6485 .llseek = seq_lseek,
6486 .release = single_release,
6487 };
6488
6489 static int dac960_current_status_proc_show(struct seq_file *m, void *v)
6490 {
6491 DAC960_Controller_T *Controller = (DAC960_Controller_T *) m->private;
6492 unsigned char *StatusMessage =
6493 "No Rebuild or Consistency Check in Progress\n";
6494 int ProgressMessageLength = strlen(StatusMessage);
6495 if (jiffies != Controller->LastCurrentStatusTime)
6496 {
6497 Controller->CurrentStatusLength = 0;
6498 DAC960_AnnounceDriver(Controller);
6499 DAC960_ReportControllerConfiguration(Controller);
6500 DAC960_ReportDeviceConfiguration(Controller);
6501 if (Controller->ProgressBufferLength > 0)
6502 ProgressMessageLength = Controller->ProgressBufferLength;
6503 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6504 {
6505 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6506 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6507 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6508 if (Controller->ProgressBufferLength > 0)
6509 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6510 Controller->ProgressBuffer);
6511 else
6512 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6513 StatusMessage);
6514 Controller->CurrentStatusLength += ProgressMessageLength;
6515 }
6516 Controller->LastCurrentStatusTime = jiffies;
6517 }
6518 seq_printf(m, "%.*s", Controller->CurrentStatusLength, Controller->CurrentStatusBuffer);
6519 return 0;
6520 }
6521
6522 static int dac960_current_status_proc_open(struct inode *inode, struct file *file)
6523 {
6524 return single_open(file, dac960_current_status_proc_show, PDE_DATA(inode));
6525 }
6526
6527 static const struct file_operations dac960_current_status_proc_fops = {
6528 .owner = THIS_MODULE,
6529 .open = dac960_current_status_proc_open,
6530 .read = seq_read,
6531 .llseek = seq_lseek,
6532 .release = single_release,
6533 };
6534
6535 static int dac960_user_command_proc_show(struct seq_file *m, void *v)
6536 {
6537 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6538
6539 seq_printf(m, "%.*s", Controller->UserStatusLength, Controller->UserStatusBuffer);
6540 return 0;
6541 }
6542
6543 static int dac960_user_command_proc_open(struct inode *inode, struct file *file)
6544 {
6545 return single_open(file, dac960_user_command_proc_show, PDE_DATA(inode));
6546 }
6547
6548 static ssize_t dac960_user_command_proc_write(struct file *file,
6549 const char __user *Buffer,
6550 size_t Count, loff_t *pos)
6551 {
6552 DAC960_Controller_T *Controller = PDE_DATA(file_inode(file));
6553 unsigned char CommandBuffer[80];
6554 int Length;
6555 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6556 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6557 CommandBuffer[Count] = '\0';
6558 Length = strlen(CommandBuffer);
6559 if (Length > 0 && CommandBuffer[Length-1] == '\n')
6560 CommandBuffer[--Length] = '\0';
6561 if (Controller->FirmwareType == DAC960_V1_Controller)
6562 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6563 ? Count : -EBUSY);
6564 else
6565 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6566 ? Count : -EBUSY);
6567 }
6568
6569 static const struct file_operations dac960_user_command_proc_fops = {
6570 .owner = THIS_MODULE,
6571 .open = dac960_user_command_proc_open,
6572 .read = seq_read,
6573 .llseek = seq_lseek,
6574 .release = single_release,
6575 .write = dac960_user_command_proc_write,
6576 };
6577
6578 /*
6579 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6580 DAC960 Driver.
6581 */
6582
6583 static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6584 {
6585 struct proc_dir_entry *ControllerProcEntry;
6586
6587 if (DAC960_ProcDirectoryEntry == NULL) {
6588 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6589 proc_create("status", 0, DAC960_ProcDirectoryEntry,
6590 &dac960_proc_fops);
6591 }
6592
6593 snprintf(Controller->ControllerName, sizeof(Controller->ControllerName),
6594 "c%d", Controller->ControllerNumber);
6595 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6596 DAC960_ProcDirectoryEntry);
6597 proc_create_data("initial_status", 0, ControllerProcEntry, &dac960_initial_status_proc_fops, Controller);
6598 proc_create_data("current_status", 0, ControllerProcEntry, &dac960_current_status_proc_fops, Controller);
6599 proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
6600 Controller->ControllerProcEntry = ControllerProcEntry;
6601 }
6602
6603
6604 /*
6605 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6606 DAC960 Driver.
6607 */
6608
6609 static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6610 {
6611 if (Controller->ControllerProcEntry == NULL)
6612 return;
6613 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6614 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6615 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6616 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6617 Controller->ControllerProcEntry = NULL;
6618 }
6619
6620 #ifdef DAC960_GAM_MINOR
6621
6622 /*
6623 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6624 */
6625
6626 static long DAC960_gam_ioctl(struct file *file, unsigned int Request,
6627 unsigned long Argument)
6628 {
6629 long ErrorCode = 0;
6630 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
6631
6632 mutex_lock(&DAC960_mutex);
6633 switch (Request)
6634 {
6635 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
6636 ErrorCode = DAC960_ControllerCount;
6637 break;
6638 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6639 {
6640 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6641 (DAC960_ControllerInfo_T __user *) Argument;
6642 DAC960_ControllerInfo_T ControllerInfo;
6643 DAC960_Controller_T *Controller;
6644 int ControllerNumber;
6645 if (UserSpaceControllerInfo == NULL)
6646 ErrorCode = -EINVAL;
6647 else ErrorCode = get_user(ControllerNumber,
6648 &UserSpaceControllerInfo->ControllerNumber);
6649 if (ErrorCode != 0)
6650 break;
6651 ErrorCode = -ENXIO;
6652 if (ControllerNumber < 0 ||
6653 ControllerNumber > DAC960_ControllerCount - 1) {
6654 break;
6655 }
6656 Controller = DAC960_Controllers[ControllerNumber];
6657 if (Controller == NULL)
6658 break;
6659 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6660 ControllerInfo.ControllerNumber = ControllerNumber;
6661 ControllerInfo.FirmwareType = Controller->FirmwareType;
6662 ControllerInfo.Channels = Controller->Channels;
6663 ControllerInfo.Targets = Controller->Targets;
6664 ControllerInfo.PCI_Bus = Controller->Bus;
6665 ControllerInfo.PCI_Device = Controller->Device;
6666 ControllerInfo.PCI_Function = Controller->Function;
6667 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6668 ControllerInfo.PCI_Address = Controller->PCI_Address;
6669 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6670 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6671 ErrorCode = (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6672 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6673 break;
6674 }
6675 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6676 {
6677 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6678 (DAC960_V1_UserCommand_T __user *) Argument;
6679 DAC960_V1_UserCommand_T UserCommand;
6680 DAC960_Controller_T *Controller;
6681 DAC960_Command_T *Command = NULL;
6682 DAC960_V1_CommandOpcode_T CommandOpcode;
6683 DAC960_V1_CommandStatus_T CommandStatus;
6684 DAC960_V1_DCDB_T DCDB;
6685 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6686 dma_addr_t DCDB_IOBUFDMA;
6687 unsigned long flags;
6688 int ControllerNumber, DataTransferLength;
6689 unsigned char *DataTransferBuffer = NULL;
6690 dma_addr_t DataTransferBufferDMA;
6691 if (UserSpaceUserCommand == NULL) {
6692 ErrorCode = -EINVAL;
6693 break;
6694 }
6695 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6696 sizeof(DAC960_V1_UserCommand_T))) {
6697 ErrorCode = -EFAULT;
6698 break;
6699 }
6700 ControllerNumber = UserCommand.ControllerNumber;
6701 ErrorCode = -ENXIO;
6702 if (ControllerNumber < 0 ||
6703 ControllerNumber > DAC960_ControllerCount - 1)
6704 break;
6705 Controller = DAC960_Controllers[ControllerNumber];
6706 if (Controller == NULL)
6707 break;
6708 ErrorCode = -EINVAL;
6709 if (Controller->FirmwareType != DAC960_V1_Controller)
6710 break;
6711 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6712 DataTransferLength = UserCommand.DataTransferLength;
6713 if (CommandOpcode & 0x80)
6714 break;
6715 if (CommandOpcode == DAC960_V1_DCDB)
6716 {
6717 if (copy_from_user(&DCDB, UserCommand.DCDB,
6718 sizeof(DAC960_V1_DCDB_T))) {
6719 ErrorCode = -EFAULT;
6720 break;
6721 }
6722 if (DCDB.Channel >= DAC960_V1_MaxChannels)
6723 break;
6724 if (!((DataTransferLength == 0 &&
6725 DCDB.Direction
6726 == DAC960_V1_DCDB_NoDataTransfer) ||
6727 (DataTransferLength > 0 &&
6728 DCDB.Direction
6729 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6730 (DataTransferLength < 0 &&
6731 DCDB.Direction
6732 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6733 break;
6734 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6735 != abs(DataTransferLength))
6736 break;
6737 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6738 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6739 if (DCDB_IOBUF == NULL) {
6740 ErrorCode = -ENOMEM;
6741 break;
6742 }
6743 }
6744 ErrorCode = -ENOMEM;
6745 if (DataTransferLength > 0)
6746 {
6747 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6748 DataTransferLength,
6749 &DataTransferBufferDMA);
6750 if (DataTransferBuffer == NULL)
6751 break;
6752 }
6753 else if (DataTransferLength < 0)
6754 {
6755 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6756 -DataTransferLength, &DataTransferBufferDMA);
6757 if (DataTransferBuffer == NULL)
6758 break;
6759 if (copy_from_user(DataTransferBuffer,
6760 UserCommand.DataTransferBuffer,
6761 -DataTransferLength)) {
6762 ErrorCode = -EFAULT;
6763 break;
6764 }
6765 }
6766 if (CommandOpcode == DAC960_V1_DCDB)
6767 {
6768 spin_lock_irqsave(&Controller->queue_lock, flags);
6769 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6770 DAC960_WaitForCommand(Controller);
6771 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6772 [DCDB.TargetID])
6773 {
6774 spin_unlock_irq(&Controller->queue_lock);
6775 __wait_event(Controller->CommandWaitQueue,
6776 !Controller->V1.DirectCommandActive
6777 [DCDB.Channel][DCDB.TargetID]);
6778 spin_lock_irq(&Controller->queue_lock);
6779 }
6780 Controller->V1.DirectCommandActive[DCDB.Channel]
6781 [DCDB.TargetID] = true;
6782 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6783 DAC960_V1_ClearCommand(Command);
6784 Command->CommandType = DAC960_ImmediateCommand;
6785 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6786 sizeof(DAC960_V1_CommandMailbox_T));
6787 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6788 DCDB.BusAddress = DataTransferBufferDMA;
6789 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6790 }
6791 else
6792 {
6793 spin_lock_irqsave(&Controller->queue_lock, flags);
6794 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6795 DAC960_WaitForCommand(Controller);
6796 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6797 DAC960_V1_ClearCommand(Command);
6798 Command->CommandType = DAC960_ImmediateCommand;
6799 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6800 sizeof(DAC960_V1_CommandMailbox_T));
6801 if (DataTransferBuffer != NULL)
6802 Command->V1.CommandMailbox.Type3.BusAddress =
6803 DataTransferBufferDMA;
6804 }
6805 DAC960_ExecuteCommand(Command);
6806 CommandStatus = Command->V1.CommandStatus;
6807 spin_lock_irqsave(&Controller->queue_lock, flags);
6808 DAC960_DeallocateCommand(Command);
6809 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6810 if (DataTransferLength > 0)
6811 {
6812 if (copy_to_user(UserCommand.DataTransferBuffer,
6813 DataTransferBuffer, DataTransferLength)) {
6814 ErrorCode = -EFAULT;
6815 goto Failure1;
6816 }
6817 }
6818 if (CommandOpcode == DAC960_V1_DCDB)
6819 {
6820 /*
6821 I don't believe Target or Channel in the DCDB_IOBUF
6822 should be any different from the contents of DCDB.
6823 */
6824 Controller->V1.DirectCommandActive[DCDB.Channel]
6825 [DCDB.TargetID] = false;
6826 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6827 sizeof(DAC960_V1_DCDB_T))) {
6828 ErrorCode = -EFAULT;
6829 goto Failure1;
6830 }
6831 }
6832 ErrorCode = CommandStatus;
6833 Failure1:
6834 if (DataTransferBuffer != NULL)
6835 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6836 DataTransferBuffer, DataTransferBufferDMA);
6837 if (DCDB_IOBUF != NULL)
6838 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6839 DCDB_IOBUF, DCDB_IOBUFDMA);
6840 break;
6841 }
6842 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6843 {
6844 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6845 (DAC960_V2_UserCommand_T __user *) Argument;
6846 DAC960_V2_UserCommand_T UserCommand;
6847 DAC960_Controller_T *Controller;
6848 DAC960_Command_T *Command = NULL;
6849 DAC960_V2_CommandMailbox_T *CommandMailbox;
6850 DAC960_V2_CommandStatus_T CommandStatus;
6851 unsigned long flags;
6852 int ControllerNumber, DataTransferLength;
6853 int DataTransferResidue, RequestSenseLength;
6854 unsigned char *DataTransferBuffer = NULL;
6855 dma_addr_t DataTransferBufferDMA;
6856 unsigned char *RequestSenseBuffer = NULL;
6857 dma_addr_t RequestSenseBufferDMA;
6858
6859 ErrorCode = -EINVAL;
6860 if (UserSpaceUserCommand == NULL)
6861 break;
6862 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6863 sizeof(DAC960_V2_UserCommand_T))) {
6864 ErrorCode = -EFAULT;
6865 break;
6866 }
6867 ErrorCode = -ENXIO;
6868 ControllerNumber = UserCommand.ControllerNumber;
6869 if (ControllerNumber < 0 ||
6870 ControllerNumber > DAC960_ControllerCount - 1)
6871 break;
6872 Controller = DAC960_Controllers[ControllerNumber];
6873 if (Controller == NULL)
6874 break;
6875 if (Controller->FirmwareType != DAC960_V2_Controller){
6876 ErrorCode = -EINVAL;
6877 break;
6878 }
6879 DataTransferLength = UserCommand.DataTransferLength;
6880 ErrorCode = -ENOMEM;
6881 if (DataTransferLength > 0)
6882 {
6883 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6884 DataTransferLength,
6885 &DataTransferBufferDMA);
6886 if (DataTransferBuffer == NULL)
6887 break;
6888 }
6889 else if (DataTransferLength < 0)
6890 {
6891 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6892 -DataTransferLength, &DataTransferBufferDMA);
6893 if (DataTransferBuffer == NULL)
6894 break;
6895 if (copy_from_user(DataTransferBuffer,
6896 UserCommand.DataTransferBuffer,
6897 -DataTransferLength)) {
6898 ErrorCode = -EFAULT;
6899 goto Failure2;
6900 }
6901 }
6902 RequestSenseLength = UserCommand.RequestSenseLength;
6903 if (RequestSenseLength > 0)
6904 {
6905 RequestSenseBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6906 RequestSenseLength,
6907 &RequestSenseBufferDMA);
6908 if (RequestSenseBuffer == NULL)
6909 {
6910 ErrorCode = -ENOMEM;
6911 goto Failure2;
6912 }
6913 }
6914 spin_lock_irqsave(&Controller->queue_lock, flags);
6915 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6916 DAC960_WaitForCommand(Controller);
6917 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6918 DAC960_V2_ClearCommand(Command);
6919 Command->CommandType = DAC960_ImmediateCommand;
6920 CommandMailbox = &Command->V2.CommandMailbox;
6921 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6922 sizeof(DAC960_V2_CommandMailbox_T));
6923 CommandMailbox->Common.CommandControlBits
6924 .AdditionalScatterGatherListMemory = false;
6925 CommandMailbox->Common.CommandControlBits
6926 .NoAutoRequestSense = true;
6927 CommandMailbox->Common.DataTransferSize = 0;
6928 CommandMailbox->Common.DataTransferPageNumber = 0;
6929 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6930 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6931 if (DataTransferLength != 0)
6932 {
6933 if (DataTransferLength > 0)
6934 {
6935 CommandMailbox->Common.CommandControlBits
6936 .DataTransferControllerToHost = true;
6937 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6938 }
6939 else
6940 {
6941 CommandMailbox->Common.CommandControlBits
6942 .DataTransferControllerToHost = false;
6943 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6944 }
6945 CommandMailbox->Common.DataTransferMemoryAddress
6946 .ScatterGatherSegments[0]
6947 .SegmentDataPointer = DataTransferBufferDMA;
6948 CommandMailbox->Common.DataTransferMemoryAddress
6949 .ScatterGatherSegments[0]
6950 .SegmentByteCount =
6951 CommandMailbox->Common.DataTransferSize;
6952 }
6953 if (RequestSenseLength > 0)
6954 {
6955 CommandMailbox->Common.CommandControlBits
6956 .NoAutoRequestSense = false;
6957 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6958 CommandMailbox->Common.RequestSenseBusAddress =
6959 RequestSenseBufferDMA;
6960 }
6961 DAC960_ExecuteCommand(Command);
6962 CommandStatus = Command->V2.CommandStatus;
6963 RequestSenseLength = Command->V2.RequestSenseLength;
6964 DataTransferResidue = Command->V2.DataTransferResidue;
6965 spin_lock_irqsave(&Controller->queue_lock, flags);
6966 DAC960_DeallocateCommand(Command);
6967 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6968 if (RequestSenseLength > UserCommand.RequestSenseLength)
6969 RequestSenseLength = UserCommand.RequestSenseLength;
6970 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6971 &DataTransferResidue,
6972 sizeof(DataTransferResidue))) {
6973 ErrorCode = -EFAULT;
6974 goto Failure2;
6975 }
6976 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6977 &RequestSenseLength, sizeof(RequestSenseLength))) {
6978 ErrorCode = -EFAULT;
6979 goto Failure2;
6980 }
6981 if (DataTransferLength > 0)
6982 {
6983 if (copy_to_user(UserCommand.DataTransferBuffer,
6984 DataTransferBuffer, DataTransferLength)) {
6985 ErrorCode = -EFAULT;
6986 goto Failure2;
6987 }
6988 }
6989 if (RequestSenseLength > 0)
6990 {
6991 if (copy_to_user(UserCommand.RequestSenseBuffer,
6992 RequestSenseBuffer, RequestSenseLength)) {
6993 ErrorCode = -EFAULT;
6994 goto Failure2;
6995 }
6996 }
6997 ErrorCode = CommandStatus;
6998 Failure2:
6999 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
7000 DataTransferBuffer, DataTransferBufferDMA);
7001 if (RequestSenseBuffer != NULL)
7002 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
7003 RequestSenseBuffer, RequestSenseBufferDMA);
7004 break;
7005 }
7006 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
7007 {
7008 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
7009 (DAC960_V2_GetHealthStatus_T __user *) Argument;
7010 DAC960_V2_GetHealthStatus_T GetHealthStatus;
7011 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
7012 DAC960_Controller_T *Controller;
7013 int ControllerNumber;
7014 if (UserSpaceGetHealthStatus == NULL) {
7015 ErrorCode = -EINVAL;
7016 break;
7017 }
7018 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
7019 sizeof(DAC960_V2_GetHealthStatus_T))) {
7020 ErrorCode = -EFAULT;
7021 break;
7022 }
7023 ErrorCode = -ENXIO;
7024 ControllerNumber = GetHealthStatus.ControllerNumber;
7025 if (ControllerNumber < 0 ||
7026 ControllerNumber > DAC960_ControllerCount - 1)
7027 break;
7028 Controller = DAC960_Controllers[ControllerNumber];
7029 if (Controller == NULL)
7030 break;
7031 if (Controller->FirmwareType != DAC960_V2_Controller) {
7032 ErrorCode = -EINVAL;
7033 break;
7034 }
7035 if (copy_from_user(&HealthStatusBuffer,
7036 GetHealthStatus.HealthStatusBuffer,
7037 sizeof(DAC960_V2_HealthStatusBuffer_T))) {
7038 ErrorCode = -EFAULT;
7039 break;
7040 }
7041 ErrorCode = wait_event_interruptible_timeout(Controller->HealthStatusWaitQueue,
7042 !(Controller->V2.HealthStatusBuffer->StatusChangeCounter
7043 == HealthStatusBuffer.StatusChangeCounter &&
7044 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7045 == HealthStatusBuffer.NextEventSequenceNumber),
7046 DAC960_MonitoringTimerInterval);
7047 if (ErrorCode == -ERESTARTSYS) {
7048 ErrorCode = -EINTR;
7049 break;
7050 }
7051 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7052 Controller->V2.HealthStatusBuffer,
7053 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7054 ErrorCode = -EFAULT;
7055 else
7056 ErrorCode = 0;
7057 }
7058 break;
7059 default:
7060 ErrorCode = -ENOTTY;
7061 }
7062 mutex_unlock(&DAC960_mutex);
7063 return ErrorCode;
7064 }
7065
7066 static const struct file_operations DAC960_gam_fops = {
7067 .owner = THIS_MODULE,
7068 .unlocked_ioctl = DAC960_gam_ioctl,
7069 .llseek = noop_llseek,
7070 };
7071
7072 static struct miscdevice DAC960_gam_dev = {
7073 DAC960_GAM_MINOR,
7074 "dac960_gam",
7075 &DAC960_gam_fops
7076 };
7077
7078 static int DAC960_gam_init(void)
7079 {
7080 int ret;
7081
7082 ret = misc_register(&DAC960_gam_dev);
7083 if (ret)
7084 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7085 return ret;
7086 }
7087
7088 static void DAC960_gam_cleanup(void)
7089 {
7090 misc_deregister(&DAC960_gam_dev);
7091 }
7092
7093 #endif /* DAC960_GAM_MINOR */
7094
7095 static struct DAC960_privdata DAC960_GEM_privdata = {
7096 .HardwareType = DAC960_GEM_Controller,
7097 .FirmwareType = DAC960_V2_Controller,
7098 .InterruptHandler = DAC960_GEM_InterruptHandler,
7099 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7100 };
7101
7102
7103 static struct DAC960_privdata DAC960_BA_privdata = {
7104 .HardwareType = DAC960_BA_Controller,
7105 .FirmwareType = DAC960_V2_Controller,
7106 .InterruptHandler = DAC960_BA_InterruptHandler,
7107 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7108 };
7109
7110 static struct DAC960_privdata DAC960_LP_privdata = {
7111 .HardwareType = DAC960_LP_Controller,
7112 .FirmwareType = DAC960_V2_Controller,
7113 .InterruptHandler = DAC960_LP_InterruptHandler,
7114 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7115 };
7116
7117 static struct DAC960_privdata DAC960_LA_privdata = {
7118 .HardwareType = DAC960_LA_Controller,
7119 .FirmwareType = DAC960_V1_Controller,
7120 .InterruptHandler = DAC960_LA_InterruptHandler,
7121 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7122 };
7123
7124 static struct DAC960_privdata DAC960_PG_privdata = {
7125 .HardwareType = DAC960_PG_Controller,
7126 .FirmwareType = DAC960_V1_Controller,
7127 .InterruptHandler = DAC960_PG_InterruptHandler,
7128 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7129 };
7130
7131 static struct DAC960_privdata DAC960_PD_privdata = {
7132 .HardwareType = DAC960_PD_Controller,
7133 .FirmwareType = DAC960_V1_Controller,
7134 .InterruptHandler = DAC960_PD_InterruptHandler,
7135 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7136 };
7137
7138 static struct DAC960_privdata DAC960_P_privdata = {
7139 .HardwareType = DAC960_P_Controller,
7140 .FirmwareType = DAC960_V1_Controller,
7141 .InterruptHandler = DAC960_P_InterruptHandler,
7142 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7143 };
7144
7145 static const struct pci_device_id DAC960_id_table[] = {
7146 {
7147 .vendor = PCI_VENDOR_ID_MYLEX,
7148 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
7149 .subvendor = PCI_VENDOR_ID_MYLEX,
7150 .subdevice = PCI_ANY_ID,
7151 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7152 },
7153 {
7154 .vendor = PCI_VENDOR_ID_MYLEX,
7155 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7156 .subvendor = PCI_ANY_ID,
7157 .subdevice = PCI_ANY_ID,
7158 .driver_data = (unsigned long) &DAC960_BA_privdata,
7159 },
7160 {
7161 .vendor = PCI_VENDOR_ID_MYLEX,
7162 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7163 .subvendor = PCI_ANY_ID,
7164 .subdevice = PCI_ANY_ID,
7165 .driver_data = (unsigned long) &DAC960_LP_privdata,
7166 },
7167 {
7168 .vendor = PCI_VENDOR_ID_DEC,
7169 .device = PCI_DEVICE_ID_DEC_21285,
7170 .subvendor = PCI_VENDOR_ID_MYLEX,
7171 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7172 .driver_data = (unsigned long) &DAC960_LA_privdata,
7173 },
7174 {
7175 .vendor = PCI_VENDOR_ID_MYLEX,
7176 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7177 .subvendor = PCI_ANY_ID,
7178 .subdevice = PCI_ANY_ID,
7179 .driver_data = (unsigned long) &DAC960_PG_privdata,
7180 },
7181 {
7182 .vendor = PCI_VENDOR_ID_MYLEX,
7183 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7184 .subvendor = PCI_ANY_ID,
7185 .subdevice = PCI_ANY_ID,
7186 .driver_data = (unsigned long) &DAC960_PD_privdata,
7187 },
7188 {
7189 .vendor = PCI_VENDOR_ID_MYLEX,
7190 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7191 .subvendor = PCI_ANY_ID,
7192 .subdevice = PCI_ANY_ID,
7193 .driver_data = (unsigned long) &DAC960_P_privdata,
7194 },
7195 {0, },
7196 };
7197
7198 MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7199
7200 static struct pci_driver DAC960_pci_driver = {
7201 .name = "DAC960",
7202 .id_table = DAC960_id_table,
7203 .probe = DAC960_Probe,
7204 .remove = DAC960_Remove,
7205 };
7206
7207 static int __init DAC960_init_module(void)
7208 {
7209 int ret;
7210
7211 ret = pci_register_driver(&DAC960_pci_driver);
7212 #ifdef DAC960_GAM_MINOR
7213 if (!ret)
7214 DAC960_gam_init();
7215 #endif
7216 return ret;
7217 }
7218
7219 static void __exit DAC960_cleanup_module(void)
7220 {
7221 int i;
7222
7223 #ifdef DAC960_GAM_MINOR
7224 DAC960_gam_cleanup();
7225 #endif
7226
7227 for (i = 0; i < DAC960_ControllerCount; i++) {
7228 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7229 if (Controller == NULL)
7230 continue;
7231 DAC960_FinalizeController(Controller);
7232 }
7233 if (DAC960_ProcDirectoryEntry != NULL) {
7234 remove_proc_entry("rd/status", NULL);
7235 remove_proc_entry("rd", NULL);
7236 }
7237 DAC960_ControllerCount = 0;
7238 pci_unregister_driver(&DAC960_pci_driver);
7239 }
7240
7241 module_init(DAC960_init_module);
7242 module_exit(DAC960_cleanup_module);
7243
7244 MODULE_LICENSE("GPL");