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blk-mq: remove the error argument to blk_mq_complete_request
[mirror_ubuntu-bionic-kernel.git] / drivers / block / mtip32xx / mtip32xx.c
1 /*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/blk-mq.h>
35 #include <linux/bio.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/idr.h>
38 #include <linux/kthread.h>
39 #include <../drivers/ata/ahci.h>
40 #include <linux/export.h>
41 #include <linux/debugfs.h>
42 #include <linux/prefetch.h>
43 #include "mtip32xx.h"
44
45 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
46
47 /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
48 #define AHCI_RX_FIS_SZ 0x100
49 #define AHCI_RX_FIS_OFFSET 0x0
50 #define AHCI_IDFY_SZ ATA_SECT_SIZE
51 #define AHCI_IDFY_OFFSET 0x400
52 #define AHCI_SECTBUF_SZ ATA_SECT_SIZE
53 #define AHCI_SECTBUF_OFFSET 0x800
54 #define AHCI_SMARTBUF_SZ ATA_SECT_SIZE
55 #define AHCI_SMARTBUF_OFFSET 0xC00
56 /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
57 #define BLOCK_DMA_ALLOC_SZ 4096
58
59 /* DMA region containing command table (should be 8192 bytes) */
60 #define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr)
61 #define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
62 #define AHCI_CMD_TBL_OFFSET 0x0
63
64 /* DMA region per command (contains header and SGL) */
65 #define AHCI_CMD_TBL_HDR_SZ 0x80
66 #define AHCI_CMD_TBL_HDR_OFFSET 0x0
67 #define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
68 #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
69 #define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
70
71
72 #define HOST_CAP_NZDMA (1 << 19)
73 #define HOST_HSORG 0xFC
74 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
75 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
76 #define HSORG_HWREV 0xFF00
77 #define HSORG_STYLE 0x8
78 #define HSORG_SLOTGROUPS 0x7
79
80 #define PORT_COMMAND_ISSUE 0x38
81 #define PORT_SDBV 0x7C
82
83 #define PORT_OFFSET 0x100
84 #define PORT_MEM_SIZE 0x80
85
86 #define PORT_IRQ_ERR \
87 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
88 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
89 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
90 PORT_IRQ_OVERFLOW)
91 #define PORT_IRQ_LEGACY \
92 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
93 #define PORT_IRQ_HANDLED \
94 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
95 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
96 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
97 #define DEF_PORT_IRQ \
98 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
99
100 /* product numbers */
101 #define MTIP_PRODUCT_UNKNOWN 0x00
102 #define MTIP_PRODUCT_ASICFPGA 0x11
103
104 /* Device instance number, incremented each time a device is probed. */
105 static int instance;
106
107 static struct list_head online_list;
108 static struct list_head removing_list;
109 static spinlock_t dev_lock;
110
111 /*
112 * Global variable used to hold the major block device number
113 * allocated in mtip_init().
114 */
115 static int mtip_major;
116 static struct dentry *dfs_parent;
117 static struct dentry *dfs_device_status;
118
119 static u32 cpu_use[NR_CPUS];
120
121 static DEFINE_SPINLOCK(rssd_index_lock);
122 static DEFINE_IDA(rssd_index_ida);
123
124 static int mtip_block_initialize(struct driver_data *dd);
125
126 #ifdef CONFIG_COMPAT
127 struct mtip_compat_ide_task_request_s {
128 __u8 io_ports[8];
129 __u8 hob_ports[8];
130 ide_reg_valid_t out_flags;
131 ide_reg_valid_t in_flags;
132 int data_phase;
133 int req_cmd;
134 compat_ulong_t out_size;
135 compat_ulong_t in_size;
136 };
137 #endif
138
139 /*
140 * This function check_for_surprise_removal is called
141 * while card is removed from the system and it will
142 * read the vendor id from the configration space
143 *
144 * @pdev Pointer to the pci_dev structure.
145 *
146 * return value
147 * true if device removed, else false
148 */
149 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
150 {
151 u16 vendor_id = 0;
152 struct driver_data *dd = pci_get_drvdata(pdev);
153
154 if (dd->sr)
155 return true;
156
157 /* Read the vendorID from the configuration space */
158 pci_read_config_word(pdev, 0x00, &vendor_id);
159 if (vendor_id == 0xFFFF) {
160 dd->sr = true;
161 if (dd->queue)
162 set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags);
163 else
164 dev_warn(&dd->pdev->dev,
165 "%s: dd->queue is NULL\n", __func__);
166 return true; /* device removed */
167 }
168
169 return false; /* device present */
170 }
171
172 static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd)
173 {
174 struct request *rq;
175
176 if (mtip_check_surprise_removal(dd->pdev))
177 return NULL;
178
179 rq = blk_mq_alloc_request(dd->queue, 0, BLK_MQ_REQ_RESERVED);
180 if (IS_ERR(rq))
181 return NULL;
182
183 return blk_mq_rq_to_pdu(rq);
184 }
185
186 static void mtip_put_int_command(struct driver_data *dd, struct mtip_cmd *cmd)
187 {
188 blk_put_request(blk_mq_rq_from_pdu(cmd));
189 }
190
191 /*
192 * Once we add support for one hctx per mtip group, this will change a bit
193 */
194 static struct request *mtip_rq_from_tag(struct driver_data *dd,
195 unsigned int tag)
196 {
197 struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0];
198
199 return blk_mq_tag_to_rq(hctx->tags, tag);
200 }
201
202 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
203 unsigned int tag)
204 {
205 struct request *rq = mtip_rq_from_tag(dd, tag);
206
207 return blk_mq_rq_to_pdu(rq);
208 }
209
210 /*
211 * IO completion function.
212 *
213 * This completion function is called by the driver ISR when a
214 * command that was issued by the kernel completes. It first calls the
215 * asynchronous completion function which normally calls back into the block
216 * layer passing the asynchronous callback data, then unmaps the
217 * scatter list associated with the completed command, and finally
218 * clears the allocated bit associated with the completed command.
219 *
220 * @port Pointer to the port data structure.
221 * @tag Tag of the command.
222 * @data Pointer to driver_data.
223 * @status Completion status.
224 *
225 * return value
226 * None
227 */
228 static void mtip_async_complete(struct mtip_port *port,
229 int tag, struct mtip_cmd *cmd, int status)
230 {
231 struct driver_data *dd = port->dd;
232 struct request *rq;
233
234 if (unlikely(!dd) || unlikely(!port))
235 return;
236
237 if (unlikely(status == PORT_IRQ_TF_ERR)) {
238 dev_warn(&port->dd->pdev->dev,
239 "Command tag %d failed due to TFE\n", tag);
240 }
241
242 rq = mtip_rq_from_tag(dd, tag);
243
244 cmd->status = status;
245 blk_mq_complete_request(rq);
246 }
247
248 /*
249 * Reset the HBA (without sleeping)
250 *
251 * @dd Pointer to the driver data structure.
252 *
253 * return value
254 * 0 The reset was successful.
255 * -1 The HBA Reset bit did not clear.
256 */
257 static int mtip_hba_reset(struct driver_data *dd)
258 {
259 unsigned long timeout;
260
261 /* Set the reset bit */
262 writel(HOST_RESET, dd->mmio + HOST_CTL);
263
264 /* Flush */
265 readl(dd->mmio + HOST_CTL);
266
267 /*
268 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec
269 * is 1 sec but in LUN failure conditions, up to 10 secs are required
270 */
271 timeout = jiffies + msecs_to_jiffies(10000);
272 do {
273 mdelay(10);
274 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
275 return -1;
276
277 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
278 && time_before(jiffies, timeout));
279
280 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
281 return -1;
282
283 return 0;
284 }
285
286 /*
287 * Issue a command to the hardware.
288 *
289 * Set the appropriate bit in the s_active and Command Issue hardware
290 * registers, causing hardware command processing to begin.
291 *
292 * @port Pointer to the port structure.
293 * @tag The tag of the command to be issued.
294 *
295 * return value
296 * None
297 */
298 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
299 {
300 int group = tag >> 5;
301
302 /* guard SACT and CI registers */
303 spin_lock(&port->cmd_issue_lock[group]);
304 writel((1 << MTIP_TAG_BIT(tag)),
305 port->s_active[MTIP_TAG_INDEX(tag)]);
306 writel((1 << MTIP_TAG_BIT(tag)),
307 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
308 spin_unlock(&port->cmd_issue_lock[group]);
309 }
310
311 /*
312 * Enable/disable the reception of FIS
313 *
314 * @port Pointer to the port data structure
315 * @enable 1 to enable, 0 to disable
316 *
317 * return value
318 * Previous state: 1 enabled, 0 disabled
319 */
320 static int mtip_enable_fis(struct mtip_port *port, int enable)
321 {
322 u32 tmp;
323
324 /* enable FIS reception */
325 tmp = readl(port->mmio + PORT_CMD);
326 if (enable)
327 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
328 else
329 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
330
331 /* Flush */
332 readl(port->mmio + PORT_CMD);
333
334 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
335 }
336
337 /*
338 * Enable/disable the DMA engine
339 *
340 * @port Pointer to the port data structure
341 * @enable 1 to enable, 0 to disable
342 *
343 * return value
344 * Previous state: 1 enabled, 0 disabled.
345 */
346 static int mtip_enable_engine(struct mtip_port *port, int enable)
347 {
348 u32 tmp;
349
350 /* enable FIS reception */
351 tmp = readl(port->mmio + PORT_CMD);
352 if (enable)
353 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
354 else
355 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
356
357 readl(port->mmio + PORT_CMD);
358 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
359 }
360
361 /*
362 * Enables the port DMA engine and FIS reception.
363 *
364 * return value
365 * None
366 */
367 static inline void mtip_start_port(struct mtip_port *port)
368 {
369 /* Enable FIS reception */
370 mtip_enable_fis(port, 1);
371
372 /* Enable the DMA engine */
373 mtip_enable_engine(port, 1);
374 }
375
376 /*
377 * Deinitialize a port by disabling port interrupts, the DMA engine,
378 * and FIS reception.
379 *
380 * @port Pointer to the port structure
381 *
382 * return value
383 * None
384 */
385 static inline void mtip_deinit_port(struct mtip_port *port)
386 {
387 /* Disable interrupts on this port */
388 writel(0, port->mmio + PORT_IRQ_MASK);
389
390 /* Disable the DMA engine */
391 mtip_enable_engine(port, 0);
392
393 /* Disable FIS reception */
394 mtip_enable_fis(port, 0);
395 }
396
397 /*
398 * Initialize a port.
399 *
400 * This function deinitializes the port by calling mtip_deinit_port() and
401 * then initializes it by setting the command header and RX FIS addresses,
402 * clearing the SError register and any pending port interrupts before
403 * re-enabling the default set of port interrupts.
404 *
405 * @port Pointer to the port structure.
406 *
407 * return value
408 * None
409 */
410 static void mtip_init_port(struct mtip_port *port)
411 {
412 int i;
413 mtip_deinit_port(port);
414
415 /* Program the command list base and FIS base addresses */
416 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
417 writel((port->command_list_dma >> 16) >> 16,
418 port->mmio + PORT_LST_ADDR_HI);
419 writel((port->rxfis_dma >> 16) >> 16,
420 port->mmio + PORT_FIS_ADDR_HI);
421 }
422
423 writel(port->command_list_dma & 0xFFFFFFFF,
424 port->mmio + PORT_LST_ADDR);
425 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
426
427 /* Clear SError */
428 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
429
430 /* reset the completed registers.*/
431 for (i = 0; i < port->dd->slot_groups; i++)
432 writel(0xFFFFFFFF, port->completed[i]);
433
434 /* Clear any pending interrupts for this port */
435 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
436
437 /* Clear any pending interrupts on the HBA. */
438 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
439 port->dd->mmio + HOST_IRQ_STAT);
440
441 /* Enable port interrupts */
442 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
443 }
444
445 /*
446 * Restart a port
447 *
448 * @port Pointer to the port data structure.
449 *
450 * return value
451 * None
452 */
453 static void mtip_restart_port(struct mtip_port *port)
454 {
455 unsigned long timeout;
456
457 /* Disable the DMA engine */
458 mtip_enable_engine(port, 0);
459
460 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
461 timeout = jiffies + msecs_to_jiffies(500);
462 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
463 && time_before(jiffies, timeout))
464 ;
465
466 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
467 return;
468
469 /*
470 * Chip quirk: escalate to hba reset if
471 * PxCMD.CR not clear after 500 ms
472 */
473 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
474 dev_warn(&port->dd->pdev->dev,
475 "PxCMD.CR not clear, escalating reset\n");
476
477 if (mtip_hba_reset(port->dd))
478 dev_err(&port->dd->pdev->dev,
479 "HBA reset escalation failed.\n");
480
481 /* 30 ms delay before com reset to quiesce chip */
482 mdelay(30);
483 }
484
485 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
486
487 /* Set PxSCTL.DET */
488 writel(readl(port->mmio + PORT_SCR_CTL) |
489 1, port->mmio + PORT_SCR_CTL);
490 readl(port->mmio + PORT_SCR_CTL);
491
492 /* Wait 1 ms to quiesce chip function */
493 timeout = jiffies + msecs_to_jiffies(1);
494 while (time_before(jiffies, timeout))
495 ;
496
497 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
498 return;
499
500 /* Clear PxSCTL.DET */
501 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
502 port->mmio + PORT_SCR_CTL);
503 readl(port->mmio + PORT_SCR_CTL);
504
505 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
506 timeout = jiffies + msecs_to_jiffies(500);
507 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
508 && time_before(jiffies, timeout))
509 ;
510
511 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
512 return;
513
514 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
515 dev_warn(&port->dd->pdev->dev,
516 "COM reset failed\n");
517
518 mtip_init_port(port);
519 mtip_start_port(port);
520
521 }
522
523 static int mtip_device_reset(struct driver_data *dd)
524 {
525 int rv = 0;
526
527 if (mtip_check_surprise_removal(dd->pdev))
528 return 0;
529
530 if (mtip_hba_reset(dd) < 0)
531 rv = -EFAULT;
532
533 mdelay(1);
534 mtip_init_port(dd->port);
535 mtip_start_port(dd->port);
536
537 /* Enable interrupts on the HBA. */
538 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
539 dd->mmio + HOST_CTL);
540 return rv;
541 }
542
543 /*
544 * Helper function for tag logging
545 */
546 static void print_tags(struct driver_data *dd,
547 char *msg,
548 unsigned long *tagbits,
549 int cnt)
550 {
551 unsigned char tagmap[128];
552 int group, tagmap_len = 0;
553
554 memset(tagmap, 0, sizeof(tagmap));
555 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
556 tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
557 tagbits[group-1]);
558 dev_warn(&dd->pdev->dev,
559 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
560 }
561
562 /*
563 * Internal command completion callback function.
564 *
565 * This function is normally called by the driver ISR when an internal
566 * command completed. This function signals the command completion by
567 * calling complete().
568 *
569 * @port Pointer to the port data structure.
570 * @tag Tag of the command that has completed.
571 * @data Pointer to a completion structure.
572 * @status Completion status.
573 *
574 * return value
575 * None
576 */
577 static void mtip_completion(struct mtip_port *port,
578 int tag, struct mtip_cmd *command, int status)
579 {
580 struct completion *waiting = command->comp_data;
581 if (unlikely(status == PORT_IRQ_TF_ERR))
582 dev_warn(&port->dd->pdev->dev,
583 "Internal command %d completed with TFE\n", tag);
584
585 command->comp_func = NULL;
586 command->comp_data = NULL;
587 complete(waiting);
588 }
589
590 static void mtip_null_completion(struct mtip_port *port,
591 int tag, struct mtip_cmd *command, int status)
592 {
593 }
594
595 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
596 dma_addr_t buffer_dma, unsigned int sectors);
597 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
598 struct smart_attr *attrib);
599 /*
600 * Handle an error.
601 *
602 * @dd Pointer to the DRIVER_DATA structure.
603 *
604 * return value
605 * None
606 */
607 static void mtip_handle_tfe(struct driver_data *dd)
608 {
609 int group, tag, bit, reissue, rv;
610 struct mtip_port *port;
611 struct mtip_cmd *cmd;
612 u32 completed;
613 struct host_to_dev_fis *fis;
614 unsigned long tagaccum[SLOTBITS_IN_LONGS];
615 unsigned int cmd_cnt = 0;
616 unsigned char *buf;
617 char *fail_reason = NULL;
618 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
619
620 dev_warn(&dd->pdev->dev, "Taskfile error\n");
621
622 port = dd->port;
623
624 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
625 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
626 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
627
628 if (cmd->comp_data && cmd->comp_func) {
629 cmd->comp_func(port, MTIP_TAG_INTERNAL,
630 cmd, PORT_IRQ_TF_ERR);
631 }
632 return;
633 }
634
635 /* clear the tag accumulator */
636 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
637
638 /* Loop through all the groups */
639 for (group = 0; group < dd->slot_groups; group++) {
640 completed = readl(port->completed[group]);
641
642 dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
643
644 /* clear completed status register in the hardware.*/
645 writel(completed, port->completed[group]);
646
647 /* Process successfully completed commands */
648 for (bit = 0; bit < 32 && completed; bit++) {
649 if (!(completed & (1<<bit)))
650 continue;
651 tag = (group << 5) + bit;
652
653 /* Skip the internal command slot */
654 if (tag == MTIP_TAG_INTERNAL)
655 continue;
656
657 cmd = mtip_cmd_from_tag(dd, tag);
658 if (likely(cmd->comp_func)) {
659 set_bit(tag, tagaccum);
660 cmd_cnt++;
661 cmd->comp_func(port, tag, cmd, 0);
662 } else {
663 dev_err(&port->dd->pdev->dev,
664 "Missing completion func for tag %d",
665 tag);
666 if (mtip_check_surprise_removal(dd->pdev)) {
667 /* don't proceed further */
668 return;
669 }
670 }
671 }
672 }
673
674 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
675
676 /* Restart the port */
677 mdelay(20);
678 mtip_restart_port(port);
679
680 /* Trying to determine the cause of the error */
681 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
682 dd->port->log_buf,
683 dd->port->log_buf_dma, 1);
684 if (rv) {
685 dev_warn(&dd->pdev->dev,
686 "Error in READ LOG EXT (10h) command\n");
687 /* non-critical error, don't fail the load */
688 } else {
689 buf = (unsigned char *)dd->port->log_buf;
690 if (buf[259] & 0x1) {
691 dev_info(&dd->pdev->dev,
692 "Write protect bit is set.\n");
693 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
694 fail_all_ncq_write = 1;
695 fail_reason = "write protect";
696 }
697 if (buf[288] == 0xF7) {
698 dev_info(&dd->pdev->dev,
699 "Exceeded Tmax, drive in thermal shutdown.\n");
700 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
701 fail_all_ncq_cmds = 1;
702 fail_reason = "thermal shutdown";
703 }
704 if (buf[288] == 0xBF) {
705 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
706 dev_info(&dd->pdev->dev,
707 "Drive indicates rebuild has failed. Secure erase required.\n");
708 fail_all_ncq_cmds = 1;
709 fail_reason = "rebuild failed";
710 }
711 }
712
713 /* clear the tag accumulator */
714 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
715
716 /* Loop through all the groups */
717 for (group = 0; group < dd->slot_groups; group++) {
718 for (bit = 0; bit < 32; bit++) {
719 reissue = 1;
720 tag = (group << 5) + bit;
721 cmd = mtip_cmd_from_tag(dd, tag);
722
723 fis = (struct host_to_dev_fis *)cmd->command;
724
725 /* Should re-issue? */
726 if (tag == MTIP_TAG_INTERNAL ||
727 fis->command == ATA_CMD_SET_FEATURES)
728 reissue = 0;
729 else {
730 if (fail_all_ncq_cmds ||
731 (fail_all_ncq_write &&
732 fis->command == ATA_CMD_FPDMA_WRITE)) {
733 dev_warn(&dd->pdev->dev,
734 " Fail: %s w/tag %d [%s].\n",
735 fis->command == ATA_CMD_FPDMA_WRITE ?
736 "write" : "read",
737 tag,
738 fail_reason != NULL ?
739 fail_reason : "unknown");
740 if (cmd->comp_func) {
741 cmd->comp_func(port, tag,
742 cmd, -ENODATA);
743 }
744 continue;
745 }
746 }
747
748 /*
749 * First check if this command has
750 * exceeded its retries.
751 */
752 if (reissue && (cmd->retries-- > 0)) {
753
754 set_bit(tag, tagaccum);
755
756 /* Re-issue the command. */
757 mtip_issue_ncq_command(port, tag);
758
759 continue;
760 }
761
762 /* Retire a command that will not be reissued */
763 dev_warn(&port->dd->pdev->dev,
764 "retiring tag %d\n", tag);
765
766 if (cmd->comp_func)
767 cmd->comp_func(port, tag, cmd, PORT_IRQ_TF_ERR);
768 else
769 dev_warn(&port->dd->pdev->dev,
770 "Bad completion for tag %d\n",
771 tag);
772 }
773 }
774 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
775 }
776
777 /*
778 * Handle a set device bits interrupt
779 */
780 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
781 u32 completed)
782 {
783 struct driver_data *dd = port->dd;
784 int tag, bit;
785 struct mtip_cmd *command;
786
787 if (!completed) {
788 WARN_ON_ONCE(!completed);
789 return;
790 }
791 /* clear completed status register in the hardware.*/
792 writel(completed, port->completed[group]);
793
794 /* Process completed commands. */
795 for (bit = 0; (bit < 32) && completed; bit++) {
796 if (completed & 0x01) {
797 tag = (group << 5) | bit;
798
799 /* skip internal command slot. */
800 if (unlikely(tag == MTIP_TAG_INTERNAL))
801 continue;
802
803 command = mtip_cmd_from_tag(dd, tag);
804 if (likely(command->comp_func))
805 command->comp_func(port, tag, command, 0);
806 else {
807 dev_dbg(&dd->pdev->dev,
808 "Null completion for tag %d",
809 tag);
810
811 if (mtip_check_surprise_removal(
812 dd->pdev)) {
813 return;
814 }
815 }
816 }
817 completed >>= 1;
818 }
819
820 /* If last, re-enable interrupts */
821 if (atomic_dec_return(&dd->irq_workers_active) == 0)
822 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
823 }
824
825 /*
826 * Process legacy pio and d2h interrupts
827 */
828 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
829 {
830 struct mtip_port *port = dd->port;
831 struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
832
833 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
834 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
835 & (1 << MTIP_TAG_INTERNAL))) {
836 if (cmd->comp_func) {
837 cmd->comp_func(port, MTIP_TAG_INTERNAL, cmd, 0);
838 return;
839 }
840 }
841
842 return;
843 }
844
845 /*
846 * Demux and handle errors
847 */
848 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
849 {
850
851 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
852 dev_warn(&dd->pdev->dev,
853 "Clearing PxSERR.DIAG.x\n");
854 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
855 }
856
857 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
858 dev_warn(&dd->pdev->dev,
859 "Clearing PxSERR.DIAG.n\n");
860 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
861 }
862
863 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
864 dev_warn(&dd->pdev->dev,
865 "Port stat errors %x unhandled\n",
866 (port_stat & ~PORT_IRQ_HANDLED));
867 if (mtip_check_surprise_removal(dd->pdev))
868 return;
869 }
870 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
871 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
872 wake_up_interruptible(&dd->port->svc_wait);
873 }
874 }
875
876 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
877 {
878 struct driver_data *dd = (struct driver_data *) data;
879 struct mtip_port *port = dd->port;
880 u32 hba_stat, port_stat;
881 int rv = IRQ_NONE;
882 int do_irq_enable = 1, i, workers;
883 struct mtip_work *twork;
884
885 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
886 if (hba_stat) {
887 rv = IRQ_HANDLED;
888
889 /* Acknowledge the interrupt status on the port.*/
890 port_stat = readl(port->mmio + PORT_IRQ_STAT);
891 if (unlikely(port_stat == 0xFFFFFFFF)) {
892 mtip_check_surprise_removal(dd->pdev);
893 return IRQ_HANDLED;
894 }
895 writel(port_stat, port->mmio + PORT_IRQ_STAT);
896
897 /* Demux port status */
898 if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
899 do_irq_enable = 0;
900 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
901
902 /* Start at 1: group zero is always local? */
903 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
904 i++) {
905 twork = &dd->work[i];
906 twork->completed = readl(port->completed[i]);
907 if (twork->completed)
908 workers++;
909 }
910
911 atomic_set(&dd->irq_workers_active, workers);
912 if (workers) {
913 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
914 twork = &dd->work[i];
915 if (twork->completed)
916 queue_work_on(
917 twork->cpu_binding,
918 dd->isr_workq,
919 &twork->work);
920 }
921
922 if (likely(dd->work[0].completed))
923 mtip_workq_sdbfx(port, 0,
924 dd->work[0].completed);
925
926 } else {
927 /*
928 * Chip quirk: SDB interrupt but nothing
929 * to complete
930 */
931 do_irq_enable = 1;
932 }
933 }
934
935 if (unlikely(port_stat & PORT_IRQ_ERR)) {
936 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
937 /* don't proceed further */
938 return IRQ_HANDLED;
939 }
940 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
941 &dd->dd_flag))
942 return rv;
943
944 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
945 }
946
947 if (unlikely(port_stat & PORT_IRQ_LEGACY))
948 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
949 }
950
951 /* acknowledge interrupt */
952 if (unlikely(do_irq_enable))
953 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
954
955 return rv;
956 }
957
958 /*
959 * HBA interrupt subroutine.
960 *
961 * @irq IRQ number.
962 * @instance Pointer to the driver data structure.
963 *
964 * return value
965 * IRQ_HANDLED A HBA interrupt was pending and handled.
966 * IRQ_NONE This interrupt was not for the HBA.
967 */
968 static irqreturn_t mtip_irq_handler(int irq, void *instance)
969 {
970 struct driver_data *dd = instance;
971
972 return mtip_handle_irq(dd);
973 }
974
975 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
976 {
977 writel(1 << MTIP_TAG_BIT(tag),
978 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
979 }
980
981 static bool mtip_pause_ncq(struct mtip_port *port,
982 struct host_to_dev_fis *fis)
983 {
984 struct host_to_dev_fis *reply;
985 unsigned long task_file_data;
986
987 reply = port->rxfis + RX_FIS_D2H_REG;
988 task_file_data = readl(port->mmio+PORT_TFDATA);
989
990 if ((task_file_data & 1))
991 return false;
992
993 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
994 port->ic_pause_timer = jiffies;
995 return true;
996 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
997 (fis->features == 0x03)) {
998 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
999 port->ic_pause_timer = jiffies;
1000 return true;
1001 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1002 ((fis->command == 0xFC) &&
1003 (fis->features == 0x27 || fis->features == 0x72 ||
1004 fis->features == 0x62 || fis->features == 0x26))) {
1005 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1006 clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag);
1007 /* Com reset after secure erase or lowlevel format */
1008 mtip_restart_port(port);
1009 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1010 return false;
1011 }
1012
1013 return false;
1014 }
1015
1016 /*
1017 * Wait for port to quiesce
1018 *
1019 * @port Pointer to port data structure
1020 * @timeout Max duration to wait (ms)
1021 * @atomic gfp_t flag to indicate blockable context or not
1022 *
1023 * return value
1024 * 0 Success
1025 * -EBUSY Commands still active
1026 */
1027 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout,
1028 gfp_t atomic)
1029 {
1030 unsigned long to;
1031 unsigned int n;
1032 unsigned int active = 1;
1033
1034 blk_mq_stop_hw_queues(port->dd->queue);
1035
1036 to = jiffies + msecs_to_jiffies(timeout);
1037 do {
1038 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1039 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags) &&
1040 atomic == GFP_KERNEL) {
1041 msleep(20);
1042 continue; /* svc thd is actively issuing commands */
1043 }
1044
1045 if (atomic == GFP_KERNEL)
1046 msleep(100);
1047 else {
1048 cpu_relax();
1049 udelay(100);
1050 }
1051
1052 if (mtip_check_surprise_removal(port->dd->pdev))
1053 goto err_fault;
1054
1055 /*
1056 * Ignore s_active bit 0 of array element 0.
1057 * This bit will always be set
1058 */
1059 active = readl(port->s_active[0]) & 0xFFFFFFFE;
1060 for (n = 1; n < port->dd->slot_groups; n++)
1061 active |= readl(port->s_active[n]);
1062
1063 if (!active)
1064 break;
1065 } while (time_before(jiffies, to));
1066
1067 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1068 return active ? -EBUSY : 0;
1069 err_fault:
1070 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1071 return -EFAULT;
1072 }
1073
1074 /*
1075 * Execute an internal command and wait for the completion.
1076 *
1077 * @port Pointer to the port data structure.
1078 * @fis Pointer to the FIS that describes the command.
1079 * @fis_len Length in WORDS of the FIS.
1080 * @buffer DMA accessible for command data.
1081 * @buf_len Length, in bytes, of the data buffer.
1082 * @opts Command header options, excluding the FIS length
1083 * and the number of PRD entries.
1084 * @timeout Time in ms to wait for the command to complete.
1085 *
1086 * return value
1087 * 0 Command completed successfully.
1088 * -EFAULT The buffer address is not correctly aligned.
1089 * -EBUSY Internal command or other IO in progress.
1090 * -EAGAIN Time out waiting for command to complete.
1091 */
1092 static int mtip_exec_internal_command(struct mtip_port *port,
1093 struct host_to_dev_fis *fis,
1094 int fis_len,
1095 dma_addr_t buffer,
1096 int buf_len,
1097 u32 opts,
1098 gfp_t atomic,
1099 unsigned long timeout)
1100 {
1101 struct mtip_cmd_sg *command_sg;
1102 DECLARE_COMPLETION_ONSTACK(wait);
1103 struct mtip_cmd *int_cmd;
1104 struct driver_data *dd = port->dd;
1105 int rv = 0;
1106 unsigned long start;
1107
1108 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1109 if (buffer & 0x00000007) {
1110 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
1111 return -EFAULT;
1112 }
1113
1114 int_cmd = mtip_get_int_command(dd);
1115 if (!int_cmd) {
1116 dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n");
1117 return -EFAULT;
1118 }
1119
1120 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1121
1122 if (fis->command == ATA_CMD_SEC_ERASE_PREP)
1123 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1124
1125 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1126
1127 if (atomic == GFP_KERNEL) {
1128 if (fis->command != ATA_CMD_STANDBYNOW1) {
1129 /* wait for io to complete if non atomic */
1130 if (mtip_quiesce_io(port,
1131 MTIP_QUIESCE_IO_TIMEOUT_MS, atomic) < 0) {
1132 dev_warn(&dd->pdev->dev,
1133 "Failed to quiesce IO\n");
1134 mtip_put_int_command(dd, int_cmd);
1135 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1136 wake_up_interruptible(&port->svc_wait);
1137 return -EBUSY;
1138 }
1139 }
1140
1141 /* Set the completion function and data for the command. */
1142 int_cmd->comp_data = &wait;
1143 int_cmd->comp_func = mtip_completion;
1144
1145 } else {
1146 /* Clear completion - we're going to poll */
1147 int_cmd->comp_data = NULL;
1148 int_cmd->comp_func = mtip_null_completion;
1149 }
1150
1151 /* Copy the command to the command table */
1152 memcpy(int_cmd->command, fis, fis_len*4);
1153
1154 /* Populate the SG list */
1155 int_cmd->command_header->opts =
1156 __force_bit2int cpu_to_le32(opts | fis_len);
1157 if (buf_len) {
1158 command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ;
1159
1160 command_sg->info =
1161 __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF);
1162 command_sg->dba =
1163 __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF);
1164 command_sg->dba_upper =
1165 __force_bit2int cpu_to_le32((buffer >> 16) >> 16);
1166
1167 int_cmd->command_header->opts |=
1168 __force_bit2int cpu_to_le32((1 << 16));
1169 }
1170
1171 /* Populate the command header */
1172 int_cmd->command_header->byte_count = 0;
1173
1174 start = jiffies;
1175
1176 /* Issue the command to the hardware */
1177 mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1178
1179 if (atomic == GFP_KERNEL) {
1180 /* Wait for the command to complete or timeout. */
1181 if ((rv = wait_for_completion_interruptible_timeout(
1182 &wait,
1183 msecs_to_jiffies(timeout))) <= 0) {
1184
1185 if (rv == -ERESTARTSYS) { /* interrupted */
1186 dev_err(&dd->pdev->dev,
1187 "Internal command [%02X] was interrupted after %u ms\n",
1188 fis->command,
1189 jiffies_to_msecs(jiffies - start));
1190 rv = -EINTR;
1191 goto exec_ic_exit;
1192 } else if (rv == 0) /* timeout */
1193 dev_err(&dd->pdev->dev,
1194 "Internal command did not complete [%02X] within timeout of %lu ms\n",
1195 fis->command, timeout);
1196 else
1197 dev_err(&dd->pdev->dev,
1198 "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n",
1199 fis->command, rv, timeout);
1200
1201 if (mtip_check_surprise_removal(dd->pdev) ||
1202 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1203 &dd->dd_flag)) {
1204 dev_err(&dd->pdev->dev,
1205 "Internal command [%02X] wait returned due to SR\n",
1206 fis->command);
1207 rv = -ENXIO;
1208 goto exec_ic_exit;
1209 }
1210 mtip_device_reset(dd); /* recover from timeout issue */
1211 rv = -EAGAIN;
1212 goto exec_ic_exit;
1213 }
1214 } else {
1215 u32 hba_stat, port_stat;
1216
1217 /* Spin for <timeout> checking if command still outstanding */
1218 timeout = jiffies + msecs_to_jiffies(timeout);
1219 while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1220 & (1 << MTIP_TAG_INTERNAL))
1221 && time_before(jiffies, timeout)) {
1222 if (mtip_check_surprise_removal(dd->pdev)) {
1223 rv = -ENXIO;
1224 goto exec_ic_exit;
1225 }
1226 if ((fis->command != ATA_CMD_STANDBYNOW1) &&
1227 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1228 &dd->dd_flag)) {
1229 rv = -ENXIO;
1230 goto exec_ic_exit;
1231 }
1232 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1233 if (!port_stat)
1234 continue;
1235
1236 if (port_stat & PORT_IRQ_ERR) {
1237 dev_err(&dd->pdev->dev,
1238 "Internal command [%02X] failed\n",
1239 fis->command);
1240 mtip_device_reset(dd);
1241 rv = -EIO;
1242 goto exec_ic_exit;
1243 } else {
1244 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1245 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1246 if (hba_stat)
1247 writel(hba_stat,
1248 dd->mmio + HOST_IRQ_STAT);
1249 }
1250 break;
1251 }
1252 }
1253
1254 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1255 & (1 << MTIP_TAG_INTERNAL)) {
1256 rv = -ENXIO;
1257 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1258 mtip_device_reset(dd);
1259 rv = -EAGAIN;
1260 }
1261 }
1262 exec_ic_exit:
1263 /* Clear the allocated and active bits for the internal command. */
1264 mtip_put_int_command(dd, int_cmd);
1265 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1266 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1267 /* NCQ paused */
1268 return rv;
1269 }
1270 wake_up_interruptible(&port->svc_wait);
1271
1272 return rv;
1273 }
1274
1275 /*
1276 * Byte-swap ATA ID strings.
1277 *
1278 * ATA identify data contains strings in byte-swapped 16-bit words.
1279 * They must be swapped (on all architectures) to be usable as C strings.
1280 * This function swaps bytes in-place.
1281 *
1282 * @buf The buffer location of the string
1283 * @len The number of bytes to swap
1284 *
1285 * return value
1286 * None
1287 */
1288 static inline void ata_swap_string(u16 *buf, unsigned int len)
1289 {
1290 int i;
1291 for (i = 0; i < (len/2); i++)
1292 be16_to_cpus(&buf[i]);
1293 }
1294
1295 static void mtip_set_timeout(struct driver_data *dd,
1296 struct host_to_dev_fis *fis,
1297 unsigned int *timeout, u8 erasemode)
1298 {
1299 switch (fis->command) {
1300 case ATA_CMD_DOWNLOAD_MICRO:
1301 *timeout = 120000; /* 2 minutes */
1302 break;
1303 case ATA_CMD_SEC_ERASE_UNIT:
1304 case 0xFC:
1305 if (erasemode)
1306 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1307 else
1308 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1309 break;
1310 case ATA_CMD_STANDBYNOW1:
1311 *timeout = 120000; /* 2 minutes */
1312 break;
1313 case 0xF7:
1314 case 0xFA:
1315 *timeout = 60000; /* 60 seconds */
1316 break;
1317 case ATA_CMD_SMART:
1318 *timeout = 15000; /* 15 seconds */
1319 break;
1320 default:
1321 *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
1322 break;
1323 }
1324 }
1325
1326 /*
1327 * Request the device identity information.
1328 *
1329 * If a user space buffer is not specified, i.e. is NULL, the
1330 * identify information is still read from the drive and placed
1331 * into the identify data buffer (@e port->identify) in the
1332 * port data structure.
1333 * When the identify buffer contains valid identify information @e
1334 * port->identify_valid is non-zero.
1335 *
1336 * @port Pointer to the port structure.
1337 * @user_buffer A user space buffer where the identify data should be
1338 * copied.
1339 *
1340 * return value
1341 * 0 Command completed successfully.
1342 * -EFAULT An error occurred while coping data to the user buffer.
1343 * -1 Command failed.
1344 */
1345 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1346 {
1347 int rv = 0;
1348 struct host_to_dev_fis fis;
1349
1350 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1351 return -EFAULT;
1352
1353 /* Build the FIS. */
1354 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1355 fis.type = 0x27;
1356 fis.opts = 1 << 7;
1357 fis.command = ATA_CMD_ID_ATA;
1358
1359 /* Set the identify information as invalid. */
1360 port->identify_valid = 0;
1361
1362 /* Clear the identify information. */
1363 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1364
1365 /* Execute the command. */
1366 if (mtip_exec_internal_command(port,
1367 &fis,
1368 5,
1369 port->identify_dma,
1370 sizeof(u16) * ATA_ID_WORDS,
1371 0,
1372 GFP_KERNEL,
1373 MTIP_INT_CMD_TIMEOUT_MS)
1374 < 0) {
1375 rv = -1;
1376 goto out;
1377 }
1378
1379 /*
1380 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1381 * perform field-sensitive swapping on the string fields.
1382 * See the kernel use of ata_id_string() for proof of this.
1383 */
1384 #ifdef __LITTLE_ENDIAN
1385 ata_swap_string(port->identify + 27, 40); /* model string*/
1386 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1387 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1388 #else
1389 {
1390 int i;
1391 for (i = 0; i < ATA_ID_WORDS; i++)
1392 port->identify[i] = le16_to_cpu(port->identify[i]);
1393 }
1394 #endif
1395
1396 /* Check security locked state */
1397 if (port->identify[128] & 0x4)
1398 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1399 else
1400 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1401
1402 #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */
1403 /* Demux ID.DRAT & ID.RZAT to determine trim support */
1404 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1405 port->dd->trim_supp = true;
1406 else
1407 #endif
1408 port->dd->trim_supp = false;
1409
1410 /* Set the identify buffer as valid. */
1411 port->identify_valid = 1;
1412
1413 if (user_buffer) {
1414 if (copy_to_user(
1415 user_buffer,
1416 port->identify,
1417 ATA_ID_WORDS * sizeof(u16))) {
1418 rv = -EFAULT;
1419 goto out;
1420 }
1421 }
1422
1423 out:
1424 return rv;
1425 }
1426
1427 /*
1428 * Issue a standby immediate command to the device.
1429 *
1430 * @port Pointer to the port structure.
1431 *
1432 * return value
1433 * 0 Command was executed successfully.
1434 * -1 An error occurred while executing the command.
1435 */
1436 static int mtip_standby_immediate(struct mtip_port *port)
1437 {
1438 int rv;
1439 struct host_to_dev_fis fis;
1440 unsigned long start;
1441 unsigned int timeout;
1442
1443 /* Build the FIS. */
1444 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1445 fis.type = 0x27;
1446 fis.opts = 1 << 7;
1447 fis.command = ATA_CMD_STANDBYNOW1;
1448
1449 mtip_set_timeout(port->dd, &fis, &timeout, 0);
1450
1451 start = jiffies;
1452 rv = mtip_exec_internal_command(port,
1453 &fis,
1454 5,
1455 0,
1456 0,
1457 0,
1458 GFP_ATOMIC,
1459 timeout);
1460 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1461 jiffies_to_msecs(jiffies - start));
1462 if (rv)
1463 dev_warn(&port->dd->pdev->dev,
1464 "STANDBY IMMEDIATE command failed.\n");
1465
1466 return rv;
1467 }
1468
1469 /*
1470 * Issue a READ LOG EXT command to the device.
1471 *
1472 * @port pointer to the port structure.
1473 * @page page number to fetch
1474 * @buffer pointer to buffer
1475 * @buffer_dma dma address corresponding to @buffer
1476 * @sectors page length to fetch, in sectors
1477 *
1478 * return value
1479 * @rv return value from mtip_exec_internal_command()
1480 */
1481 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1482 dma_addr_t buffer_dma, unsigned int sectors)
1483 {
1484 struct host_to_dev_fis fis;
1485
1486 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1487 fis.type = 0x27;
1488 fis.opts = 1 << 7;
1489 fis.command = ATA_CMD_READ_LOG_EXT;
1490 fis.sect_count = sectors & 0xFF;
1491 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1492 fis.lba_low = page;
1493 fis.lba_mid = 0;
1494 fis.device = ATA_DEVICE_OBS;
1495
1496 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1497
1498 return mtip_exec_internal_command(port,
1499 &fis,
1500 5,
1501 buffer_dma,
1502 sectors * ATA_SECT_SIZE,
1503 0,
1504 GFP_ATOMIC,
1505 MTIP_INT_CMD_TIMEOUT_MS);
1506 }
1507
1508 /*
1509 * Issue a SMART READ DATA command to the device.
1510 *
1511 * @port pointer to the port structure.
1512 * @buffer pointer to buffer
1513 * @buffer_dma dma address corresponding to @buffer
1514 *
1515 * return value
1516 * @rv return value from mtip_exec_internal_command()
1517 */
1518 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1519 dma_addr_t buffer_dma)
1520 {
1521 struct host_to_dev_fis fis;
1522
1523 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1524 fis.type = 0x27;
1525 fis.opts = 1 << 7;
1526 fis.command = ATA_CMD_SMART;
1527 fis.features = 0xD0;
1528 fis.sect_count = 1;
1529 fis.lba_mid = 0x4F;
1530 fis.lba_hi = 0xC2;
1531 fis.device = ATA_DEVICE_OBS;
1532
1533 return mtip_exec_internal_command(port,
1534 &fis,
1535 5,
1536 buffer_dma,
1537 ATA_SECT_SIZE,
1538 0,
1539 GFP_ATOMIC,
1540 15000);
1541 }
1542
1543 /*
1544 * Get the value of a smart attribute
1545 *
1546 * @port pointer to the port structure
1547 * @id attribute number
1548 * @attrib pointer to return attrib information corresponding to @id
1549 *
1550 * return value
1551 * -EINVAL NULL buffer passed or unsupported attribute @id.
1552 * -EPERM Identify data not valid, SMART not supported or not enabled
1553 */
1554 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1555 struct smart_attr *attrib)
1556 {
1557 int rv, i;
1558 struct smart_attr *pattr;
1559
1560 if (!attrib)
1561 return -EINVAL;
1562
1563 if (!port->identify_valid) {
1564 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1565 return -EPERM;
1566 }
1567 if (!(port->identify[82] & 0x1)) {
1568 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1569 return -EPERM;
1570 }
1571 if (!(port->identify[85] & 0x1)) {
1572 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1573 return -EPERM;
1574 }
1575
1576 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1577 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1578 if (rv) {
1579 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1580 return rv;
1581 }
1582
1583 pattr = (struct smart_attr *)(port->smart_buf + 2);
1584 for (i = 0; i < 29; i++, pattr++)
1585 if (pattr->attr_id == id) {
1586 memcpy(attrib, pattr, sizeof(struct smart_attr));
1587 break;
1588 }
1589
1590 if (i == 29) {
1591 dev_warn(&port->dd->pdev->dev,
1592 "Query for invalid SMART attribute ID\n");
1593 rv = -EINVAL;
1594 }
1595
1596 return rv;
1597 }
1598
1599 /*
1600 * Trim unused sectors
1601 *
1602 * @dd pointer to driver_data structure
1603 * @lba starting lba
1604 * @len # of 512b sectors to trim
1605 *
1606 * return value
1607 * -ENOMEM Out of dma memory
1608 * -EINVAL Invalid parameters passed in, trim not supported
1609 * -EIO Error submitting trim request to hw
1610 */
1611 static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
1612 unsigned int len)
1613 {
1614 int i, rv = 0;
1615 u64 tlba, tlen, sect_left;
1616 struct mtip_trim_entry *buf;
1617 dma_addr_t dma_addr;
1618 struct host_to_dev_fis fis;
1619
1620 if (!len || dd->trim_supp == false)
1621 return -EINVAL;
1622
1623 /* Trim request too big */
1624 WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES));
1625
1626 /* Trim request not aligned on 4k boundary */
1627 WARN_ON(len % 8 != 0);
1628
1629 /* Warn if vu_trim structure is too big */
1630 WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE);
1631
1632 /* Allocate a DMA buffer for the trim structure */
1633 buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr,
1634 GFP_KERNEL);
1635 if (!buf)
1636 return -ENOMEM;
1637 memset(buf, 0, ATA_SECT_SIZE);
1638
1639 for (i = 0, sect_left = len, tlba = lba;
1640 i < MTIP_MAX_TRIM_ENTRIES && sect_left;
1641 i++) {
1642 tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ?
1643 MTIP_MAX_TRIM_ENTRY_LEN :
1644 sect_left);
1645 buf[i].lba = __force_bit2int cpu_to_le32(tlba);
1646 buf[i].range = __force_bit2int cpu_to_le16(tlen);
1647 tlba += tlen;
1648 sect_left -= tlen;
1649 }
1650 WARN_ON(sect_left != 0);
1651
1652 /* Build the fis */
1653 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1654 fis.type = 0x27;
1655 fis.opts = 1 << 7;
1656 fis.command = 0xfb;
1657 fis.features = 0x60;
1658 fis.sect_count = 1;
1659 fis.device = ATA_DEVICE_OBS;
1660
1661 if (mtip_exec_internal_command(dd->port,
1662 &fis,
1663 5,
1664 dma_addr,
1665 ATA_SECT_SIZE,
1666 0,
1667 GFP_KERNEL,
1668 MTIP_TRIM_TIMEOUT_MS) < 0)
1669 rv = -EIO;
1670
1671 dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr);
1672 return rv;
1673 }
1674
1675 /*
1676 * Get the drive capacity.
1677 *
1678 * @dd Pointer to the device data structure.
1679 * @sectors Pointer to the variable that will receive the sector count.
1680 *
1681 * return value
1682 * 1 Capacity was returned successfully.
1683 * 0 The identify information is invalid.
1684 */
1685 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1686 {
1687 struct mtip_port *port = dd->port;
1688 u64 total, raw0, raw1, raw2, raw3;
1689 raw0 = port->identify[100];
1690 raw1 = port->identify[101];
1691 raw2 = port->identify[102];
1692 raw3 = port->identify[103];
1693 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1694 *sectors = total;
1695 return (bool) !!port->identify_valid;
1696 }
1697
1698 /*
1699 * Display the identify command data.
1700 *
1701 * @port Pointer to the port data structure.
1702 *
1703 * return value
1704 * None
1705 */
1706 static void mtip_dump_identify(struct mtip_port *port)
1707 {
1708 sector_t sectors;
1709 unsigned short revid;
1710 char cbuf[42];
1711
1712 if (!port->identify_valid)
1713 return;
1714
1715 strlcpy(cbuf, (char *)(port->identify+10), 21);
1716 dev_info(&port->dd->pdev->dev,
1717 "Serial No.: %s\n", cbuf);
1718
1719 strlcpy(cbuf, (char *)(port->identify+23), 9);
1720 dev_info(&port->dd->pdev->dev,
1721 "Firmware Ver.: %s\n", cbuf);
1722
1723 strlcpy(cbuf, (char *)(port->identify+27), 41);
1724 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1725
1726 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1727 port->identify[128],
1728 port->identify[128] & 0x4 ? "(LOCKED)" : "");
1729
1730 if (mtip_hw_get_capacity(port->dd, &sectors))
1731 dev_info(&port->dd->pdev->dev,
1732 "Capacity: %llu sectors (%llu MB)\n",
1733 (u64)sectors,
1734 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1735
1736 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1737 switch (revid & 0xFF) {
1738 case 0x1:
1739 strlcpy(cbuf, "A0", 3);
1740 break;
1741 case 0x3:
1742 strlcpy(cbuf, "A2", 3);
1743 break;
1744 default:
1745 strlcpy(cbuf, "?", 2);
1746 break;
1747 }
1748 dev_info(&port->dd->pdev->dev,
1749 "Card Type: %s\n", cbuf);
1750 }
1751
1752 /*
1753 * Map the commands scatter list into the command table.
1754 *
1755 * @command Pointer to the command.
1756 * @nents Number of scatter list entries.
1757 *
1758 * return value
1759 * None
1760 */
1761 static inline void fill_command_sg(struct driver_data *dd,
1762 struct mtip_cmd *command,
1763 int nents)
1764 {
1765 int n;
1766 unsigned int dma_len;
1767 struct mtip_cmd_sg *command_sg;
1768 struct scatterlist *sg = command->sg;
1769
1770 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1771
1772 for (n = 0; n < nents; n++) {
1773 dma_len = sg_dma_len(sg);
1774 if (dma_len > 0x400000)
1775 dev_err(&dd->pdev->dev,
1776 "DMA segment length truncated\n");
1777 command_sg->info = __force_bit2int
1778 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1779 command_sg->dba = __force_bit2int
1780 cpu_to_le32(sg_dma_address(sg));
1781 command_sg->dba_upper = __force_bit2int
1782 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1783 command_sg++;
1784 sg++;
1785 }
1786 }
1787
1788 /*
1789 * @brief Execute a drive command.
1790 *
1791 * return value 0 The command completed successfully.
1792 * return value -1 An error occurred while executing the command.
1793 */
1794 static int exec_drive_task(struct mtip_port *port, u8 *command)
1795 {
1796 struct host_to_dev_fis fis;
1797 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1798 unsigned int to;
1799
1800 /* Build the FIS. */
1801 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1802 fis.type = 0x27;
1803 fis.opts = 1 << 7;
1804 fis.command = command[0];
1805 fis.features = command[1];
1806 fis.sect_count = command[2];
1807 fis.sector = command[3];
1808 fis.cyl_low = command[4];
1809 fis.cyl_hi = command[5];
1810 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1811
1812 mtip_set_timeout(port->dd, &fis, &to, 0);
1813
1814 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1815 __func__,
1816 command[0],
1817 command[1],
1818 command[2],
1819 command[3],
1820 command[4],
1821 command[5],
1822 command[6]);
1823
1824 /* Execute the command. */
1825 if (mtip_exec_internal_command(port,
1826 &fis,
1827 5,
1828 0,
1829 0,
1830 0,
1831 GFP_KERNEL,
1832 to) < 0) {
1833 return -1;
1834 }
1835
1836 command[0] = reply->command; /* Status*/
1837 command[1] = reply->features; /* Error*/
1838 command[4] = reply->cyl_low;
1839 command[5] = reply->cyl_hi;
1840
1841 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1842 __func__,
1843 command[0],
1844 command[1],
1845 command[4],
1846 command[5]);
1847
1848 return 0;
1849 }
1850
1851 /*
1852 * @brief Execute a drive command.
1853 *
1854 * @param port Pointer to the port data structure.
1855 * @param command Pointer to the user specified command parameters.
1856 * @param user_buffer Pointer to the user space buffer where read sector
1857 * data should be copied.
1858 *
1859 * return value 0 The command completed successfully.
1860 * return value -EFAULT An error occurred while copying the completion
1861 * data to the user space buffer.
1862 * return value -1 An error occurred while executing the command.
1863 */
1864 static int exec_drive_command(struct mtip_port *port, u8 *command,
1865 void __user *user_buffer)
1866 {
1867 struct host_to_dev_fis fis;
1868 struct host_to_dev_fis *reply;
1869 u8 *buf = NULL;
1870 dma_addr_t dma_addr = 0;
1871 int rv = 0, xfer_sz = command[3];
1872 unsigned int to;
1873
1874 if (xfer_sz) {
1875 if (!user_buffer)
1876 return -EFAULT;
1877
1878 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1879 ATA_SECT_SIZE * xfer_sz,
1880 &dma_addr,
1881 GFP_KERNEL);
1882 if (!buf) {
1883 dev_err(&port->dd->pdev->dev,
1884 "Memory allocation failed (%d bytes)\n",
1885 ATA_SECT_SIZE * xfer_sz);
1886 return -ENOMEM;
1887 }
1888 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1889 }
1890
1891 /* Build the FIS. */
1892 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1893 fis.type = 0x27;
1894 fis.opts = 1 << 7;
1895 fis.command = command[0];
1896 fis.features = command[2];
1897 fis.sect_count = command[3];
1898 if (fis.command == ATA_CMD_SMART) {
1899 fis.sector = command[1];
1900 fis.cyl_low = 0x4F;
1901 fis.cyl_hi = 0xC2;
1902 }
1903
1904 mtip_set_timeout(port->dd, &fis, &to, 0);
1905
1906 if (xfer_sz)
1907 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1908 else
1909 reply = (port->rxfis + RX_FIS_D2H_REG);
1910
1911 dbg_printk(MTIP_DRV_NAME
1912 " %s: User Command: cmd %x, sect %x, "
1913 "feat %x, sectcnt %x\n",
1914 __func__,
1915 command[0],
1916 command[1],
1917 command[2],
1918 command[3]);
1919
1920 /* Execute the command. */
1921 if (mtip_exec_internal_command(port,
1922 &fis,
1923 5,
1924 (xfer_sz ? dma_addr : 0),
1925 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
1926 0,
1927 GFP_KERNEL,
1928 to)
1929 < 0) {
1930 rv = -EFAULT;
1931 goto exit_drive_command;
1932 }
1933
1934 /* Collect the completion status. */
1935 command[0] = reply->command; /* Status*/
1936 command[1] = reply->features; /* Error*/
1937 command[2] = reply->sect_count;
1938
1939 dbg_printk(MTIP_DRV_NAME
1940 " %s: Completion Status: stat %x, "
1941 "err %x, nsect %x\n",
1942 __func__,
1943 command[0],
1944 command[1],
1945 command[2]);
1946
1947 if (xfer_sz) {
1948 if (copy_to_user(user_buffer,
1949 buf,
1950 ATA_SECT_SIZE * command[3])) {
1951 rv = -EFAULT;
1952 goto exit_drive_command;
1953 }
1954 }
1955 exit_drive_command:
1956 if (buf)
1957 dmam_free_coherent(&port->dd->pdev->dev,
1958 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1959 return rv;
1960 }
1961
1962 /*
1963 * Indicates whether a command has a single sector payload.
1964 *
1965 * @command passed to the device to perform the certain event.
1966 * @features passed to the device to perform the certain event.
1967 *
1968 * return value
1969 * 1 command is one that always has a single sector payload,
1970 * regardless of the value in the Sector Count field.
1971 * 0 otherwise
1972 *
1973 */
1974 static unsigned int implicit_sector(unsigned char command,
1975 unsigned char features)
1976 {
1977 unsigned int rv = 0;
1978
1979 /* list of commands that have an implicit sector count of 1 */
1980 switch (command) {
1981 case ATA_CMD_SEC_SET_PASS:
1982 case ATA_CMD_SEC_UNLOCK:
1983 case ATA_CMD_SEC_ERASE_PREP:
1984 case ATA_CMD_SEC_ERASE_UNIT:
1985 case ATA_CMD_SEC_FREEZE_LOCK:
1986 case ATA_CMD_SEC_DISABLE_PASS:
1987 case ATA_CMD_PMP_READ:
1988 case ATA_CMD_PMP_WRITE:
1989 rv = 1;
1990 break;
1991 case ATA_CMD_SET_MAX:
1992 if (features == ATA_SET_MAX_UNLOCK)
1993 rv = 1;
1994 break;
1995 case ATA_CMD_SMART:
1996 if ((features == ATA_SMART_READ_VALUES) ||
1997 (features == ATA_SMART_READ_THRESHOLDS))
1998 rv = 1;
1999 break;
2000 case ATA_CMD_CONF_OVERLAY:
2001 if ((features == ATA_DCO_IDENTIFY) ||
2002 (features == ATA_DCO_SET))
2003 rv = 1;
2004 break;
2005 }
2006 return rv;
2007 }
2008
2009 /*
2010 * Executes a taskfile
2011 * See ide_taskfile_ioctl() for derivation
2012 */
2013 static int exec_drive_taskfile(struct driver_data *dd,
2014 void __user *buf,
2015 ide_task_request_t *req_task,
2016 int outtotal)
2017 {
2018 struct host_to_dev_fis fis;
2019 struct host_to_dev_fis *reply;
2020 u8 *outbuf = NULL;
2021 u8 *inbuf = NULL;
2022 dma_addr_t outbuf_dma = 0;
2023 dma_addr_t inbuf_dma = 0;
2024 dma_addr_t dma_buffer = 0;
2025 int err = 0;
2026 unsigned int taskin = 0;
2027 unsigned int taskout = 0;
2028 u8 nsect = 0;
2029 unsigned int timeout;
2030 unsigned int force_single_sector;
2031 unsigned int transfer_size;
2032 unsigned long task_file_data;
2033 int intotal = outtotal + req_task->out_size;
2034 int erasemode = 0;
2035
2036 taskout = req_task->out_size;
2037 taskin = req_task->in_size;
2038 /* 130560 = 512 * 0xFF*/
2039 if (taskin > 130560 || taskout > 130560)
2040 return -EINVAL;
2041
2042 if (taskout) {
2043 outbuf = memdup_user(buf + outtotal, taskout);
2044 if (IS_ERR(outbuf))
2045 return PTR_ERR(outbuf);
2046
2047 outbuf_dma = pci_map_single(dd->pdev,
2048 outbuf,
2049 taskout,
2050 DMA_TO_DEVICE);
2051 if (pci_dma_mapping_error(dd->pdev, outbuf_dma)) {
2052 err = -ENOMEM;
2053 goto abort;
2054 }
2055 dma_buffer = outbuf_dma;
2056 }
2057
2058 if (taskin) {
2059 inbuf = memdup_user(buf + intotal, taskin);
2060 if (IS_ERR(inbuf)) {
2061 err = PTR_ERR(inbuf);
2062 inbuf = NULL;
2063 goto abort;
2064 }
2065 inbuf_dma = pci_map_single(dd->pdev,
2066 inbuf,
2067 taskin, DMA_FROM_DEVICE);
2068 if (pci_dma_mapping_error(dd->pdev, inbuf_dma)) {
2069 err = -ENOMEM;
2070 goto abort;
2071 }
2072 dma_buffer = inbuf_dma;
2073 }
2074
2075 /* only supports PIO and non-data commands from this ioctl. */
2076 switch (req_task->data_phase) {
2077 case TASKFILE_OUT:
2078 nsect = taskout / ATA_SECT_SIZE;
2079 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2080 break;
2081 case TASKFILE_IN:
2082 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2083 break;
2084 case TASKFILE_NO_DATA:
2085 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2086 break;
2087 default:
2088 err = -EINVAL;
2089 goto abort;
2090 }
2091
2092 /* Build the FIS. */
2093 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2094
2095 fis.type = 0x27;
2096 fis.opts = 1 << 7;
2097 fis.command = req_task->io_ports[7];
2098 fis.features = req_task->io_ports[1];
2099 fis.sect_count = req_task->io_ports[2];
2100 fis.lba_low = req_task->io_ports[3];
2101 fis.lba_mid = req_task->io_ports[4];
2102 fis.lba_hi = req_task->io_ports[5];
2103 /* Clear the dev bit*/
2104 fis.device = req_task->io_ports[6] & ~0x10;
2105
2106 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2107 req_task->in_flags.all =
2108 IDE_TASKFILE_STD_IN_FLAGS |
2109 (IDE_HOB_STD_IN_FLAGS << 8);
2110 fis.lba_low_ex = req_task->hob_ports[3];
2111 fis.lba_mid_ex = req_task->hob_ports[4];
2112 fis.lba_hi_ex = req_task->hob_ports[5];
2113 fis.features_ex = req_task->hob_ports[1];
2114 fis.sect_cnt_ex = req_task->hob_ports[2];
2115
2116 } else {
2117 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2118 }
2119
2120 force_single_sector = implicit_sector(fis.command, fis.features);
2121
2122 if ((taskin || taskout) && (!fis.sect_count)) {
2123 if (nsect)
2124 fis.sect_count = nsect;
2125 else {
2126 if (!force_single_sector) {
2127 dev_warn(&dd->pdev->dev,
2128 "data movement but "
2129 "sect_count is 0\n");
2130 err = -EINVAL;
2131 goto abort;
2132 }
2133 }
2134 }
2135
2136 dbg_printk(MTIP_DRV_NAME
2137 " %s: cmd %x, feat %x, nsect %x,"
2138 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2139 " head/dev %x\n",
2140 __func__,
2141 fis.command,
2142 fis.features,
2143 fis.sect_count,
2144 fis.lba_low,
2145 fis.lba_mid,
2146 fis.lba_hi,
2147 fis.device);
2148
2149 /* check for erase mode support during secure erase.*/
2150 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
2151 (outbuf[0] & MTIP_SEC_ERASE_MODE)) {
2152 erasemode = 1;
2153 }
2154
2155 mtip_set_timeout(dd, &fis, &timeout, erasemode);
2156
2157 /* Determine the correct transfer size.*/
2158 if (force_single_sector)
2159 transfer_size = ATA_SECT_SIZE;
2160 else
2161 transfer_size = ATA_SECT_SIZE * fis.sect_count;
2162
2163 /* Execute the command.*/
2164 if (mtip_exec_internal_command(dd->port,
2165 &fis,
2166 5,
2167 dma_buffer,
2168 transfer_size,
2169 0,
2170 GFP_KERNEL,
2171 timeout) < 0) {
2172 err = -EIO;
2173 goto abort;
2174 }
2175
2176 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2177
2178 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2179 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2180 req_task->io_ports[7] = reply->control;
2181 } else {
2182 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2183 req_task->io_ports[7] = reply->command;
2184 }
2185
2186 /* reclaim the DMA buffers.*/
2187 if (inbuf_dma)
2188 pci_unmap_single(dd->pdev, inbuf_dma,
2189 taskin, DMA_FROM_DEVICE);
2190 if (outbuf_dma)
2191 pci_unmap_single(dd->pdev, outbuf_dma,
2192 taskout, DMA_TO_DEVICE);
2193 inbuf_dma = 0;
2194 outbuf_dma = 0;
2195
2196 /* return the ATA registers to the caller.*/
2197 req_task->io_ports[1] = reply->features;
2198 req_task->io_ports[2] = reply->sect_count;
2199 req_task->io_ports[3] = reply->lba_low;
2200 req_task->io_ports[4] = reply->lba_mid;
2201 req_task->io_ports[5] = reply->lba_hi;
2202 req_task->io_ports[6] = reply->device;
2203
2204 if (req_task->out_flags.all & 1) {
2205
2206 req_task->hob_ports[3] = reply->lba_low_ex;
2207 req_task->hob_ports[4] = reply->lba_mid_ex;
2208 req_task->hob_ports[5] = reply->lba_hi_ex;
2209 req_task->hob_ports[1] = reply->features_ex;
2210 req_task->hob_ports[2] = reply->sect_cnt_ex;
2211 }
2212 dbg_printk(MTIP_DRV_NAME
2213 " %s: Completion: stat %x,"
2214 "err %x, sect_cnt %x, lbalo %x,"
2215 "lbamid %x, lbahi %x, dev %x\n",
2216 __func__,
2217 req_task->io_ports[7],
2218 req_task->io_ports[1],
2219 req_task->io_ports[2],
2220 req_task->io_ports[3],
2221 req_task->io_ports[4],
2222 req_task->io_ports[5],
2223 req_task->io_ports[6]);
2224
2225 if (taskout) {
2226 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2227 err = -EFAULT;
2228 goto abort;
2229 }
2230 }
2231 if (taskin) {
2232 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2233 err = -EFAULT;
2234 goto abort;
2235 }
2236 }
2237 abort:
2238 if (inbuf_dma)
2239 pci_unmap_single(dd->pdev, inbuf_dma,
2240 taskin, DMA_FROM_DEVICE);
2241 if (outbuf_dma)
2242 pci_unmap_single(dd->pdev, outbuf_dma,
2243 taskout, DMA_TO_DEVICE);
2244 kfree(outbuf);
2245 kfree(inbuf);
2246
2247 return err;
2248 }
2249
2250 /*
2251 * Handle IOCTL calls from the Block Layer.
2252 *
2253 * This function is called by the Block Layer when it receives an IOCTL
2254 * command that it does not understand. If the IOCTL command is not supported
2255 * this function returns -ENOTTY.
2256 *
2257 * @dd Pointer to the driver data structure.
2258 * @cmd IOCTL command passed from the Block Layer.
2259 * @arg IOCTL argument passed from the Block Layer.
2260 *
2261 * return value
2262 * 0 The IOCTL completed successfully.
2263 * -ENOTTY The specified command is not supported.
2264 * -EFAULT An error occurred copying data to a user space buffer.
2265 * -EIO An error occurred while executing the command.
2266 */
2267 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2268 unsigned long arg)
2269 {
2270 switch (cmd) {
2271 case HDIO_GET_IDENTITY:
2272 {
2273 if (copy_to_user((void __user *)arg, dd->port->identify,
2274 sizeof(u16) * ATA_ID_WORDS))
2275 return -EFAULT;
2276 break;
2277 }
2278 case HDIO_DRIVE_CMD:
2279 {
2280 u8 drive_command[4];
2281
2282 /* Copy the user command info to our buffer. */
2283 if (copy_from_user(drive_command,
2284 (void __user *) arg,
2285 sizeof(drive_command)))
2286 return -EFAULT;
2287
2288 /* Execute the drive command. */
2289 if (exec_drive_command(dd->port,
2290 drive_command,
2291 (void __user *) (arg+4)))
2292 return -EIO;
2293
2294 /* Copy the status back to the users buffer. */
2295 if (copy_to_user((void __user *) arg,
2296 drive_command,
2297 sizeof(drive_command)))
2298 return -EFAULT;
2299
2300 break;
2301 }
2302 case HDIO_DRIVE_TASK:
2303 {
2304 u8 drive_command[7];
2305
2306 /* Copy the user command info to our buffer. */
2307 if (copy_from_user(drive_command,
2308 (void __user *) arg,
2309 sizeof(drive_command)))
2310 return -EFAULT;
2311
2312 /* Execute the drive command. */
2313 if (exec_drive_task(dd->port, drive_command))
2314 return -EIO;
2315
2316 /* Copy the status back to the users buffer. */
2317 if (copy_to_user((void __user *) arg,
2318 drive_command,
2319 sizeof(drive_command)))
2320 return -EFAULT;
2321
2322 break;
2323 }
2324 case HDIO_DRIVE_TASKFILE: {
2325 ide_task_request_t req_task;
2326 int ret, outtotal;
2327
2328 if (copy_from_user(&req_task, (void __user *) arg,
2329 sizeof(req_task)))
2330 return -EFAULT;
2331
2332 outtotal = sizeof(req_task);
2333
2334 ret = exec_drive_taskfile(dd, (void __user *) arg,
2335 &req_task, outtotal);
2336
2337 if (copy_to_user((void __user *) arg, &req_task,
2338 sizeof(req_task)))
2339 return -EFAULT;
2340
2341 return ret;
2342 }
2343
2344 default:
2345 return -EINVAL;
2346 }
2347 return 0;
2348 }
2349
2350 /*
2351 * Submit an IO to the hw
2352 *
2353 * This function is called by the block layer to issue an io
2354 * to the device. Upon completion, the callback function will
2355 * be called with the data parameter passed as the callback data.
2356 *
2357 * @dd Pointer to the driver data structure.
2358 * @start First sector to read.
2359 * @nsect Number of sectors to read.
2360 * @nents Number of entries in scatter list for the read command.
2361 * @tag The tag of this read command.
2362 * @callback Pointer to the function that should be called
2363 * when the read completes.
2364 * @data Callback data passed to the callback function
2365 * when the read completes.
2366 * @dir Direction (read or write)
2367 *
2368 * return value
2369 * None
2370 */
2371 static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
2372 struct mtip_cmd *command, int nents,
2373 struct blk_mq_hw_ctx *hctx)
2374 {
2375 struct host_to_dev_fis *fis;
2376 struct mtip_port *port = dd->port;
2377 int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2378 u64 start = blk_rq_pos(rq);
2379 unsigned int nsect = blk_rq_sectors(rq);
2380
2381 /* Map the scatter list for DMA access */
2382 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2383
2384 prefetch(&port->flags);
2385
2386 command->scatter_ents = nents;
2387
2388 /*
2389 * The number of retries for this command before it is
2390 * reported as a failure to the upper layers.
2391 */
2392 command->retries = MTIP_MAX_RETRIES;
2393
2394 /* Fill out fis */
2395 fis = command->command;
2396 fis->type = 0x27;
2397 fis->opts = 1 << 7;
2398 if (dma_dir == DMA_FROM_DEVICE)
2399 fis->command = ATA_CMD_FPDMA_READ;
2400 else
2401 fis->command = ATA_CMD_FPDMA_WRITE;
2402 fis->lba_low = start & 0xFF;
2403 fis->lba_mid = (start >> 8) & 0xFF;
2404 fis->lba_hi = (start >> 16) & 0xFF;
2405 fis->lba_low_ex = (start >> 24) & 0xFF;
2406 fis->lba_mid_ex = (start >> 32) & 0xFF;
2407 fis->lba_hi_ex = (start >> 40) & 0xFF;
2408 fis->device = 1 << 6;
2409 fis->features = nsect & 0xFF;
2410 fis->features_ex = (nsect >> 8) & 0xFF;
2411 fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5));
2412 fis->sect_cnt_ex = 0;
2413 fis->control = 0;
2414 fis->res2 = 0;
2415 fis->res3 = 0;
2416 fill_command_sg(dd, command, nents);
2417
2418 if (unlikely(command->unaligned))
2419 fis->device |= 1 << 7;
2420
2421 /* Populate the command header */
2422 command->command_header->opts =
2423 __force_bit2int cpu_to_le32(
2424 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
2425 command->command_header->byte_count = 0;
2426
2427 /*
2428 * Set the completion function and data for the command
2429 * within this layer.
2430 */
2431 command->comp_data = dd;
2432 command->comp_func = mtip_async_complete;
2433 command->direction = dma_dir;
2434
2435 /*
2436 * To prevent this command from being issued
2437 * if an internal command is in progress or error handling is active.
2438 */
2439 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
2440 set_bit(rq->tag, port->cmds_to_issue);
2441 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2442 return;
2443 }
2444
2445 /* Issue the command to the hardware */
2446 mtip_issue_ncq_command(port, rq->tag);
2447 }
2448
2449 /*
2450 * Sysfs status dump.
2451 *
2452 * @dev Pointer to the device structure, passed by the kernrel.
2453 * @attr Pointer to the device_attribute structure passed by the kernel.
2454 * @buf Pointer to the char buffer that will receive the stats info.
2455 *
2456 * return value
2457 * The size, in bytes, of the data copied into buf.
2458 */
2459 static ssize_t mtip_hw_show_status(struct device *dev,
2460 struct device_attribute *attr,
2461 char *buf)
2462 {
2463 struct driver_data *dd = dev_to_disk(dev)->private_data;
2464 int size = 0;
2465
2466 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2467 size += sprintf(buf, "%s", "thermal_shutdown\n");
2468 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2469 size += sprintf(buf, "%s", "write_protect\n");
2470 else
2471 size += sprintf(buf, "%s", "online\n");
2472
2473 return size;
2474 }
2475
2476 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2477
2478 /* debugsfs entries */
2479
2480 static ssize_t show_device_status(struct device_driver *drv, char *buf)
2481 {
2482 int size = 0;
2483 struct driver_data *dd, *tmp;
2484 unsigned long flags;
2485 char id_buf[42];
2486 u16 status = 0;
2487
2488 spin_lock_irqsave(&dev_lock, flags);
2489 size += sprintf(&buf[size], "Devices Present:\n");
2490 list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
2491 if (dd->pdev) {
2492 if (dd->port &&
2493 dd->port->identify &&
2494 dd->port->identify_valid) {
2495 strlcpy(id_buf,
2496 (char *) (dd->port->identify + 10), 21);
2497 status = *(dd->port->identify + 141);
2498 } else {
2499 memset(id_buf, 0, 42);
2500 status = 0;
2501 }
2502
2503 if (dd->port &&
2504 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2505 size += sprintf(&buf[size],
2506 " device %s %s (ftl rebuild %d %%)\n",
2507 dev_name(&dd->pdev->dev),
2508 id_buf,
2509 status);
2510 } else {
2511 size += sprintf(&buf[size],
2512 " device %s %s\n",
2513 dev_name(&dd->pdev->dev),
2514 id_buf);
2515 }
2516 }
2517 }
2518
2519 size += sprintf(&buf[size], "Devices Being Removed:\n");
2520 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
2521 if (dd->pdev) {
2522 if (dd->port &&
2523 dd->port->identify &&
2524 dd->port->identify_valid) {
2525 strlcpy(id_buf,
2526 (char *) (dd->port->identify+10), 21);
2527 status = *(dd->port->identify + 141);
2528 } else {
2529 memset(id_buf, 0, 42);
2530 status = 0;
2531 }
2532
2533 if (dd->port &&
2534 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2535 size += sprintf(&buf[size],
2536 " device %s %s (ftl rebuild %d %%)\n",
2537 dev_name(&dd->pdev->dev),
2538 id_buf,
2539 status);
2540 } else {
2541 size += sprintf(&buf[size],
2542 " device %s %s\n",
2543 dev_name(&dd->pdev->dev),
2544 id_buf);
2545 }
2546 }
2547 }
2548 spin_unlock_irqrestore(&dev_lock, flags);
2549
2550 return size;
2551 }
2552
2553 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2554 size_t len, loff_t *offset)
2555 {
2556 struct driver_data *dd = (struct driver_data *)f->private_data;
2557 int size = *offset;
2558 char *buf;
2559 int rv = 0;
2560
2561 if (!len || *offset)
2562 return 0;
2563
2564 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2565 if (!buf) {
2566 dev_err(&dd->pdev->dev,
2567 "Memory allocation: status buffer\n");
2568 return -ENOMEM;
2569 }
2570
2571 size += show_device_status(NULL, buf);
2572
2573 *offset = size <= len ? size : len;
2574 size = copy_to_user(ubuf, buf, *offset);
2575 if (size)
2576 rv = -EFAULT;
2577
2578 kfree(buf);
2579 return rv ? rv : *offset;
2580 }
2581
2582 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2583 size_t len, loff_t *offset)
2584 {
2585 struct driver_data *dd = (struct driver_data *)f->private_data;
2586 char *buf;
2587 u32 group_allocated;
2588 int size = *offset;
2589 int n, rv = 0;
2590
2591 if (!len || size)
2592 return 0;
2593
2594 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2595 if (!buf) {
2596 dev_err(&dd->pdev->dev,
2597 "Memory allocation: register buffer\n");
2598 return -ENOMEM;
2599 }
2600
2601 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2602
2603 for (n = dd->slot_groups-1; n >= 0; n--)
2604 size += sprintf(&buf[size], "%08X ",
2605 readl(dd->port->s_active[n]));
2606
2607 size += sprintf(&buf[size], "]\n");
2608 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2609
2610 for (n = dd->slot_groups-1; n >= 0; n--)
2611 size += sprintf(&buf[size], "%08X ",
2612 readl(dd->port->cmd_issue[n]));
2613
2614 size += sprintf(&buf[size], "]\n");
2615 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2616
2617 for (n = dd->slot_groups-1; n >= 0; n--)
2618 size += sprintf(&buf[size], "%08X ",
2619 readl(dd->port->completed[n]));
2620
2621 size += sprintf(&buf[size], "]\n");
2622 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2623 readl(dd->port->mmio + PORT_IRQ_STAT));
2624 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2625 readl(dd->mmio + HOST_IRQ_STAT));
2626 size += sprintf(&buf[size], "\n");
2627
2628 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2629
2630 for (n = dd->slot_groups-1; n >= 0; n--) {
2631 if (sizeof(long) > sizeof(u32))
2632 group_allocated =
2633 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2634 else
2635 group_allocated = dd->port->cmds_to_issue[n];
2636 size += sprintf(&buf[size], "%08X ", group_allocated);
2637 }
2638 size += sprintf(&buf[size], "]\n");
2639
2640 *offset = size <= len ? size : len;
2641 size = copy_to_user(ubuf, buf, *offset);
2642 if (size)
2643 rv = -EFAULT;
2644
2645 kfree(buf);
2646 return rv ? rv : *offset;
2647 }
2648
2649 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2650 size_t len, loff_t *offset)
2651 {
2652 struct driver_data *dd = (struct driver_data *)f->private_data;
2653 char *buf;
2654 int size = *offset;
2655 int rv = 0;
2656
2657 if (!len || size)
2658 return 0;
2659
2660 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2661 if (!buf) {
2662 dev_err(&dd->pdev->dev,
2663 "Memory allocation: flag buffer\n");
2664 return -ENOMEM;
2665 }
2666
2667 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2668 dd->port->flags);
2669 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2670 dd->dd_flag);
2671
2672 *offset = size <= len ? size : len;
2673 size = copy_to_user(ubuf, buf, *offset);
2674 if (size)
2675 rv = -EFAULT;
2676
2677 kfree(buf);
2678 return rv ? rv : *offset;
2679 }
2680
2681 static const struct file_operations mtip_device_status_fops = {
2682 .owner = THIS_MODULE,
2683 .open = simple_open,
2684 .read = mtip_hw_read_device_status,
2685 .llseek = no_llseek,
2686 };
2687
2688 static const struct file_operations mtip_regs_fops = {
2689 .owner = THIS_MODULE,
2690 .open = simple_open,
2691 .read = mtip_hw_read_registers,
2692 .llseek = no_llseek,
2693 };
2694
2695 static const struct file_operations mtip_flags_fops = {
2696 .owner = THIS_MODULE,
2697 .open = simple_open,
2698 .read = mtip_hw_read_flags,
2699 .llseek = no_llseek,
2700 };
2701
2702 /*
2703 * Create the sysfs related attributes.
2704 *
2705 * @dd Pointer to the driver data structure.
2706 * @kobj Pointer to the kobj for the block device.
2707 *
2708 * return value
2709 * 0 Operation completed successfully.
2710 * -EINVAL Invalid parameter.
2711 */
2712 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2713 {
2714 if (!kobj || !dd)
2715 return -EINVAL;
2716
2717 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2718 dev_warn(&dd->pdev->dev,
2719 "Error creating 'status' sysfs entry\n");
2720 return 0;
2721 }
2722
2723 /*
2724 * Remove the sysfs related attributes.
2725 *
2726 * @dd Pointer to the driver data structure.
2727 * @kobj Pointer to the kobj for the block device.
2728 *
2729 * return value
2730 * 0 Operation completed successfully.
2731 * -EINVAL Invalid parameter.
2732 */
2733 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2734 {
2735 if (!kobj || !dd)
2736 return -EINVAL;
2737
2738 sysfs_remove_file(kobj, &dev_attr_status.attr);
2739
2740 return 0;
2741 }
2742
2743 static int mtip_hw_debugfs_init(struct driver_data *dd)
2744 {
2745 if (!dfs_parent)
2746 return -1;
2747
2748 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2749 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2750 dev_warn(&dd->pdev->dev,
2751 "Error creating node %s under debugfs\n",
2752 dd->disk->disk_name);
2753 dd->dfs_node = NULL;
2754 return -1;
2755 }
2756
2757 debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
2758 &mtip_flags_fops);
2759 debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
2760 &mtip_regs_fops);
2761
2762 return 0;
2763 }
2764
2765 static void mtip_hw_debugfs_exit(struct driver_data *dd)
2766 {
2767 if (dd->dfs_node)
2768 debugfs_remove_recursive(dd->dfs_node);
2769 }
2770
2771 /*
2772 * Perform any init/resume time hardware setup
2773 *
2774 * @dd Pointer to the driver data structure.
2775 *
2776 * return value
2777 * None
2778 */
2779 static inline void hba_setup(struct driver_data *dd)
2780 {
2781 u32 hwdata;
2782 hwdata = readl(dd->mmio + HOST_HSORG);
2783
2784 /* interrupt bug workaround: use only 1 IS bit.*/
2785 writel(hwdata |
2786 HSORG_DISABLE_SLOTGRP_INTR |
2787 HSORG_DISABLE_SLOTGRP_PXIS,
2788 dd->mmio + HOST_HSORG);
2789 }
2790
2791 static int mtip_device_unaligned_constrained(struct driver_data *dd)
2792 {
2793 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2794 }
2795
2796 /*
2797 * Detect the details of the product, and store anything needed
2798 * into the driver data structure. This includes product type and
2799 * version and number of slot groups.
2800 *
2801 * @dd Pointer to the driver data structure.
2802 *
2803 * return value
2804 * None
2805 */
2806 static void mtip_detect_product(struct driver_data *dd)
2807 {
2808 u32 hwdata;
2809 unsigned int rev, slotgroups;
2810
2811 /*
2812 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2813 * info register:
2814 * [15:8] hardware/software interface rev#
2815 * [ 3] asic-style interface
2816 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2817 */
2818 hwdata = readl(dd->mmio + HOST_HSORG);
2819
2820 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2821 dd->slot_groups = 1;
2822
2823 if (hwdata & 0x8) {
2824 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2825 rev = (hwdata & HSORG_HWREV) >> 8;
2826 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2827 dev_info(&dd->pdev->dev,
2828 "ASIC-FPGA design, HS rev 0x%x, "
2829 "%i slot groups [%i slots]\n",
2830 rev,
2831 slotgroups,
2832 slotgroups * 32);
2833
2834 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2835 dev_warn(&dd->pdev->dev,
2836 "Warning: driver only supports "
2837 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2838 slotgroups = MTIP_MAX_SLOT_GROUPS;
2839 }
2840 dd->slot_groups = slotgroups;
2841 return;
2842 }
2843
2844 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2845 }
2846
2847 /*
2848 * Blocking wait for FTL rebuild to complete
2849 *
2850 * @dd Pointer to the DRIVER_DATA structure.
2851 *
2852 * return value
2853 * 0 FTL rebuild completed successfully
2854 * -EFAULT FTL rebuild error/timeout/interruption
2855 */
2856 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2857 {
2858 unsigned long timeout, cnt = 0, start;
2859
2860 dev_warn(&dd->pdev->dev,
2861 "FTL rebuild in progress. Polling for completion.\n");
2862
2863 start = jiffies;
2864 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2865
2866 do {
2867 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2868 &dd->dd_flag)))
2869 return -EFAULT;
2870 if (mtip_check_surprise_removal(dd->pdev))
2871 return -EFAULT;
2872
2873 if (mtip_get_identify(dd->port, NULL) < 0)
2874 return -EFAULT;
2875
2876 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2877 MTIP_FTL_REBUILD_MAGIC) {
2878 ssleep(1);
2879 /* Print message every 3 minutes */
2880 if (cnt++ >= 180) {
2881 dev_warn(&dd->pdev->dev,
2882 "FTL rebuild in progress (%d secs).\n",
2883 jiffies_to_msecs(jiffies - start) / 1000);
2884 cnt = 0;
2885 }
2886 } else {
2887 dev_warn(&dd->pdev->dev,
2888 "FTL rebuild complete (%d secs).\n",
2889 jiffies_to_msecs(jiffies - start) / 1000);
2890 mtip_block_initialize(dd);
2891 return 0;
2892 }
2893 } while (time_before(jiffies, timeout));
2894
2895 /* Check for timeout */
2896 dev_err(&dd->pdev->dev,
2897 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2898 jiffies_to_msecs(jiffies - start) / 1000);
2899 return -EFAULT;
2900 }
2901
2902 static void mtip_softirq_done_fn(struct request *rq)
2903 {
2904 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
2905 struct driver_data *dd = rq->q->queuedata;
2906
2907 /* Unmap the DMA scatter list entries */
2908 dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents,
2909 cmd->direction);
2910
2911 if (unlikely(cmd->unaligned))
2912 up(&dd->port->cmd_slot_unal);
2913
2914 blk_mq_end_request(rq, cmd->status);
2915 }
2916
2917 static void mtip_abort_cmd(struct request *req, void *data,
2918 bool reserved)
2919 {
2920 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
2921 struct driver_data *dd = data;
2922
2923 dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag);
2924
2925 clear_bit(req->tag, dd->port->cmds_to_issue);
2926 cmd->status = -EIO;
2927 mtip_softirq_done_fn(req);
2928 }
2929
2930 static void mtip_queue_cmd(struct request *req, void *data,
2931 bool reserved)
2932 {
2933 struct driver_data *dd = data;
2934
2935 set_bit(req->tag, dd->port->cmds_to_issue);
2936 blk_abort_request(req);
2937 }
2938
2939 /*
2940 * service thread to issue queued commands
2941 *
2942 * @data Pointer to the driver data structure.
2943 *
2944 * return value
2945 * 0
2946 */
2947
2948 static int mtip_service_thread(void *data)
2949 {
2950 struct driver_data *dd = (struct driver_data *)data;
2951 unsigned long slot, slot_start, slot_wrap, to;
2952 unsigned int num_cmd_slots = dd->slot_groups * 32;
2953 struct mtip_port *port = dd->port;
2954
2955 while (1) {
2956 if (kthread_should_stop() ||
2957 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2958 goto st_out;
2959 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2960
2961 /*
2962 * the condition is to check neither an internal command is
2963 * is in progress nor error handling is active
2964 */
2965 wait_event_interruptible(port->svc_wait, (port->flags) &&
2966 (port->flags & MTIP_PF_SVC_THD_WORK));
2967
2968 if (kthread_should_stop() ||
2969 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2970 goto st_out;
2971
2972 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2973 &dd->dd_flag)))
2974 goto st_out;
2975
2976 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2977
2978 restart_eh:
2979 /* Demux bits: start with error handling */
2980 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2981 mtip_handle_tfe(dd);
2982 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2983 }
2984
2985 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2986 goto restart_eh;
2987
2988 if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) {
2989 to = jiffies + msecs_to_jiffies(5000);
2990
2991 do {
2992 mdelay(100);
2993 } while (atomic_read(&dd->irq_workers_active) != 0 &&
2994 time_before(jiffies, to));
2995
2996 if (atomic_read(&dd->irq_workers_active) != 0)
2997 dev_warn(&dd->pdev->dev,
2998 "Completion workers still active!");
2999
3000 spin_lock(dd->queue->queue_lock);
3001 blk_mq_tagset_busy_iter(&dd->tags,
3002 mtip_queue_cmd, dd);
3003 spin_unlock(dd->queue->queue_lock);
3004
3005 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags);
3006
3007 if (mtip_device_reset(dd))
3008 blk_mq_tagset_busy_iter(&dd->tags,
3009 mtip_abort_cmd, dd);
3010
3011 clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags);
3012 }
3013
3014 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
3015 slot = 1;
3016 /* used to restrict the loop to one iteration */
3017 slot_start = num_cmd_slots;
3018 slot_wrap = 0;
3019 while (1) {
3020 slot = find_next_bit(port->cmds_to_issue,
3021 num_cmd_slots, slot);
3022 if (slot_wrap == 1) {
3023 if ((slot_start >= slot) ||
3024 (slot >= num_cmd_slots))
3025 break;
3026 }
3027 if (unlikely(slot_start == num_cmd_slots))
3028 slot_start = slot;
3029
3030 if (unlikely(slot == num_cmd_slots)) {
3031 slot = 1;
3032 slot_wrap = 1;
3033 continue;
3034 }
3035
3036 /* Issue the command to the hardware */
3037 mtip_issue_ncq_command(port, slot);
3038
3039 clear_bit(slot, port->cmds_to_issue);
3040 }
3041
3042 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
3043 }
3044
3045 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
3046 if (mtip_ftl_rebuild_poll(dd) == 0)
3047 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
3048 }
3049 }
3050
3051 st_out:
3052 return 0;
3053 }
3054
3055 /*
3056 * DMA region teardown
3057 *
3058 * @dd Pointer to driver_data structure
3059 *
3060 * return value
3061 * None
3062 */
3063 static void mtip_dma_free(struct driver_data *dd)
3064 {
3065 struct mtip_port *port = dd->port;
3066
3067 if (port->block1)
3068 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3069 port->block1, port->block1_dma);
3070
3071 if (port->command_list) {
3072 dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3073 port->command_list, port->command_list_dma);
3074 }
3075 }
3076
3077 /*
3078 * DMA region setup
3079 *
3080 * @dd Pointer to driver_data structure
3081 *
3082 * return value
3083 * -ENOMEM Not enough free DMA region space to initialize driver
3084 */
3085 static int mtip_dma_alloc(struct driver_data *dd)
3086 {
3087 struct mtip_port *port = dd->port;
3088
3089 /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */
3090 port->block1 =
3091 dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3092 &port->block1_dma, GFP_KERNEL);
3093 if (!port->block1)
3094 return -ENOMEM;
3095 memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ);
3096
3097 /* Allocate dma memory for command list */
3098 port->command_list =
3099 dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3100 &port->command_list_dma, GFP_KERNEL);
3101 if (!port->command_list) {
3102 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3103 port->block1, port->block1_dma);
3104 port->block1 = NULL;
3105 port->block1_dma = 0;
3106 return -ENOMEM;
3107 }
3108 memset(port->command_list, 0, AHCI_CMD_TBL_SZ);
3109
3110 /* Setup all pointers into first DMA region */
3111 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET;
3112 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET;
3113 port->identify = port->block1 + AHCI_IDFY_OFFSET;
3114 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET;
3115 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET;
3116 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET;
3117 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET;
3118 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
3119
3120 return 0;
3121 }
3122
3123 static int mtip_hw_get_identify(struct driver_data *dd)
3124 {
3125 struct smart_attr attr242;
3126 unsigned char *buf;
3127 int rv;
3128
3129 if (mtip_get_identify(dd->port, NULL) < 0)
3130 return -EFAULT;
3131
3132 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3133 MTIP_FTL_REBUILD_MAGIC) {
3134 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3135 return MTIP_FTL_REBUILD_MAGIC;
3136 }
3137 mtip_dump_identify(dd->port);
3138
3139 /* check write protect, over temp and rebuild statuses */
3140 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3141 dd->port->log_buf,
3142 dd->port->log_buf_dma, 1);
3143 if (rv) {
3144 dev_warn(&dd->pdev->dev,
3145 "Error in READ LOG EXT (10h) command\n");
3146 /* non-critical error, don't fail the load */
3147 } else {
3148 buf = (unsigned char *)dd->port->log_buf;
3149 if (buf[259] & 0x1) {
3150 dev_info(&dd->pdev->dev,
3151 "Write protect bit is set.\n");
3152 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3153 }
3154 if (buf[288] == 0xF7) {
3155 dev_info(&dd->pdev->dev,
3156 "Exceeded Tmax, drive in thermal shutdown.\n");
3157 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3158 }
3159 if (buf[288] == 0xBF) {
3160 dev_info(&dd->pdev->dev,
3161 "Drive indicates rebuild has failed.\n");
3162 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
3163 }
3164 }
3165
3166 /* get write protect progess */
3167 memset(&attr242, 0, sizeof(struct smart_attr));
3168 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3169 dev_warn(&dd->pdev->dev,
3170 "Unable to check write protect progress\n");
3171 else
3172 dev_info(&dd->pdev->dev,
3173 "Write protect progress: %u%% (%u blocks)\n",
3174 attr242.cur, le32_to_cpu(attr242.data));
3175
3176 return rv;
3177 }
3178
3179 /*
3180 * Called once for each card.
3181 *
3182 * @dd Pointer to the driver data structure.
3183 *
3184 * return value
3185 * 0 on success, else an error code.
3186 */
3187 static int mtip_hw_init(struct driver_data *dd)
3188 {
3189 int i;
3190 int rv;
3191 unsigned int num_command_slots;
3192 unsigned long timeout, timetaken;
3193
3194 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
3195
3196 mtip_detect_product(dd);
3197 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
3198 rv = -EIO;
3199 goto out1;
3200 }
3201 num_command_slots = dd->slot_groups * 32;
3202
3203 hba_setup(dd);
3204
3205 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3206 dd->numa_node);
3207 if (!dd->port) {
3208 dev_err(&dd->pdev->dev,
3209 "Memory allocation: port structure\n");
3210 return -ENOMEM;
3211 }
3212
3213 /* Continue workqueue setup */
3214 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3215 dd->work[i].port = dd->port;
3216
3217 /* Enable unaligned IO constraints for some devices */
3218 if (mtip_device_unaligned_constrained(dd))
3219 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
3220 else
3221 dd->unal_qdepth = 0;
3222
3223 sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth);
3224
3225 /* Spinlock to prevent concurrent issue */
3226 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3227 spin_lock_init(&dd->port->cmd_issue_lock[i]);
3228
3229 /* Set the port mmio base address. */
3230 dd->port->mmio = dd->mmio + PORT_OFFSET;
3231 dd->port->dd = dd;
3232
3233 /* DMA allocations */
3234 rv = mtip_dma_alloc(dd);
3235 if (rv < 0)
3236 goto out1;
3237
3238 /* Setup the pointers to the extended s_active and CI registers. */
3239 for (i = 0; i < dd->slot_groups; i++) {
3240 dd->port->s_active[i] =
3241 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3242 dd->port->cmd_issue[i] =
3243 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3244 dd->port->completed[i] =
3245 dd->port->mmio + i*0x80 + PORT_SDBV;
3246 }
3247
3248 timetaken = jiffies;
3249 timeout = jiffies + msecs_to_jiffies(30000);
3250 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3251 time_before(jiffies, timeout)) {
3252 mdelay(100);
3253 }
3254 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3255 timetaken = jiffies - timetaken;
3256 dev_warn(&dd->pdev->dev,
3257 "Surprise removal detected at %u ms\n",
3258 jiffies_to_msecs(timetaken));
3259 rv = -ENODEV;
3260 goto out2 ;
3261 }
3262 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
3263 timetaken = jiffies - timetaken;
3264 dev_warn(&dd->pdev->dev,
3265 "Removal detected at %u ms\n",
3266 jiffies_to_msecs(timetaken));
3267 rv = -EFAULT;
3268 goto out2;
3269 }
3270
3271 /* Conditionally reset the HBA. */
3272 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3273 if (mtip_hba_reset(dd) < 0) {
3274 dev_err(&dd->pdev->dev,
3275 "Card did not reset within timeout\n");
3276 rv = -EIO;
3277 goto out2;
3278 }
3279 } else {
3280 /* Clear any pending interrupts on the HBA */
3281 writel(readl(dd->mmio + HOST_IRQ_STAT),
3282 dd->mmio + HOST_IRQ_STAT);
3283 }
3284
3285 mtip_init_port(dd->port);
3286 mtip_start_port(dd->port);
3287
3288 /* Setup the ISR and enable interrupts. */
3289 rv = devm_request_irq(&dd->pdev->dev,
3290 dd->pdev->irq,
3291 mtip_irq_handler,
3292 IRQF_SHARED,
3293 dev_driver_string(&dd->pdev->dev),
3294 dd);
3295
3296 if (rv) {
3297 dev_err(&dd->pdev->dev,
3298 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3299 goto out2;
3300 }
3301 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
3302
3303 /* Enable interrupts on the HBA. */
3304 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3305 dd->mmio + HOST_CTL);
3306
3307 init_waitqueue_head(&dd->port->svc_wait);
3308
3309 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3310 rv = -EFAULT;
3311 goto out3;
3312 }
3313
3314 return rv;
3315
3316 out3:
3317 /* Disable interrupts on the HBA. */
3318 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3319 dd->mmio + HOST_CTL);
3320
3321 /* Release the IRQ. */
3322 irq_set_affinity_hint(dd->pdev->irq, NULL);
3323 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3324
3325 out2:
3326 mtip_deinit_port(dd->port);
3327 mtip_dma_free(dd);
3328
3329 out1:
3330 /* Free the memory allocated for the for structure. */
3331 kfree(dd->port);
3332
3333 return rv;
3334 }
3335
3336 static int mtip_standby_drive(struct driver_data *dd)
3337 {
3338 int rv = 0;
3339
3340 if (dd->sr || !dd->port)
3341 return -ENODEV;
3342 /*
3343 * Send standby immediate (E0h) to the drive so that it
3344 * saves its state.
3345 */
3346 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
3347 !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) &&
3348 !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) {
3349 rv = mtip_standby_immediate(dd->port);
3350 if (rv)
3351 dev_warn(&dd->pdev->dev,
3352 "STANDBY IMMEDIATE failed\n");
3353 }
3354 return rv;
3355 }
3356
3357 /*
3358 * Called to deinitialize an interface.
3359 *
3360 * @dd Pointer to the driver data structure.
3361 *
3362 * return value
3363 * 0
3364 */
3365 static int mtip_hw_exit(struct driver_data *dd)
3366 {
3367 if (!dd->sr) {
3368 /* de-initialize the port. */
3369 mtip_deinit_port(dd->port);
3370
3371 /* Disable interrupts on the HBA. */
3372 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3373 dd->mmio + HOST_CTL);
3374 }
3375
3376 /* Release the IRQ. */
3377 irq_set_affinity_hint(dd->pdev->irq, NULL);
3378 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3379 msleep(1000);
3380
3381 /* Free dma regions */
3382 mtip_dma_free(dd);
3383
3384 /* Free the memory allocated for the for structure. */
3385 kfree(dd->port);
3386 dd->port = NULL;
3387
3388 return 0;
3389 }
3390
3391 /*
3392 * Issue a Standby Immediate command to the device.
3393 *
3394 * This function is called by the Block Layer just before the
3395 * system powers off during a shutdown.
3396 *
3397 * @dd Pointer to the driver data structure.
3398 *
3399 * return value
3400 * 0
3401 */
3402 static int mtip_hw_shutdown(struct driver_data *dd)
3403 {
3404 /*
3405 * Send standby immediate (E0h) to the drive so that it
3406 * saves its state.
3407 */
3408 mtip_standby_drive(dd);
3409
3410 return 0;
3411 }
3412
3413 /*
3414 * Suspend function
3415 *
3416 * This function is called by the Block Layer just before the
3417 * system hibernates.
3418 *
3419 * @dd Pointer to the driver data structure.
3420 *
3421 * return value
3422 * 0 Suspend was successful
3423 * -EFAULT Suspend was not successful
3424 */
3425 static int mtip_hw_suspend(struct driver_data *dd)
3426 {
3427 /*
3428 * Send standby immediate (E0h) to the drive
3429 * so that it saves its state.
3430 */
3431 if (mtip_standby_drive(dd) != 0) {
3432 dev_err(&dd->pdev->dev,
3433 "Failed standby-immediate command\n");
3434 return -EFAULT;
3435 }
3436
3437 /* Disable interrupts on the HBA.*/
3438 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3439 dd->mmio + HOST_CTL);
3440 mtip_deinit_port(dd->port);
3441
3442 return 0;
3443 }
3444
3445 /*
3446 * Resume function
3447 *
3448 * This function is called by the Block Layer as the
3449 * system resumes.
3450 *
3451 * @dd Pointer to the driver data structure.
3452 *
3453 * return value
3454 * 0 Resume was successful
3455 * -EFAULT Resume was not successful
3456 */
3457 static int mtip_hw_resume(struct driver_data *dd)
3458 {
3459 /* Perform any needed hardware setup steps */
3460 hba_setup(dd);
3461
3462 /* Reset the HBA */
3463 if (mtip_hba_reset(dd) != 0) {
3464 dev_err(&dd->pdev->dev,
3465 "Unable to reset the HBA\n");
3466 return -EFAULT;
3467 }
3468
3469 /*
3470 * Enable the port, DMA engine, and FIS reception specific
3471 * h/w in controller.
3472 */
3473 mtip_init_port(dd->port);
3474 mtip_start_port(dd->port);
3475
3476 /* Enable interrupts on the HBA.*/
3477 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3478 dd->mmio + HOST_CTL);
3479
3480 return 0;
3481 }
3482
3483 /*
3484 * Helper function for reusing disk name
3485 * upon hot insertion.
3486 */
3487 static int rssd_disk_name_format(char *prefix,
3488 int index,
3489 char *buf,
3490 int buflen)
3491 {
3492 const int base = 'z' - 'a' + 1;
3493 char *begin = buf + strlen(prefix);
3494 char *end = buf + buflen;
3495 char *p;
3496 int unit;
3497
3498 p = end - 1;
3499 *p = '\0';
3500 unit = base;
3501 do {
3502 if (p == begin)
3503 return -EINVAL;
3504 *--p = 'a' + (index % unit);
3505 index = (index / unit) - 1;
3506 } while (index >= 0);
3507
3508 memmove(begin, p, end - p);
3509 memcpy(buf, prefix, strlen(prefix));
3510
3511 return 0;
3512 }
3513
3514 /*
3515 * Block layer IOCTL handler.
3516 *
3517 * @dev Pointer to the block_device structure.
3518 * @mode ignored
3519 * @cmd IOCTL command passed from the user application.
3520 * @arg Argument passed from the user application.
3521 *
3522 * return value
3523 * 0 IOCTL completed successfully.
3524 * -ENOTTY IOCTL not supported or invalid driver data
3525 * structure pointer.
3526 */
3527 static int mtip_block_ioctl(struct block_device *dev,
3528 fmode_t mode,
3529 unsigned cmd,
3530 unsigned long arg)
3531 {
3532 struct driver_data *dd = dev->bd_disk->private_data;
3533
3534 if (!capable(CAP_SYS_ADMIN))
3535 return -EACCES;
3536
3537 if (!dd)
3538 return -ENOTTY;
3539
3540 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3541 return -ENOTTY;
3542
3543 switch (cmd) {
3544 case BLKFLSBUF:
3545 return -ENOTTY;
3546 default:
3547 return mtip_hw_ioctl(dd, cmd, arg);
3548 }
3549 }
3550
3551 #ifdef CONFIG_COMPAT
3552 /*
3553 * Block layer compat IOCTL handler.
3554 *
3555 * @dev Pointer to the block_device structure.
3556 * @mode ignored
3557 * @cmd IOCTL command passed from the user application.
3558 * @arg Argument passed from the user application.
3559 *
3560 * return value
3561 * 0 IOCTL completed successfully.
3562 * -ENOTTY IOCTL not supported or invalid driver data
3563 * structure pointer.
3564 */
3565 static int mtip_block_compat_ioctl(struct block_device *dev,
3566 fmode_t mode,
3567 unsigned cmd,
3568 unsigned long arg)
3569 {
3570 struct driver_data *dd = dev->bd_disk->private_data;
3571
3572 if (!capable(CAP_SYS_ADMIN))
3573 return -EACCES;
3574
3575 if (!dd)
3576 return -ENOTTY;
3577
3578 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3579 return -ENOTTY;
3580
3581 switch (cmd) {
3582 case BLKFLSBUF:
3583 return -ENOTTY;
3584 case HDIO_DRIVE_TASKFILE: {
3585 struct mtip_compat_ide_task_request_s __user *compat_req_task;
3586 ide_task_request_t req_task;
3587 int compat_tasksize, outtotal, ret;
3588
3589 compat_tasksize =
3590 sizeof(struct mtip_compat_ide_task_request_s);
3591
3592 compat_req_task =
3593 (struct mtip_compat_ide_task_request_s __user *) arg;
3594
3595 if (copy_from_user(&req_task, (void __user *) arg,
3596 compat_tasksize - (2 * sizeof(compat_long_t))))
3597 return -EFAULT;
3598
3599 if (get_user(req_task.out_size, &compat_req_task->out_size))
3600 return -EFAULT;
3601
3602 if (get_user(req_task.in_size, &compat_req_task->in_size))
3603 return -EFAULT;
3604
3605 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3606
3607 ret = exec_drive_taskfile(dd, (void __user *) arg,
3608 &req_task, outtotal);
3609
3610 if (copy_to_user((void __user *) arg, &req_task,
3611 compat_tasksize -
3612 (2 * sizeof(compat_long_t))))
3613 return -EFAULT;
3614
3615 if (put_user(req_task.out_size, &compat_req_task->out_size))
3616 return -EFAULT;
3617
3618 if (put_user(req_task.in_size, &compat_req_task->in_size))
3619 return -EFAULT;
3620
3621 return ret;
3622 }
3623 default:
3624 return mtip_hw_ioctl(dd, cmd, arg);
3625 }
3626 }
3627 #endif
3628
3629 /*
3630 * Obtain the geometry of the device.
3631 *
3632 * You may think that this function is obsolete, but some applications,
3633 * fdisk for example still used CHS values. This function describes the
3634 * device as having 224 heads and 56 sectors per cylinder. These values are
3635 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3636 * partition is described in terms of a start and end cylinder this means
3637 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3638 * affects performance.
3639 *
3640 * @dev Pointer to the block_device strucutre.
3641 * @geo Pointer to a hd_geometry structure.
3642 *
3643 * return value
3644 * 0 Operation completed successfully.
3645 * -ENOTTY An error occurred while reading the drive capacity.
3646 */
3647 static int mtip_block_getgeo(struct block_device *dev,
3648 struct hd_geometry *geo)
3649 {
3650 struct driver_data *dd = dev->bd_disk->private_data;
3651 sector_t capacity;
3652
3653 if (!dd)
3654 return -ENOTTY;
3655
3656 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3657 dev_warn(&dd->pdev->dev,
3658 "Could not get drive capacity.\n");
3659 return -ENOTTY;
3660 }
3661
3662 geo->heads = 224;
3663 geo->sectors = 56;
3664 sector_div(capacity, (geo->heads * geo->sectors));
3665 geo->cylinders = capacity;
3666 return 0;
3667 }
3668
3669 static int mtip_block_open(struct block_device *dev, fmode_t mode)
3670 {
3671 struct driver_data *dd;
3672
3673 if (dev && dev->bd_disk) {
3674 dd = (struct driver_data *) dev->bd_disk->private_data;
3675
3676 if (dd) {
3677 if (test_bit(MTIP_DDF_REMOVAL_BIT,
3678 &dd->dd_flag)) {
3679 return -ENODEV;
3680 }
3681 return 0;
3682 }
3683 }
3684 return -ENODEV;
3685 }
3686
3687 static void mtip_block_release(struct gendisk *disk, fmode_t mode)
3688 {
3689 }
3690
3691 /*
3692 * Block device operation function.
3693 *
3694 * This structure contains pointers to the functions required by the block
3695 * layer.
3696 */
3697 static const struct block_device_operations mtip_block_ops = {
3698 .open = mtip_block_open,
3699 .release = mtip_block_release,
3700 .ioctl = mtip_block_ioctl,
3701 #ifdef CONFIG_COMPAT
3702 .compat_ioctl = mtip_block_compat_ioctl,
3703 #endif
3704 .getgeo = mtip_block_getgeo,
3705 .owner = THIS_MODULE
3706 };
3707
3708 static inline bool is_se_active(struct driver_data *dd)
3709 {
3710 if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) {
3711 if (dd->port->ic_pause_timer) {
3712 unsigned long to = dd->port->ic_pause_timer +
3713 msecs_to_jiffies(1000);
3714 if (time_after(jiffies, to)) {
3715 clear_bit(MTIP_PF_SE_ACTIVE_BIT,
3716 &dd->port->flags);
3717 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
3718 dd->port->ic_pause_timer = 0;
3719 wake_up_interruptible(&dd->port->svc_wait);
3720 return false;
3721 }
3722 }
3723 return true;
3724 }
3725 return false;
3726 }
3727
3728 /*
3729 * Block layer make request function.
3730 *
3731 * This function is called by the kernel to process a BIO for
3732 * the P320 device.
3733 *
3734 * @queue Pointer to the request queue. Unused other than to obtain
3735 * the driver data structure.
3736 * @rq Pointer to the request.
3737 *
3738 */
3739 static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq)
3740 {
3741 struct driver_data *dd = hctx->queue->queuedata;
3742 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3743 unsigned int nents;
3744
3745 if (is_se_active(dd))
3746 return -ENODATA;
3747
3748 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3749 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3750 &dd->dd_flag))) {
3751 return -ENXIO;
3752 }
3753 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3754 return -ENODATA;
3755 }
3756 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3757 &dd->dd_flag) &&
3758 rq_data_dir(rq))) {
3759 return -ENODATA;
3760 }
3761 if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag) ||
3762 test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag)))
3763 return -ENODATA;
3764 }
3765
3766 if (req_op(rq) == REQ_OP_DISCARD) {
3767 int err;
3768
3769 err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq));
3770 blk_mq_end_request(rq, err);
3771 return 0;
3772 }
3773
3774 /* Create the scatter list for this request. */
3775 nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg);
3776
3777 /* Issue the read/write. */
3778 mtip_hw_submit_io(dd, rq, cmd, nents, hctx);
3779 return 0;
3780 }
3781
3782 static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3783 struct request *rq)
3784 {
3785 struct driver_data *dd = hctx->queue->queuedata;
3786 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3787
3788 if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
3789 return false;
3790
3791 /*
3792 * If unaligned depth must be limited on this controller, mark it
3793 * as unaligned if the IO isn't on a 4k boundary (start of length).
3794 */
3795 if (blk_rq_sectors(rq) <= 64) {
3796 if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3797 cmd->unaligned = 1;
3798 }
3799
3800 if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal))
3801 return true;
3802
3803 return false;
3804 }
3805
3806 static int mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
3807 const struct blk_mq_queue_data *bd)
3808 {
3809 struct request *rq = bd->rq;
3810 int ret;
3811
3812 if (unlikely(mtip_check_unal_depth(hctx, rq)))
3813 return BLK_MQ_RQ_QUEUE_BUSY;
3814
3815 blk_mq_start_request(rq);
3816
3817 ret = mtip_submit_request(hctx, rq);
3818 if (likely(!ret))
3819 return BLK_MQ_RQ_QUEUE_OK;
3820
3821 return BLK_MQ_RQ_QUEUE_ERROR;
3822 }
3823
3824 static void mtip_free_cmd(void *data, struct request *rq,
3825 unsigned int hctx_idx, unsigned int request_idx)
3826 {
3827 struct driver_data *dd = data;
3828 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3829
3830 if (!cmd->command)
3831 return;
3832
3833 dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3834 cmd->command, cmd->command_dma);
3835 }
3836
3837 static int mtip_init_cmd(void *data, struct request *rq, unsigned int hctx_idx,
3838 unsigned int request_idx, unsigned int numa_node)
3839 {
3840 struct driver_data *dd = data;
3841 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3842 u32 host_cap_64 = readl(dd->mmio + HOST_CAP) & HOST_CAP_64;
3843
3844 /*
3845 * For flush requests, request_idx starts at the end of the
3846 * tag space. Since we don't support FLUSH/FUA, simply return
3847 * 0 as there's nothing to be done.
3848 */
3849 if (request_idx >= MTIP_MAX_COMMAND_SLOTS)
3850 return 0;
3851
3852 cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3853 &cmd->command_dma, GFP_KERNEL);
3854 if (!cmd->command)
3855 return -ENOMEM;
3856
3857 memset(cmd->command, 0, CMD_DMA_ALLOC_SZ);
3858
3859 /* Point the command headers at the command tables. */
3860 cmd->command_header = dd->port->command_list +
3861 (sizeof(struct mtip_cmd_hdr) * request_idx);
3862 cmd->command_header_dma = dd->port->command_list_dma +
3863 (sizeof(struct mtip_cmd_hdr) * request_idx);
3864
3865 if (host_cap_64)
3866 cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16);
3867
3868 cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
3869
3870 sg_init_table(cmd->sg, MTIP_MAX_SG);
3871 return 0;
3872 }
3873
3874 static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req,
3875 bool reserved)
3876 {
3877 struct driver_data *dd = req->q->queuedata;
3878
3879 if (reserved)
3880 goto exit_handler;
3881
3882 if (test_bit(req->tag, dd->port->cmds_to_issue))
3883 goto exit_handler;
3884
3885 if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags))
3886 goto exit_handler;
3887
3888 wake_up_interruptible(&dd->port->svc_wait);
3889 exit_handler:
3890 return BLK_EH_RESET_TIMER;
3891 }
3892
3893 static const struct blk_mq_ops mtip_mq_ops = {
3894 .queue_rq = mtip_queue_rq,
3895 .init_request = mtip_init_cmd,
3896 .exit_request = mtip_free_cmd,
3897 .complete = mtip_softirq_done_fn,
3898 .timeout = mtip_cmd_timeout,
3899 };
3900
3901 /*
3902 * Block layer initialization function.
3903 *
3904 * This function is called once by the PCI layer for each P320
3905 * device that is connected to the system.
3906 *
3907 * @dd Pointer to the driver data structure.
3908 *
3909 * return value
3910 * 0 on success else an error code.
3911 */
3912 static int mtip_block_initialize(struct driver_data *dd)
3913 {
3914 int rv = 0, wait_for_rebuild = 0;
3915 sector_t capacity;
3916 unsigned int index = 0;
3917 struct kobject *kobj;
3918
3919 if (dd->disk)
3920 goto skip_create_disk; /* hw init done, before rebuild */
3921
3922 if (mtip_hw_init(dd)) {
3923 rv = -EINVAL;
3924 goto protocol_init_error;
3925 }
3926
3927 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
3928 if (dd->disk == NULL) {
3929 dev_err(&dd->pdev->dev,
3930 "Unable to allocate gendisk structure\n");
3931 rv = -EINVAL;
3932 goto alloc_disk_error;
3933 }
3934
3935 /* Generate the disk name, implemented same as in sd.c */
3936 do {
3937 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) {
3938 rv = -ENOMEM;
3939 goto ida_get_error;
3940 }
3941
3942 spin_lock(&rssd_index_lock);
3943 rv = ida_get_new(&rssd_index_ida, &index);
3944 spin_unlock(&rssd_index_lock);
3945 } while (rv == -EAGAIN);
3946
3947 if (rv)
3948 goto ida_get_error;
3949
3950 rv = rssd_disk_name_format("rssd",
3951 index,
3952 dd->disk->disk_name,
3953 DISK_NAME_LEN);
3954 if (rv)
3955 goto disk_index_error;
3956
3957 dd->disk->major = dd->major;
3958 dd->disk->first_minor = index * MTIP_MAX_MINORS;
3959 dd->disk->minors = MTIP_MAX_MINORS;
3960 dd->disk->fops = &mtip_block_ops;
3961 dd->disk->private_data = dd;
3962 dd->index = index;
3963
3964 mtip_hw_debugfs_init(dd);
3965
3966 memset(&dd->tags, 0, sizeof(dd->tags));
3967 dd->tags.ops = &mtip_mq_ops;
3968 dd->tags.nr_hw_queues = 1;
3969 dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3970 dd->tags.reserved_tags = 1;
3971 dd->tags.cmd_size = sizeof(struct mtip_cmd);
3972 dd->tags.numa_node = dd->numa_node;
3973 dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
3974 dd->tags.driver_data = dd;
3975 dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS;
3976
3977 rv = blk_mq_alloc_tag_set(&dd->tags);
3978 if (rv) {
3979 dev_err(&dd->pdev->dev,
3980 "Unable to allocate request queue\n");
3981 goto block_queue_alloc_tag_error;
3982 }
3983
3984 /* Allocate the request queue. */
3985 dd->queue = blk_mq_init_queue(&dd->tags);
3986 if (IS_ERR(dd->queue)) {
3987 dev_err(&dd->pdev->dev,
3988 "Unable to allocate request queue\n");
3989 rv = -ENOMEM;
3990 goto block_queue_alloc_init_error;
3991 }
3992
3993 dd->disk->queue = dd->queue;
3994 dd->queue->queuedata = dd;
3995
3996 skip_create_disk:
3997 /* Initialize the protocol layer. */
3998 wait_for_rebuild = mtip_hw_get_identify(dd);
3999 if (wait_for_rebuild < 0) {
4000 dev_err(&dd->pdev->dev,
4001 "Protocol layer initialization failed\n");
4002 rv = -EINVAL;
4003 goto init_hw_cmds_error;
4004 }
4005
4006 /*
4007 * if rebuild pending, start the service thread, and delay the block
4008 * queue creation and device_add_disk()
4009 */
4010 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
4011 goto start_service_thread;
4012
4013 /* Set device limits. */
4014 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
4015 clear_bit(QUEUE_FLAG_ADD_RANDOM, &dd->queue->queue_flags);
4016 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
4017 blk_queue_physical_block_size(dd->queue, 4096);
4018 blk_queue_max_hw_sectors(dd->queue, 0xffff);
4019 blk_queue_max_segment_size(dd->queue, 0x400000);
4020 blk_queue_io_min(dd->queue, 4096);
4021 blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask);
4022
4023 /* Signal trim support */
4024 if (dd->trim_supp == true) {
4025 set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags);
4026 dd->queue->limits.discard_granularity = 4096;
4027 blk_queue_max_discard_sectors(dd->queue,
4028 MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES);
4029 }
4030
4031 /* Set the capacity of the device in 512 byte sectors. */
4032 if (!(mtip_hw_get_capacity(dd, &capacity))) {
4033 dev_warn(&dd->pdev->dev,
4034 "Could not read drive capacity\n");
4035 rv = -EIO;
4036 goto read_capacity_error;
4037 }
4038 set_capacity(dd->disk, capacity);
4039
4040 /* Enable the block device and add it to /dev */
4041 device_add_disk(&dd->pdev->dev, dd->disk);
4042
4043 dd->bdev = bdget_disk(dd->disk, 0);
4044 /*
4045 * Now that the disk is active, initialize any sysfs attributes
4046 * managed by the protocol layer.
4047 */
4048 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4049 if (kobj) {
4050 mtip_hw_sysfs_init(dd, kobj);
4051 kobject_put(kobj);
4052 }
4053
4054 if (dd->mtip_svc_handler) {
4055 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4056 return rv; /* service thread created for handling rebuild */
4057 }
4058
4059 start_service_thread:
4060 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
4061 dd, dd->numa_node,
4062 "mtip_svc_thd_%02d", index);
4063
4064 if (IS_ERR(dd->mtip_svc_handler)) {
4065 dev_err(&dd->pdev->dev, "service thread failed to start\n");
4066 dd->mtip_svc_handler = NULL;
4067 rv = -EFAULT;
4068 goto kthread_run_error;
4069 }
4070 wake_up_process(dd->mtip_svc_handler);
4071 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
4072 rv = wait_for_rebuild;
4073
4074 return rv;
4075
4076 kthread_run_error:
4077 bdput(dd->bdev);
4078 dd->bdev = NULL;
4079
4080 /* Delete our gendisk. This also removes the device from /dev */
4081 del_gendisk(dd->disk);
4082
4083 read_capacity_error:
4084 init_hw_cmds_error:
4085 blk_cleanup_queue(dd->queue);
4086 block_queue_alloc_init_error:
4087 blk_mq_free_tag_set(&dd->tags);
4088 block_queue_alloc_tag_error:
4089 mtip_hw_debugfs_exit(dd);
4090 disk_index_error:
4091 spin_lock(&rssd_index_lock);
4092 ida_remove(&rssd_index_ida, index);
4093 spin_unlock(&rssd_index_lock);
4094
4095 ida_get_error:
4096 put_disk(dd->disk);
4097
4098 alloc_disk_error:
4099 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
4100
4101 protocol_init_error:
4102 return rv;
4103 }
4104
4105 static void mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv)
4106 {
4107 struct driver_data *dd = (struct driver_data *)data;
4108 struct mtip_cmd *cmd;
4109
4110 if (likely(!reserv)) {
4111 cmd->status = -ENODEV;
4112 blk_mq_complete_request(rq);
4113 } else if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &dd->port->flags)) {
4114
4115 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
4116 if (cmd->comp_func)
4117 cmd->comp_func(dd->port, MTIP_TAG_INTERNAL,
4118 cmd, -ENODEV);
4119 }
4120 }
4121
4122 /*
4123 * Block layer deinitialization function.
4124 *
4125 * Called by the PCI layer as each P320 device is removed.
4126 *
4127 * @dd Pointer to the driver data structure.
4128 *
4129 * return value
4130 * 0
4131 */
4132 static int mtip_block_remove(struct driver_data *dd)
4133 {
4134 struct kobject *kobj;
4135
4136 mtip_hw_debugfs_exit(dd);
4137
4138 if (dd->mtip_svc_handler) {
4139 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
4140 wake_up_interruptible(&dd->port->svc_wait);
4141 kthread_stop(dd->mtip_svc_handler);
4142 }
4143
4144 /* Clean up the sysfs attributes, if created */
4145 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
4146 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4147 if (kobj) {
4148 mtip_hw_sysfs_exit(dd, kobj);
4149 kobject_put(kobj);
4150 }
4151 }
4152
4153 if (!dd->sr) {
4154 /*
4155 * Explicitly wait here for IOs to quiesce,
4156 * as mtip_standby_drive usually won't wait for IOs.
4157 */
4158 if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS,
4159 GFP_KERNEL))
4160 mtip_standby_drive(dd);
4161 }
4162 else
4163 dev_info(&dd->pdev->dev, "device %s surprise removal\n",
4164 dd->disk->disk_name);
4165
4166 blk_freeze_queue_start(dd->queue);
4167 blk_mq_stop_hw_queues(dd->queue);
4168 blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd);
4169
4170 /*
4171 * Delete our gendisk structure. This also removes the device
4172 * from /dev
4173 */
4174 if (dd->bdev) {
4175 bdput(dd->bdev);
4176 dd->bdev = NULL;
4177 }
4178 if (dd->disk) {
4179 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
4180 del_gendisk(dd->disk);
4181 if (dd->disk->queue) {
4182 blk_cleanup_queue(dd->queue);
4183 blk_mq_free_tag_set(&dd->tags);
4184 dd->queue = NULL;
4185 }
4186 put_disk(dd->disk);
4187 }
4188 dd->disk = NULL;
4189
4190 spin_lock(&rssd_index_lock);
4191 ida_remove(&rssd_index_ida, dd->index);
4192 spin_unlock(&rssd_index_lock);
4193
4194 /* De-initialize the protocol layer. */
4195 mtip_hw_exit(dd);
4196
4197 return 0;
4198 }
4199
4200 /*
4201 * Function called by the PCI layer when just before the
4202 * machine shuts down.
4203 *
4204 * If a protocol layer shutdown function is present it will be called
4205 * by this function.
4206 *
4207 * @dd Pointer to the driver data structure.
4208 *
4209 * return value
4210 * 0
4211 */
4212 static int mtip_block_shutdown(struct driver_data *dd)
4213 {
4214 mtip_hw_shutdown(dd);
4215
4216 /* Delete our gendisk structure, and cleanup the blk queue. */
4217 if (dd->disk) {
4218 dev_info(&dd->pdev->dev,
4219 "Shutting down %s ...\n", dd->disk->disk_name);
4220
4221 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
4222 del_gendisk(dd->disk);
4223 if (dd->disk->queue) {
4224 blk_cleanup_queue(dd->queue);
4225 blk_mq_free_tag_set(&dd->tags);
4226 }
4227 put_disk(dd->disk);
4228 dd->disk = NULL;
4229 dd->queue = NULL;
4230 }
4231
4232 spin_lock(&rssd_index_lock);
4233 ida_remove(&rssd_index_ida, dd->index);
4234 spin_unlock(&rssd_index_lock);
4235 return 0;
4236 }
4237
4238 static int mtip_block_suspend(struct driver_data *dd)
4239 {
4240 dev_info(&dd->pdev->dev,
4241 "Suspending %s ...\n", dd->disk->disk_name);
4242 mtip_hw_suspend(dd);
4243 return 0;
4244 }
4245
4246 static int mtip_block_resume(struct driver_data *dd)
4247 {
4248 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
4249 dd->disk->disk_name);
4250 mtip_hw_resume(dd);
4251 return 0;
4252 }
4253
4254 static void drop_cpu(int cpu)
4255 {
4256 cpu_use[cpu]--;
4257 }
4258
4259 static int get_least_used_cpu_on_node(int node)
4260 {
4261 int cpu, least_used_cpu, least_cnt;
4262 const struct cpumask *node_mask;
4263
4264 node_mask = cpumask_of_node(node);
4265 least_used_cpu = cpumask_first(node_mask);
4266 least_cnt = cpu_use[least_used_cpu];
4267 cpu = least_used_cpu;
4268
4269 for_each_cpu(cpu, node_mask) {
4270 if (cpu_use[cpu] < least_cnt) {
4271 least_used_cpu = cpu;
4272 least_cnt = cpu_use[cpu];
4273 }
4274 }
4275 cpu_use[least_used_cpu]++;
4276 return least_used_cpu;
4277 }
4278
4279 /* Helper for selecting a node in round robin mode */
4280 static inline int mtip_get_next_rr_node(void)
4281 {
4282 static int next_node = -1;
4283
4284 if (next_node == -1) {
4285 next_node = first_online_node;
4286 return next_node;
4287 }
4288
4289 next_node = next_online_node(next_node);
4290 if (next_node == MAX_NUMNODES)
4291 next_node = first_online_node;
4292 return next_node;
4293 }
4294
4295 static DEFINE_HANDLER(0);
4296 static DEFINE_HANDLER(1);
4297 static DEFINE_HANDLER(2);
4298 static DEFINE_HANDLER(3);
4299 static DEFINE_HANDLER(4);
4300 static DEFINE_HANDLER(5);
4301 static DEFINE_HANDLER(6);
4302 static DEFINE_HANDLER(7);
4303
4304 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
4305 {
4306 int pos;
4307 unsigned short pcie_dev_ctrl;
4308
4309 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
4310 if (pos) {
4311 pci_read_config_word(pdev,
4312 pos + PCI_EXP_DEVCTL,
4313 &pcie_dev_ctrl);
4314 if (pcie_dev_ctrl & (1 << 11) ||
4315 pcie_dev_ctrl & (1 << 4)) {
4316 dev_info(&dd->pdev->dev,
4317 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
4318 pdev->vendor, pdev->device);
4319 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
4320 PCI_EXP_DEVCTL_RELAX_EN);
4321 pci_write_config_word(pdev,
4322 pos + PCI_EXP_DEVCTL,
4323 pcie_dev_ctrl);
4324 }
4325 }
4326 }
4327
4328 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
4329 {
4330 /*
4331 * This workaround is specific to AMD/ATI chipset with a PCI upstream
4332 * device with device id 0x5aXX
4333 */
4334 if (pdev->bus && pdev->bus->self) {
4335 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
4336 ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
4337 mtip_disable_link_opts(dd, pdev->bus->self);
4338 } else {
4339 /* Check further up the topology */
4340 struct pci_dev *parent_dev = pdev->bus->self;
4341 if (parent_dev->bus &&
4342 parent_dev->bus->parent &&
4343 parent_dev->bus->parent->self &&
4344 parent_dev->bus->parent->self->vendor ==
4345 PCI_VENDOR_ID_ATI &&
4346 (parent_dev->bus->parent->self->device &
4347 0xff00) == 0x5a00) {
4348 mtip_disable_link_opts(dd,
4349 parent_dev->bus->parent->self);
4350 }
4351 }
4352 }
4353 }
4354
4355 /*
4356 * Called for each supported PCI device detected.
4357 *
4358 * This function allocates the private data structure, enables the
4359 * PCI device and then calls the block layer initialization function.
4360 *
4361 * return value
4362 * 0 on success else an error code.
4363 */
4364 static int mtip_pci_probe(struct pci_dev *pdev,
4365 const struct pci_device_id *ent)
4366 {
4367 int rv = 0;
4368 struct driver_data *dd = NULL;
4369 char cpu_list[256];
4370 const struct cpumask *node_mask;
4371 int cpu, i = 0, j = 0;
4372 int my_node = NUMA_NO_NODE;
4373 unsigned long flags;
4374
4375 /* Allocate memory for this devices private data. */
4376 my_node = pcibus_to_node(pdev->bus);
4377 if (my_node != NUMA_NO_NODE) {
4378 if (!node_online(my_node))
4379 my_node = mtip_get_next_rr_node();
4380 } else {
4381 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4382 my_node = mtip_get_next_rr_node();
4383 }
4384 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4385 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
4386 cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
4387
4388 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
4389 if (dd == NULL) {
4390 dev_err(&pdev->dev,
4391 "Unable to allocate memory for driver data\n");
4392 return -ENOMEM;
4393 }
4394
4395 /* Attach the private data to this PCI device. */
4396 pci_set_drvdata(pdev, dd);
4397
4398 rv = pcim_enable_device(pdev);
4399 if (rv < 0) {
4400 dev_err(&pdev->dev, "Unable to enable device\n");
4401 goto iomap_err;
4402 }
4403
4404 /* Map BAR5 to memory. */
4405 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4406 if (rv < 0) {
4407 dev_err(&pdev->dev, "Unable to map regions\n");
4408 goto iomap_err;
4409 }
4410
4411 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4412 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
4413
4414 if (rv) {
4415 rv = pci_set_consistent_dma_mask(pdev,
4416 DMA_BIT_MASK(32));
4417 if (rv) {
4418 dev_warn(&pdev->dev,
4419 "64-bit DMA enable failed\n");
4420 goto setmask_err;
4421 }
4422 }
4423 }
4424
4425 /* Copy the info we may need later into the private data structure. */
4426 dd->major = mtip_major;
4427 dd->instance = instance;
4428 dd->pdev = pdev;
4429 dd->numa_node = my_node;
4430
4431 INIT_LIST_HEAD(&dd->online_list);
4432 INIT_LIST_HEAD(&dd->remove_list);
4433
4434 memset(dd->workq_name, 0, 32);
4435 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4436
4437 dd->isr_workq = create_workqueue(dd->workq_name);
4438 if (!dd->isr_workq) {
4439 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
4440 rv = -ENOMEM;
4441 goto block_initialize_err;
4442 }
4443
4444 memset(cpu_list, 0, sizeof(cpu_list));
4445
4446 node_mask = cpumask_of_node(dd->numa_node);
4447 if (!cpumask_empty(node_mask)) {
4448 for_each_cpu(cpu, node_mask)
4449 {
4450 snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4451 j = strlen(cpu_list);
4452 }
4453
4454 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4455 dd->numa_node,
4456 topology_physical_package_id(cpumask_first(node_mask)),
4457 nr_cpus_node(dd->numa_node),
4458 cpu_list);
4459 } else
4460 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4461
4462 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4463 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4464 cpu_to_node(dd->isr_binding), dd->isr_binding);
4465
4466 /* first worker context always runs in ISR */
4467 dd->work[0].cpu_binding = dd->isr_binding;
4468 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4469 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4470 dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4471 dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4472 dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4473 dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4474 dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4475
4476 /* Log the bindings */
4477 for_each_present_cpu(cpu) {
4478 memset(cpu_list, 0, sizeof(cpu_list));
4479 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4480 if (dd->work[i].cpu_binding == cpu) {
4481 snprintf(&cpu_list[j], 256 - j, "%d ", i);
4482 j = strlen(cpu_list);
4483 }
4484 }
4485 if (j)
4486 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4487 }
4488
4489 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4490 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4491 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4492 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4493 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4494 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4495 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4496 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4497
4498 pci_set_master(pdev);
4499 rv = pci_enable_msi(pdev);
4500 if (rv) {
4501 dev_warn(&pdev->dev,
4502 "Unable to enable MSI interrupt.\n");
4503 goto msi_initialize_err;
4504 }
4505
4506 mtip_fix_ero_nosnoop(dd, pdev);
4507
4508 /* Initialize the block layer. */
4509 rv = mtip_block_initialize(dd);
4510 if (rv < 0) {
4511 dev_err(&pdev->dev,
4512 "Unable to initialize block layer\n");
4513 goto block_initialize_err;
4514 }
4515
4516 /*
4517 * Increment the instance count so that each device has a unique
4518 * instance number.
4519 */
4520 instance++;
4521 if (rv != MTIP_FTL_REBUILD_MAGIC)
4522 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4523 else
4524 rv = 0; /* device in rebuild state, return 0 from probe */
4525
4526 /* Add to online list even if in ftl rebuild */
4527 spin_lock_irqsave(&dev_lock, flags);
4528 list_add(&dd->online_list, &online_list);
4529 spin_unlock_irqrestore(&dev_lock, flags);
4530
4531 goto done;
4532
4533 block_initialize_err:
4534 pci_disable_msi(pdev);
4535
4536 msi_initialize_err:
4537 if (dd->isr_workq) {
4538 flush_workqueue(dd->isr_workq);
4539 destroy_workqueue(dd->isr_workq);
4540 drop_cpu(dd->work[0].cpu_binding);
4541 drop_cpu(dd->work[1].cpu_binding);
4542 drop_cpu(dd->work[2].cpu_binding);
4543 }
4544 setmask_err:
4545 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4546
4547 iomap_err:
4548 kfree(dd);
4549 pci_set_drvdata(pdev, NULL);
4550 return rv;
4551 done:
4552 return rv;
4553 }
4554
4555 /*
4556 * Called for each probed device when the device is removed or the
4557 * driver is unloaded.
4558 *
4559 * return value
4560 * None
4561 */
4562 static void mtip_pci_remove(struct pci_dev *pdev)
4563 {
4564 struct driver_data *dd = pci_get_drvdata(pdev);
4565 unsigned long flags, to;
4566
4567 set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag);
4568
4569 spin_lock_irqsave(&dev_lock, flags);
4570 list_del_init(&dd->online_list);
4571 list_add(&dd->remove_list, &removing_list);
4572 spin_unlock_irqrestore(&dev_lock, flags);
4573
4574 mtip_check_surprise_removal(pdev);
4575 synchronize_irq(dd->pdev->irq);
4576
4577 /* Spin until workers are done */
4578 to = jiffies + msecs_to_jiffies(4000);
4579 do {
4580 msleep(20);
4581 } while (atomic_read(&dd->irq_workers_active) != 0 &&
4582 time_before(jiffies, to));
4583
4584 if (!dd->sr)
4585 fsync_bdev(dd->bdev);
4586
4587 if (atomic_read(&dd->irq_workers_active) != 0) {
4588 dev_warn(&dd->pdev->dev,
4589 "Completion workers still active!\n");
4590 }
4591
4592 blk_set_queue_dying(dd->queue);
4593 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4594
4595 /* Clean up the block layer. */
4596 mtip_block_remove(dd);
4597
4598 if (dd->isr_workq) {
4599 flush_workqueue(dd->isr_workq);
4600 destroy_workqueue(dd->isr_workq);
4601 drop_cpu(dd->work[0].cpu_binding);
4602 drop_cpu(dd->work[1].cpu_binding);
4603 drop_cpu(dd->work[2].cpu_binding);
4604 }
4605
4606 pci_disable_msi(pdev);
4607
4608 spin_lock_irqsave(&dev_lock, flags);
4609 list_del_init(&dd->remove_list);
4610 spin_unlock_irqrestore(&dev_lock, flags);
4611
4612 kfree(dd);
4613
4614 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4615 pci_set_drvdata(pdev, NULL);
4616 }
4617
4618 /*
4619 * Called for each probed device when the device is suspended.
4620 *
4621 * return value
4622 * 0 Success
4623 * <0 Error
4624 */
4625 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4626 {
4627 int rv = 0;
4628 struct driver_data *dd = pci_get_drvdata(pdev);
4629
4630 if (!dd) {
4631 dev_err(&pdev->dev,
4632 "Driver private datastructure is NULL\n");
4633 return -EFAULT;
4634 }
4635
4636 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4637
4638 /* Disable ports & interrupts then send standby immediate */
4639 rv = mtip_block_suspend(dd);
4640 if (rv < 0) {
4641 dev_err(&pdev->dev,
4642 "Failed to suspend controller\n");
4643 return rv;
4644 }
4645
4646 /*
4647 * Save the pci config space to pdev structure &
4648 * disable the device
4649 */
4650 pci_save_state(pdev);
4651 pci_disable_device(pdev);
4652
4653 /* Move to Low power state*/
4654 pci_set_power_state(pdev, PCI_D3hot);
4655
4656 return rv;
4657 }
4658
4659 /*
4660 * Called for each probed device when the device is resumed.
4661 *
4662 * return value
4663 * 0 Success
4664 * <0 Error
4665 */
4666 static int mtip_pci_resume(struct pci_dev *pdev)
4667 {
4668 int rv = 0;
4669 struct driver_data *dd;
4670
4671 dd = pci_get_drvdata(pdev);
4672 if (!dd) {
4673 dev_err(&pdev->dev,
4674 "Driver private datastructure is NULL\n");
4675 return -EFAULT;
4676 }
4677
4678 /* Move the device to active State */
4679 pci_set_power_state(pdev, PCI_D0);
4680
4681 /* Restore PCI configuration space */
4682 pci_restore_state(pdev);
4683
4684 /* Enable the PCI device*/
4685 rv = pcim_enable_device(pdev);
4686 if (rv < 0) {
4687 dev_err(&pdev->dev,
4688 "Failed to enable card during resume\n");
4689 goto err;
4690 }
4691 pci_set_master(pdev);
4692
4693 /*
4694 * Calls hbaReset, initPort, & startPort function
4695 * then enables interrupts
4696 */
4697 rv = mtip_block_resume(dd);
4698 if (rv < 0)
4699 dev_err(&pdev->dev, "Unable to resume\n");
4700
4701 err:
4702 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4703
4704 return rv;
4705 }
4706
4707 /*
4708 * Shutdown routine
4709 *
4710 * return value
4711 * None
4712 */
4713 static void mtip_pci_shutdown(struct pci_dev *pdev)
4714 {
4715 struct driver_data *dd = pci_get_drvdata(pdev);
4716 if (dd)
4717 mtip_block_shutdown(dd);
4718 }
4719
4720 /* Table of device ids supported by this driver. */
4721 static const struct pci_device_id mtip_pci_tbl[] = {
4722 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4723 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4724 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4725 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4726 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4727 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4728 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
4729 { 0 }
4730 };
4731
4732 /* Structure that describes the PCI driver functions. */
4733 static struct pci_driver mtip_pci_driver = {
4734 .name = MTIP_DRV_NAME,
4735 .id_table = mtip_pci_tbl,
4736 .probe = mtip_pci_probe,
4737 .remove = mtip_pci_remove,
4738 .suspend = mtip_pci_suspend,
4739 .resume = mtip_pci_resume,
4740 .shutdown = mtip_pci_shutdown,
4741 };
4742
4743 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4744
4745 /*
4746 * Module initialization function.
4747 *
4748 * Called once when the module is loaded. This function allocates a major
4749 * block device number to the Cyclone devices and registers the PCI layer
4750 * of the driver.
4751 *
4752 * Return value
4753 * 0 on success else error code.
4754 */
4755 static int __init mtip_init(void)
4756 {
4757 int error;
4758
4759 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4760
4761 spin_lock_init(&dev_lock);
4762
4763 INIT_LIST_HEAD(&online_list);
4764 INIT_LIST_HEAD(&removing_list);
4765
4766 /* Allocate a major block device number to use with this driver. */
4767 error = register_blkdev(0, MTIP_DRV_NAME);
4768 if (error <= 0) {
4769 pr_err("Unable to register block device (%d)\n",
4770 error);
4771 return -EBUSY;
4772 }
4773 mtip_major = error;
4774
4775 dfs_parent = debugfs_create_dir("rssd", NULL);
4776 if (IS_ERR_OR_NULL(dfs_parent)) {
4777 pr_warn("Error creating debugfs parent\n");
4778 dfs_parent = NULL;
4779 }
4780 if (dfs_parent) {
4781 dfs_device_status = debugfs_create_file("device_status",
4782 S_IRUGO, dfs_parent, NULL,
4783 &mtip_device_status_fops);
4784 if (IS_ERR_OR_NULL(dfs_device_status)) {
4785 pr_err("Error creating device_status node\n");
4786 dfs_device_status = NULL;
4787 }
4788 }
4789
4790 /* Register our PCI operations. */
4791 error = pci_register_driver(&mtip_pci_driver);
4792 if (error) {
4793 debugfs_remove(dfs_parent);
4794 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4795 }
4796
4797 return error;
4798 }
4799
4800 /*
4801 * Module de-initialization function.
4802 *
4803 * Called once when the module is unloaded. This function deallocates
4804 * the major block device number allocated by mtip_init() and
4805 * unregisters the PCI layer of the driver.
4806 *
4807 * Return value
4808 * none
4809 */
4810 static void __exit mtip_exit(void)
4811 {
4812 /* Release the allocated major block device number. */
4813 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4814
4815 /* Unregister the PCI driver. */
4816 pci_unregister_driver(&mtip_pci_driver);
4817
4818 debugfs_remove_recursive(dfs_parent);
4819 }
4820
4821 MODULE_AUTHOR("Micron Technology, Inc");
4822 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4823 MODULE_LICENSE("GPL");
4824 MODULE_VERSION(MTIP_DRV_VERSION);
4825
4826 module_init(mtip_init);
4827 module_exit(mtip_exit);
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