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mtip32xx: avoid to read HOST_CAP from HW in .queue_rq()
[mirror_ubuntu-bionic-kernel.git] / drivers / block / mtip32xx / mtip32xx.c
1 /*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/blk-mq.h>
35 #include <linux/bio.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/idr.h>
38 #include <linux/kthread.h>
39 #include <../drivers/ata/ahci.h>
40 #include <linux/export.h>
41 #include <linux/debugfs.h>
42 #include <linux/prefetch.h>
43 #include "mtip32xx.h"
44
45 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
46
47 /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
48 #define AHCI_RX_FIS_SZ 0x100
49 #define AHCI_RX_FIS_OFFSET 0x0
50 #define AHCI_IDFY_SZ ATA_SECT_SIZE
51 #define AHCI_IDFY_OFFSET 0x400
52 #define AHCI_SECTBUF_SZ ATA_SECT_SIZE
53 #define AHCI_SECTBUF_OFFSET 0x800
54 #define AHCI_SMARTBUF_SZ ATA_SECT_SIZE
55 #define AHCI_SMARTBUF_OFFSET 0xC00
56 /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
57 #define BLOCK_DMA_ALLOC_SZ 4096
58
59 /* DMA region containing command table (should be 8192 bytes) */
60 #define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr)
61 #define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
62 #define AHCI_CMD_TBL_OFFSET 0x0
63
64 /* DMA region per command (contains header and SGL) */
65 #define AHCI_CMD_TBL_HDR_SZ 0x80
66 #define AHCI_CMD_TBL_HDR_OFFSET 0x0
67 #define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
68 #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
69 #define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
70
71
72 #define HOST_CAP_NZDMA (1 << 19)
73 #define HOST_HSORG 0xFC
74 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
75 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
76 #define HSORG_HWREV 0xFF00
77 #define HSORG_STYLE 0x8
78 #define HSORG_SLOTGROUPS 0x7
79
80 #define PORT_COMMAND_ISSUE 0x38
81 #define PORT_SDBV 0x7C
82
83 #define PORT_OFFSET 0x100
84 #define PORT_MEM_SIZE 0x80
85
86 #define PORT_IRQ_ERR \
87 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
88 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
89 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
90 PORT_IRQ_OVERFLOW)
91 #define PORT_IRQ_LEGACY \
92 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
93 #define PORT_IRQ_HANDLED \
94 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
95 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
96 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
97 #define DEF_PORT_IRQ \
98 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
99
100 /* product numbers */
101 #define MTIP_PRODUCT_UNKNOWN 0x00
102 #define MTIP_PRODUCT_ASICFPGA 0x11
103
104 /* Device instance number, incremented each time a device is probed. */
105 static int instance;
106
107 static struct list_head online_list;
108 static struct list_head removing_list;
109 static spinlock_t dev_lock;
110
111 /*
112 * Global variable used to hold the major block device number
113 * allocated in mtip_init().
114 */
115 static int mtip_major;
116 static struct dentry *dfs_parent;
117 static struct dentry *dfs_device_status;
118
119 static u32 cpu_use[NR_CPUS];
120
121 static DEFINE_SPINLOCK(rssd_index_lock);
122 static DEFINE_IDA(rssd_index_ida);
123
124 static int mtip_block_initialize(struct driver_data *dd);
125
126 #ifdef CONFIG_COMPAT
127 struct mtip_compat_ide_task_request_s {
128 __u8 io_ports[8];
129 __u8 hob_ports[8];
130 ide_reg_valid_t out_flags;
131 ide_reg_valid_t in_flags;
132 int data_phase;
133 int req_cmd;
134 compat_ulong_t out_size;
135 compat_ulong_t in_size;
136 };
137 #endif
138
139 /*
140 * This function check_for_surprise_removal is called
141 * while card is removed from the system and it will
142 * read the vendor id from the configration space
143 *
144 * @pdev Pointer to the pci_dev structure.
145 *
146 * return value
147 * true if device removed, else false
148 */
149 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
150 {
151 u16 vendor_id = 0;
152 struct driver_data *dd = pci_get_drvdata(pdev);
153
154 if (dd->sr)
155 return true;
156
157 /* Read the vendorID from the configuration space */
158 pci_read_config_word(pdev, 0x00, &vendor_id);
159 if (vendor_id == 0xFFFF) {
160 dd->sr = true;
161 if (dd->queue)
162 set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags);
163 else
164 dev_warn(&dd->pdev->dev,
165 "%s: dd->queue is NULL\n", __func__);
166 return true; /* device removed */
167 }
168
169 return false; /* device present */
170 }
171
172 /* we have to use runtime tag to setup command header */
173 static void mtip_init_cmd_header(struct request *rq)
174 {
175 struct driver_data *dd = rq->q->queuedata;
176 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
177
178 /* Point the command headers at the command tables. */
179 cmd->command_header = dd->port->command_list +
180 (sizeof(struct mtip_cmd_hdr) * rq->tag);
181 cmd->command_header_dma = dd->port->command_list_dma +
182 (sizeof(struct mtip_cmd_hdr) * rq->tag);
183
184 if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags))
185 cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16);
186
187 cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
188 }
189
190 static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd)
191 {
192 struct request *rq;
193
194 if (mtip_check_surprise_removal(dd->pdev))
195 return NULL;
196
197 rq = blk_mq_alloc_request(dd->queue, REQ_OP_DRV_IN, BLK_MQ_REQ_RESERVED);
198 if (IS_ERR(rq))
199 return NULL;
200
201 /* Internal cmd isn't submitted via .queue_rq */
202 mtip_init_cmd_header(rq);
203
204 return blk_mq_rq_to_pdu(rq);
205 }
206
207 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
208 unsigned int tag)
209 {
210 struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0];
211
212 return blk_mq_rq_to_pdu(blk_mq_tag_to_rq(hctx->tags, tag));
213 }
214
215 /*
216 * Reset the HBA (without sleeping)
217 *
218 * @dd Pointer to the driver data structure.
219 *
220 * return value
221 * 0 The reset was successful.
222 * -1 The HBA Reset bit did not clear.
223 */
224 static int mtip_hba_reset(struct driver_data *dd)
225 {
226 unsigned long timeout;
227
228 /* Set the reset bit */
229 writel(HOST_RESET, dd->mmio + HOST_CTL);
230
231 /* Flush */
232 readl(dd->mmio + HOST_CTL);
233
234 /*
235 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec
236 * is 1 sec but in LUN failure conditions, up to 10 secs are required
237 */
238 timeout = jiffies + msecs_to_jiffies(10000);
239 do {
240 mdelay(10);
241 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
242 return -1;
243
244 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
245 && time_before(jiffies, timeout));
246
247 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
248 return -1;
249
250 return 0;
251 }
252
253 /*
254 * Issue a command to the hardware.
255 *
256 * Set the appropriate bit in the s_active and Command Issue hardware
257 * registers, causing hardware command processing to begin.
258 *
259 * @port Pointer to the port structure.
260 * @tag The tag of the command to be issued.
261 *
262 * return value
263 * None
264 */
265 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
266 {
267 int group = tag >> 5;
268
269 /* guard SACT and CI registers */
270 spin_lock(&port->cmd_issue_lock[group]);
271 writel((1 << MTIP_TAG_BIT(tag)),
272 port->s_active[MTIP_TAG_INDEX(tag)]);
273 writel((1 << MTIP_TAG_BIT(tag)),
274 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
275 spin_unlock(&port->cmd_issue_lock[group]);
276 }
277
278 /*
279 * Enable/disable the reception of FIS
280 *
281 * @port Pointer to the port data structure
282 * @enable 1 to enable, 0 to disable
283 *
284 * return value
285 * Previous state: 1 enabled, 0 disabled
286 */
287 static int mtip_enable_fis(struct mtip_port *port, int enable)
288 {
289 u32 tmp;
290
291 /* enable FIS reception */
292 tmp = readl(port->mmio + PORT_CMD);
293 if (enable)
294 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
295 else
296 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
297
298 /* Flush */
299 readl(port->mmio + PORT_CMD);
300
301 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
302 }
303
304 /*
305 * Enable/disable the DMA engine
306 *
307 * @port Pointer to the port data structure
308 * @enable 1 to enable, 0 to disable
309 *
310 * return value
311 * Previous state: 1 enabled, 0 disabled.
312 */
313 static int mtip_enable_engine(struct mtip_port *port, int enable)
314 {
315 u32 tmp;
316
317 /* enable FIS reception */
318 tmp = readl(port->mmio + PORT_CMD);
319 if (enable)
320 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
321 else
322 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
323
324 readl(port->mmio + PORT_CMD);
325 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
326 }
327
328 /*
329 * Enables the port DMA engine and FIS reception.
330 *
331 * return value
332 * None
333 */
334 static inline void mtip_start_port(struct mtip_port *port)
335 {
336 /* Enable FIS reception */
337 mtip_enable_fis(port, 1);
338
339 /* Enable the DMA engine */
340 mtip_enable_engine(port, 1);
341 }
342
343 /*
344 * Deinitialize a port by disabling port interrupts, the DMA engine,
345 * and FIS reception.
346 *
347 * @port Pointer to the port structure
348 *
349 * return value
350 * None
351 */
352 static inline void mtip_deinit_port(struct mtip_port *port)
353 {
354 /* Disable interrupts on this port */
355 writel(0, port->mmio + PORT_IRQ_MASK);
356
357 /* Disable the DMA engine */
358 mtip_enable_engine(port, 0);
359
360 /* Disable FIS reception */
361 mtip_enable_fis(port, 0);
362 }
363
364 /*
365 * Initialize a port.
366 *
367 * This function deinitializes the port by calling mtip_deinit_port() and
368 * then initializes it by setting the command header and RX FIS addresses,
369 * clearing the SError register and any pending port interrupts before
370 * re-enabling the default set of port interrupts.
371 *
372 * @port Pointer to the port structure.
373 *
374 * return value
375 * None
376 */
377 static void mtip_init_port(struct mtip_port *port)
378 {
379 int i;
380 mtip_deinit_port(port);
381
382 /* Program the command list base and FIS base addresses */
383 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
384 writel((port->command_list_dma >> 16) >> 16,
385 port->mmio + PORT_LST_ADDR_HI);
386 writel((port->rxfis_dma >> 16) >> 16,
387 port->mmio + PORT_FIS_ADDR_HI);
388 set_bit(MTIP_PF_HOST_CAP_64, &port->flags);
389 }
390
391 writel(port->command_list_dma & 0xFFFFFFFF,
392 port->mmio + PORT_LST_ADDR);
393 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
394
395 /* Clear SError */
396 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
397
398 /* reset the completed registers.*/
399 for (i = 0; i < port->dd->slot_groups; i++)
400 writel(0xFFFFFFFF, port->completed[i]);
401
402 /* Clear any pending interrupts for this port */
403 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
404
405 /* Clear any pending interrupts on the HBA. */
406 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
407 port->dd->mmio + HOST_IRQ_STAT);
408
409 /* Enable port interrupts */
410 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
411 }
412
413 /*
414 * Restart a port
415 *
416 * @port Pointer to the port data structure.
417 *
418 * return value
419 * None
420 */
421 static void mtip_restart_port(struct mtip_port *port)
422 {
423 unsigned long timeout;
424
425 /* Disable the DMA engine */
426 mtip_enable_engine(port, 0);
427
428 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
429 timeout = jiffies + msecs_to_jiffies(500);
430 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
431 && time_before(jiffies, timeout))
432 ;
433
434 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
435 return;
436
437 /*
438 * Chip quirk: escalate to hba reset if
439 * PxCMD.CR not clear after 500 ms
440 */
441 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
442 dev_warn(&port->dd->pdev->dev,
443 "PxCMD.CR not clear, escalating reset\n");
444
445 if (mtip_hba_reset(port->dd))
446 dev_err(&port->dd->pdev->dev,
447 "HBA reset escalation failed.\n");
448
449 /* 30 ms delay before com reset to quiesce chip */
450 mdelay(30);
451 }
452
453 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
454
455 /* Set PxSCTL.DET */
456 writel(readl(port->mmio + PORT_SCR_CTL) |
457 1, port->mmio + PORT_SCR_CTL);
458 readl(port->mmio + PORT_SCR_CTL);
459
460 /* Wait 1 ms to quiesce chip function */
461 timeout = jiffies + msecs_to_jiffies(1);
462 while (time_before(jiffies, timeout))
463 ;
464
465 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
466 return;
467
468 /* Clear PxSCTL.DET */
469 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
470 port->mmio + PORT_SCR_CTL);
471 readl(port->mmio + PORT_SCR_CTL);
472
473 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
474 timeout = jiffies + msecs_to_jiffies(500);
475 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
476 && time_before(jiffies, timeout))
477 ;
478
479 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
480 return;
481
482 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
483 dev_warn(&port->dd->pdev->dev,
484 "COM reset failed\n");
485
486 mtip_init_port(port);
487 mtip_start_port(port);
488
489 }
490
491 static int mtip_device_reset(struct driver_data *dd)
492 {
493 int rv = 0;
494
495 if (mtip_check_surprise_removal(dd->pdev))
496 return 0;
497
498 if (mtip_hba_reset(dd) < 0)
499 rv = -EFAULT;
500
501 mdelay(1);
502 mtip_init_port(dd->port);
503 mtip_start_port(dd->port);
504
505 /* Enable interrupts on the HBA. */
506 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
507 dd->mmio + HOST_CTL);
508 return rv;
509 }
510
511 /*
512 * Helper function for tag logging
513 */
514 static void print_tags(struct driver_data *dd,
515 char *msg,
516 unsigned long *tagbits,
517 int cnt)
518 {
519 unsigned char tagmap[128];
520 int group, tagmap_len = 0;
521
522 memset(tagmap, 0, sizeof(tagmap));
523 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
524 tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
525 tagbits[group-1]);
526 dev_warn(&dd->pdev->dev,
527 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
528 }
529
530 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
531 dma_addr_t buffer_dma, unsigned int sectors);
532 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
533 struct smart_attr *attrib);
534
535 static void mtip_complete_command(struct mtip_cmd *cmd, blk_status_t status)
536 {
537 struct request *req = blk_mq_rq_from_pdu(cmd);
538
539 cmd->status = status;
540 blk_mq_complete_request(req);
541 }
542
543 /*
544 * Handle an error.
545 *
546 * @dd Pointer to the DRIVER_DATA structure.
547 *
548 * return value
549 * None
550 */
551 static void mtip_handle_tfe(struct driver_data *dd)
552 {
553 int group, tag, bit, reissue, rv;
554 struct mtip_port *port;
555 struct mtip_cmd *cmd;
556 u32 completed;
557 struct host_to_dev_fis *fis;
558 unsigned long tagaccum[SLOTBITS_IN_LONGS];
559 unsigned int cmd_cnt = 0;
560 unsigned char *buf;
561 char *fail_reason = NULL;
562 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
563
564 dev_warn(&dd->pdev->dev, "Taskfile error\n");
565
566 port = dd->port;
567
568 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
569 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
570 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
571 mtip_complete_command(cmd, BLK_STS_IOERR);
572 return;
573 }
574
575 /* clear the tag accumulator */
576 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
577
578 /* Loop through all the groups */
579 for (group = 0; group < dd->slot_groups; group++) {
580 completed = readl(port->completed[group]);
581
582 dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
583
584 /* clear completed status register in the hardware.*/
585 writel(completed, port->completed[group]);
586
587 /* Process successfully completed commands */
588 for (bit = 0; bit < 32 && completed; bit++) {
589 if (!(completed & (1<<bit)))
590 continue;
591 tag = (group << 5) + bit;
592
593 /* Skip the internal command slot */
594 if (tag == MTIP_TAG_INTERNAL)
595 continue;
596
597 cmd = mtip_cmd_from_tag(dd, tag);
598 mtip_complete_command(cmd, 0);
599 set_bit(tag, tagaccum);
600 cmd_cnt++;
601 }
602 }
603
604 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
605
606 /* Restart the port */
607 mdelay(20);
608 mtip_restart_port(port);
609
610 /* Trying to determine the cause of the error */
611 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
612 dd->port->log_buf,
613 dd->port->log_buf_dma, 1);
614 if (rv) {
615 dev_warn(&dd->pdev->dev,
616 "Error in READ LOG EXT (10h) command\n");
617 /* non-critical error, don't fail the load */
618 } else {
619 buf = (unsigned char *)dd->port->log_buf;
620 if (buf[259] & 0x1) {
621 dev_info(&dd->pdev->dev,
622 "Write protect bit is set.\n");
623 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
624 fail_all_ncq_write = 1;
625 fail_reason = "write protect";
626 }
627 if (buf[288] == 0xF7) {
628 dev_info(&dd->pdev->dev,
629 "Exceeded Tmax, drive in thermal shutdown.\n");
630 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
631 fail_all_ncq_cmds = 1;
632 fail_reason = "thermal shutdown";
633 }
634 if (buf[288] == 0xBF) {
635 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
636 dev_info(&dd->pdev->dev,
637 "Drive indicates rebuild has failed. Secure erase required.\n");
638 fail_all_ncq_cmds = 1;
639 fail_reason = "rebuild failed";
640 }
641 }
642
643 /* clear the tag accumulator */
644 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
645
646 /* Loop through all the groups */
647 for (group = 0; group < dd->slot_groups; group++) {
648 for (bit = 0; bit < 32; bit++) {
649 reissue = 1;
650 tag = (group << 5) + bit;
651 cmd = mtip_cmd_from_tag(dd, tag);
652
653 fis = (struct host_to_dev_fis *)cmd->command;
654
655 /* Should re-issue? */
656 if (tag == MTIP_TAG_INTERNAL ||
657 fis->command == ATA_CMD_SET_FEATURES)
658 reissue = 0;
659 else {
660 if (fail_all_ncq_cmds ||
661 (fail_all_ncq_write &&
662 fis->command == ATA_CMD_FPDMA_WRITE)) {
663 dev_warn(&dd->pdev->dev,
664 " Fail: %s w/tag %d [%s].\n",
665 fis->command == ATA_CMD_FPDMA_WRITE ?
666 "write" : "read",
667 tag,
668 fail_reason != NULL ?
669 fail_reason : "unknown");
670 mtip_complete_command(cmd, BLK_STS_MEDIUM);
671 continue;
672 }
673 }
674
675 /*
676 * First check if this command has
677 * exceeded its retries.
678 */
679 if (reissue && (cmd->retries-- > 0)) {
680
681 set_bit(tag, tagaccum);
682
683 /* Re-issue the command. */
684 mtip_issue_ncq_command(port, tag);
685
686 continue;
687 }
688
689 /* Retire a command that will not be reissued */
690 dev_warn(&port->dd->pdev->dev,
691 "retiring tag %d\n", tag);
692
693 mtip_complete_command(cmd, BLK_STS_IOERR);
694 }
695 }
696 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
697 }
698
699 /*
700 * Handle a set device bits interrupt
701 */
702 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
703 u32 completed)
704 {
705 struct driver_data *dd = port->dd;
706 int tag, bit;
707 struct mtip_cmd *command;
708
709 if (!completed) {
710 WARN_ON_ONCE(!completed);
711 return;
712 }
713 /* clear completed status register in the hardware.*/
714 writel(completed, port->completed[group]);
715
716 /* Process completed commands. */
717 for (bit = 0; (bit < 32) && completed; bit++) {
718 if (completed & 0x01) {
719 tag = (group << 5) | bit;
720
721 /* skip internal command slot. */
722 if (unlikely(tag == MTIP_TAG_INTERNAL))
723 continue;
724
725 command = mtip_cmd_from_tag(dd, tag);
726 mtip_complete_command(command, 0);
727 }
728 completed >>= 1;
729 }
730
731 /* If last, re-enable interrupts */
732 if (atomic_dec_return(&dd->irq_workers_active) == 0)
733 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
734 }
735
736 /*
737 * Process legacy pio and d2h interrupts
738 */
739 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
740 {
741 struct mtip_port *port = dd->port;
742 struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
743
744 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && cmd) {
745 int group = MTIP_TAG_INDEX(MTIP_TAG_INTERNAL);
746 int status = readl(port->cmd_issue[group]);
747
748 if (!(status & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))))
749 mtip_complete_command(cmd, 0);
750 }
751 }
752
753 /*
754 * Demux and handle errors
755 */
756 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
757 {
758 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
759 dev_warn(&dd->pdev->dev,
760 "Clearing PxSERR.DIAG.x\n");
761 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
762 }
763
764 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
765 dev_warn(&dd->pdev->dev,
766 "Clearing PxSERR.DIAG.n\n");
767 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
768 }
769
770 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
771 dev_warn(&dd->pdev->dev,
772 "Port stat errors %x unhandled\n",
773 (port_stat & ~PORT_IRQ_HANDLED));
774 if (mtip_check_surprise_removal(dd->pdev))
775 return;
776 }
777 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
778 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
779 wake_up_interruptible(&dd->port->svc_wait);
780 }
781 }
782
783 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
784 {
785 struct driver_data *dd = (struct driver_data *) data;
786 struct mtip_port *port = dd->port;
787 u32 hba_stat, port_stat;
788 int rv = IRQ_NONE;
789 int do_irq_enable = 1, i, workers;
790 struct mtip_work *twork;
791
792 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
793 if (hba_stat) {
794 rv = IRQ_HANDLED;
795
796 /* Acknowledge the interrupt status on the port.*/
797 port_stat = readl(port->mmio + PORT_IRQ_STAT);
798 if (unlikely(port_stat == 0xFFFFFFFF)) {
799 mtip_check_surprise_removal(dd->pdev);
800 return IRQ_HANDLED;
801 }
802 writel(port_stat, port->mmio + PORT_IRQ_STAT);
803
804 /* Demux port status */
805 if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
806 do_irq_enable = 0;
807 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
808
809 /* Start at 1: group zero is always local? */
810 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
811 i++) {
812 twork = &dd->work[i];
813 twork->completed = readl(port->completed[i]);
814 if (twork->completed)
815 workers++;
816 }
817
818 atomic_set(&dd->irq_workers_active, workers);
819 if (workers) {
820 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
821 twork = &dd->work[i];
822 if (twork->completed)
823 queue_work_on(
824 twork->cpu_binding,
825 dd->isr_workq,
826 &twork->work);
827 }
828
829 if (likely(dd->work[0].completed))
830 mtip_workq_sdbfx(port, 0,
831 dd->work[0].completed);
832
833 } else {
834 /*
835 * Chip quirk: SDB interrupt but nothing
836 * to complete
837 */
838 do_irq_enable = 1;
839 }
840 }
841
842 if (unlikely(port_stat & PORT_IRQ_ERR)) {
843 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
844 /* don't proceed further */
845 return IRQ_HANDLED;
846 }
847 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
848 &dd->dd_flag))
849 return rv;
850
851 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
852 }
853
854 if (unlikely(port_stat & PORT_IRQ_LEGACY))
855 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
856 }
857
858 /* acknowledge interrupt */
859 if (unlikely(do_irq_enable))
860 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
861
862 return rv;
863 }
864
865 /*
866 * HBA interrupt subroutine.
867 *
868 * @irq IRQ number.
869 * @instance Pointer to the driver data structure.
870 *
871 * return value
872 * IRQ_HANDLED A HBA interrupt was pending and handled.
873 * IRQ_NONE This interrupt was not for the HBA.
874 */
875 static irqreturn_t mtip_irq_handler(int irq, void *instance)
876 {
877 struct driver_data *dd = instance;
878
879 return mtip_handle_irq(dd);
880 }
881
882 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
883 {
884 writel(1 << MTIP_TAG_BIT(tag), port->cmd_issue[MTIP_TAG_INDEX(tag)]);
885 }
886
887 static bool mtip_pause_ncq(struct mtip_port *port,
888 struct host_to_dev_fis *fis)
889 {
890 struct host_to_dev_fis *reply;
891 unsigned long task_file_data;
892
893 reply = port->rxfis + RX_FIS_D2H_REG;
894 task_file_data = readl(port->mmio+PORT_TFDATA);
895
896 if ((task_file_data & 1))
897 return false;
898
899 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
900 port->ic_pause_timer = jiffies;
901 return true;
902 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
903 (fis->features == 0x03)) {
904 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
905 port->ic_pause_timer = jiffies;
906 return true;
907 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
908 ((fis->command == 0xFC) &&
909 (fis->features == 0x27 || fis->features == 0x72 ||
910 fis->features == 0x62 || fis->features == 0x26))) {
911 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
912 clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag);
913 /* Com reset after secure erase or lowlevel format */
914 mtip_restart_port(port);
915 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
916 return false;
917 }
918
919 return false;
920 }
921
922 static bool mtip_commands_active(struct mtip_port *port)
923 {
924 unsigned int active;
925 unsigned int n;
926
927 /*
928 * Ignore s_active bit 0 of array element 0.
929 * This bit will always be set
930 */
931 active = readl(port->s_active[0]) & 0xFFFFFFFE;
932 for (n = 1; n < port->dd->slot_groups; n++)
933 active |= readl(port->s_active[n]);
934
935 return active != 0;
936 }
937
938 /*
939 * Wait for port to quiesce
940 *
941 * @port Pointer to port data structure
942 * @timeout Max duration to wait (ms)
943 *
944 * return value
945 * 0 Success
946 * -EBUSY Commands still active
947 */
948 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
949 {
950 unsigned long to;
951 bool active = true;
952
953 blk_mq_stop_hw_queues(port->dd->queue);
954
955 to = jiffies + msecs_to_jiffies(timeout);
956 do {
957 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
958 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
959 msleep(20);
960 continue; /* svc thd is actively issuing commands */
961 }
962
963 msleep(100);
964
965 if (mtip_check_surprise_removal(port->dd->pdev))
966 goto err_fault;
967
968 active = mtip_commands_active(port);
969 if (!active)
970 break;
971 } while (time_before(jiffies, to));
972
973 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
974 return active ? -EBUSY : 0;
975 err_fault:
976 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
977 return -EFAULT;
978 }
979
980 struct mtip_int_cmd {
981 int fis_len;
982 dma_addr_t buffer;
983 int buf_len;
984 u32 opts;
985 };
986
987 /*
988 * Execute an internal command and wait for the completion.
989 *
990 * @port Pointer to the port data structure.
991 * @fis Pointer to the FIS that describes the command.
992 * @fis_len Length in WORDS of the FIS.
993 * @buffer DMA accessible for command data.
994 * @buf_len Length, in bytes, of the data buffer.
995 * @opts Command header options, excluding the FIS length
996 * and the number of PRD entries.
997 * @timeout Time in ms to wait for the command to complete.
998 *
999 * return value
1000 * 0 Command completed successfully.
1001 * -EFAULT The buffer address is not correctly aligned.
1002 * -EBUSY Internal command or other IO in progress.
1003 * -EAGAIN Time out waiting for command to complete.
1004 */
1005 static int mtip_exec_internal_command(struct mtip_port *port,
1006 struct host_to_dev_fis *fis,
1007 int fis_len,
1008 dma_addr_t buffer,
1009 int buf_len,
1010 u32 opts,
1011 unsigned long timeout)
1012 {
1013 struct mtip_cmd *int_cmd;
1014 struct driver_data *dd = port->dd;
1015 struct request *rq;
1016 struct mtip_int_cmd icmd = {
1017 .fis_len = fis_len,
1018 .buffer = buffer,
1019 .buf_len = buf_len,
1020 .opts = opts
1021 };
1022 int rv = 0;
1023 unsigned long start;
1024
1025 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1026 if (buffer & 0x00000007) {
1027 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
1028 return -EFAULT;
1029 }
1030
1031 int_cmd = mtip_get_int_command(dd);
1032 if (!int_cmd) {
1033 dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n");
1034 return -EFAULT;
1035 }
1036 rq = blk_mq_rq_from_pdu(int_cmd);
1037 rq->special = &icmd;
1038
1039 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1040
1041 if (fis->command == ATA_CMD_SEC_ERASE_PREP)
1042 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1043
1044 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1045
1046 if (fis->command != ATA_CMD_STANDBYNOW1) {
1047 /* wait for io to complete if non atomic */
1048 if (mtip_quiesce_io(port, MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) {
1049 dev_warn(&dd->pdev->dev, "Failed to quiesce IO\n");
1050 blk_mq_free_request(rq);
1051 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1052 wake_up_interruptible(&port->svc_wait);
1053 return -EBUSY;
1054 }
1055 }
1056
1057 /* Copy the command to the command table */
1058 memcpy(int_cmd->command, fis, fis_len*4);
1059
1060 start = jiffies;
1061 rq->timeout = timeout;
1062
1063 /* insert request and run queue */
1064 blk_execute_rq(rq->q, NULL, rq, true);
1065
1066 if (int_cmd->status) {
1067 dev_err(&dd->pdev->dev, "Internal command [%02X] failed %d\n",
1068 fis->command, int_cmd->status);
1069 rv = -EIO;
1070
1071 if (mtip_check_surprise_removal(dd->pdev) ||
1072 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1073 &dd->dd_flag)) {
1074 dev_err(&dd->pdev->dev,
1075 "Internal command [%02X] wait returned due to SR\n",
1076 fis->command);
1077 rv = -ENXIO;
1078 goto exec_ic_exit;
1079 }
1080 mtip_device_reset(dd); /* recover from timeout issue */
1081 rv = -EAGAIN;
1082 goto exec_ic_exit;
1083 }
1084
1085 if (readl(port->cmd_issue[MTIP_TAG_INDEX(MTIP_TAG_INTERNAL)])
1086 & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))) {
1087 rv = -ENXIO;
1088 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1089 mtip_device_reset(dd);
1090 rv = -EAGAIN;
1091 }
1092 }
1093 exec_ic_exit:
1094 /* Clear the allocated and active bits for the internal command. */
1095 blk_mq_free_request(rq);
1096 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1097 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1098 /* NCQ paused */
1099 return rv;
1100 }
1101 wake_up_interruptible(&port->svc_wait);
1102
1103 return rv;
1104 }
1105
1106 /*
1107 * Byte-swap ATA ID strings.
1108 *
1109 * ATA identify data contains strings in byte-swapped 16-bit words.
1110 * They must be swapped (on all architectures) to be usable as C strings.
1111 * This function swaps bytes in-place.
1112 *
1113 * @buf The buffer location of the string
1114 * @len The number of bytes to swap
1115 *
1116 * return value
1117 * None
1118 */
1119 static inline void ata_swap_string(u16 *buf, unsigned int len)
1120 {
1121 int i;
1122 for (i = 0; i < (len/2); i++)
1123 be16_to_cpus(&buf[i]);
1124 }
1125
1126 static void mtip_set_timeout(struct driver_data *dd,
1127 struct host_to_dev_fis *fis,
1128 unsigned int *timeout, u8 erasemode)
1129 {
1130 switch (fis->command) {
1131 case ATA_CMD_DOWNLOAD_MICRO:
1132 *timeout = 120000; /* 2 minutes */
1133 break;
1134 case ATA_CMD_SEC_ERASE_UNIT:
1135 case 0xFC:
1136 if (erasemode)
1137 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1138 else
1139 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1140 break;
1141 case ATA_CMD_STANDBYNOW1:
1142 *timeout = 120000; /* 2 minutes */
1143 break;
1144 case 0xF7:
1145 case 0xFA:
1146 *timeout = 60000; /* 60 seconds */
1147 break;
1148 case ATA_CMD_SMART:
1149 *timeout = 15000; /* 15 seconds */
1150 break;
1151 default:
1152 *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
1153 break;
1154 }
1155 }
1156
1157 /*
1158 * Request the device identity information.
1159 *
1160 * If a user space buffer is not specified, i.e. is NULL, the
1161 * identify information is still read from the drive and placed
1162 * into the identify data buffer (@e port->identify) in the
1163 * port data structure.
1164 * When the identify buffer contains valid identify information @e
1165 * port->identify_valid is non-zero.
1166 *
1167 * @port Pointer to the port structure.
1168 * @user_buffer A user space buffer where the identify data should be
1169 * copied.
1170 *
1171 * return value
1172 * 0 Command completed successfully.
1173 * -EFAULT An error occurred while coping data to the user buffer.
1174 * -1 Command failed.
1175 */
1176 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1177 {
1178 int rv = 0;
1179 struct host_to_dev_fis fis;
1180
1181 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1182 return -EFAULT;
1183
1184 /* Build the FIS. */
1185 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1186 fis.type = 0x27;
1187 fis.opts = 1 << 7;
1188 fis.command = ATA_CMD_ID_ATA;
1189
1190 /* Set the identify information as invalid. */
1191 port->identify_valid = 0;
1192
1193 /* Clear the identify information. */
1194 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1195
1196 /* Execute the command. */
1197 if (mtip_exec_internal_command(port,
1198 &fis,
1199 5,
1200 port->identify_dma,
1201 sizeof(u16) * ATA_ID_WORDS,
1202 0,
1203 MTIP_INT_CMD_TIMEOUT_MS)
1204 < 0) {
1205 rv = -1;
1206 goto out;
1207 }
1208
1209 /*
1210 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1211 * perform field-sensitive swapping on the string fields.
1212 * See the kernel use of ata_id_string() for proof of this.
1213 */
1214 #ifdef __LITTLE_ENDIAN
1215 ata_swap_string(port->identify + 27, 40); /* model string*/
1216 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1217 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1218 #else
1219 {
1220 int i;
1221 for (i = 0; i < ATA_ID_WORDS; i++)
1222 port->identify[i] = le16_to_cpu(port->identify[i]);
1223 }
1224 #endif
1225
1226 /* Check security locked state */
1227 if (port->identify[128] & 0x4)
1228 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1229 else
1230 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1231
1232 #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */
1233 /* Demux ID.DRAT & ID.RZAT to determine trim support */
1234 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1235 port->dd->trim_supp = true;
1236 else
1237 #endif
1238 port->dd->trim_supp = false;
1239
1240 /* Set the identify buffer as valid. */
1241 port->identify_valid = 1;
1242
1243 if (user_buffer) {
1244 if (copy_to_user(
1245 user_buffer,
1246 port->identify,
1247 ATA_ID_WORDS * sizeof(u16))) {
1248 rv = -EFAULT;
1249 goto out;
1250 }
1251 }
1252
1253 out:
1254 return rv;
1255 }
1256
1257 /*
1258 * Issue a standby immediate command to the device.
1259 *
1260 * @port Pointer to the port structure.
1261 *
1262 * return value
1263 * 0 Command was executed successfully.
1264 * -1 An error occurred while executing the command.
1265 */
1266 static int mtip_standby_immediate(struct mtip_port *port)
1267 {
1268 int rv;
1269 struct host_to_dev_fis fis;
1270 unsigned long start;
1271 unsigned int timeout;
1272
1273 /* Build the FIS. */
1274 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1275 fis.type = 0x27;
1276 fis.opts = 1 << 7;
1277 fis.command = ATA_CMD_STANDBYNOW1;
1278
1279 mtip_set_timeout(port->dd, &fis, &timeout, 0);
1280
1281 start = jiffies;
1282 rv = mtip_exec_internal_command(port,
1283 &fis,
1284 5,
1285 0,
1286 0,
1287 0,
1288 timeout);
1289 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1290 jiffies_to_msecs(jiffies - start));
1291 if (rv)
1292 dev_warn(&port->dd->pdev->dev,
1293 "STANDBY IMMEDIATE command failed.\n");
1294
1295 return rv;
1296 }
1297
1298 /*
1299 * Issue a READ LOG EXT command to the device.
1300 *
1301 * @port pointer to the port structure.
1302 * @page page number to fetch
1303 * @buffer pointer to buffer
1304 * @buffer_dma dma address corresponding to @buffer
1305 * @sectors page length to fetch, in sectors
1306 *
1307 * return value
1308 * @rv return value from mtip_exec_internal_command()
1309 */
1310 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1311 dma_addr_t buffer_dma, unsigned int sectors)
1312 {
1313 struct host_to_dev_fis fis;
1314
1315 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1316 fis.type = 0x27;
1317 fis.opts = 1 << 7;
1318 fis.command = ATA_CMD_READ_LOG_EXT;
1319 fis.sect_count = sectors & 0xFF;
1320 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1321 fis.lba_low = page;
1322 fis.lba_mid = 0;
1323 fis.device = ATA_DEVICE_OBS;
1324
1325 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1326
1327 return mtip_exec_internal_command(port,
1328 &fis,
1329 5,
1330 buffer_dma,
1331 sectors * ATA_SECT_SIZE,
1332 0,
1333 MTIP_INT_CMD_TIMEOUT_MS);
1334 }
1335
1336 /*
1337 * Issue a SMART READ DATA command to the device.
1338 *
1339 * @port pointer to the port structure.
1340 * @buffer pointer to buffer
1341 * @buffer_dma dma address corresponding to @buffer
1342 *
1343 * return value
1344 * @rv return value from mtip_exec_internal_command()
1345 */
1346 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1347 dma_addr_t buffer_dma)
1348 {
1349 struct host_to_dev_fis fis;
1350
1351 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1352 fis.type = 0x27;
1353 fis.opts = 1 << 7;
1354 fis.command = ATA_CMD_SMART;
1355 fis.features = 0xD0;
1356 fis.sect_count = 1;
1357 fis.lba_mid = 0x4F;
1358 fis.lba_hi = 0xC2;
1359 fis.device = ATA_DEVICE_OBS;
1360
1361 return mtip_exec_internal_command(port,
1362 &fis,
1363 5,
1364 buffer_dma,
1365 ATA_SECT_SIZE,
1366 0,
1367 15000);
1368 }
1369
1370 /*
1371 * Get the value of a smart attribute
1372 *
1373 * @port pointer to the port structure
1374 * @id attribute number
1375 * @attrib pointer to return attrib information corresponding to @id
1376 *
1377 * return value
1378 * -EINVAL NULL buffer passed or unsupported attribute @id.
1379 * -EPERM Identify data not valid, SMART not supported or not enabled
1380 */
1381 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1382 struct smart_attr *attrib)
1383 {
1384 int rv, i;
1385 struct smart_attr *pattr;
1386
1387 if (!attrib)
1388 return -EINVAL;
1389
1390 if (!port->identify_valid) {
1391 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1392 return -EPERM;
1393 }
1394 if (!(port->identify[82] & 0x1)) {
1395 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1396 return -EPERM;
1397 }
1398 if (!(port->identify[85] & 0x1)) {
1399 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1400 return -EPERM;
1401 }
1402
1403 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1404 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1405 if (rv) {
1406 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1407 return rv;
1408 }
1409
1410 pattr = (struct smart_attr *)(port->smart_buf + 2);
1411 for (i = 0; i < 29; i++, pattr++)
1412 if (pattr->attr_id == id) {
1413 memcpy(attrib, pattr, sizeof(struct smart_attr));
1414 break;
1415 }
1416
1417 if (i == 29) {
1418 dev_warn(&port->dd->pdev->dev,
1419 "Query for invalid SMART attribute ID\n");
1420 rv = -EINVAL;
1421 }
1422
1423 return rv;
1424 }
1425
1426 /*
1427 * Trim unused sectors
1428 *
1429 * @dd pointer to driver_data structure
1430 * @lba starting lba
1431 * @len # of 512b sectors to trim
1432 *
1433 * return value
1434 * -ENOMEM Out of dma memory
1435 * -EINVAL Invalid parameters passed in, trim not supported
1436 * -EIO Error submitting trim request to hw
1437 */
1438 static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
1439 unsigned int len)
1440 {
1441 int i, rv = 0;
1442 u64 tlba, tlen, sect_left;
1443 struct mtip_trim_entry *buf;
1444 dma_addr_t dma_addr;
1445 struct host_to_dev_fis fis;
1446
1447 if (!len || dd->trim_supp == false)
1448 return -EINVAL;
1449
1450 /* Trim request too big */
1451 WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES));
1452
1453 /* Trim request not aligned on 4k boundary */
1454 WARN_ON(len % 8 != 0);
1455
1456 /* Warn if vu_trim structure is too big */
1457 WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE);
1458
1459 /* Allocate a DMA buffer for the trim structure */
1460 buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr,
1461 GFP_KERNEL);
1462 if (!buf)
1463 return -ENOMEM;
1464 memset(buf, 0, ATA_SECT_SIZE);
1465
1466 for (i = 0, sect_left = len, tlba = lba;
1467 i < MTIP_MAX_TRIM_ENTRIES && sect_left;
1468 i++) {
1469 tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ?
1470 MTIP_MAX_TRIM_ENTRY_LEN :
1471 sect_left);
1472 buf[i].lba = __force_bit2int cpu_to_le32(tlba);
1473 buf[i].range = __force_bit2int cpu_to_le16(tlen);
1474 tlba += tlen;
1475 sect_left -= tlen;
1476 }
1477 WARN_ON(sect_left != 0);
1478
1479 /* Build the fis */
1480 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1481 fis.type = 0x27;
1482 fis.opts = 1 << 7;
1483 fis.command = 0xfb;
1484 fis.features = 0x60;
1485 fis.sect_count = 1;
1486 fis.device = ATA_DEVICE_OBS;
1487
1488 if (mtip_exec_internal_command(dd->port,
1489 &fis,
1490 5,
1491 dma_addr,
1492 ATA_SECT_SIZE,
1493 0,
1494 MTIP_TRIM_TIMEOUT_MS) < 0)
1495 rv = -EIO;
1496
1497 dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr);
1498 return rv;
1499 }
1500
1501 /*
1502 * Get the drive capacity.
1503 *
1504 * @dd Pointer to the device data structure.
1505 * @sectors Pointer to the variable that will receive the sector count.
1506 *
1507 * return value
1508 * 1 Capacity was returned successfully.
1509 * 0 The identify information is invalid.
1510 */
1511 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1512 {
1513 struct mtip_port *port = dd->port;
1514 u64 total, raw0, raw1, raw2, raw3;
1515 raw0 = port->identify[100];
1516 raw1 = port->identify[101];
1517 raw2 = port->identify[102];
1518 raw3 = port->identify[103];
1519 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1520 *sectors = total;
1521 return (bool) !!port->identify_valid;
1522 }
1523
1524 /*
1525 * Display the identify command data.
1526 *
1527 * @port Pointer to the port data structure.
1528 *
1529 * return value
1530 * None
1531 */
1532 static void mtip_dump_identify(struct mtip_port *port)
1533 {
1534 sector_t sectors;
1535 unsigned short revid;
1536 char cbuf[42];
1537
1538 if (!port->identify_valid)
1539 return;
1540
1541 strlcpy(cbuf, (char *)(port->identify+10), 21);
1542 dev_info(&port->dd->pdev->dev,
1543 "Serial No.: %s\n", cbuf);
1544
1545 strlcpy(cbuf, (char *)(port->identify+23), 9);
1546 dev_info(&port->dd->pdev->dev,
1547 "Firmware Ver.: %s\n", cbuf);
1548
1549 strlcpy(cbuf, (char *)(port->identify+27), 41);
1550 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1551
1552 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1553 port->identify[128],
1554 port->identify[128] & 0x4 ? "(LOCKED)" : "");
1555
1556 if (mtip_hw_get_capacity(port->dd, &sectors))
1557 dev_info(&port->dd->pdev->dev,
1558 "Capacity: %llu sectors (%llu MB)\n",
1559 (u64)sectors,
1560 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1561
1562 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1563 switch (revid & 0xFF) {
1564 case 0x1:
1565 strlcpy(cbuf, "A0", 3);
1566 break;
1567 case 0x3:
1568 strlcpy(cbuf, "A2", 3);
1569 break;
1570 default:
1571 strlcpy(cbuf, "?", 2);
1572 break;
1573 }
1574 dev_info(&port->dd->pdev->dev,
1575 "Card Type: %s\n", cbuf);
1576 }
1577
1578 /*
1579 * Map the commands scatter list into the command table.
1580 *
1581 * @command Pointer to the command.
1582 * @nents Number of scatter list entries.
1583 *
1584 * return value
1585 * None
1586 */
1587 static inline void fill_command_sg(struct driver_data *dd,
1588 struct mtip_cmd *command,
1589 int nents)
1590 {
1591 int n;
1592 unsigned int dma_len;
1593 struct mtip_cmd_sg *command_sg;
1594 struct scatterlist *sg = command->sg;
1595
1596 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1597
1598 for (n = 0; n < nents; n++) {
1599 dma_len = sg_dma_len(sg);
1600 if (dma_len > 0x400000)
1601 dev_err(&dd->pdev->dev,
1602 "DMA segment length truncated\n");
1603 command_sg->info = __force_bit2int
1604 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1605 command_sg->dba = __force_bit2int
1606 cpu_to_le32(sg_dma_address(sg));
1607 command_sg->dba_upper = __force_bit2int
1608 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1609 command_sg++;
1610 sg++;
1611 }
1612 }
1613
1614 /*
1615 * @brief Execute a drive command.
1616 *
1617 * return value 0 The command completed successfully.
1618 * return value -1 An error occurred while executing the command.
1619 */
1620 static int exec_drive_task(struct mtip_port *port, u8 *command)
1621 {
1622 struct host_to_dev_fis fis;
1623 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1624 unsigned int to;
1625
1626 /* Build the FIS. */
1627 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1628 fis.type = 0x27;
1629 fis.opts = 1 << 7;
1630 fis.command = command[0];
1631 fis.features = command[1];
1632 fis.sect_count = command[2];
1633 fis.sector = command[3];
1634 fis.cyl_low = command[4];
1635 fis.cyl_hi = command[5];
1636 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1637
1638 mtip_set_timeout(port->dd, &fis, &to, 0);
1639
1640 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1641 __func__,
1642 command[0],
1643 command[1],
1644 command[2],
1645 command[3],
1646 command[4],
1647 command[5],
1648 command[6]);
1649
1650 /* Execute the command. */
1651 if (mtip_exec_internal_command(port,
1652 &fis,
1653 5,
1654 0,
1655 0,
1656 0,
1657 to) < 0) {
1658 return -1;
1659 }
1660
1661 command[0] = reply->command; /* Status*/
1662 command[1] = reply->features; /* Error*/
1663 command[4] = reply->cyl_low;
1664 command[5] = reply->cyl_hi;
1665
1666 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1667 __func__,
1668 command[0],
1669 command[1],
1670 command[4],
1671 command[5]);
1672
1673 return 0;
1674 }
1675
1676 /*
1677 * @brief Execute a drive command.
1678 *
1679 * @param port Pointer to the port data structure.
1680 * @param command Pointer to the user specified command parameters.
1681 * @param user_buffer Pointer to the user space buffer where read sector
1682 * data should be copied.
1683 *
1684 * return value 0 The command completed successfully.
1685 * return value -EFAULT An error occurred while copying the completion
1686 * data to the user space buffer.
1687 * return value -1 An error occurred while executing the command.
1688 */
1689 static int exec_drive_command(struct mtip_port *port, u8 *command,
1690 void __user *user_buffer)
1691 {
1692 struct host_to_dev_fis fis;
1693 struct host_to_dev_fis *reply;
1694 u8 *buf = NULL;
1695 dma_addr_t dma_addr = 0;
1696 int rv = 0, xfer_sz = command[3];
1697 unsigned int to;
1698
1699 if (xfer_sz) {
1700 if (!user_buffer)
1701 return -EFAULT;
1702
1703 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1704 ATA_SECT_SIZE * xfer_sz,
1705 &dma_addr,
1706 GFP_KERNEL);
1707 if (!buf) {
1708 dev_err(&port->dd->pdev->dev,
1709 "Memory allocation failed (%d bytes)\n",
1710 ATA_SECT_SIZE * xfer_sz);
1711 return -ENOMEM;
1712 }
1713 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1714 }
1715
1716 /* Build the FIS. */
1717 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1718 fis.type = 0x27;
1719 fis.opts = 1 << 7;
1720 fis.command = command[0];
1721 fis.features = command[2];
1722 fis.sect_count = command[3];
1723 if (fis.command == ATA_CMD_SMART) {
1724 fis.sector = command[1];
1725 fis.cyl_low = 0x4F;
1726 fis.cyl_hi = 0xC2;
1727 }
1728
1729 mtip_set_timeout(port->dd, &fis, &to, 0);
1730
1731 if (xfer_sz)
1732 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1733 else
1734 reply = (port->rxfis + RX_FIS_D2H_REG);
1735
1736 dbg_printk(MTIP_DRV_NAME
1737 " %s: User Command: cmd %x, sect %x, "
1738 "feat %x, sectcnt %x\n",
1739 __func__,
1740 command[0],
1741 command[1],
1742 command[2],
1743 command[3]);
1744
1745 /* Execute the command. */
1746 if (mtip_exec_internal_command(port,
1747 &fis,
1748 5,
1749 (xfer_sz ? dma_addr : 0),
1750 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
1751 0,
1752 to)
1753 < 0) {
1754 rv = -EFAULT;
1755 goto exit_drive_command;
1756 }
1757
1758 /* Collect the completion status. */
1759 command[0] = reply->command; /* Status*/
1760 command[1] = reply->features; /* Error*/
1761 command[2] = reply->sect_count;
1762
1763 dbg_printk(MTIP_DRV_NAME
1764 " %s: Completion Status: stat %x, "
1765 "err %x, nsect %x\n",
1766 __func__,
1767 command[0],
1768 command[1],
1769 command[2]);
1770
1771 if (xfer_sz) {
1772 if (copy_to_user(user_buffer,
1773 buf,
1774 ATA_SECT_SIZE * command[3])) {
1775 rv = -EFAULT;
1776 goto exit_drive_command;
1777 }
1778 }
1779 exit_drive_command:
1780 if (buf)
1781 dmam_free_coherent(&port->dd->pdev->dev,
1782 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1783 return rv;
1784 }
1785
1786 /*
1787 * Indicates whether a command has a single sector payload.
1788 *
1789 * @command passed to the device to perform the certain event.
1790 * @features passed to the device to perform the certain event.
1791 *
1792 * return value
1793 * 1 command is one that always has a single sector payload,
1794 * regardless of the value in the Sector Count field.
1795 * 0 otherwise
1796 *
1797 */
1798 static unsigned int implicit_sector(unsigned char command,
1799 unsigned char features)
1800 {
1801 unsigned int rv = 0;
1802
1803 /* list of commands that have an implicit sector count of 1 */
1804 switch (command) {
1805 case ATA_CMD_SEC_SET_PASS:
1806 case ATA_CMD_SEC_UNLOCK:
1807 case ATA_CMD_SEC_ERASE_PREP:
1808 case ATA_CMD_SEC_ERASE_UNIT:
1809 case ATA_CMD_SEC_FREEZE_LOCK:
1810 case ATA_CMD_SEC_DISABLE_PASS:
1811 case ATA_CMD_PMP_READ:
1812 case ATA_CMD_PMP_WRITE:
1813 rv = 1;
1814 break;
1815 case ATA_CMD_SET_MAX:
1816 if (features == ATA_SET_MAX_UNLOCK)
1817 rv = 1;
1818 break;
1819 case ATA_CMD_SMART:
1820 if ((features == ATA_SMART_READ_VALUES) ||
1821 (features == ATA_SMART_READ_THRESHOLDS))
1822 rv = 1;
1823 break;
1824 case ATA_CMD_CONF_OVERLAY:
1825 if ((features == ATA_DCO_IDENTIFY) ||
1826 (features == ATA_DCO_SET))
1827 rv = 1;
1828 break;
1829 }
1830 return rv;
1831 }
1832
1833 /*
1834 * Executes a taskfile
1835 * See ide_taskfile_ioctl() for derivation
1836 */
1837 static int exec_drive_taskfile(struct driver_data *dd,
1838 void __user *buf,
1839 ide_task_request_t *req_task,
1840 int outtotal)
1841 {
1842 struct host_to_dev_fis fis;
1843 struct host_to_dev_fis *reply;
1844 u8 *outbuf = NULL;
1845 u8 *inbuf = NULL;
1846 dma_addr_t outbuf_dma = 0;
1847 dma_addr_t inbuf_dma = 0;
1848 dma_addr_t dma_buffer = 0;
1849 int err = 0;
1850 unsigned int taskin = 0;
1851 unsigned int taskout = 0;
1852 u8 nsect = 0;
1853 unsigned int timeout;
1854 unsigned int force_single_sector;
1855 unsigned int transfer_size;
1856 unsigned long task_file_data;
1857 int intotal = outtotal + req_task->out_size;
1858 int erasemode = 0;
1859
1860 taskout = req_task->out_size;
1861 taskin = req_task->in_size;
1862 /* 130560 = 512 * 0xFF*/
1863 if (taskin > 130560 || taskout > 130560)
1864 return -EINVAL;
1865
1866 if (taskout) {
1867 outbuf = memdup_user(buf + outtotal, taskout);
1868 if (IS_ERR(outbuf))
1869 return PTR_ERR(outbuf);
1870
1871 outbuf_dma = pci_map_single(dd->pdev,
1872 outbuf,
1873 taskout,
1874 DMA_TO_DEVICE);
1875 if (pci_dma_mapping_error(dd->pdev, outbuf_dma)) {
1876 err = -ENOMEM;
1877 goto abort;
1878 }
1879 dma_buffer = outbuf_dma;
1880 }
1881
1882 if (taskin) {
1883 inbuf = memdup_user(buf + intotal, taskin);
1884 if (IS_ERR(inbuf)) {
1885 err = PTR_ERR(inbuf);
1886 inbuf = NULL;
1887 goto abort;
1888 }
1889 inbuf_dma = pci_map_single(dd->pdev,
1890 inbuf,
1891 taskin, DMA_FROM_DEVICE);
1892 if (pci_dma_mapping_error(dd->pdev, inbuf_dma)) {
1893 err = -ENOMEM;
1894 goto abort;
1895 }
1896 dma_buffer = inbuf_dma;
1897 }
1898
1899 /* only supports PIO and non-data commands from this ioctl. */
1900 switch (req_task->data_phase) {
1901 case TASKFILE_OUT:
1902 nsect = taskout / ATA_SECT_SIZE;
1903 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1904 break;
1905 case TASKFILE_IN:
1906 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1907 break;
1908 case TASKFILE_NO_DATA:
1909 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
1910 break;
1911 default:
1912 err = -EINVAL;
1913 goto abort;
1914 }
1915
1916 /* Build the FIS. */
1917 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1918
1919 fis.type = 0x27;
1920 fis.opts = 1 << 7;
1921 fis.command = req_task->io_ports[7];
1922 fis.features = req_task->io_ports[1];
1923 fis.sect_count = req_task->io_ports[2];
1924 fis.lba_low = req_task->io_ports[3];
1925 fis.lba_mid = req_task->io_ports[4];
1926 fis.lba_hi = req_task->io_ports[5];
1927 /* Clear the dev bit*/
1928 fis.device = req_task->io_ports[6] & ~0x10;
1929
1930 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
1931 req_task->in_flags.all =
1932 IDE_TASKFILE_STD_IN_FLAGS |
1933 (IDE_HOB_STD_IN_FLAGS << 8);
1934 fis.lba_low_ex = req_task->hob_ports[3];
1935 fis.lba_mid_ex = req_task->hob_ports[4];
1936 fis.lba_hi_ex = req_task->hob_ports[5];
1937 fis.features_ex = req_task->hob_ports[1];
1938 fis.sect_cnt_ex = req_task->hob_ports[2];
1939
1940 } else {
1941 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
1942 }
1943
1944 force_single_sector = implicit_sector(fis.command, fis.features);
1945
1946 if ((taskin || taskout) && (!fis.sect_count)) {
1947 if (nsect)
1948 fis.sect_count = nsect;
1949 else {
1950 if (!force_single_sector) {
1951 dev_warn(&dd->pdev->dev,
1952 "data movement but "
1953 "sect_count is 0\n");
1954 err = -EINVAL;
1955 goto abort;
1956 }
1957 }
1958 }
1959
1960 dbg_printk(MTIP_DRV_NAME
1961 " %s: cmd %x, feat %x, nsect %x,"
1962 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
1963 " head/dev %x\n",
1964 __func__,
1965 fis.command,
1966 fis.features,
1967 fis.sect_count,
1968 fis.lba_low,
1969 fis.lba_mid,
1970 fis.lba_hi,
1971 fis.device);
1972
1973 /* check for erase mode support during secure erase.*/
1974 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
1975 (outbuf[0] & MTIP_SEC_ERASE_MODE)) {
1976 erasemode = 1;
1977 }
1978
1979 mtip_set_timeout(dd, &fis, &timeout, erasemode);
1980
1981 /* Determine the correct transfer size.*/
1982 if (force_single_sector)
1983 transfer_size = ATA_SECT_SIZE;
1984 else
1985 transfer_size = ATA_SECT_SIZE * fis.sect_count;
1986
1987 /* Execute the command.*/
1988 if (mtip_exec_internal_command(dd->port,
1989 &fis,
1990 5,
1991 dma_buffer,
1992 transfer_size,
1993 0,
1994 timeout) < 0) {
1995 err = -EIO;
1996 goto abort;
1997 }
1998
1999 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2000
2001 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2002 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2003 req_task->io_ports[7] = reply->control;
2004 } else {
2005 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2006 req_task->io_ports[7] = reply->command;
2007 }
2008
2009 /* reclaim the DMA buffers.*/
2010 if (inbuf_dma)
2011 pci_unmap_single(dd->pdev, inbuf_dma,
2012 taskin, DMA_FROM_DEVICE);
2013 if (outbuf_dma)
2014 pci_unmap_single(dd->pdev, outbuf_dma,
2015 taskout, DMA_TO_DEVICE);
2016 inbuf_dma = 0;
2017 outbuf_dma = 0;
2018
2019 /* return the ATA registers to the caller.*/
2020 req_task->io_ports[1] = reply->features;
2021 req_task->io_ports[2] = reply->sect_count;
2022 req_task->io_ports[3] = reply->lba_low;
2023 req_task->io_ports[4] = reply->lba_mid;
2024 req_task->io_ports[5] = reply->lba_hi;
2025 req_task->io_ports[6] = reply->device;
2026
2027 if (req_task->out_flags.all & 1) {
2028
2029 req_task->hob_ports[3] = reply->lba_low_ex;
2030 req_task->hob_ports[4] = reply->lba_mid_ex;
2031 req_task->hob_ports[5] = reply->lba_hi_ex;
2032 req_task->hob_ports[1] = reply->features_ex;
2033 req_task->hob_ports[2] = reply->sect_cnt_ex;
2034 }
2035 dbg_printk(MTIP_DRV_NAME
2036 " %s: Completion: stat %x,"
2037 "err %x, sect_cnt %x, lbalo %x,"
2038 "lbamid %x, lbahi %x, dev %x\n",
2039 __func__,
2040 req_task->io_ports[7],
2041 req_task->io_ports[1],
2042 req_task->io_ports[2],
2043 req_task->io_ports[3],
2044 req_task->io_ports[4],
2045 req_task->io_ports[5],
2046 req_task->io_ports[6]);
2047
2048 if (taskout) {
2049 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2050 err = -EFAULT;
2051 goto abort;
2052 }
2053 }
2054 if (taskin) {
2055 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2056 err = -EFAULT;
2057 goto abort;
2058 }
2059 }
2060 abort:
2061 if (inbuf_dma)
2062 pci_unmap_single(dd->pdev, inbuf_dma,
2063 taskin, DMA_FROM_DEVICE);
2064 if (outbuf_dma)
2065 pci_unmap_single(dd->pdev, outbuf_dma,
2066 taskout, DMA_TO_DEVICE);
2067 kfree(outbuf);
2068 kfree(inbuf);
2069
2070 return err;
2071 }
2072
2073 /*
2074 * Handle IOCTL calls from the Block Layer.
2075 *
2076 * This function is called by the Block Layer when it receives an IOCTL
2077 * command that it does not understand. If the IOCTL command is not supported
2078 * this function returns -ENOTTY.
2079 *
2080 * @dd Pointer to the driver data structure.
2081 * @cmd IOCTL command passed from the Block Layer.
2082 * @arg IOCTL argument passed from the Block Layer.
2083 *
2084 * return value
2085 * 0 The IOCTL completed successfully.
2086 * -ENOTTY The specified command is not supported.
2087 * -EFAULT An error occurred copying data to a user space buffer.
2088 * -EIO An error occurred while executing the command.
2089 */
2090 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2091 unsigned long arg)
2092 {
2093 switch (cmd) {
2094 case HDIO_GET_IDENTITY:
2095 {
2096 if (copy_to_user((void __user *)arg, dd->port->identify,
2097 sizeof(u16) * ATA_ID_WORDS))
2098 return -EFAULT;
2099 break;
2100 }
2101 case HDIO_DRIVE_CMD:
2102 {
2103 u8 drive_command[4];
2104
2105 /* Copy the user command info to our buffer. */
2106 if (copy_from_user(drive_command,
2107 (void __user *) arg,
2108 sizeof(drive_command)))
2109 return -EFAULT;
2110
2111 /* Execute the drive command. */
2112 if (exec_drive_command(dd->port,
2113 drive_command,
2114 (void __user *) (arg+4)))
2115 return -EIO;
2116
2117 /* Copy the status back to the users buffer. */
2118 if (copy_to_user((void __user *) arg,
2119 drive_command,
2120 sizeof(drive_command)))
2121 return -EFAULT;
2122
2123 break;
2124 }
2125 case HDIO_DRIVE_TASK:
2126 {
2127 u8 drive_command[7];
2128
2129 /* Copy the user command info to our buffer. */
2130 if (copy_from_user(drive_command,
2131 (void __user *) arg,
2132 sizeof(drive_command)))
2133 return -EFAULT;
2134
2135 /* Execute the drive command. */
2136 if (exec_drive_task(dd->port, drive_command))
2137 return -EIO;
2138
2139 /* Copy the status back to the users buffer. */
2140 if (copy_to_user((void __user *) arg,
2141 drive_command,
2142 sizeof(drive_command)))
2143 return -EFAULT;
2144
2145 break;
2146 }
2147 case HDIO_DRIVE_TASKFILE: {
2148 ide_task_request_t req_task;
2149 int ret, outtotal;
2150
2151 if (copy_from_user(&req_task, (void __user *) arg,
2152 sizeof(req_task)))
2153 return -EFAULT;
2154
2155 outtotal = sizeof(req_task);
2156
2157 ret = exec_drive_taskfile(dd, (void __user *) arg,
2158 &req_task, outtotal);
2159
2160 if (copy_to_user((void __user *) arg, &req_task,
2161 sizeof(req_task)))
2162 return -EFAULT;
2163
2164 return ret;
2165 }
2166
2167 default:
2168 return -EINVAL;
2169 }
2170 return 0;
2171 }
2172
2173 /*
2174 * Submit an IO to the hw
2175 *
2176 * This function is called by the block layer to issue an io
2177 * to the device. Upon completion, the callback function will
2178 * be called with the data parameter passed as the callback data.
2179 *
2180 * @dd Pointer to the driver data structure.
2181 * @start First sector to read.
2182 * @nsect Number of sectors to read.
2183 * @nents Number of entries in scatter list for the read command.
2184 * @tag The tag of this read command.
2185 * @callback Pointer to the function that should be called
2186 * when the read completes.
2187 * @data Callback data passed to the callback function
2188 * when the read completes.
2189 * @dir Direction (read or write)
2190 *
2191 * return value
2192 * None
2193 */
2194 static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
2195 struct mtip_cmd *command, int nents,
2196 struct blk_mq_hw_ctx *hctx)
2197 {
2198 struct host_to_dev_fis *fis;
2199 struct mtip_port *port = dd->port;
2200 int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2201 u64 start = blk_rq_pos(rq);
2202 unsigned int nsect = blk_rq_sectors(rq);
2203
2204 /* Map the scatter list for DMA access */
2205 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2206
2207 prefetch(&port->flags);
2208
2209 command->scatter_ents = nents;
2210
2211 /*
2212 * The number of retries for this command before it is
2213 * reported as a failure to the upper layers.
2214 */
2215 command->retries = MTIP_MAX_RETRIES;
2216
2217 /* Fill out fis */
2218 fis = command->command;
2219 fis->type = 0x27;
2220 fis->opts = 1 << 7;
2221 if (dma_dir == DMA_FROM_DEVICE)
2222 fis->command = ATA_CMD_FPDMA_READ;
2223 else
2224 fis->command = ATA_CMD_FPDMA_WRITE;
2225 fis->lba_low = start & 0xFF;
2226 fis->lba_mid = (start >> 8) & 0xFF;
2227 fis->lba_hi = (start >> 16) & 0xFF;
2228 fis->lba_low_ex = (start >> 24) & 0xFF;
2229 fis->lba_mid_ex = (start >> 32) & 0xFF;
2230 fis->lba_hi_ex = (start >> 40) & 0xFF;
2231 fis->device = 1 << 6;
2232 fis->features = nsect & 0xFF;
2233 fis->features_ex = (nsect >> 8) & 0xFF;
2234 fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5));
2235 fis->sect_cnt_ex = 0;
2236 fis->control = 0;
2237 fis->res2 = 0;
2238 fis->res3 = 0;
2239 fill_command_sg(dd, command, nents);
2240
2241 if (unlikely(command->unaligned))
2242 fis->device |= 1 << 7;
2243
2244 /* Populate the command header */
2245 command->command_header->opts =
2246 __force_bit2int cpu_to_le32(
2247 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
2248 command->command_header->byte_count = 0;
2249
2250 command->direction = dma_dir;
2251
2252 /*
2253 * To prevent this command from being issued
2254 * if an internal command is in progress or error handling is active.
2255 */
2256 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
2257 set_bit(rq->tag, port->cmds_to_issue);
2258 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2259 return;
2260 }
2261
2262 /* Issue the command to the hardware */
2263 mtip_issue_ncq_command(port, rq->tag);
2264 }
2265
2266 /*
2267 * Sysfs status dump.
2268 *
2269 * @dev Pointer to the device structure, passed by the kernrel.
2270 * @attr Pointer to the device_attribute structure passed by the kernel.
2271 * @buf Pointer to the char buffer that will receive the stats info.
2272 *
2273 * return value
2274 * The size, in bytes, of the data copied into buf.
2275 */
2276 static ssize_t mtip_hw_show_status(struct device *dev,
2277 struct device_attribute *attr,
2278 char *buf)
2279 {
2280 struct driver_data *dd = dev_to_disk(dev)->private_data;
2281 int size = 0;
2282
2283 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2284 size += sprintf(buf, "%s", "thermal_shutdown\n");
2285 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2286 size += sprintf(buf, "%s", "write_protect\n");
2287 else
2288 size += sprintf(buf, "%s", "online\n");
2289
2290 return size;
2291 }
2292
2293 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2294
2295 /* debugsfs entries */
2296
2297 static ssize_t show_device_status(struct device_driver *drv, char *buf)
2298 {
2299 int size = 0;
2300 struct driver_data *dd, *tmp;
2301 unsigned long flags;
2302 char id_buf[42];
2303 u16 status = 0;
2304
2305 spin_lock_irqsave(&dev_lock, flags);
2306 size += sprintf(&buf[size], "Devices Present:\n");
2307 list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
2308 if (dd->pdev) {
2309 if (dd->port &&
2310 dd->port->identify &&
2311 dd->port->identify_valid) {
2312 strlcpy(id_buf,
2313 (char *) (dd->port->identify + 10), 21);
2314 status = *(dd->port->identify + 141);
2315 } else {
2316 memset(id_buf, 0, 42);
2317 status = 0;
2318 }
2319
2320 if (dd->port &&
2321 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2322 size += sprintf(&buf[size],
2323 " device %s %s (ftl rebuild %d %%)\n",
2324 dev_name(&dd->pdev->dev),
2325 id_buf,
2326 status);
2327 } else {
2328 size += sprintf(&buf[size],
2329 " device %s %s\n",
2330 dev_name(&dd->pdev->dev),
2331 id_buf);
2332 }
2333 }
2334 }
2335
2336 size += sprintf(&buf[size], "Devices Being Removed:\n");
2337 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
2338 if (dd->pdev) {
2339 if (dd->port &&
2340 dd->port->identify &&
2341 dd->port->identify_valid) {
2342 strlcpy(id_buf,
2343 (char *) (dd->port->identify+10), 21);
2344 status = *(dd->port->identify + 141);
2345 } else {
2346 memset(id_buf, 0, 42);
2347 status = 0;
2348 }
2349
2350 if (dd->port &&
2351 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2352 size += sprintf(&buf[size],
2353 " device %s %s (ftl rebuild %d %%)\n",
2354 dev_name(&dd->pdev->dev),
2355 id_buf,
2356 status);
2357 } else {
2358 size += sprintf(&buf[size],
2359 " device %s %s\n",
2360 dev_name(&dd->pdev->dev),
2361 id_buf);
2362 }
2363 }
2364 }
2365 spin_unlock_irqrestore(&dev_lock, flags);
2366
2367 return size;
2368 }
2369
2370 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2371 size_t len, loff_t *offset)
2372 {
2373 struct driver_data *dd = (struct driver_data *)f->private_data;
2374 int size = *offset;
2375 char *buf;
2376 int rv = 0;
2377
2378 if (!len || *offset)
2379 return 0;
2380
2381 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2382 if (!buf) {
2383 dev_err(&dd->pdev->dev,
2384 "Memory allocation: status buffer\n");
2385 return -ENOMEM;
2386 }
2387
2388 size += show_device_status(NULL, buf);
2389
2390 *offset = size <= len ? size : len;
2391 size = copy_to_user(ubuf, buf, *offset);
2392 if (size)
2393 rv = -EFAULT;
2394
2395 kfree(buf);
2396 return rv ? rv : *offset;
2397 }
2398
2399 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2400 size_t len, loff_t *offset)
2401 {
2402 struct driver_data *dd = (struct driver_data *)f->private_data;
2403 char *buf;
2404 u32 group_allocated;
2405 int size = *offset;
2406 int n, rv = 0;
2407
2408 if (!len || size)
2409 return 0;
2410
2411 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2412 if (!buf) {
2413 dev_err(&dd->pdev->dev,
2414 "Memory allocation: register buffer\n");
2415 return -ENOMEM;
2416 }
2417
2418 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2419
2420 for (n = dd->slot_groups-1; n >= 0; n--)
2421 size += sprintf(&buf[size], "%08X ",
2422 readl(dd->port->s_active[n]));
2423
2424 size += sprintf(&buf[size], "]\n");
2425 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2426
2427 for (n = dd->slot_groups-1; n >= 0; n--)
2428 size += sprintf(&buf[size], "%08X ",
2429 readl(dd->port->cmd_issue[n]));
2430
2431 size += sprintf(&buf[size], "]\n");
2432 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2433
2434 for (n = dd->slot_groups-1; n >= 0; n--)
2435 size += sprintf(&buf[size], "%08X ",
2436 readl(dd->port->completed[n]));
2437
2438 size += sprintf(&buf[size], "]\n");
2439 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2440 readl(dd->port->mmio + PORT_IRQ_STAT));
2441 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2442 readl(dd->mmio + HOST_IRQ_STAT));
2443 size += sprintf(&buf[size], "\n");
2444
2445 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2446
2447 for (n = dd->slot_groups-1; n >= 0; n--) {
2448 if (sizeof(long) > sizeof(u32))
2449 group_allocated =
2450 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2451 else
2452 group_allocated = dd->port->cmds_to_issue[n];
2453 size += sprintf(&buf[size], "%08X ", group_allocated);
2454 }
2455 size += sprintf(&buf[size], "]\n");
2456
2457 *offset = size <= len ? size : len;
2458 size = copy_to_user(ubuf, buf, *offset);
2459 if (size)
2460 rv = -EFAULT;
2461
2462 kfree(buf);
2463 return rv ? rv : *offset;
2464 }
2465
2466 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2467 size_t len, loff_t *offset)
2468 {
2469 struct driver_data *dd = (struct driver_data *)f->private_data;
2470 char *buf;
2471 int size = *offset;
2472 int rv = 0;
2473
2474 if (!len || size)
2475 return 0;
2476
2477 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2478 if (!buf) {
2479 dev_err(&dd->pdev->dev,
2480 "Memory allocation: flag buffer\n");
2481 return -ENOMEM;
2482 }
2483
2484 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2485 dd->port->flags);
2486 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2487 dd->dd_flag);
2488
2489 *offset = size <= len ? size : len;
2490 size = copy_to_user(ubuf, buf, *offset);
2491 if (size)
2492 rv = -EFAULT;
2493
2494 kfree(buf);
2495 return rv ? rv : *offset;
2496 }
2497
2498 static const struct file_operations mtip_device_status_fops = {
2499 .owner = THIS_MODULE,
2500 .open = simple_open,
2501 .read = mtip_hw_read_device_status,
2502 .llseek = no_llseek,
2503 };
2504
2505 static const struct file_operations mtip_regs_fops = {
2506 .owner = THIS_MODULE,
2507 .open = simple_open,
2508 .read = mtip_hw_read_registers,
2509 .llseek = no_llseek,
2510 };
2511
2512 static const struct file_operations mtip_flags_fops = {
2513 .owner = THIS_MODULE,
2514 .open = simple_open,
2515 .read = mtip_hw_read_flags,
2516 .llseek = no_llseek,
2517 };
2518
2519 /*
2520 * Create the sysfs related attributes.
2521 *
2522 * @dd Pointer to the driver data structure.
2523 * @kobj Pointer to the kobj for the block device.
2524 *
2525 * return value
2526 * 0 Operation completed successfully.
2527 * -EINVAL Invalid parameter.
2528 */
2529 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2530 {
2531 if (!kobj || !dd)
2532 return -EINVAL;
2533
2534 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2535 dev_warn(&dd->pdev->dev,
2536 "Error creating 'status' sysfs entry\n");
2537 return 0;
2538 }
2539
2540 /*
2541 * Remove the sysfs related attributes.
2542 *
2543 * @dd Pointer to the driver data structure.
2544 * @kobj Pointer to the kobj for the block device.
2545 *
2546 * return value
2547 * 0 Operation completed successfully.
2548 * -EINVAL Invalid parameter.
2549 */
2550 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2551 {
2552 if (!kobj || !dd)
2553 return -EINVAL;
2554
2555 sysfs_remove_file(kobj, &dev_attr_status.attr);
2556
2557 return 0;
2558 }
2559
2560 static int mtip_hw_debugfs_init(struct driver_data *dd)
2561 {
2562 if (!dfs_parent)
2563 return -1;
2564
2565 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2566 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2567 dev_warn(&dd->pdev->dev,
2568 "Error creating node %s under debugfs\n",
2569 dd->disk->disk_name);
2570 dd->dfs_node = NULL;
2571 return -1;
2572 }
2573
2574 debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
2575 &mtip_flags_fops);
2576 debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
2577 &mtip_regs_fops);
2578
2579 return 0;
2580 }
2581
2582 static void mtip_hw_debugfs_exit(struct driver_data *dd)
2583 {
2584 if (dd->dfs_node)
2585 debugfs_remove_recursive(dd->dfs_node);
2586 }
2587
2588 /*
2589 * Perform any init/resume time hardware setup
2590 *
2591 * @dd Pointer to the driver data structure.
2592 *
2593 * return value
2594 * None
2595 */
2596 static inline void hba_setup(struct driver_data *dd)
2597 {
2598 u32 hwdata;
2599 hwdata = readl(dd->mmio + HOST_HSORG);
2600
2601 /* interrupt bug workaround: use only 1 IS bit.*/
2602 writel(hwdata |
2603 HSORG_DISABLE_SLOTGRP_INTR |
2604 HSORG_DISABLE_SLOTGRP_PXIS,
2605 dd->mmio + HOST_HSORG);
2606 }
2607
2608 static int mtip_device_unaligned_constrained(struct driver_data *dd)
2609 {
2610 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2611 }
2612
2613 /*
2614 * Detect the details of the product, and store anything needed
2615 * into the driver data structure. This includes product type and
2616 * version and number of slot groups.
2617 *
2618 * @dd Pointer to the driver data structure.
2619 *
2620 * return value
2621 * None
2622 */
2623 static void mtip_detect_product(struct driver_data *dd)
2624 {
2625 u32 hwdata;
2626 unsigned int rev, slotgroups;
2627
2628 /*
2629 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2630 * info register:
2631 * [15:8] hardware/software interface rev#
2632 * [ 3] asic-style interface
2633 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2634 */
2635 hwdata = readl(dd->mmio + HOST_HSORG);
2636
2637 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2638 dd->slot_groups = 1;
2639
2640 if (hwdata & 0x8) {
2641 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2642 rev = (hwdata & HSORG_HWREV) >> 8;
2643 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2644 dev_info(&dd->pdev->dev,
2645 "ASIC-FPGA design, HS rev 0x%x, "
2646 "%i slot groups [%i slots]\n",
2647 rev,
2648 slotgroups,
2649 slotgroups * 32);
2650
2651 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2652 dev_warn(&dd->pdev->dev,
2653 "Warning: driver only supports "
2654 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2655 slotgroups = MTIP_MAX_SLOT_GROUPS;
2656 }
2657 dd->slot_groups = slotgroups;
2658 return;
2659 }
2660
2661 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2662 }
2663
2664 /*
2665 * Blocking wait for FTL rebuild to complete
2666 *
2667 * @dd Pointer to the DRIVER_DATA structure.
2668 *
2669 * return value
2670 * 0 FTL rebuild completed successfully
2671 * -EFAULT FTL rebuild error/timeout/interruption
2672 */
2673 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2674 {
2675 unsigned long timeout, cnt = 0, start;
2676
2677 dev_warn(&dd->pdev->dev,
2678 "FTL rebuild in progress. Polling for completion.\n");
2679
2680 start = jiffies;
2681 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2682
2683 do {
2684 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2685 &dd->dd_flag)))
2686 return -EFAULT;
2687 if (mtip_check_surprise_removal(dd->pdev))
2688 return -EFAULT;
2689
2690 if (mtip_get_identify(dd->port, NULL) < 0)
2691 return -EFAULT;
2692
2693 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2694 MTIP_FTL_REBUILD_MAGIC) {
2695 ssleep(1);
2696 /* Print message every 3 minutes */
2697 if (cnt++ >= 180) {
2698 dev_warn(&dd->pdev->dev,
2699 "FTL rebuild in progress (%d secs).\n",
2700 jiffies_to_msecs(jiffies - start) / 1000);
2701 cnt = 0;
2702 }
2703 } else {
2704 dev_warn(&dd->pdev->dev,
2705 "FTL rebuild complete (%d secs).\n",
2706 jiffies_to_msecs(jiffies - start) / 1000);
2707 mtip_block_initialize(dd);
2708 return 0;
2709 }
2710 } while (time_before(jiffies, timeout));
2711
2712 /* Check for timeout */
2713 dev_err(&dd->pdev->dev,
2714 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2715 jiffies_to_msecs(jiffies - start) / 1000);
2716 return -EFAULT;
2717 }
2718
2719 static void mtip_softirq_done_fn(struct request *rq)
2720 {
2721 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
2722 struct driver_data *dd = rq->q->queuedata;
2723
2724 /* Unmap the DMA scatter list entries */
2725 dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents,
2726 cmd->direction);
2727
2728 if (unlikely(cmd->unaligned))
2729 up(&dd->port->cmd_slot_unal);
2730
2731 blk_mq_end_request(rq, cmd->status);
2732 }
2733
2734 static void mtip_abort_cmd(struct request *req, void *data,
2735 bool reserved)
2736 {
2737 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
2738 struct driver_data *dd = data;
2739
2740 dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag);
2741
2742 clear_bit(req->tag, dd->port->cmds_to_issue);
2743 cmd->status = BLK_STS_IOERR;
2744 mtip_softirq_done_fn(req);
2745 }
2746
2747 static void mtip_queue_cmd(struct request *req, void *data,
2748 bool reserved)
2749 {
2750 struct driver_data *dd = data;
2751
2752 set_bit(req->tag, dd->port->cmds_to_issue);
2753 blk_abort_request(req);
2754 }
2755
2756 /*
2757 * service thread to issue queued commands
2758 *
2759 * @data Pointer to the driver data structure.
2760 *
2761 * return value
2762 * 0
2763 */
2764
2765 static int mtip_service_thread(void *data)
2766 {
2767 struct driver_data *dd = (struct driver_data *)data;
2768 unsigned long slot, slot_start, slot_wrap, to;
2769 unsigned int num_cmd_slots = dd->slot_groups * 32;
2770 struct mtip_port *port = dd->port;
2771
2772 while (1) {
2773 if (kthread_should_stop() ||
2774 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2775 goto st_out;
2776 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2777
2778 /*
2779 * the condition is to check neither an internal command is
2780 * is in progress nor error handling is active
2781 */
2782 wait_event_interruptible(port->svc_wait, (port->flags) &&
2783 (port->flags & MTIP_PF_SVC_THD_WORK));
2784
2785 if (kthread_should_stop() ||
2786 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2787 goto st_out;
2788
2789 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2790 &dd->dd_flag)))
2791 goto st_out;
2792
2793 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2794
2795 restart_eh:
2796 /* Demux bits: start with error handling */
2797 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2798 mtip_handle_tfe(dd);
2799 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2800 }
2801
2802 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2803 goto restart_eh;
2804
2805 if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) {
2806 to = jiffies + msecs_to_jiffies(5000);
2807
2808 do {
2809 mdelay(100);
2810 } while (atomic_read(&dd->irq_workers_active) != 0 &&
2811 time_before(jiffies, to));
2812
2813 if (atomic_read(&dd->irq_workers_active) != 0)
2814 dev_warn(&dd->pdev->dev,
2815 "Completion workers still active!");
2816
2817 spin_lock(dd->queue->queue_lock);
2818 blk_mq_tagset_busy_iter(&dd->tags,
2819 mtip_queue_cmd, dd);
2820 spin_unlock(dd->queue->queue_lock);
2821
2822 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags);
2823
2824 if (mtip_device_reset(dd))
2825 blk_mq_tagset_busy_iter(&dd->tags,
2826 mtip_abort_cmd, dd);
2827
2828 clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags);
2829 }
2830
2831 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
2832 slot = 1;
2833 /* used to restrict the loop to one iteration */
2834 slot_start = num_cmd_slots;
2835 slot_wrap = 0;
2836 while (1) {
2837 slot = find_next_bit(port->cmds_to_issue,
2838 num_cmd_slots, slot);
2839 if (slot_wrap == 1) {
2840 if ((slot_start >= slot) ||
2841 (slot >= num_cmd_slots))
2842 break;
2843 }
2844 if (unlikely(slot_start == num_cmd_slots))
2845 slot_start = slot;
2846
2847 if (unlikely(slot == num_cmd_slots)) {
2848 slot = 1;
2849 slot_wrap = 1;
2850 continue;
2851 }
2852
2853 /* Issue the command to the hardware */
2854 mtip_issue_ncq_command(port, slot);
2855
2856 clear_bit(slot, port->cmds_to_issue);
2857 }
2858
2859 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2860 }
2861
2862 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
2863 if (mtip_ftl_rebuild_poll(dd) == 0)
2864 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
2865 }
2866 }
2867
2868 st_out:
2869 return 0;
2870 }
2871
2872 /*
2873 * DMA region teardown
2874 *
2875 * @dd Pointer to driver_data structure
2876 *
2877 * return value
2878 * None
2879 */
2880 static void mtip_dma_free(struct driver_data *dd)
2881 {
2882 struct mtip_port *port = dd->port;
2883
2884 if (port->block1)
2885 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2886 port->block1, port->block1_dma);
2887
2888 if (port->command_list) {
2889 dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
2890 port->command_list, port->command_list_dma);
2891 }
2892 }
2893
2894 /*
2895 * DMA region setup
2896 *
2897 * @dd Pointer to driver_data structure
2898 *
2899 * return value
2900 * -ENOMEM Not enough free DMA region space to initialize driver
2901 */
2902 static int mtip_dma_alloc(struct driver_data *dd)
2903 {
2904 struct mtip_port *port = dd->port;
2905
2906 /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */
2907 port->block1 =
2908 dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2909 &port->block1_dma, GFP_KERNEL);
2910 if (!port->block1)
2911 return -ENOMEM;
2912 memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ);
2913
2914 /* Allocate dma memory for command list */
2915 port->command_list =
2916 dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
2917 &port->command_list_dma, GFP_KERNEL);
2918 if (!port->command_list) {
2919 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2920 port->block1, port->block1_dma);
2921 port->block1 = NULL;
2922 port->block1_dma = 0;
2923 return -ENOMEM;
2924 }
2925 memset(port->command_list, 0, AHCI_CMD_TBL_SZ);
2926
2927 /* Setup all pointers into first DMA region */
2928 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET;
2929 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET;
2930 port->identify = port->block1 + AHCI_IDFY_OFFSET;
2931 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET;
2932 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET;
2933 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET;
2934 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET;
2935 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
2936
2937 return 0;
2938 }
2939
2940 static int mtip_hw_get_identify(struct driver_data *dd)
2941 {
2942 struct smart_attr attr242;
2943 unsigned char *buf;
2944 int rv;
2945
2946 if (mtip_get_identify(dd->port, NULL) < 0)
2947 return -EFAULT;
2948
2949 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2950 MTIP_FTL_REBUILD_MAGIC) {
2951 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
2952 return MTIP_FTL_REBUILD_MAGIC;
2953 }
2954 mtip_dump_identify(dd->port);
2955
2956 /* check write protect, over temp and rebuild statuses */
2957 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
2958 dd->port->log_buf,
2959 dd->port->log_buf_dma, 1);
2960 if (rv) {
2961 dev_warn(&dd->pdev->dev,
2962 "Error in READ LOG EXT (10h) command\n");
2963 /* non-critical error, don't fail the load */
2964 } else {
2965 buf = (unsigned char *)dd->port->log_buf;
2966 if (buf[259] & 0x1) {
2967 dev_info(&dd->pdev->dev,
2968 "Write protect bit is set.\n");
2969 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
2970 }
2971 if (buf[288] == 0xF7) {
2972 dev_info(&dd->pdev->dev,
2973 "Exceeded Tmax, drive in thermal shutdown.\n");
2974 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
2975 }
2976 if (buf[288] == 0xBF) {
2977 dev_info(&dd->pdev->dev,
2978 "Drive indicates rebuild has failed.\n");
2979 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
2980 }
2981 }
2982
2983 /* get write protect progess */
2984 memset(&attr242, 0, sizeof(struct smart_attr));
2985 if (mtip_get_smart_attr(dd->port, 242, &attr242))
2986 dev_warn(&dd->pdev->dev,
2987 "Unable to check write protect progress\n");
2988 else
2989 dev_info(&dd->pdev->dev,
2990 "Write protect progress: %u%% (%u blocks)\n",
2991 attr242.cur, le32_to_cpu(attr242.data));
2992
2993 return rv;
2994 }
2995
2996 /*
2997 * Called once for each card.
2998 *
2999 * @dd Pointer to the driver data structure.
3000 *
3001 * return value
3002 * 0 on success, else an error code.
3003 */
3004 static int mtip_hw_init(struct driver_data *dd)
3005 {
3006 int i;
3007 int rv;
3008 unsigned int num_command_slots;
3009 unsigned long timeout, timetaken;
3010
3011 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
3012
3013 mtip_detect_product(dd);
3014 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
3015 rv = -EIO;
3016 goto out1;
3017 }
3018 num_command_slots = dd->slot_groups * 32;
3019
3020 hba_setup(dd);
3021
3022 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3023 dd->numa_node);
3024 if (!dd->port) {
3025 dev_err(&dd->pdev->dev,
3026 "Memory allocation: port structure\n");
3027 return -ENOMEM;
3028 }
3029
3030 /* Continue workqueue setup */
3031 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3032 dd->work[i].port = dd->port;
3033
3034 /* Enable unaligned IO constraints for some devices */
3035 if (mtip_device_unaligned_constrained(dd))
3036 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
3037 else
3038 dd->unal_qdepth = 0;
3039
3040 sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth);
3041
3042 /* Spinlock to prevent concurrent issue */
3043 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3044 spin_lock_init(&dd->port->cmd_issue_lock[i]);
3045
3046 /* Set the port mmio base address. */
3047 dd->port->mmio = dd->mmio + PORT_OFFSET;
3048 dd->port->dd = dd;
3049
3050 /* DMA allocations */
3051 rv = mtip_dma_alloc(dd);
3052 if (rv < 0)
3053 goto out1;
3054
3055 /* Setup the pointers to the extended s_active and CI registers. */
3056 for (i = 0; i < dd->slot_groups; i++) {
3057 dd->port->s_active[i] =
3058 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3059 dd->port->cmd_issue[i] =
3060 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3061 dd->port->completed[i] =
3062 dd->port->mmio + i*0x80 + PORT_SDBV;
3063 }
3064
3065 timetaken = jiffies;
3066 timeout = jiffies + msecs_to_jiffies(30000);
3067 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3068 time_before(jiffies, timeout)) {
3069 mdelay(100);
3070 }
3071 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3072 timetaken = jiffies - timetaken;
3073 dev_warn(&dd->pdev->dev,
3074 "Surprise removal detected at %u ms\n",
3075 jiffies_to_msecs(timetaken));
3076 rv = -ENODEV;
3077 goto out2 ;
3078 }
3079 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
3080 timetaken = jiffies - timetaken;
3081 dev_warn(&dd->pdev->dev,
3082 "Removal detected at %u ms\n",
3083 jiffies_to_msecs(timetaken));
3084 rv = -EFAULT;
3085 goto out2;
3086 }
3087
3088 /* Conditionally reset the HBA. */
3089 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3090 if (mtip_hba_reset(dd) < 0) {
3091 dev_err(&dd->pdev->dev,
3092 "Card did not reset within timeout\n");
3093 rv = -EIO;
3094 goto out2;
3095 }
3096 } else {
3097 /* Clear any pending interrupts on the HBA */
3098 writel(readl(dd->mmio + HOST_IRQ_STAT),
3099 dd->mmio + HOST_IRQ_STAT);
3100 }
3101
3102 mtip_init_port(dd->port);
3103 mtip_start_port(dd->port);
3104
3105 /* Setup the ISR and enable interrupts. */
3106 rv = devm_request_irq(&dd->pdev->dev,
3107 dd->pdev->irq,
3108 mtip_irq_handler,
3109 IRQF_SHARED,
3110 dev_driver_string(&dd->pdev->dev),
3111 dd);
3112
3113 if (rv) {
3114 dev_err(&dd->pdev->dev,
3115 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3116 goto out2;
3117 }
3118 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
3119
3120 /* Enable interrupts on the HBA. */
3121 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3122 dd->mmio + HOST_CTL);
3123
3124 init_waitqueue_head(&dd->port->svc_wait);
3125
3126 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3127 rv = -EFAULT;
3128 goto out3;
3129 }
3130
3131 return rv;
3132
3133 out3:
3134 /* Disable interrupts on the HBA. */
3135 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3136 dd->mmio + HOST_CTL);
3137
3138 /* Release the IRQ. */
3139 irq_set_affinity_hint(dd->pdev->irq, NULL);
3140 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3141
3142 out2:
3143 mtip_deinit_port(dd->port);
3144 mtip_dma_free(dd);
3145
3146 out1:
3147 /* Free the memory allocated for the for structure. */
3148 kfree(dd->port);
3149
3150 return rv;
3151 }
3152
3153 static int mtip_standby_drive(struct driver_data *dd)
3154 {
3155 int rv = 0;
3156
3157 if (dd->sr || !dd->port)
3158 return -ENODEV;
3159 /*
3160 * Send standby immediate (E0h) to the drive so that it
3161 * saves its state.
3162 */
3163 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
3164 !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) &&
3165 !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) {
3166 rv = mtip_standby_immediate(dd->port);
3167 if (rv)
3168 dev_warn(&dd->pdev->dev,
3169 "STANDBY IMMEDIATE failed\n");
3170 }
3171 return rv;
3172 }
3173
3174 /*
3175 * Called to deinitialize an interface.
3176 *
3177 * @dd Pointer to the driver data structure.
3178 *
3179 * return value
3180 * 0
3181 */
3182 static int mtip_hw_exit(struct driver_data *dd)
3183 {
3184 if (!dd->sr) {
3185 /* de-initialize the port. */
3186 mtip_deinit_port(dd->port);
3187
3188 /* Disable interrupts on the HBA. */
3189 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3190 dd->mmio + HOST_CTL);
3191 }
3192
3193 /* Release the IRQ. */
3194 irq_set_affinity_hint(dd->pdev->irq, NULL);
3195 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3196 msleep(1000);
3197
3198 /* Free dma regions */
3199 mtip_dma_free(dd);
3200
3201 /* Free the memory allocated for the for structure. */
3202 kfree(dd->port);
3203 dd->port = NULL;
3204
3205 return 0;
3206 }
3207
3208 /*
3209 * Issue a Standby Immediate command to the device.
3210 *
3211 * This function is called by the Block Layer just before the
3212 * system powers off during a shutdown.
3213 *
3214 * @dd Pointer to the driver data structure.
3215 *
3216 * return value
3217 * 0
3218 */
3219 static int mtip_hw_shutdown(struct driver_data *dd)
3220 {
3221 /*
3222 * Send standby immediate (E0h) to the drive so that it
3223 * saves its state.
3224 */
3225 mtip_standby_drive(dd);
3226
3227 return 0;
3228 }
3229
3230 /*
3231 * Suspend function
3232 *
3233 * This function is called by the Block Layer just before the
3234 * system hibernates.
3235 *
3236 * @dd Pointer to the driver data structure.
3237 *
3238 * return value
3239 * 0 Suspend was successful
3240 * -EFAULT Suspend was not successful
3241 */
3242 static int mtip_hw_suspend(struct driver_data *dd)
3243 {
3244 /*
3245 * Send standby immediate (E0h) to the drive
3246 * so that it saves its state.
3247 */
3248 if (mtip_standby_drive(dd) != 0) {
3249 dev_err(&dd->pdev->dev,
3250 "Failed standby-immediate command\n");
3251 return -EFAULT;
3252 }
3253
3254 /* Disable interrupts on the HBA.*/
3255 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3256 dd->mmio + HOST_CTL);
3257 mtip_deinit_port(dd->port);
3258
3259 return 0;
3260 }
3261
3262 /*
3263 * Resume function
3264 *
3265 * This function is called by the Block Layer as the
3266 * system resumes.
3267 *
3268 * @dd Pointer to the driver data structure.
3269 *
3270 * return value
3271 * 0 Resume was successful
3272 * -EFAULT Resume was not successful
3273 */
3274 static int mtip_hw_resume(struct driver_data *dd)
3275 {
3276 /* Perform any needed hardware setup steps */
3277 hba_setup(dd);
3278
3279 /* Reset the HBA */
3280 if (mtip_hba_reset(dd) != 0) {
3281 dev_err(&dd->pdev->dev,
3282 "Unable to reset the HBA\n");
3283 return -EFAULT;
3284 }
3285
3286 /*
3287 * Enable the port, DMA engine, and FIS reception specific
3288 * h/w in controller.
3289 */
3290 mtip_init_port(dd->port);
3291 mtip_start_port(dd->port);
3292
3293 /* Enable interrupts on the HBA.*/
3294 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3295 dd->mmio + HOST_CTL);
3296
3297 return 0;
3298 }
3299
3300 /*
3301 * Helper function for reusing disk name
3302 * upon hot insertion.
3303 */
3304 static int rssd_disk_name_format(char *prefix,
3305 int index,
3306 char *buf,
3307 int buflen)
3308 {
3309 const int base = 'z' - 'a' + 1;
3310 char *begin = buf + strlen(prefix);
3311 char *end = buf + buflen;
3312 char *p;
3313 int unit;
3314
3315 p = end - 1;
3316 *p = '\0';
3317 unit = base;
3318 do {
3319 if (p == begin)
3320 return -EINVAL;
3321 *--p = 'a' + (index % unit);
3322 index = (index / unit) - 1;
3323 } while (index >= 0);
3324
3325 memmove(begin, p, end - p);
3326 memcpy(buf, prefix, strlen(prefix));
3327
3328 return 0;
3329 }
3330
3331 /*
3332 * Block layer IOCTL handler.
3333 *
3334 * @dev Pointer to the block_device structure.
3335 * @mode ignored
3336 * @cmd IOCTL command passed from the user application.
3337 * @arg Argument passed from the user application.
3338 *
3339 * return value
3340 * 0 IOCTL completed successfully.
3341 * -ENOTTY IOCTL not supported or invalid driver data
3342 * structure pointer.
3343 */
3344 static int mtip_block_ioctl(struct block_device *dev,
3345 fmode_t mode,
3346 unsigned cmd,
3347 unsigned long arg)
3348 {
3349 struct driver_data *dd = dev->bd_disk->private_data;
3350
3351 if (!capable(CAP_SYS_ADMIN))
3352 return -EACCES;
3353
3354 if (!dd)
3355 return -ENOTTY;
3356
3357 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3358 return -ENOTTY;
3359
3360 switch (cmd) {
3361 case BLKFLSBUF:
3362 return -ENOTTY;
3363 default:
3364 return mtip_hw_ioctl(dd, cmd, arg);
3365 }
3366 }
3367
3368 #ifdef CONFIG_COMPAT
3369 /*
3370 * Block layer compat IOCTL handler.
3371 *
3372 * @dev Pointer to the block_device structure.
3373 * @mode ignored
3374 * @cmd IOCTL command passed from the user application.
3375 * @arg Argument passed from the user application.
3376 *
3377 * return value
3378 * 0 IOCTL completed successfully.
3379 * -ENOTTY IOCTL not supported or invalid driver data
3380 * structure pointer.
3381 */
3382 static int mtip_block_compat_ioctl(struct block_device *dev,
3383 fmode_t mode,
3384 unsigned cmd,
3385 unsigned long arg)
3386 {
3387 struct driver_data *dd = dev->bd_disk->private_data;
3388
3389 if (!capable(CAP_SYS_ADMIN))
3390 return -EACCES;
3391
3392 if (!dd)
3393 return -ENOTTY;
3394
3395 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3396 return -ENOTTY;
3397
3398 switch (cmd) {
3399 case BLKFLSBUF:
3400 return -ENOTTY;
3401 case HDIO_DRIVE_TASKFILE: {
3402 struct mtip_compat_ide_task_request_s __user *compat_req_task;
3403 ide_task_request_t req_task;
3404 int compat_tasksize, outtotal, ret;
3405
3406 compat_tasksize =
3407 sizeof(struct mtip_compat_ide_task_request_s);
3408
3409 compat_req_task =
3410 (struct mtip_compat_ide_task_request_s __user *) arg;
3411
3412 if (copy_from_user(&req_task, (void __user *) arg,
3413 compat_tasksize - (2 * sizeof(compat_long_t))))
3414 return -EFAULT;
3415
3416 if (get_user(req_task.out_size, &compat_req_task->out_size))
3417 return -EFAULT;
3418
3419 if (get_user(req_task.in_size, &compat_req_task->in_size))
3420 return -EFAULT;
3421
3422 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3423
3424 ret = exec_drive_taskfile(dd, (void __user *) arg,
3425 &req_task, outtotal);
3426
3427 if (copy_to_user((void __user *) arg, &req_task,
3428 compat_tasksize -
3429 (2 * sizeof(compat_long_t))))
3430 return -EFAULT;
3431
3432 if (put_user(req_task.out_size, &compat_req_task->out_size))
3433 return -EFAULT;
3434
3435 if (put_user(req_task.in_size, &compat_req_task->in_size))
3436 return -EFAULT;
3437
3438 return ret;
3439 }
3440 default:
3441 return mtip_hw_ioctl(dd, cmd, arg);
3442 }
3443 }
3444 #endif
3445
3446 /*
3447 * Obtain the geometry of the device.
3448 *
3449 * You may think that this function is obsolete, but some applications,
3450 * fdisk for example still used CHS values. This function describes the
3451 * device as having 224 heads and 56 sectors per cylinder. These values are
3452 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3453 * partition is described in terms of a start and end cylinder this means
3454 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3455 * affects performance.
3456 *
3457 * @dev Pointer to the block_device strucutre.
3458 * @geo Pointer to a hd_geometry structure.
3459 *
3460 * return value
3461 * 0 Operation completed successfully.
3462 * -ENOTTY An error occurred while reading the drive capacity.
3463 */
3464 static int mtip_block_getgeo(struct block_device *dev,
3465 struct hd_geometry *geo)
3466 {
3467 struct driver_data *dd = dev->bd_disk->private_data;
3468 sector_t capacity;
3469
3470 if (!dd)
3471 return -ENOTTY;
3472
3473 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3474 dev_warn(&dd->pdev->dev,
3475 "Could not get drive capacity.\n");
3476 return -ENOTTY;
3477 }
3478
3479 geo->heads = 224;
3480 geo->sectors = 56;
3481 sector_div(capacity, (geo->heads * geo->sectors));
3482 geo->cylinders = capacity;
3483 return 0;
3484 }
3485
3486 static int mtip_block_open(struct block_device *dev, fmode_t mode)
3487 {
3488 struct driver_data *dd;
3489
3490 if (dev && dev->bd_disk) {
3491 dd = (struct driver_data *) dev->bd_disk->private_data;
3492
3493 if (dd) {
3494 if (test_bit(MTIP_DDF_REMOVAL_BIT,
3495 &dd->dd_flag)) {
3496 return -ENODEV;
3497 }
3498 return 0;
3499 }
3500 }
3501 return -ENODEV;
3502 }
3503
3504 static void mtip_block_release(struct gendisk *disk, fmode_t mode)
3505 {
3506 }
3507
3508 /*
3509 * Block device operation function.
3510 *
3511 * This structure contains pointers to the functions required by the block
3512 * layer.
3513 */
3514 static const struct block_device_operations mtip_block_ops = {
3515 .open = mtip_block_open,
3516 .release = mtip_block_release,
3517 .ioctl = mtip_block_ioctl,
3518 #ifdef CONFIG_COMPAT
3519 .compat_ioctl = mtip_block_compat_ioctl,
3520 #endif
3521 .getgeo = mtip_block_getgeo,
3522 .owner = THIS_MODULE
3523 };
3524
3525 static inline bool is_se_active(struct driver_data *dd)
3526 {
3527 if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) {
3528 if (dd->port->ic_pause_timer) {
3529 unsigned long to = dd->port->ic_pause_timer +
3530 msecs_to_jiffies(1000);
3531 if (time_after(jiffies, to)) {
3532 clear_bit(MTIP_PF_SE_ACTIVE_BIT,
3533 &dd->port->flags);
3534 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
3535 dd->port->ic_pause_timer = 0;
3536 wake_up_interruptible(&dd->port->svc_wait);
3537 return false;
3538 }
3539 }
3540 return true;
3541 }
3542 return false;
3543 }
3544
3545 /*
3546 * Block layer make request function.
3547 *
3548 * This function is called by the kernel to process a BIO for
3549 * the P320 device.
3550 *
3551 * @queue Pointer to the request queue. Unused other than to obtain
3552 * the driver data structure.
3553 * @rq Pointer to the request.
3554 *
3555 */
3556 static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq)
3557 {
3558 struct driver_data *dd = hctx->queue->queuedata;
3559 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3560 unsigned int nents;
3561
3562 if (is_se_active(dd))
3563 return -ENODATA;
3564
3565 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3566 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3567 &dd->dd_flag))) {
3568 return -ENXIO;
3569 }
3570 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3571 return -ENODATA;
3572 }
3573 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3574 &dd->dd_flag) &&
3575 rq_data_dir(rq))) {
3576 return -ENODATA;
3577 }
3578 if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag) ||
3579 test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag)))
3580 return -ENODATA;
3581 }
3582
3583 if (req_op(rq) == REQ_OP_DISCARD) {
3584 int err;
3585
3586 err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq));
3587 blk_mq_end_request(rq, err ? BLK_STS_IOERR : BLK_STS_OK);
3588 return 0;
3589 }
3590
3591 /* Create the scatter list for this request. */
3592 nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg);
3593
3594 /* Issue the read/write. */
3595 mtip_hw_submit_io(dd, rq, cmd, nents, hctx);
3596 return 0;
3597 }
3598
3599 static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3600 struct request *rq)
3601 {
3602 struct driver_data *dd = hctx->queue->queuedata;
3603 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3604
3605 if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
3606 return false;
3607
3608 /*
3609 * If unaligned depth must be limited on this controller, mark it
3610 * as unaligned if the IO isn't on a 4k boundary (start of length).
3611 */
3612 if (blk_rq_sectors(rq) <= 64) {
3613 if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3614 cmd->unaligned = 1;
3615 }
3616
3617 if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal))
3618 return true;
3619
3620 return false;
3621 }
3622
3623 static blk_status_t mtip_issue_reserved_cmd(struct blk_mq_hw_ctx *hctx,
3624 struct request *rq)
3625 {
3626 struct driver_data *dd = hctx->queue->queuedata;
3627 struct mtip_int_cmd *icmd = rq->special;
3628 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3629 struct mtip_cmd_sg *command_sg;
3630
3631 if (mtip_commands_active(dd->port))
3632 return BLK_STS_RESOURCE;
3633
3634 /* Populate the SG list */
3635 cmd->command_header->opts =
3636 __force_bit2int cpu_to_le32(icmd->opts | icmd->fis_len);
3637 if (icmd->buf_len) {
3638 command_sg = cmd->command + AHCI_CMD_TBL_HDR_SZ;
3639
3640 command_sg->info =
3641 __force_bit2int cpu_to_le32((icmd->buf_len-1) & 0x3FFFFF);
3642 command_sg->dba =
3643 __force_bit2int cpu_to_le32(icmd->buffer & 0xFFFFFFFF);
3644 command_sg->dba_upper =
3645 __force_bit2int cpu_to_le32((icmd->buffer >> 16) >> 16);
3646
3647 cmd->command_header->opts |=
3648 __force_bit2int cpu_to_le32((1 << 16));
3649 }
3650
3651 /* Populate the command header */
3652 cmd->command_header->byte_count = 0;
3653
3654 blk_mq_start_request(rq);
3655 mtip_issue_non_ncq_command(dd->port, rq->tag);
3656 return 0;
3657 }
3658
3659 static blk_status_t mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
3660 const struct blk_mq_queue_data *bd)
3661 {
3662 struct request *rq = bd->rq;
3663 int ret;
3664
3665 mtip_init_cmd_header(rq);
3666
3667 if (blk_rq_is_passthrough(rq))
3668 return mtip_issue_reserved_cmd(hctx, rq);
3669
3670 if (unlikely(mtip_check_unal_depth(hctx, rq)))
3671 return BLK_STS_RESOURCE;
3672
3673 blk_mq_start_request(rq);
3674
3675 ret = mtip_submit_request(hctx, rq);
3676 if (likely(!ret))
3677 return BLK_STS_OK;
3678 return BLK_STS_IOERR;
3679 }
3680
3681 static void mtip_free_cmd(struct blk_mq_tag_set *set, struct request *rq,
3682 unsigned int hctx_idx)
3683 {
3684 struct driver_data *dd = set->driver_data;
3685 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3686
3687 if (!cmd->command)
3688 return;
3689
3690 dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3691 cmd->command, cmd->command_dma);
3692 }
3693
3694 static int mtip_init_cmd(struct blk_mq_tag_set *set, struct request *rq,
3695 unsigned int hctx_idx, unsigned int numa_node)
3696 {
3697 struct driver_data *dd = set->driver_data;
3698 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3699
3700 cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3701 &cmd->command_dma, GFP_KERNEL);
3702 if (!cmd->command)
3703 return -ENOMEM;
3704
3705 memset(cmd->command, 0, CMD_DMA_ALLOC_SZ);
3706
3707 sg_init_table(cmd->sg, MTIP_MAX_SG);
3708 return 0;
3709 }
3710
3711 static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req,
3712 bool reserved)
3713 {
3714 struct driver_data *dd = req->q->queuedata;
3715
3716 if (reserved) {
3717 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
3718
3719 cmd->status = BLK_STS_TIMEOUT;
3720 return BLK_EH_HANDLED;
3721 }
3722
3723 if (test_bit(req->tag, dd->port->cmds_to_issue))
3724 goto exit_handler;
3725
3726 if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags))
3727 goto exit_handler;
3728
3729 wake_up_interruptible(&dd->port->svc_wait);
3730 exit_handler:
3731 return BLK_EH_RESET_TIMER;
3732 }
3733
3734 static const struct blk_mq_ops mtip_mq_ops = {
3735 .queue_rq = mtip_queue_rq,
3736 .init_request = mtip_init_cmd,
3737 .exit_request = mtip_free_cmd,
3738 .complete = mtip_softirq_done_fn,
3739 .timeout = mtip_cmd_timeout,
3740 };
3741
3742 /*
3743 * Block layer initialization function.
3744 *
3745 * This function is called once by the PCI layer for each P320
3746 * device that is connected to the system.
3747 *
3748 * @dd Pointer to the driver data structure.
3749 *
3750 * return value
3751 * 0 on success else an error code.
3752 */
3753 static int mtip_block_initialize(struct driver_data *dd)
3754 {
3755 int rv = 0, wait_for_rebuild = 0;
3756 sector_t capacity;
3757 unsigned int index = 0;
3758 struct kobject *kobj;
3759
3760 if (dd->disk)
3761 goto skip_create_disk; /* hw init done, before rebuild */
3762
3763 if (mtip_hw_init(dd)) {
3764 rv = -EINVAL;
3765 goto protocol_init_error;
3766 }
3767
3768 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
3769 if (dd->disk == NULL) {
3770 dev_err(&dd->pdev->dev,
3771 "Unable to allocate gendisk structure\n");
3772 rv = -EINVAL;
3773 goto alloc_disk_error;
3774 }
3775
3776 /* Generate the disk name, implemented same as in sd.c */
3777 do {
3778 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) {
3779 rv = -ENOMEM;
3780 goto ida_get_error;
3781 }
3782
3783 spin_lock(&rssd_index_lock);
3784 rv = ida_get_new(&rssd_index_ida, &index);
3785 spin_unlock(&rssd_index_lock);
3786 } while (rv == -EAGAIN);
3787
3788 if (rv)
3789 goto ida_get_error;
3790
3791 rv = rssd_disk_name_format("rssd",
3792 index,
3793 dd->disk->disk_name,
3794 DISK_NAME_LEN);
3795 if (rv)
3796 goto disk_index_error;
3797
3798 dd->disk->major = dd->major;
3799 dd->disk->first_minor = index * MTIP_MAX_MINORS;
3800 dd->disk->minors = MTIP_MAX_MINORS;
3801 dd->disk->fops = &mtip_block_ops;
3802 dd->disk->private_data = dd;
3803 dd->index = index;
3804
3805 mtip_hw_debugfs_init(dd);
3806
3807 memset(&dd->tags, 0, sizeof(dd->tags));
3808 dd->tags.ops = &mtip_mq_ops;
3809 dd->tags.nr_hw_queues = 1;
3810 dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3811 dd->tags.reserved_tags = 1;
3812 dd->tags.cmd_size = sizeof(struct mtip_cmd);
3813 dd->tags.numa_node = dd->numa_node;
3814 dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
3815 dd->tags.driver_data = dd;
3816 dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS;
3817
3818 rv = blk_mq_alloc_tag_set(&dd->tags);
3819 if (rv) {
3820 dev_err(&dd->pdev->dev,
3821 "Unable to allocate request queue\n");
3822 goto block_queue_alloc_tag_error;
3823 }
3824
3825 /* Allocate the request queue. */
3826 dd->queue = blk_mq_init_queue(&dd->tags);
3827 if (IS_ERR(dd->queue)) {
3828 dev_err(&dd->pdev->dev,
3829 "Unable to allocate request queue\n");
3830 rv = -ENOMEM;
3831 goto block_queue_alloc_init_error;
3832 }
3833
3834 dd->disk->queue = dd->queue;
3835 dd->queue->queuedata = dd;
3836
3837 skip_create_disk:
3838 /* Initialize the protocol layer. */
3839 wait_for_rebuild = mtip_hw_get_identify(dd);
3840 if (wait_for_rebuild < 0) {
3841 dev_err(&dd->pdev->dev,
3842 "Protocol layer initialization failed\n");
3843 rv = -EINVAL;
3844 goto init_hw_cmds_error;
3845 }
3846
3847 /*
3848 * if rebuild pending, start the service thread, and delay the block
3849 * queue creation and device_add_disk()
3850 */
3851 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3852 goto start_service_thread;
3853
3854 /* Set device limits. */
3855 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
3856 clear_bit(QUEUE_FLAG_ADD_RANDOM, &dd->queue->queue_flags);
3857 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3858 blk_queue_physical_block_size(dd->queue, 4096);
3859 blk_queue_max_hw_sectors(dd->queue, 0xffff);
3860 blk_queue_max_segment_size(dd->queue, 0x400000);
3861 blk_queue_io_min(dd->queue, 4096);
3862 blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask);
3863
3864 /* Signal trim support */
3865 if (dd->trim_supp == true) {
3866 set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags);
3867 dd->queue->limits.discard_granularity = 4096;
3868 blk_queue_max_discard_sectors(dd->queue,
3869 MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES);
3870 }
3871
3872 /* Set the capacity of the device in 512 byte sectors. */
3873 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3874 dev_warn(&dd->pdev->dev,
3875 "Could not read drive capacity\n");
3876 rv = -EIO;
3877 goto read_capacity_error;
3878 }
3879 set_capacity(dd->disk, capacity);
3880
3881 /* Enable the block device and add it to /dev */
3882 device_add_disk(&dd->pdev->dev, dd->disk);
3883
3884 dd->bdev = bdget_disk(dd->disk, 0);
3885 /*
3886 * Now that the disk is active, initialize any sysfs attributes
3887 * managed by the protocol layer.
3888 */
3889 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3890 if (kobj) {
3891 mtip_hw_sysfs_init(dd, kobj);
3892 kobject_put(kobj);
3893 }
3894
3895 if (dd->mtip_svc_handler) {
3896 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3897 return rv; /* service thread created for handling rebuild */
3898 }
3899
3900 start_service_thread:
3901 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
3902 dd, dd->numa_node,
3903 "mtip_svc_thd_%02d", index);
3904
3905 if (IS_ERR(dd->mtip_svc_handler)) {
3906 dev_err(&dd->pdev->dev, "service thread failed to start\n");
3907 dd->mtip_svc_handler = NULL;
3908 rv = -EFAULT;
3909 goto kthread_run_error;
3910 }
3911 wake_up_process(dd->mtip_svc_handler);
3912 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3913 rv = wait_for_rebuild;
3914
3915 return rv;
3916
3917 kthread_run_error:
3918 bdput(dd->bdev);
3919 dd->bdev = NULL;
3920
3921 /* Delete our gendisk. This also removes the device from /dev */
3922 del_gendisk(dd->disk);
3923
3924 read_capacity_error:
3925 init_hw_cmds_error:
3926 blk_cleanup_queue(dd->queue);
3927 block_queue_alloc_init_error:
3928 blk_mq_free_tag_set(&dd->tags);
3929 block_queue_alloc_tag_error:
3930 mtip_hw_debugfs_exit(dd);
3931 disk_index_error:
3932 spin_lock(&rssd_index_lock);
3933 ida_remove(&rssd_index_ida, index);
3934 spin_unlock(&rssd_index_lock);
3935
3936 ida_get_error:
3937 put_disk(dd->disk);
3938
3939 alloc_disk_error:
3940 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
3941
3942 protocol_init_error:
3943 return rv;
3944 }
3945
3946 static void mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv)
3947 {
3948 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3949
3950 cmd->status = BLK_STS_IOERR;
3951 blk_mq_complete_request(rq);
3952 }
3953
3954 /*
3955 * Block layer deinitialization function.
3956 *
3957 * Called by the PCI layer as each P320 device is removed.
3958 *
3959 * @dd Pointer to the driver data structure.
3960 *
3961 * return value
3962 * 0
3963 */
3964 static int mtip_block_remove(struct driver_data *dd)
3965 {
3966 struct kobject *kobj;
3967
3968 mtip_hw_debugfs_exit(dd);
3969
3970 if (dd->mtip_svc_handler) {
3971 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
3972 wake_up_interruptible(&dd->port->svc_wait);
3973 kthread_stop(dd->mtip_svc_handler);
3974 }
3975
3976 /* Clean up the sysfs attributes, if created */
3977 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
3978 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3979 if (kobj) {
3980 mtip_hw_sysfs_exit(dd, kobj);
3981 kobject_put(kobj);
3982 }
3983 }
3984
3985 if (!dd->sr) {
3986 /*
3987 * Explicitly wait here for IOs to quiesce,
3988 * as mtip_standby_drive usually won't wait for IOs.
3989 */
3990 if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS))
3991 mtip_standby_drive(dd);
3992 }
3993 else
3994 dev_info(&dd->pdev->dev, "device %s surprise removal\n",
3995 dd->disk->disk_name);
3996
3997 blk_freeze_queue_start(dd->queue);
3998 blk_mq_stop_hw_queues(dd->queue);
3999 blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd);
4000
4001 /*
4002 * Delete our gendisk structure. This also removes the device
4003 * from /dev
4004 */
4005 if (dd->bdev) {
4006 bdput(dd->bdev);
4007 dd->bdev = NULL;
4008 }
4009 if (dd->disk) {
4010 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
4011 del_gendisk(dd->disk);
4012 if (dd->disk->queue) {
4013 blk_cleanup_queue(dd->queue);
4014 blk_mq_free_tag_set(&dd->tags);
4015 dd->queue = NULL;
4016 }
4017 put_disk(dd->disk);
4018 }
4019 dd->disk = NULL;
4020
4021 spin_lock(&rssd_index_lock);
4022 ida_remove(&rssd_index_ida, dd->index);
4023 spin_unlock(&rssd_index_lock);
4024
4025 /* De-initialize the protocol layer. */
4026 mtip_hw_exit(dd);
4027
4028 return 0;
4029 }
4030
4031 /*
4032 * Function called by the PCI layer when just before the
4033 * machine shuts down.
4034 *
4035 * If a protocol layer shutdown function is present it will be called
4036 * by this function.
4037 *
4038 * @dd Pointer to the driver data structure.
4039 *
4040 * return value
4041 * 0
4042 */
4043 static int mtip_block_shutdown(struct driver_data *dd)
4044 {
4045 mtip_hw_shutdown(dd);
4046
4047 /* Delete our gendisk structure, and cleanup the blk queue. */
4048 if (dd->disk) {
4049 dev_info(&dd->pdev->dev,
4050 "Shutting down %s ...\n", dd->disk->disk_name);
4051
4052 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
4053 del_gendisk(dd->disk);
4054 if (dd->disk->queue) {
4055 blk_cleanup_queue(dd->queue);
4056 blk_mq_free_tag_set(&dd->tags);
4057 }
4058 put_disk(dd->disk);
4059 dd->disk = NULL;
4060 dd->queue = NULL;
4061 }
4062
4063 spin_lock(&rssd_index_lock);
4064 ida_remove(&rssd_index_ida, dd->index);
4065 spin_unlock(&rssd_index_lock);
4066 return 0;
4067 }
4068
4069 static int mtip_block_suspend(struct driver_data *dd)
4070 {
4071 dev_info(&dd->pdev->dev,
4072 "Suspending %s ...\n", dd->disk->disk_name);
4073 mtip_hw_suspend(dd);
4074 return 0;
4075 }
4076
4077 static int mtip_block_resume(struct driver_data *dd)
4078 {
4079 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
4080 dd->disk->disk_name);
4081 mtip_hw_resume(dd);
4082 return 0;
4083 }
4084
4085 static void drop_cpu(int cpu)
4086 {
4087 cpu_use[cpu]--;
4088 }
4089
4090 static int get_least_used_cpu_on_node(int node)
4091 {
4092 int cpu, least_used_cpu, least_cnt;
4093 const struct cpumask *node_mask;
4094
4095 node_mask = cpumask_of_node(node);
4096 least_used_cpu = cpumask_first(node_mask);
4097 least_cnt = cpu_use[least_used_cpu];
4098 cpu = least_used_cpu;
4099
4100 for_each_cpu(cpu, node_mask) {
4101 if (cpu_use[cpu] < least_cnt) {
4102 least_used_cpu = cpu;
4103 least_cnt = cpu_use[cpu];
4104 }
4105 }
4106 cpu_use[least_used_cpu]++;
4107 return least_used_cpu;
4108 }
4109
4110 /* Helper for selecting a node in round robin mode */
4111 static inline int mtip_get_next_rr_node(void)
4112 {
4113 static int next_node = -1;
4114
4115 if (next_node == -1) {
4116 next_node = first_online_node;
4117 return next_node;
4118 }
4119
4120 next_node = next_online_node(next_node);
4121 if (next_node == MAX_NUMNODES)
4122 next_node = first_online_node;
4123 return next_node;
4124 }
4125
4126 static DEFINE_HANDLER(0);
4127 static DEFINE_HANDLER(1);
4128 static DEFINE_HANDLER(2);
4129 static DEFINE_HANDLER(3);
4130 static DEFINE_HANDLER(4);
4131 static DEFINE_HANDLER(5);
4132 static DEFINE_HANDLER(6);
4133 static DEFINE_HANDLER(7);
4134
4135 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
4136 {
4137 int pos;
4138 unsigned short pcie_dev_ctrl;
4139
4140 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
4141 if (pos) {
4142 pci_read_config_word(pdev,
4143 pos + PCI_EXP_DEVCTL,
4144 &pcie_dev_ctrl);
4145 if (pcie_dev_ctrl & (1 << 11) ||
4146 pcie_dev_ctrl & (1 << 4)) {
4147 dev_info(&dd->pdev->dev,
4148 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
4149 pdev->vendor, pdev->device);
4150 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
4151 PCI_EXP_DEVCTL_RELAX_EN);
4152 pci_write_config_word(pdev,
4153 pos + PCI_EXP_DEVCTL,
4154 pcie_dev_ctrl);
4155 }
4156 }
4157 }
4158
4159 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
4160 {
4161 /*
4162 * This workaround is specific to AMD/ATI chipset with a PCI upstream
4163 * device with device id 0x5aXX
4164 */
4165 if (pdev->bus && pdev->bus->self) {
4166 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
4167 ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
4168 mtip_disable_link_opts(dd, pdev->bus->self);
4169 } else {
4170 /* Check further up the topology */
4171 struct pci_dev *parent_dev = pdev->bus->self;
4172 if (parent_dev->bus &&
4173 parent_dev->bus->parent &&
4174 parent_dev->bus->parent->self &&
4175 parent_dev->bus->parent->self->vendor ==
4176 PCI_VENDOR_ID_ATI &&
4177 (parent_dev->bus->parent->self->device &
4178 0xff00) == 0x5a00) {
4179 mtip_disable_link_opts(dd,
4180 parent_dev->bus->parent->self);
4181 }
4182 }
4183 }
4184 }
4185
4186 /*
4187 * Called for each supported PCI device detected.
4188 *
4189 * This function allocates the private data structure, enables the
4190 * PCI device and then calls the block layer initialization function.
4191 *
4192 * return value
4193 * 0 on success else an error code.
4194 */
4195 static int mtip_pci_probe(struct pci_dev *pdev,
4196 const struct pci_device_id *ent)
4197 {
4198 int rv = 0;
4199 struct driver_data *dd = NULL;
4200 char cpu_list[256];
4201 const struct cpumask *node_mask;
4202 int cpu, i = 0, j = 0;
4203 int my_node = NUMA_NO_NODE;
4204 unsigned long flags;
4205
4206 /* Allocate memory for this devices private data. */
4207 my_node = pcibus_to_node(pdev->bus);
4208 if (my_node != NUMA_NO_NODE) {
4209 if (!node_online(my_node))
4210 my_node = mtip_get_next_rr_node();
4211 } else {
4212 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4213 my_node = mtip_get_next_rr_node();
4214 }
4215 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4216 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
4217 cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
4218
4219 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
4220 if (dd == NULL) {
4221 dev_err(&pdev->dev,
4222 "Unable to allocate memory for driver data\n");
4223 return -ENOMEM;
4224 }
4225
4226 /* Attach the private data to this PCI device. */
4227 pci_set_drvdata(pdev, dd);
4228
4229 rv = pcim_enable_device(pdev);
4230 if (rv < 0) {
4231 dev_err(&pdev->dev, "Unable to enable device\n");
4232 goto iomap_err;
4233 }
4234
4235 /* Map BAR5 to memory. */
4236 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4237 if (rv < 0) {
4238 dev_err(&pdev->dev, "Unable to map regions\n");
4239 goto iomap_err;
4240 }
4241
4242 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4243 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
4244
4245 if (rv) {
4246 rv = pci_set_consistent_dma_mask(pdev,
4247 DMA_BIT_MASK(32));
4248 if (rv) {
4249 dev_warn(&pdev->dev,
4250 "64-bit DMA enable failed\n");
4251 goto setmask_err;
4252 }
4253 }
4254 }
4255
4256 /* Copy the info we may need later into the private data structure. */
4257 dd->major = mtip_major;
4258 dd->instance = instance;
4259 dd->pdev = pdev;
4260 dd->numa_node = my_node;
4261
4262 INIT_LIST_HEAD(&dd->online_list);
4263 INIT_LIST_HEAD(&dd->remove_list);
4264
4265 memset(dd->workq_name, 0, 32);
4266 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4267
4268 dd->isr_workq = create_workqueue(dd->workq_name);
4269 if (!dd->isr_workq) {
4270 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
4271 rv = -ENOMEM;
4272 goto block_initialize_err;
4273 }
4274
4275 memset(cpu_list, 0, sizeof(cpu_list));
4276
4277 node_mask = cpumask_of_node(dd->numa_node);
4278 if (!cpumask_empty(node_mask)) {
4279 for_each_cpu(cpu, node_mask)
4280 {
4281 snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4282 j = strlen(cpu_list);
4283 }
4284
4285 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4286 dd->numa_node,
4287 topology_physical_package_id(cpumask_first(node_mask)),
4288 nr_cpus_node(dd->numa_node),
4289 cpu_list);
4290 } else
4291 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4292
4293 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4294 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4295 cpu_to_node(dd->isr_binding), dd->isr_binding);
4296
4297 /* first worker context always runs in ISR */
4298 dd->work[0].cpu_binding = dd->isr_binding;
4299 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4300 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4301 dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4302 dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4303 dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4304 dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4305 dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4306
4307 /* Log the bindings */
4308 for_each_present_cpu(cpu) {
4309 memset(cpu_list, 0, sizeof(cpu_list));
4310 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4311 if (dd->work[i].cpu_binding == cpu) {
4312 snprintf(&cpu_list[j], 256 - j, "%d ", i);
4313 j = strlen(cpu_list);
4314 }
4315 }
4316 if (j)
4317 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4318 }
4319
4320 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4321 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4322 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4323 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4324 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4325 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4326 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4327 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4328
4329 pci_set_master(pdev);
4330 rv = pci_enable_msi(pdev);
4331 if (rv) {
4332 dev_warn(&pdev->dev,
4333 "Unable to enable MSI interrupt.\n");
4334 goto msi_initialize_err;
4335 }
4336
4337 mtip_fix_ero_nosnoop(dd, pdev);
4338
4339 /* Initialize the block layer. */
4340 rv = mtip_block_initialize(dd);
4341 if (rv < 0) {
4342 dev_err(&pdev->dev,
4343 "Unable to initialize block layer\n");
4344 goto block_initialize_err;
4345 }
4346
4347 /*
4348 * Increment the instance count so that each device has a unique
4349 * instance number.
4350 */
4351 instance++;
4352 if (rv != MTIP_FTL_REBUILD_MAGIC)
4353 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4354 else
4355 rv = 0; /* device in rebuild state, return 0 from probe */
4356
4357 /* Add to online list even if in ftl rebuild */
4358 spin_lock_irqsave(&dev_lock, flags);
4359 list_add(&dd->online_list, &online_list);
4360 spin_unlock_irqrestore(&dev_lock, flags);
4361
4362 goto done;
4363
4364 block_initialize_err:
4365 pci_disable_msi(pdev);
4366
4367 msi_initialize_err:
4368 if (dd->isr_workq) {
4369 flush_workqueue(dd->isr_workq);
4370 destroy_workqueue(dd->isr_workq);
4371 drop_cpu(dd->work[0].cpu_binding);
4372 drop_cpu(dd->work[1].cpu_binding);
4373 drop_cpu(dd->work[2].cpu_binding);
4374 }
4375 setmask_err:
4376 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4377
4378 iomap_err:
4379 kfree(dd);
4380 pci_set_drvdata(pdev, NULL);
4381 return rv;
4382 done:
4383 return rv;
4384 }
4385
4386 /*
4387 * Called for each probed device when the device is removed or the
4388 * driver is unloaded.
4389 *
4390 * return value
4391 * None
4392 */
4393 static void mtip_pci_remove(struct pci_dev *pdev)
4394 {
4395 struct driver_data *dd = pci_get_drvdata(pdev);
4396 unsigned long flags, to;
4397
4398 set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag);
4399
4400 spin_lock_irqsave(&dev_lock, flags);
4401 list_del_init(&dd->online_list);
4402 list_add(&dd->remove_list, &removing_list);
4403 spin_unlock_irqrestore(&dev_lock, flags);
4404
4405 mtip_check_surprise_removal(pdev);
4406 synchronize_irq(dd->pdev->irq);
4407
4408 /* Spin until workers are done */
4409 to = jiffies + msecs_to_jiffies(4000);
4410 do {
4411 msleep(20);
4412 } while (atomic_read(&dd->irq_workers_active) != 0 &&
4413 time_before(jiffies, to));
4414
4415 if (!dd->sr)
4416 fsync_bdev(dd->bdev);
4417
4418 if (atomic_read(&dd->irq_workers_active) != 0) {
4419 dev_warn(&dd->pdev->dev,
4420 "Completion workers still active!\n");
4421 }
4422
4423 blk_set_queue_dying(dd->queue);
4424 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4425
4426 /* Clean up the block layer. */
4427 mtip_block_remove(dd);
4428
4429 if (dd->isr_workq) {
4430 flush_workqueue(dd->isr_workq);
4431 destroy_workqueue(dd->isr_workq);
4432 drop_cpu(dd->work[0].cpu_binding);
4433 drop_cpu(dd->work[1].cpu_binding);
4434 drop_cpu(dd->work[2].cpu_binding);
4435 }
4436
4437 pci_disable_msi(pdev);
4438
4439 spin_lock_irqsave(&dev_lock, flags);
4440 list_del_init(&dd->remove_list);
4441 spin_unlock_irqrestore(&dev_lock, flags);
4442
4443 kfree(dd);
4444
4445 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4446 pci_set_drvdata(pdev, NULL);
4447 }
4448
4449 /*
4450 * Called for each probed device when the device is suspended.
4451 *
4452 * return value
4453 * 0 Success
4454 * <0 Error
4455 */
4456 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4457 {
4458 int rv = 0;
4459 struct driver_data *dd = pci_get_drvdata(pdev);
4460
4461 if (!dd) {
4462 dev_err(&pdev->dev,
4463 "Driver private datastructure is NULL\n");
4464 return -EFAULT;
4465 }
4466
4467 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4468
4469 /* Disable ports & interrupts then send standby immediate */
4470 rv = mtip_block_suspend(dd);
4471 if (rv < 0) {
4472 dev_err(&pdev->dev,
4473 "Failed to suspend controller\n");
4474 return rv;
4475 }
4476
4477 /*
4478 * Save the pci config space to pdev structure &
4479 * disable the device
4480 */
4481 pci_save_state(pdev);
4482 pci_disable_device(pdev);
4483
4484 /* Move to Low power state*/
4485 pci_set_power_state(pdev, PCI_D3hot);
4486
4487 return rv;
4488 }
4489
4490 /*
4491 * Called for each probed device when the device is resumed.
4492 *
4493 * return value
4494 * 0 Success
4495 * <0 Error
4496 */
4497 static int mtip_pci_resume(struct pci_dev *pdev)
4498 {
4499 int rv = 0;
4500 struct driver_data *dd;
4501
4502 dd = pci_get_drvdata(pdev);
4503 if (!dd) {
4504 dev_err(&pdev->dev,
4505 "Driver private datastructure is NULL\n");
4506 return -EFAULT;
4507 }
4508
4509 /* Move the device to active State */
4510 pci_set_power_state(pdev, PCI_D0);
4511
4512 /* Restore PCI configuration space */
4513 pci_restore_state(pdev);
4514
4515 /* Enable the PCI device*/
4516 rv = pcim_enable_device(pdev);
4517 if (rv < 0) {
4518 dev_err(&pdev->dev,
4519 "Failed to enable card during resume\n");
4520 goto err;
4521 }
4522 pci_set_master(pdev);
4523
4524 /*
4525 * Calls hbaReset, initPort, & startPort function
4526 * then enables interrupts
4527 */
4528 rv = mtip_block_resume(dd);
4529 if (rv < 0)
4530 dev_err(&pdev->dev, "Unable to resume\n");
4531
4532 err:
4533 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4534
4535 return rv;
4536 }
4537
4538 /*
4539 * Shutdown routine
4540 *
4541 * return value
4542 * None
4543 */
4544 static void mtip_pci_shutdown(struct pci_dev *pdev)
4545 {
4546 struct driver_data *dd = pci_get_drvdata(pdev);
4547 if (dd)
4548 mtip_block_shutdown(dd);
4549 }
4550
4551 /* Table of device ids supported by this driver. */
4552 static const struct pci_device_id mtip_pci_tbl[] = {
4553 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4554 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4555 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4556 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4557 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4558 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4559 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
4560 { 0 }
4561 };
4562
4563 /* Structure that describes the PCI driver functions. */
4564 static struct pci_driver mtip_pci_driver = {
4565 .name = MTIP_DRV_NAME,
4566 .id_table = mtip_pci_tbl,
4567 .probe = mtip_pci_probe,
4568 .remove = mtip_pci_remove,
4569 .suspend = mtip_pci_suspend,
4570 .resume = mtip_pci_resume,
4571 .shutdown = mtip_pci_shutdown,
4572 };
4573
4574 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4575
4576 /*
4577 * Module initialization function.
4578 *
4579 * Called once when the module is loaded. This function allocates a major
4580 * block device number to the Cyclone devices and registers the PCI layer
4581 * of the driver.
4582 *
4583 * Return value
4584 * 0 on success else error code.
4585 */
4586 static int __init mtip_init(void)
4587 {
4588 int error;
4589
4590 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4591
4592 spin_lock_init(&dev_lock);
4593
4594 INIT_LIST_HEAD(&online_list);
4595 INIT_LIST_HEAD(&removing_list);
4596
4597 /* Allocate a major block device number to use with this driver. */
4598 error = register_blkdev(0, MTIP_DRV_NAME);
4599 if (error <= 0) {
4600 pr_err("Unable to register block device (%d)\n",
4601 error);
4602 return -EBUSY;
4603 }
4604 mtip_major = error;
4605
4606 dfs_parent = debugfs_create_dir("rssd", NULL);
4607 if (IS_ERR_OR_NULL(dfs_parent)) {
4608 pr_warn("Error creating debugfs parent\n");
4609 dfs_parent = NULL;
4610 }
4611 if (dfs_parent) {
4612 dfs_device_status = debugfs_create_file("device_status",
4613 S_IRUGO, dfs_parent, NULL,
4614 &mtip_device_status_fops);
4615 if (IS_ERR_OR_NULL(dfs_device_status)) {
4616 pr_err("Error creating device_status node\n");
4617 dfs_device_status = NULL;
4618 }
4619 }
4620
4621 /* Register our PCI operations. */
4622 error = pci_register_driver(&mtip_pci_driver);
4623 if (error) {
4624 debugfs_remove(dfs_parent);
4625 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4626 }
4627
4628 return error;
4629 }
4630
4631 /*
4632 * Module de-initialization function.
4633 *
4634 * Called once when the module is unloaded. This function deallocates
4635 * the major block device number allocated by mtip_init() and
4636 * unregisters the PCI layer of the driver.
4637 *
4638 * Return value
4639 * none
4640 */
4641 static void __exit mtip_exit(void)
4642 {
4643 /* Release the allocated major block device number. */
4644 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4645
4646 /* Unregister the PCI driver. */
4647 pci_unregister_driver(&mtip_pci_driver);
4648
4649 debugfs_remove_recursive(dfs_parent);
4650 }
4651
4652 MODULE_AUTHOR("Micron Technology, Inc");
4653 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4654 MODULE_LICENSE("GPL");
4655 MODULE_VERSION(MTIP_DRV_VERSION);
4656
4657 module_init(mtip_init);
4658 module_exit(mtip_exit);
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