2 * NVM Express device driver
3 * Copyright (c) 2011, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 #include <linux/nvme.h>
20 #include <linux/bio.h>
21 #include <linux/bitops.h>
22 #include <linux/blkdev.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
26 #include <linux/genhd.h>
27 #include <linux/idr.h>
28 #include <linux/init.h>
29 #include <linux/interrupt.h>
31 #include <linux/kdev_t.h>
32 #include <linux/kthread.h>
33 #include <linux/kernel.h>
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/pci.h>
38 #include <linux/poison.h>
39 #include <linux/ptrace.h>
40 #include <linux/sched.h>
41 #include <linux/slab.h>
42 #include <linux/types.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
46 #define NVME_Q_DEPTH 1024
47 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
48 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
49 #define ADMIN_TIMEOUT (60 * HZ)
51 static int nvme_major
;
52 module_param(nvme_major
, int, 0);
54 static int use_threaded_interrupts
;
55 module_param(use_threaded_interrupts
, int, 0);
57 static DEFINE_SPINLOCK(dev_list_lock
);
58 static LIST_HEAD(dev_list
);
59 static struct task_struct
*nvme_thread
;
60 static struct workqueue_struct
*nvme_workq
;
62 static void nvme_reset_failed_dev(struct work_struct
*ws
);
64 struct async_cmd_info
{
65 struct kthread_work work
;
66 struct kthread_worker
*worker
;
73 * An NVM Express queue. Each device has at least two (one for admin
74 * commands and one for I/O commands).
77 struct device
*q_dmadev
;
79 char irqname
[24]; /* nvme4294967295-65535\0 */
81 struct nvme_command
*sq_cmds
;
82 volatile struct nvme_completion
*cqes
;
83 dma_addr_t sq_dma_addr
;
84 dma_addr_t cq_dma_addr
;
85 wait_queue_head_t sq_full
;
86 wait_queue_t sq_cong_wait
;
87 struct bio_list sq_cong
;
98 struct async_cmd_info cmdinfo
;
99 unsigned long cmdid_data
[];
103 * Check we didin't inadvertently grow the command struct
105 static inline void _nvme_check_size(void)
107 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
108 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
109 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
110 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
111 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
112 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
113 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
114 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
115 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
116 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
117 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
118 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
121 typedef void (*nvme_completion_fn
)(struct nvme_dev
*, void *,
122 struct nvme_completion
*);
124 struct nvme_cmd_info
{
125 nvme_completion_fn fn
;
127 unsigned long timeout
;
131 static struct nvme_cmd_info
*nvme_cmd_info(struct nvme_queue
*nvmeq
)
133 return (void *)&nvmeq
->cmdid_data
[BITS_TO_LONGS(nvmeq
->q_depth
)];
136 static unsigned nvme_queue_extra(int depth
)
138 return DIV_ROUND_UP(depth
, 8) + (depth
* sizeof(struct nvme_cmd_info
));
142 * alloc_cmdid() - Allocate a Command ID
143 * @nvmeq: The queue that will be used for this command
144 * @ctx: A pointer that will be passed to the handler
145 * @handler: The function to call on completion
147 * Allocate a Command ID for a queue. The data passed in will
148 * be passed to the completion handler. This is implemented by using
149 * the bottom two bits of the ctx pointer to store the handler ID.
150 * Passing in a pointer that's not 4-byte aligned will cause a BUG.
151 * We can change this if it becomes a problem.
153 * May be called with local interrupts disabled and the q_lock held,
154 * or with interrupts enabled and no locks held.
156 static int alloc_cmdid(struct nvme_queue
*nvmeq
, void *ctx
,
157 nvme_completion_fn handler
, unsigned timeout
)
159 int depth
= nvmeq
->q_depth
- 1;
160 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
164 cmdid
= find_first_zero_bit(nvmeq
->cmdid_data
, depth
);
167 } while (test_and_set_bit(cmdid
, nvmeq
->cmdid_data
));
169 info
[cmdid
].fn
= handler
;
170 info
[cmdid
].ctx
= ctx
;
171 info
[cmdid
].timeout
= jiffies
+ timeout
;
172 info
[cmdid
].aborted
= 0;
176 static int alloc_cmdid_killable(struct nvme_queue
*nvmeq
, void *ctx
,
177 nvme_completion_fn handler
, unsigned timeout
)
180 wait_event_killable(nvmeq
->sq_full
,
181 (cmdid
= alloc_cmdid(nvmeq
, ctx
, handler
, timeout
)) >= 0);
182 return (cmdid
< 0) ? -EINTR
: cmdid
;
185 /* Special values must be less than 0x1000 */
186 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
187 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
188 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
189 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
190 #define CMD_CTX_FLUSH (0x318 + CMD_CTX_BASE)
191 #define CMD_CTX_ABORT (0x31C + CMD_CTX_BASE)
193 static void special_completion(struct nvme_dev
*dev
, void *ctx
,
194 struct nvme_completion
*cqe
)
196 if (ctx
== CMD_CTX_CANCELLED
)
198 if (ctx
== CMD_CTX_FLUSH
)
200 if (ctx
== CMD_CTX_ABORT
) {
204 if (ctx
== CMD_CTX_COMPLETED
) {
205 dev_warn(&dev
->pci_dev
->dev
,
206 "completed id %d twice on queue %d\n",
207 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
210 if (ctx
== CMD_CTX_INVALID
) {
211 dev_warn(&dev
->pci_dev
->dev
,
212 "invalid id %d completed on queue %d\n",
213 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
217 dev_warn(&dev
->pci_dev
->dev
, "Unknown special completion %p\n", ctx
);
220 static void async_completion(struct nvme_dev
*dev
, void *ctx
,
221 struct nvme_completion
*cqe
)
223 struct async_cmd_info
*cmdinfo
= ctx
;
224 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
225 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
226 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
230 * Called with local interrupts disabled and the q_lock held. May not sleep.
232 static void *free_cmdid(struct nvme_queue
*nvmeq
, int cmdid
,
233 nvme_completion_fn
*fn
)
236 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
238 if (cmdid
>= nvmeq
->q_depth
) {
239 *fn
= special_completion
;
240 return CMD_CTX_INVALID
;
243 *fn
= info
[cmdid
].fn
;
244 ctx
= info
[cmdid
].ctx
;
245 info
[cmdid
].fn
= special_completion
;
246 info
[cmdid
].ctx
= CMD_CTX_COMPLETED
;
247 clear_bit(cmdid
, nvmeq
->cmdid_data
);
248 wake_up(&nvmeq
->sq_full
);
252 static void *cancel_cmdid(struct nvme_queue
*nvmeq
, int cmdid
,
253 nvme_completion_fn
*fn
)
256 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
258 *fn
= info
[cmdid
].fn
;
259 ctx
= info
[cmdid
].ctx
;
260 info
[cmdid
].fn
= special_completion
;
261 info
[cmdid
].ctx
= CMD_CTX_CANCELLED
;
265 struct nvme_queue
*get_nvmeq(struct nvme_dev
*dev
)
267 return dev
->queues
[get_cpu() + 1];
270 void put_nvmeq(struct nvme_queue
*nvmeq
)
276 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
277 * @nvmeq: The queue to use
278 * @cmd: The command to send
280 * Safe to use from interrupt context
282 static int nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
286 spin_lock_irqsave(&nvmeq
->q_lock
, flags
);
287 tail
= nvmeq
->sq_tail
;
288 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
289 if (++tail
== nvmeq
->q_depth
)
291 writel(tail
, nvmeq
->q_db
);
292 nvmeq
->sq_tail
= tail
;
293 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
298 static __le64
**iod_list(struct nvme_iod
*iod
)
300 return ((void *)iod
) + iod
->offset
;
304 * Will slightly overestimate the number of pages needed. This is OK
305 * as it only leads to a small amount of wasted memory for the lifetime of
308 static int nvme_npages(unsigned size
)
310 unsigned nprps
= DIV_ROUND_UP(size
+ PAGE_SIZE
, PAGE_SIZE
);
311 return DIV_ROUND_UP(8 * nprps
, PAGE_SIZE
- 8);
314 static struct nvme_iod
*
315 nvme_alloc_iod(unsigned nseg
, unsigned nbytes
, gfp_t gfp
)
317 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
318 sizeof(__le64
*) * nvme_npages(nbytes
) +
319 sizeof(struct scatterlist
) * nseg
, gfp
);
322 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
324 iod
->length
= nbytes
;
326 iod
->start_time
= jiffies
;
332 void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
334 const int last_prp
= PAGE_SIZE
/ 8 - 1;
336 __le64
**list
= iod_list(iod
);
337 dma_addr_t prp_dma
= iod
->first_dma
;
339 if (iod
->npages
== 0)
340 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
341 for (i
= 0; i
< iod
->npages
; i
++) {
342 __le64
*prp_list
= list
[i
];
343 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
344 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
345 prp_dma
= next_prp_dma
;
350 static void nvme_start_io_acct(struct bio
*bio
)
352 struct gendisk
*disk
= bio
->bi_bdev
->bd_disk
;
353 const int rw
= bio_data_dir(bio
);
354 int cpu
= part_stat_lock();
355 part_round_stats(cpu
, &disk
->part0
);
356 part_stat_inc(cpu
, &disk
->part0
, ios
[rw
]);
357 part_stat_add(cpu
, &disk
->part0
, sectors
[rw
], bio_sectors(bio
));
358 part_inc_in_flight(&disk
->part0
, rw
);
362 static void nvme_end_io_acct(struct bio
*bio
, unsigned long start_time
)
364 struct gendisk
*disk
= bio
->bi_bdev
->bd_disk
;
365 const int rw
= bio_data_dir(bio
);
366 unsigned long duration
= jiffies
- start_time
;
367 int cpu
= part_stat_lock();
368 part_stat_add(cpu
, &disk
->part0
, ticks
[rw
], duration
);
369 part_round_stats(cpu
, &disk
->part0
);
370 part_dec_in_flight(&disk
->part0
, rw
);
374 static void bio_completion(struct nvme_dev
*dev
, void *ctx
,
375 struct nvme_completion
*cqe
)
377 struct nvme_iod
*iod
= ctx
;
378 struct bio
*bio
= iod
->private;
379 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
382 dma_unmap_sg(&dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
383 bio_data_dir(bio
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
384 nvme_end_io_acct(bio
, iod
->start_time
);
386 nvme_free_iod(dev
, iod
);
388 bio_endio(bio
, -EIO
);
393 /* length is in bytes. gfp flags indicates whether we may sleep. */
394 int nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_common_command
*cmd
,
395 struct nvme_iod
*iod
, int total_len
, gfp_t gfp
)
397 struct dma_pool
*pool
;
398 int length
= total_len
;
399 struct scatterlist
*sg
= iod
->sg
;
400 int dma_len
= sg_dma_len(sg
);
401 u64 dma_addr
= sg_dma_address(sg
);
402 int offset
= offset_in_page(dma_addr
);
404 __le64
**list
= iod_list(iod
);
408 cmd
->prp1
= cpu_to_le64(dma_addr
);
409 length
-= (PAGE_SIZE
- offset
);
413 dma_len
-= (PAGE_SIZE
- offset
);
415 dma_addr
+= (PAGE_SIZE
- offset
);
418 dma_addr
= sg_dma_address(sg
);
419 dma_len
= sg_dma_len(sg
);
422 if (length
<= PAGE_SIZE
) {
423 cmd
->prp2
= cpu_to_le64(dma_addr
);
427 nprps
= DIV_ROUND_UP(length
, PAGE_SIZE
);
428 if (nprps
<= (256 / 8)) {
429 pool
= dev
->prp_small_pool
;
432 pool
= dev
->prp_page_pool
;
436 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
438 cmd
->prp2
= cpu_to_le64(dma_addr
);
440 return (total_len
- length
) + PAGE_SIZE
;
443 iod
->first_dma
= prp_dma
;
444 cmd
->prp2
= cpu_to_le64(prp_dma
);
447 if (i
== PAGE_SIZE
/ 8) {
448 __le64
*old_prp_list
= prp_list
;
449 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
451 return total_len
- length
;
452 list
[iod
->npages
++] = prp_list
;
453 prp_list
[0] = old_prp_list
[i
- 1];
454 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
457 prp_list
[i
++] = cpu_to_le64(dma_addr
);
458 dma_len
-= PAGE_SIZE
;
459 dma_addr
+= PAGE_SIZE
;
467 dma_addr
= sg_dma_address(sg
);
468 dma_len
= sg_dma_len(sg
);
474 struct nvme_bio_pair
{
475 struct bio b1
, b2
, *parent
;
476 struct bio_vec
*bv1
, *bv2
;
481 static void nvme_bio_pair_endio(struct bio
*bio
, int err
)
483 struct nvme_bio_pair
*bp
= bio
->bi_private
;
488 if (atomic_dec_and_test(&bp
->cnt
)) {
489 bio_endio(bp
->parent
, bp
->err
);
496 static struct nvme_bio_pair
*nvme_bio_split(struct bio
*bio
, int idx
,
499 struct nvme_bio_pair
*bp
;
501 BUG_ON(len
> bio
->bi_size
);
502 BUG_ON(idx
> bio
->bi_vcnt
);
504 bp
= kmalloc(sizeof(*bp
), GFP_ATOMIC
);
512 bp
->b1
.bi_size
= len
;
513 bp
->b2
.bi_size
-= len
;
514 bp
->b1
.bi_vcnt
= idx
;
516 bp
->b2
.bi_sector
+= len
>> 9;
519 bp
->bv1
= kmalloc(bio
->bi_max_vecs
* sizeof(struct bio_vec
),
524 bp
->bv2
= kmalloc(bio
->bi_max_vecs
* sizeof(struct bio_vec
),
529 memcpy(bp
->bv1
, bio
->bi_io_vec
,
530 bio
->bi_max_vecs
* sizeof(struct bio_vec
));
531 memcpy(bp
->bv2
, bio
->bi_io_vec
,
532 bio
->bi_max_vecs
* sizeof(struct bio_vec
));
534 bp
->b1
.bi_io_vec
= bp
->bv1
;
535 bp
->b2
.bi_io_vec
= bp
->bv2
;
536 bp
->b2
.bi_io_vec
[idx
].bv_offset
+= offset
;
537 bp
->b2
.bi_io_vec
[idx
].bv_len
-= offset
;
538 bp
->b1
.bi_io_vec
[idx
].bv_len
= offset
;
541 bp
->bv1
= bp
->bv2
= NULL
;
543 bp
->b1
.bi_private
= bp
;
544 bp
->b2
.bi_private
= bp
;
546 bp
->b1
.bi_end_io
= nvme_bio_pair_endio
;
547 bp
->b2
.bi_end_io
= nvme_bio_pair_endio
;
550 atomic_set(&bp
->cnt
, 2);
561 static int nvme_split_and_submit(struct bio
*bio
, struct nvme_queue
*nvmeq
,
562 int idx
, int len
, int offset
)
564 struct nvme_bio_pair
*bp
= nvme_bio_split(bio
, idx
, len
, offset
);
568 if (bio_list_empty(&nvmeq
->sq_cong
))
569 add_wait_queue(&nvmeq
->sq_full
, &nvmeq
->sq_cong_wait
);
570 bio_list_add(&nvmeq
->sq_cong
, &bp
->b1
);
571 bio_list_add(&nvmeq
->sq_cong
, &bp
->b2
);
576 /* NVMe scatterlists require no holes in the virtual address */
577 #define BIOVEC_NOT_VIRT_MERGEABLE(vec1, vec2) ((vec2)->bv_offset || \
578 (((vec1)->bv_offset + (vec1)->bv_len) % PAGE_SIZE))
580 static int nvme_map_bio(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
,
581 struct bio
*bio
, enum dma_data_direction dma_dir
, int psegs
)
583 struct bio_vec
*bvec
, *bvprv
= NULL
;
584 struct scatterlist
*sg
= NULL
;
585 int i
, length
= 0, nsegs
= 0, split_len
= bio
->bi_size
;
587 if (nvmeq
->dev
->stripe_size
)
588 split_len
= nvmeq
->dev
->stripe_size
-
589 ((bio
->bi_sector
<< 9) & (nvmeq
->dev
->stripe_size
- 1));
591 sg_init_table(iod
->sg
, psegs
);
592 bio_for_each_segment(bvec
, bio
, i
) {
593 if (bvprv
&& BIOVEC_PHYS_MERGEABLE(bvprv
, bvec
)) {
594 sg
->length
+= bvec
->bv_len
;
596 if (bvprv
&& BIOVEC_NOT_VIRT_MERGEABLE(bvprv
, bvec
))
597 return nvme_split_and_submit(bio
, nvmeq
, i
,
600 sg
= sg
? sg
+ 1 : iod
->sg
;
601 sg_set_page(sg
, bvec
->bv_page
, bvec
->bv_len
,
606 if (split_len
- length
< bvec
->bv_len
)
607 return nvme_split_and_submit(bio
, nvmeq
, i
, split_len
,
609 length
+= bvec
->bv_len
;
614 if (dma_map_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
, dma_dir
) == 0)
617 BUG_ON(length
!= bio
->bi_size
);
622 * We reuse the small pool to allocate the 16-byte range here as it is not
623 * worth having a special pool for these or additional cases to handle freeing
626 static int nvme_submit_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
627 struct bio
*bio
, struct nvme_iod
*iod
, int cmdid
)
629 struct nvme_dsm_range
*range
;
630 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
632 range
= dma_pool_alloc(nvmeq
->dev
->prp_small_pool
, GFP_ATOMIC
,
637 iod_list(iod
)[0] = (__le64
*)range
;
640 range
->cattr
= cpu_to_le32(0);
641 range
->nlb
= cpu_to_le32(bio
->bi_size
>> ns
->lba_shift
);
642 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, bio
->bi_sector
));
644 memset(cmnd
, 0, sizeof(*cmnd
));
645 cmnd
->dsm
.opcode
= nvme_cmd_dsm
;
646 cmnd
->dsm
.command_id
= cmdid
;
647 cmnd
->dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
648 cmnd
->dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
650 cmnd
->dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
652 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
654 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
659 static int nvme_submit_flush(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
662 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
664 memset(cmnd
, 0, sizeof(*cmnd
));
665 cmnd
->common
.opcode
= nvme_cmd_flush
;
666 cmnd
->common
.command_id
= cmdid
;
667 cmnd
->common
.nsid
= cpu_to_le32(ns
->ns_id
);
669 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
671 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
676 int nvme_submit_flush_data(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
)
678 int cmdid
= alloc_cmdid(nvmeq
, (void *)CMD_CTX_FLUSH
,
679 special_completion
, NVME_IO_TIMEOUT
);
680 if (unlikely(cmdid
< 0))
683 return nvme_submit_flush(nvmeq
, ns
, cmdid
);
687 * Called with local interrupts disabled and the q_lock held. May not sleep.
689 static int nvme_submit_bio_queue(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
692 struct nvme_command
*cmnd
;
693 struct nvme_iod
*iod
;
694 enum dma_data_direction dma_dir
;
695 int cmdid
, length
, result
;
698 int psegs
= bio_phys_segments(ns
->queue
, bio
);
700 if ((bio
->bi_rw
& REQ_FLUSH
) && psegs
) {
701 result
= nvme_submit_flush_data(nvmeq
, ns
);
707 iod
= nvme_alloc_iod(psegs
, bio
->bi_size
, GFP_ATOMIC
);
713 cmdid
= alloc_cmdid(nvmeq
, iod
, bio_completion
, NVME_IO_TIMEOUT
);
714 if (unlikely(cmdid
< 0))
717 if (bio
->bi_rw
& REQ_DISCARD
) {
718 result
= nvme_submit_discard(nvmeq
, ns
, bio
, iod
, cmdid
);
723 if ((bio
->bi_rw
& REQ_FLUSH
) && !psegs
)
724 return nvme_submit_flush(nvmeq
, ns
, cmdid
);
727 if (bio
->bi_rw
& REQ_FUA
)
728 control
|= NVME_RW_FUA
;
729 if (bio
->bi_rw
& (REQ_FAILFAST_DEV
| REQ_RAHEAD
))
730 control
|= NVME_RW_LR
;
733 if (bio
->bi_rw
& REQ_RAHEAD
)
734 dsmgmt
|= NVME_RW_DSM_FREQ_PREFETCH
;
736 cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
738 memset(cmnd
, 0, sizeof(*cmnd
));
739 if (bio_data_dir(bio
)) {
740 cmnd
->rw
.opcode
= nvme_cmd_write
;
741 dma_dir
= DMA_TO_DEVICE
;
743 cmnd
->rw
.opcode
= nvme_cmd_read
;
744 dma_dir
= DMA_FROM_DEVICE
;
747 result
= nvme_map_bio(nvmeq
, iod
, bio
, dma_dir
, psegs
);
752 cmnd
->rw
.command_id
= cmdid
;
753 cmnd
->rw
.nsid
= cpu_to_le32(ns
->ns_id
);
754 length
= nvme_setup_prps(nvmeq
->dev
, &cmnd
->common
, iod
, length
,
756 cmnd
->rw
.slba
= cpu_to_le64(nvme_block_nr(ns
, bio
->bi_sector
));
757 cmnd
->rw
.length
= cpu_to_le16((length
>> ns
->lba_shift
) - 1);
758 cmnd
->rw
.control
= cpu_to_le16(control
);
759 cmnd
->rw
.dsmgmt
= cpu_to_le32(dsmgmt
);
761 nvme_start_io_acct(bio
);
762 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
764 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
769 free_cmdid(nvmeq
, cmdid
, NULL
);
771 nvme_free_iod(nvmeq
->dev
, iod
);
776 static int nvme_process_cq(struct nvme_queue
*nvmeq
)
780 head
= nvmeq
->cq_head
;
781 phase
= nvmeq
->cq_phase
;
785 nvme_completion_fn fn
;
786 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
787 if ((le16_to_cpu(cqe
.status
) & 1) != phase
)
789 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
790 if (++head
== nvmeq
->q_depth
) {
795 ctx
= free_cmdid(nvmeq
, cqe
.command_id
, &fn
);
796 fn(nvmeq
->dev
, ctx
, &cqe
);
799 /* If the controller ignores the cq head doorbell and continuously
800 * writes to the queue, it is theoretically possible to wrap around
801 * the queue twice and mistakenly return IRQ_NONE. Linux only
802 * requires that 0.1% of your interrupts are handled, so this isn't
805 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
808 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
809 nvmeq
->cq_head
= head
;
810 nvmeq
->cq_phase
= phase
;
816 static void nvme_make_request(struct request_queue
*q
, struct bio
*bio
)
818 struct nvme_ns
*ns
= q
->queuedata
;
819 struct nvme_queue
*nvmeq
= get_nvmeq(ns
->dev
);
824 bio_endio(bio
, -EIO
);
828 spin_lock_irq(&nvmeq
->q_lock
);
829 if (!nvmeq
->q_suspended
&& bio_list_empty(&nvmeq
->sq_cong
))
830 result
= nvme_submit_bio_queue(nvmeq
, ns
, bio
);
831 if (unlikely(result
)) {
832 if (bio_list_empty(&nvmeq
->sq_cong
))
833 add_wait_queue(&nvmeq
->sq_full
, &nvmeq
->sq_cong_wait
);
834 bio_list_add(&nvmeq
->sq_cong
, bio
);
837 nvme_process_cq(nvmeq
);
838 spin_unlock_irq(&nvmeq
->q_lock
);
842 static irqreturn_t
nvme_irq(int irq
, void *data
)
845 struct nvme_queue
*nvmeq
= data
;
846 spin_lock(&nvmeq
->q_lock
);
847 nvme_process_cq(nvmeq
);
848 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
850 spin_unlock(&nvmeq
->q_lock
);
854 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
856 struct nvme_queue
*nvmeq
= data
;
857 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
858 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
860 return IRQ_WAKE_THREAD
;
863 static void nvme_abort_command(struct nvme_queue
*nvmeq
, int cmdid
)
865 spin_lock_irq(&nvmeq
->q_lock
);
866 cancel_cmdid(nvmeq
, cmdid
, NULL
);
867 spin_unlock_irq(&nvmeq
->q_lock
);
870 struct sync_cmd_info
{
871 struct task_struct
*task
;
876 static void sync_completion(struct nvme_dev
*dev
, void *ctx
,
877 struct nvme_completion
*cqe
)
879 struct sync_cmd_info
*cmdinfo
= ctx
;
880 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
881 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
882 wake_up_process(cmdinfo
->task
);
886 * Returns 0 on success. If the result is negative, it's a Linux error code;
887 * if the result is positive, it's an NVM Express status code
889 int nvme_submit_sync_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
,
890 u32
*result
, unsigned timeout
)
893 struct sync_cmd_info cmdinfo
;
895 cmdinfo
.task
= current
;
896 cmdinfo
.status
= -EINTR
;
898 cmdid
= alloc_cmdid_killable(nvmeq
, &cmdinfo
, sync_completion
,
902 cmd
->common
.command_id
= cmdid
;
904 set_current_state(TASK_KILLABLE
);
905 nvme_submit_cmd(nvmeq
, cmd
);
906 schedule_timeout(timeout
);
908 if (cmdinfo
.status
== -EINTR
) {
909 nvme_abort_command(nvmeq
, cmdid
);
914 *result
= cmdinfo
.result
;
916 return cmdinfo
.status
;
919 static int nvme_submit_async_cmd(struct nvme_queue
*nvmeq
,
920 struct nvme_command
*cmd
,
921 struct async_cmd_info
*cmdinfo
, unsigned timeout
)
925 cmdid
= alloc_cmdid_killable(nvmeq
, cmdinfo
, async_completion
, timeout
);
928 cmdinfo
->status
= -EINTR
;
929 cmd
->common
.command_id
= cmdid
;
930 nvme_submit_cmd(nvmeq
, cmd
);
934 int nvme_submit_admin_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
937 return nvme_submit_sync_cmd(dev
->queues
[0], cmd
, result
, ADMIN_TIMEOUT
);
940 static int nvme_submit_admin_cmd_async(struct nvme_dev
*dev
,
941 struct nvme_command
*cmd
, struct async_cmd_info
*cmdinfo
)
943 return nvme_submit_async_cmd(dev
->queues
[0], cmd
, cmdinfo
,
947 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
950 struct nvme_command c
;
952 memset(&c
, 0, sizeof(c
));
953 c
.delete_queue
.opcode
= opcode
;
954 c
.delete_queue
.qid
= cpu_to_le16(id
);
956 status
= nvme_submit_admin_cmd(dev
, &c
, NULL
);
962 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
963 struct nvme_queue
*nvmeq
)
966 struct nvme_command c
;
967 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
969 memset(&c
, 0, sizeof(c
));
970 c
.create_cq
.opcode
= nvme_admin_create_cq
;
971 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
972 c
.create_cq
.cqid
= cpu_to_le16(qid
);
973 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
974 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
975 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
977 status
= nvme_submit_admin_cmd(dev
, &c
, NULL
);
983 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
984 struct nvme_queue
*nvmeq
)
987 struct nvme_command c
;
988 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
990 memset(&c
, 0, sizeof(c
));
991 c
.create_sq
.opcode
= nvme_admin_create_sq
;
992 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
993 c
.create_sq
.sqid
= cpu_to_le16(qid
);
994 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
995 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
996 c
.create_sq
.cqid
= cpu_to_le16(qid
);
998 status
= nvme_submit_admin_cmd(dev
, &c
, NULL
);
1004 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
1006 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
1009 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
1011 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
1014 int nvme_identify(struct nvme_dev
*dev
, unsigned nsid
, unsigned cns
,
1015 dma_addr_t dma_addr
)
1017 struct nvme_command c
;
1019 memset(&c
, 0, sizeof(c
));
1020 c
.identify
.opcode
= nvme_admin_identify
;
1021 c
.identify
.nsid
= cpu_to_le32(nsid
);
1022 c
.identify
.prp1
= cpu_to_le64(dma_addr
);
1023 c
.identify
.cns
= cpu_to_le32(cns
);
1025 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
1028 int nvme_get_features(struct nvme_dev
*dev
, unsigned fid
, unsigned nsid
,
1029 dma_addr_t dma_addr
, u32
*result
)
1031 struct nvme_command c
;
1033 memset(&c
, 0, sizeof(c
));
1034 c
.features
.opcode
= nvme_admin_get_features
;
1035 c
.features
.nsid
= cpu_to_le32(nsid
);
1036 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1037 c
.features
.fid
= cpu_to_le32(fid
);
1039 return nvme_submit_admin_cmd(dev
, &c
, result
);
1042 int nvme_set_features(struct nvme_dev
*dev
, unsigned fid
, unsigned dword11
,
1043 dma_addr_t dma_addr
, u32
*result
)
1045 struct nvme_command c
;
1047 memset(&c
, 0, sizeof(c
));
1048 c
.features
.opcode
= nvme_admin_set_features
;
1049 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1050 c
.features
.fid
= cpu_to_le32(fid
);
1051 c
.features
.dword11
= cpu_to_le32(dword11
);
1053 return nvme_submit_admin_cmd(dev
, &c
, result
);
1057 * nvme_abort_cmd - Attempt aborting a command
1058 * @cmdid: Command id of a timed out IO
1059 * @queue: The queue with timed out IO
1061 * Schedule controller reset if the command was already aborted once before and
1062 * still hasn't been returned to the driver, or if this is the admin queue.
1064 static void nvme_abort_cmd(int cmdid
, struct nvme_queue
*nvmeq
)
1067 struct nvme_command cmd
;
1068 struct nvme_dev
*dev
= nvmeq
->dev
;
1069 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
1071 if (!nvmeq
->qid
|| info
[cmdid
].aborted
) {
1072 if (work_busy(&dev
->reset_work
))
1074 list_del_init(&dev
->node
);
1075 dev_warn(&dev
->pci_dev
->dev
,
1076 "I/O %d QID %d timeout, reset controller\n", cmdid
,
1078 PREPARE_WORK(&dev
->reset_work
, nvme_reset_failed_dev
);
1079 queue_work(nvme_workq
, &dev
->reset_work
);
1083 if (!dev
->abort_limit
)
1086 a_cmdid
= alloc_cmdid(dev
->queues
[0], CMD_CTX_ABORT
, special_completion
,
1091 memset(&cmd
, 0, sizeof(cmd
));
1092 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1093 cmd
.abort
.cid
= cmdid
;
1094 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1095 cmd
.abort
.command_id
= a_cmdid
;
1098 info
[cmdid
].aborted
= 1;
1099 info
[cmdid
].timeout
= jiffies
+ ADMIN_TIMEOUT
;
1101 dev_warn(nvmeq
->q_dmadev
, "Aborting I/O %d QID %d\n", cmdid
,
1103 nvme_submit_cmd(dev
->queues
[0], &cmd
);
1107 * nvme_cancel_ios - Cancel outstanding I/Os
1108 * @queue: The queue to cancel I/Os on
1109 * @timeout: True to only cancel I/Os which have timed out
1111 static void nvme_cancel_ios(struct nvme_queue
*nvmeq
, bool timeout
)
1113 int depth
= nvmeq
->q_depth
- 1;
1114 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
1115 unsigned long now
= jiffies
;
1118 for_each_set_bit(cmdid
, nvmeq
->cmdid_data
, depth
) {
1120 nvme_completion_fn fn
;
1121 static struct nvme_completion cqe
= {
1122 .status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1),
1125 if (timeout
&& !time_after(now
, info
[cmdid
].timeout
))
1127 if (info
[cmdid
].ctx
== CMD_CTX_CANCELLED
)
1129 if (timeout
&& nvmeq
->dev
->initialized
) {
1130 nvme_abort_cmd(cmdid
, nvmeq
);
1133 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n", cmdid
,
1135 ctx
= cancel_cmdid(nvmeq
, cmdid
, &fn
);
1136 fn(nvmeq
->dev
, ctx
, &cqe
);
1140 static void nvme_free_queue(struct nvme_queue
*nvmeq
)
1142 spin_lock_irq(&nvmeq
->q_lock
);
1143 while (bio_list_peek(&nvmeq
->sq_cong
)) {
1144 struct bio
*bio
= bio_list_pop(&nvmeq
->sq_cong
);
1145 bio_endio(bio
, -EIO
);
1147 spin_unlock_irq(&nvmeq
->q_lock
);
1149 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1150 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1151 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1152 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1156 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1160 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1161 nvme_free_queue(dev
->queues
[i
]);
1163 dev
->queues
[i
] = NULL
;
1168 * nvme_suspend_queue - put queue into suspended state
1169 * @nvmeq - queue to suspend
1171 * Returns 1 if already suspended, 0 otherwise.
1173 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1175 int vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1177 spin_lock_irq(&nvmeq
->q_lock
);
1178 if (nvmeq
->q_suspended
) {
1179 spin_unlock_irq(&nvmeq
->q_lock
);
1182 nvmeq
->q_suspended
= 1;
1183 spin_unlock_irq(&nvmeq
->q_lock
);
1185 irq_set_affinity_hint(vector
, NULL
);
1186 free_irq(vector
, nvmeq
);
1191 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1193 spin_lock_irq(&nvmeq
->q_lock
);
1194 nvme_process_cq(nvmeq
);
1195 nvme_cancel_ios(nvmeq
, false);
1196 spin_unlock_irq(&nvmeq
->q_lock
);
1199 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1201 struct nvme_queue
*nvmeq
= dev
->queues
[qid
];
1205 if (nvme_suspend_queue(nvmeq
))
1208 /* Don't tell the adapter to delete the admin queue.
1209 * Don't tell a removed adapter to delete IO queues. */
1210 if (qid
&& readl(&dev
->bar
->csts
) != -1) {
1211 adapter_delete_sq(dev
, qid
);
1212 adapter_delete_cq(dev
, qid
);
1214 nvme_clear_queue(nvmeq
);
1217 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1218 int depth
, int vector
)
1220 struct device
*dmadev
= &dev
->pci_dev
->dev
;
1221 unsigned extra
= nvme_queue_extra(depth
);
1222 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
) + extra
, GFP_KERNEL
);
1226 nvmeq
->cqes
= dma_alloc_coherent(dmadev
, CQ_SIZE(depth
),
1227 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1230 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(depth
));
1232 nvmeq
->sq_cmds
= dma_alloc_coherent(dmadev
, SQ_SIZE(depth
),
1233 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1234 if (!nvmeq
->sq_cmds
)
1237 nvmeq
->q_dmadev
= dmadev
;
1239 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1240 dev
->instance
, qid
);
1241 spin_lock_init(&nvmeq
->q_lock
);
1243 nvmeq
->cq_phase
= 1;
1244 init_waitqueue_head(&nvmeq
->sq_full
);
1245 init_waitqueue_entry(&nvmeq
->sq_cong_wait
, nvme_thread
);
1246 bio_list_init(&nvmeq
->sq_cong
);
1247 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1248 nvmeq
->q_depth
= depth
;
1249 nvmeq
->cq_vector
= vector
;
1251 nvmeq
->q_suspended
= 1;
1257 dma_free_coherent(dmadev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1258 nvmeq
->cq_dma_addr
);
1264 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1267 if (use_threaded_interrupts
)
1268 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1269 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1271 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1272 IRQF_SHARED
, name
, nvmeq
);
1275 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1277 struct nvme_dev
*dev
= nvmeq
->dev
;
1278 unsigned extra
= nvme_queue_extra(nvmeq
->q_depth
);
1282 nvmeq
->cq_phase
= 1;
1283 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1284 memset(nvmeq
->cmdid_data
, 0, extra
);
1285 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1286 nvme_cancel_ios(nvmeq
, false);
1287 nvmeq
->q_suspended
= 0;
1290 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1292 struct nvme_dev
*dev
= nvmeq
->dev
;
1295 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1299 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1303 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1307 spin_lock_irq(&nvmeq
->q_lock
);
1308 nvme_init_queue(nvmeq
, qid
);
1309 spin_unlock_irq(&nvmeq
->q_lock
);
1314 adapter_delete_sq(dev
, qid
);
1316 adapter_delete_cq(dev
, qid
);
1320 static int nvme_wait_ready(struct nvme_dev
*dev
, u64 cap
, bool enabled
)
1322 unsigned long timeout
;
1323 u32 bit
= enabled
? NVME_CSTS_RDY
: 0;
1325 timeout
= ((NVME_CAP_TIMEOUT(cap
) + 1) * HZ
/ 2) + jiffies
;
1327 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_RDY
) != bit
) {
1329 if (fatal_signal_pending(current
))
1331 if (time_after(jiffies
, timeout
)) {
1332 dev_err(&dev
->pci_dev
->dev
,
1333 "Device not ready; aborting initialisation\n");
1342 * If the device has been passed off to us in an enabled state, just clear
1343 * the enabled bit. The spec says we should set the 'shutdown notification
1344 * bits', but doing so may cause the device to complete commands to the
1345 * admin queue ... and we don't know what memory that might be pointing at!
1347 static int nvme_disable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1349 u32 cc
= readl(&dev
->bar
->cc
);
1351 if (cc
& NVME_CC_ENABLE
)
1352 writel(cc
& ~NVME_CC_ENABLE
, &dev
->bar
->cc
);
1353 return nvme_wait_ready(dev
, cap
, false);
1356 static int nvme_enable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1358 return nvme_wait_ready(dev
, cap
, true);
1361 static int nvme_shutdown_ctrl(struct nvme_dev
*dev
)
1363 unsigned long timeout
;
1366 cc
= (readl(&dev
->bar
->cc
) & ~NVME_CC_SHN_MASK
) | NVME_CC_SHN_NORMAL
;
1367 writel(cc
, &dev
->bar
->cc
);
1369 timeout
= 2 * HZ
+ jiffies
;
1370 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_SHST_MASK
) !=
1371 NVME_CSTS_SHST_CMPLT
) {
1373 if (fatal_signal_pending(current
))
1375 if (time_after(jiffies
, timeout
)) {
1376 dev_err(&dev
->pci_dev
->dev
,
1377 "Device shutdown incomplete; abort shutdown\n");
1385 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1389 u64 cap
= readq(&dev
->bar
->cap
);
1390 struct nvme_queue
*nvmeq
;
1392 result
= nvme_disable_ctrl(dev
, cap
);
1396 nvmeq
= dev
->queues
[0];
1398 nvmeq
= nvme_alloc_queue(dev
, 0, 64, 0);
1401 dev
->queues
[0] = nvmeq
;
1404 aqa
= nvmeq
->q_depth
- 1;
1407 dev
->ctrl_config
= NVME_CC_ENABLE
| NVME_CC_CSS_NVM
;
1408 dev
->ctrl_config
|= (PAGE_SHIFT
- 12) << NVME_CC_MPS_SHIFT
;
1409 dev
->ctrl_config
|= NVME_CC_ARB_RR
| NVME_CC_SHN_NONE
;
1410 dev
->ctrl_config
|= NVME_CC_IOSQES
| NVME_CC_IOCQES
;
1412 writel(aqa
, &dev
->bar
->aqa
);
1413 writeq(nvmeq
->sq_dma_addr
, &dev
->bar
->asq
);
1414 writeq(nvmeq
->cq_dma_addr
, &dev
->bar
->acq
);
1415 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1417 result
= nvme_enable_ctrl(dev
, cap
);
1421 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1425 spin_lock_irq(&nvmeq
->q_lock
);
1426 nvme_init_queue(nvmeq
, 0);
1427 spin_unlock_irq(&nvmeq
->q_lock
);
1431 struct nvme_iod
*nvme_map_user_pages(struct nvme_dev
*dev
, int write
,
1432 unsigned long addr
, unsigned length
)
1434 int i
, err
, count
, nents
, offset
;
1435 struct scatterlist
*sg
;
1436 struct page
**pages
;
1437 struct nvme_iod
*iod
;
1440 return ERR_PTR(-EINVAL
);
1441 if (!length
|| length
> INT_MAX
- PAGE_SIZE
)
1442 return ERR_PTR(-EINVAL
);
1444 offset
= offset_in_page(addr
);
1445 count
= DIV_ROUND_UP(offset
+ length
, PAGE_SIZE
);
1446 pages
= kcalloc(count
, sizeof(*pages
), GFP_KERNEL
);
1448 return ERR_PTR(-ENOMEM
);
1450 err
= get_user_pages_fast(addr
, count
, 1, pages
);
1457 iod
= nvme_alloc_iod(count
, length
, GFP_KERNEL
);
1459 sg_init_table(sg
, count
);
1460 for (i
= 0; i
< count
; i
++) {
1461 sg_set_page(&sg
[i
], pages
[i
],
1462 min_t(unsigned, length
, PAGE_SIZE
- offset
),
1464 length
-= (PAGE_SIZE
- offset
);
1467 sg_mark_end(&sg
[i
- 1]);
1471 nents
= dma_map_sg(&dev
->pci_dev
->dev
, sg
, count
,
1472 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1482 for (i
= 0; i
< count
; i
++)
1485 return ERR_PTR(err
);
1488 void nvme_unmap_user_pages(struct nvme_dev
*dev
, int write
,
1489 struct nvme_iod
*iod
)
1493 dma_unmap_sg(&dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
1494 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1496 for (i
= 0; i
< iod
->nents
; i
++)
1497 put_page(sg_page(&iod
->sg
[i
]));
1500 static int nvme_submit_io(struct nvme_ns
*ns
, struct nvme_user_io __user
*uio
)
1502 struct nvme_dev
*dev
= ns
->dev
;
1503 struct nvme_queue
*nvmeq
;
1504 struct nvme_user_io io
;
1505 struct nvme_command c
;
1506 unsigned length
, meta_len
;
1508 struct nvme_iod
*iod
, *meta_iod
= NULL
;
1509 dma_addr_t meta_dma_addr
;
1510 void *meta
, *uninitialized_var(meta_mem
);
1512 if (copy_from_user(&io
, uio
, sizeof(io
)))
1514 length
= (io
.nblocks
+ 1) << ns
->lba_shift
;
1515 meta_len
= (io
.nblocks
+ 1) * ns
->ms
;
1517 if (meta_len
&& ((io
.metadata
& 3) || !io
.metadata
))
1520 switch (io
.opcode
) {
1521 case nvme_cmd_write
:
1523 case nvme_cmd_compare
:
1524 iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.addr
, length
);
1531 return PTR_ERR(iod
);
1533 memset(&c
, 0, sizeof(c
));
1534 c
.rw
.opcode
= io
.opcode
;
1535 c
.rw
.flags
= io
.flags
;
1536 c
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
1537 c
.rw
.slba
= cpu_to_le64(io
.slba
);
1538 c
.rw
.length
= cpu_to_le16(io
.nblocks
);
1539 c
.rw
.control
= cpu_to_le16(io
.control
);
1540 c
.rw
.dsmgmt
= cpu_to_le32(io
.dsmgmt
);
1541 c
.rw
.reftag
= cpu_to_le32(io
.reftag
);
1542 c
.rw
.apptag
= cpu_to_le16(io
.apptag
);
1543 c
.rw
.appmask
= cpu_to_le16(io
.appmask
);
1546 meta_iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.metadata
,
1548 if (IS_ERR(meta_iod
)) {
1549 status
= PTR_ERR(meta_iod
);
1554 meta_mem
= dma_alloc_coherent(&dev
->pci_dev
->dev
, meta_len
,
1555 &meta_dma_addr
, GFP_KERNEL
);
1561 if (io
.opcode
& 1) {
1562 int meta_offset
= 0;
1564 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1565 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1566 meta_iod
->sg
[i
].offset
;
1567 memcpy(meta_mem
+ meta_offset
, meta
,
1568 meta_iod
->sg
[i
].length
);
1569 kunmap_atomic(meta
);
1570 meta_offset
+= meta_iod
->sg
[i
].length
;
1574 c
.rw
.metadata
= cpu_to_le64(meta_dma_addr
);
1577 length
= nvme_setup_prps(dev
, &c
.common
, iod
, length
, GFP_KERNEL
);
1579 nvmeq
= get_nvmeq(dev
);
1581 * Since nvme_submit_sync_cmd sleeps, we can't keep preemption
1582 * disabled. We may be preempted at any point, and be rescheduled
1583 * to a different CPU. That will cause cacheline bouncing, but no
1584 * additional races since q_lock already protects against other CPUs.
1587 if (length
!= (io
.nblocks
+ 1) << ns
->lba_shift
)
1589 else if (!nvmeq
|| nvmeq
->q_suspended
)
1592 status
= nvme_submit_sync_cmd(nvmeq
, &c
, NULL
, NVME_IO_TIMEOUT
);
1595 if (status
== NVME_SC_SUCCESS
&& !(io
.opcode
& 1)) {
1596 int meta_offset
= 0;
1598 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1599 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1600 meta_iod
->sg
[i
].offset
;
1601 memcpy(meta
, meta_mem
+ meta_offset
,
1602 meta_iod
->sg
[i
].length
);
1603 kunmap_atomic(meta
);
1604 meta_offset
+= meta_iod
->sg
[i
].length
;
1608 dma_free_coherent(&dev
->pci_dev
->dev
, meta_len
, meta_mem
,
1613 nvme_unmap_user_pages(dev
, io
.opcode
& 1, iod
);
1614 nvme_free_iod(dev
, iod
);
1617 nvme_unmap_user_pages(dev
, io
.opcode
& 1, meta_iod
);
1618 nvme_free_iod(dev
, meta_iod
);
1624 static int nvme_user_admin_cmd(struct nvme_dev
*dev
,
1625 struct nvme_admin_cmd __user
*ucmd
)
1627 struct nvme_admin_cmd cmd
;
1628 struct nvme_command c
;
1630 struct nvme_iod
*uninitialized_var(iod
);
1633 if (!capable(CAP_SYS_ADMIN
))
1635 if (copy_from_user(&cmd
, ucmd
, sizeof(cmd
)))
1638 memset(&c
, 0, sizeof(c
));
1639 c
.common
.opcode
= cmd
.opcode
;
1640 c
.common
.flags
= cmd
.flags
;
1641 c
.common
.nsid
= cpu_to_le32(cmd
.nsid
);
1642 c
.common
.cdw2
[0] = cpu_to_le32(cmd
.cdw2
);
1643 c
.common
.cdw2
[1] = cpu_to_le32(cmd
.cdw3
);
1644 c
.common
.cdw10
[0] = cpu_to_le32(cmd
.cdw10
);
1645 c
.common
.cdw10
[1] = cpu_to_le32(cmd
.cdw11
);
1646 c
.common
.cdw10
[2] = cpu_to_le32(cmd
.cdw12
);
1647 c
.common
.cdw10
[3] = cpu_to_le32(cmd
.cdw13
);
1648 c
.common
.cdw10
[4] = cpu_to_le32(cmd
.cdw14
);
1649 c
.common
.cdw10
[5] = cpu_to_le32(cmd
.cdw15
);
1651 length
= cmd
.data_len
;
1653 iod
= nvme_map_user_pages(dev
, cmd
.opcode
& 1, cmd
.addr
,
1656 return PTR_ERR(iod
);
1657 length
= nvme_setup_prps(dev
, &c
.common
, iod
, length
,
1661 timeout
= cmd
.timeout_ms
? msecs_to_jiffies(cmd
.timeout_ms
) :
1663 if (length
!= cmd
.data_len
)
1666 status
= nvme_submit_sync_cmd(dev
->queues
[0], &c
, &cmd
.result
,
1670 nvme_unmap_user_pages(dev
, cmd
.opcode
& 1, iod
);
1671 nvme_free_iod(dev
, iod
);
1674 if ((status
>= 0) && copy_to_user(&ucmd
->result
, &cmd
.result
,
1675 sizeof(cmd
.result
)))
1681 static int nvme_ioctl(struct block_device
*bdev
, fmode_t mode
, unsigned int cmd
,
1684 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1688 force_successful_syscall_return();
1690 case NVME_IOCTL_ADMIN_CMD
:
1691 return nvme_user_admin_cmd(ns
->dev
, (void __user
*)arg
);
1692 case NVME_IOCTL_SUBMIT_IO
:
1693 return nvme_submit_io(ns
, (void __user
*)arg
);
1694 case SG_GET_VERSION_NUM
:
1695 return nvme_sg_get_version_num((void __user
*)arg
);
1697 return nvme_sg_io(ns
, (void __user
*)arg
);
1703 #ifdef CONFIG_COMPAT
1704 static int nvme_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1705 unsigned int cmd
, unsigned long arg
)
1707 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1711 return nvme_sg_io32(ns
, arg
);
1713 return nvme_ioctl(bdev
, mode
, cmd
, arg
);
1716 #define nvme_compat_ioctl NULL
1719 static int nvme_open(struct block_device
*bdev
, fmode_t mode
)
1721 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1722 struct nvme_dev
*dev
= ns
->dev
;
1724 kref_get(&dev
->kref
);
1728 static void nvme_free_dev(struct kref
*kref
);
1730 static void nvme_release(struct gendisk
*disk
, fmode_t mode
)
1732 struct nvme_ns
*ns
= disk
->private_data
;
1733 struct nvme_dev
*dev
= ns
->dev
;
1735 kref_put(&dev
->kref
, nvme_free_dev
);
1738 static const struct block_device_operations nvme_fops
= {
1739 .owner
= THIS_MODULE
,
1740 .ioctl
= nvme_ioctl
,
1741 .compat_ioctl
= nvme_compat_ioctl
,
1743 .release
= nvme_release
,
1746 static void nvme_resubmit_bios(struct nvme_queue
*nvmeq
)
1748 while (bio_list_peek(&nvmeq
->sq_cong
)) {
1749 struct bio
*bio
= bio_list_pop(&nvmeq
->sq_cong
);
1750 struct nvme_ns
*ns
= bio
->bi_bdev
->bd_disk
->private_data
;
1752 if (bio_list_empty(&nvmeq
->sq_cong
))
1753 remove_wait_queue(&nvmeq
->sq_full
,
1754 &nvmeq
->sq_cong_wait
);
1755 if (nvme_submit_bio_queue(nvmeq
, ns
, bio
)) {
1756 if (bio_list_empty(&nvmeq
->sq_cong
))
1757 add_wait_queue(&nvmeq
->sq_full
,
1758 &nvmeq
->sq_cong_wait
);
1759 bio_list_add_head(&nvmeq
->sq_cong
, bio
);
1765 static int nvme_kthread(void *data
)
1767 struct nvme_dev
*dev
, *next
;
1769 while (!kthread_should_stop()) {
1770 set_current_state(TASK_INTERRUPTIBLE
);
1771 spin_lock(&dev_list_lock
);
1772 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
1774 if (readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
&&
1776 if (work_busy(&dev
->reset_work
))
1778 list_del_init(&dev
->node
);
1779 dev_warn(&dev
->pci_dev
->dev
,
1780 "Failed status, reset controller\n");
1781 PREPARE_WORK(&dev
->reset_work
,
1782 nvme_reset_failed_dev
);
1783 queue_work(nvme_workq
, &dev
->reset_work
);
1786 for (i
= 0; i
< dev
->queue_count
; i
++) {
1787 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1790 spin_lock_irq(&nvmeq
->q_lock
);
1791 if (nvmeq
->q_suspended
)
1793 nvme_process_cq(nvmeq
);
1794 nvme_cancel_ios(nvmeq
, true);
1795 nvme_resubmit_bios(nvmeq
);
1797 spin_unlock_irq(&nvmeq
->q_lock
);
1800 spin_unlock(&dev_list_lock
);
1801 schedule_timeout(round_jiffies_relative(HZ
));
1806 static void nvme_config_discard(struct nvme_ns
*ns
)
1808 u32 logical_block_size
= queue_logical_block_size(ns
->queue
);
1809 ns
->queue
->limits
.discard_zeroes_data
= 0;
1810 ns
->queue
->limits
.discard_alignment
= logical_block_size
;
1811 ns
->queue
->limits
.discard_granularity
= logical_block_size
;
1812 ns
->queue
->limits
.max_discard_sectors
= 0xffffffff;
1813 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD
, ns
->queue
);
1816 static struct nvme_ns
*nvme_alloc_ns(struct nvme_dev
*dev
, unsigned nsid
,
1817 struct nvme_id_ns
*id
, struct nvme_lba_range_type
*rt
)
1820 struct gendisk
*disk
;
1823 if (rt
->attributes
& NVME_LBART_ATTRIB_HIDE
)
1826 ns
= kzalloc(sizeof(*ns
), GFP_KERNEL
);
1829 ns
->queue
= blk_alloc_queue(GFP_KERNEL
);
1832 ns
->queue
->queue_flags
= QUEUE_FLAG_DEFAULT
;
1833 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES
, ns
->queue
);
1834 queue_flag_set_unlocked(QUEUE_FLAG_NONROT
, ns
->queue
);
1835 blk_queue_make_request(ns
->queue
, nvme_make_request
);
1837 ns
->queue
->queuedata
= ns
;
1839 disk
= alloc_disk(0);
1841 goto out_free_queue
;
1844 lbaf
= id
->flbas
& 0xf;
1845 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
1846 ns
->ms
= le16_to_cpu(id
->lbaf
[lbaf
].ms
);
1847 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
1848 if (dev
->max_hw_sectors
)
1849 blk_queue_max_hw_sectors(ns
->queue
, dev
->max_hw_sectors
);
1851 disk
->major
= nvme_major
;
1852 disk
->first_minor
= 0;
1853 disk
->fops
= &nvme_fops
;
1854 disk
->private_data
= ns
;
1855 disk
->queue
= ns
->queue
;
1856 disk
->driverfs_dev
= &dev
->pci_dev
->dev
;
1857 disk
->flags
= GENHD_FL_EXT_DEVT
;
1858 sprintf(disk
->disk_name
, "nvme%dn%d", dev
->instance
, nsid
);
1859 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
1861 if (dev
->oncs
& NVME_CTRL_ONCS_DSM
)
1862 nvme_config_discard(ns
);
1867 blk_cleanup_queue(ns
->queue
);
1873 static int set_queue_count(struct nvme_dev
*dev
, int count
)
1877 u32 q_count
= (count
- 1) | ((count
- 1) << 16);
1879 status
= nvme_set_features(dev
, NVME_FEAT_NUM_QUEUES
, q_count
, 0,
1882 return status
< 0 ? -EIO
: -EBUSY
;
1883 return min(result
& 0xffff, result
>> 16) + 1;
1886 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
1888 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
1891 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
1893 struct nvme_queue
*adminq
= dev
->queues
[0];
1894 struct pci_dev
*pdev
= dev
->pci_dev
;
1895 int result
, cpu
, i
, vecs
, nr_io_queues
, size
, q_depth
;
1897 nr_io_queues
= num_online_cpus();
1898 result
= set_queue_count(dev
, nr_io_queues
);
1901 if (result
< nr_io_queues
)
1902 nr_io_queues
= result
;
1904 size
= db_bar_size(dev
, nr_io_queues
);
1908 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
1911 if (!--nr_io_queues
)
1913 size
= db_bar_size(dev
, nr_io_queues
);
1915 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
1916 dev
->queues
[0]->q_db
= dev
->dbs
;
1919 /* Deregister the admin queue's interrupt */
1920 free_irq(dev
->entry
[0].vector
, adminq
);
1922 vecs
= nr_io_queues
;
1923 for (i
= 0; i
< vecs
; i
++)
1924 dev
->entry
[i
].entry
= i
;
1926 result
= pci_enable_msix(pdev
, dev
->entry
, vecs
);
1933 vecs
= nr_io_queues
;
1937 result
= pci_enable_msi_block(pdev
, vecs
);
1939 for (i
= 0; i
< vecs
; i
++)
1940 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
1942 } else if (result
< 0) {
1951 * Should investigate if there's a performance win from allocating
1952 * more queues than interrupt vectors; it might allow the submission
1953 * path to scale better, even if the receive path is limited by the
1954 * number of interrupts.
1956 nr_io_queues
= vecs
;
1958 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
1960 adminq
->q_suspended
= 1;
1964 /* Free previously allocated queues that are no longer usable */
1965 spin_lock(&dev_list_lock
);
1966 for (i
= dev
->queue_count
- 1; i
> nr_io_queues
; i
--) {
1967 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1969 spin_lock_irq(&nvmeq
->q_lock
);
1970 nvme_cancel_ios(nvmeq
, false);
1971 spin_unlock_irq(&nvmeq
->q_lock
);
1973 nvme_free_queue(nvmeq
);
1975 dev
->queues
[i
] = NULL
;
1977 spin_unlock(&dev_list_lock
);
1979 cpu
= cpumask_first(cpu_online_mask
);
1980 for (i
= 0; i
< nr_io_queues
; i
++) {
1981 irq_set_affinity_hint(dev
->entry
[i
].vector
, get_cpu_mask(cpu
));
1982 cpu
= cpumask_next(cpu
, cpu_online_mask
);
1985 q_depth
= min_t(int, NVME_CAP_MQES(readq(&dev
->bar
->cap
)) + 1,
1987 for (i
= dev
->queue_count
- 1; i
< nr_io_queues
; i
++) {
1988 dev
->queues
[i
+ 1] = nvme_alloc_queue(dev
, i
+ 1, q_depth
, i
);
1989 if (!dev
->queues
[i
+ 1]) {
1995 for (; i
< num_possible_cpus(); i
++) {
1996 int target
= i
% rounddown_pow_of_two(dev
->queue_count
- 1);
1997 dev
->queues
[i
+ 1] = dev
->queues
[target
+ 1];
2000 for (i
= 1; i
< dev
->queue_count
; i
++) {
2001 result
= nvme_create_queue(dev
->queues
[i
], i
);
2003 for (--i
; i
> 0; i
--)
2004 nvme_disable_queue(dev
, i
);
2012 nvme_free_queues(dev
, 1);
2017 * Return: error value if an error occurred setting up the queues or calling
2018 * Identify Device. 0 if these succeeded, even if adding some of the
2019 * namespaces failed. At the moment, these failures are silent. TBD which
2020 * failures should be reported.
2022 static int nvme_dev_add(struct nvme_dev
*dev
)
2024 struct pci_dev
*pdev
= dev
->pci_dev
;
2028 struct nvme_id_ctrl
*ctrl
;
2029 struct nvme_id_ns
*id_ns
;
2031 dma_addr_t dma_addr
;
2032 int shift
= NVME_CAP_MPSMIN(readq(&dev
->bar
->cap
)) + 12;
2034 mem
= dma_alloc_coherent(&pdev
->dev
, 8192, &dma_addr
, GFP_KERNEL
);
2038 res
= nvme_identify(dev
, 0, 1, dma_addr
);
2045 nn
= le32_to_cpup(&ctrl
->nn
);
2046 dev
->oncs
= le16_to_cpup(&ctrl
->oncs
);
2047 dev
->abort_limit
= ctrl
->acl
+ 1;
2048 memcpy(dev
->serial
, ctrl
->sn
, sizeof(ctrl
->sn
));
2049 memcpy(dev
->model
, ctrl
->mn
, sizeof(ctrl
->mn
));
2050 memcpy(dev
->firmware_rev
, ctrl
->fr
, sizeof(ctrl
->fr
));
2052 dev
->max_hw_sectors
= 1 << (ctrl
->mdts
+ shift
- 9);
2053 if ((pdev
->vendor
== PCI_VENDOR_ID_INTEL
) &&
2054 (pdev
->device
== 0x0953) && ctrl
->vs
[3])
2055 dev
->stripe_size
= 1 << (ctrl
->vs
[3] + shift
);
2058 for (i
= 1; i
<= nn
; i
++) {
2059 res
= nvme_identify(dev
, i
, 0, dma_addr
);
2063 if (id_ns
->ncap
== 0)
2066 res
= nvme_get_features(dev
, NVME_FEAT_LBA_RANGE
, i
,
2067 dma_addr
+ 4096, NULL
);
2069 memset(mem
+ 4096, 0, 4096);
2071 ns
= nvme_alloc_ns(dev
, i
, mem
, mem
+ 4096);
2073 list_add_tail(&ns
->list
, &dev
->namespaces
);
2075 list_for_each_entry(ns
, &dev
->namespaces
, list
)
2080 dma_free_coherent(&dev
->pci_dev
->dev
, 8192, mem
, dma_addr
);
2084 static int nvme_dev_map(struct nvme_dev
*dev
)
2086 int bars
, result
= -ENOMEM
;
2087 struct pci_dev
*pdev
= dev
->pci_dev
;
2089 if (pci_enable_device_mem(pdev
))
2092 dev
->entry
[0].vector
= pdev
->irq
;
2093 pci_set_master(pdev
);
2094 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2095 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
2098 if (dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64)) &&
2099 dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32)))
2102 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
2105 if (readl(&dev
->bar
->csts
) == -1) {
2109 dev
->db_stride
= 1 << NVME_CAP_STRIDE(readq(&dev
->bar
->cap
));
2110 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2118 pci_release_regions(pdev
);
2120 pci_disable_device(pdev
);
2124 static void nvme_dev_unmap(struct nvme_dev
*dev
)
2126 if (dev
->pci_dev
->msi_enabled
)
2127 pci_disable_msi(dev
->pci_dev
);
2128 else if (dev
->pci_dev
->msix_enabled
)
2129 pci_disable_msix(dev
->pci_dev
);
2134 pci_release_regions(dev
->pci_dev
);
2137 if (pci_is_enabled(dev
->pci_dev
))
2138 pci_disable_device(dev
->pci_dev
);
2141 struct nvme_delq_ctx
{
2142 struct task_struct
*waiter
;
2143 struct kthread_worker
*worker
;
2147 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
2149 dq
->waiter
= current
;
2153 set_current_state(TASK_KILLABLE
);
2154 if (!atomic_read(&dq
->refcount
))
2156 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
2157 fatal_signal_pending(current
)) {
2158 set_current_state(TASK_RUNNING
);
2160 nvme_disable_ctrl(dev
, readq(&dev
->bar
->cap
));
2161 nvme_disable_queue(dev
, 0);
2163 send_sig(SIGKILL
, dq
->worker
->task
, 1);
2164 flush_kthread_worker(dq
->worker
);
2168 set_current_state(TASK_RUNNING
);
2171 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
2173 atomic_dec(&dq
->refcount
);
2175 wake_up_process(dq
->waiter
);
2178 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
2180 atomic_inc(&dq
->refcount
);
2184 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
2186 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
2188 nvme_clear_queue(nvmeq
);
2192 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
2193 kthread_work_func_t fn
)
2195 struct nvme_command c
;
2197 memset(&c
, 0, sizeof(c
));
2198 c
.delete_queue
.opcode
= opcode
;
2199 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
2201 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
2202 return nvme_submit_admin_cmd_async(nvmeq
->dev
, &c
, &nvmeq
->cmdinfo
);
2205 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
2207 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2209 nvme_del_queue_end(nvmeq
);
2212 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
2214 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
2215 nvme_del_cq_work_handler
);
2218 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
2220 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2222 int status
= nvmeq
->cmdinfo
.status
;
2225 status
= nvme_delete_cq(nvmeq
);
2227 nvme_del_queue_end(nvmeq
);
2230 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
2232 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
2233 nvme_del_sq_work_handler
);
2236 static void nvme_del_queue_start(struct kthread_work
*work
)
2238 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2240 allow_signal(SIGKILL
);
2241 if (nvme_delete_sq(nvmeq
))
2242 nvme_del_queue_end(nvmeq
);
2245 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
2248 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
2249 struct nvme_delq_ctx dq
;
2250 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
2251 &worker
, "nvme%d", dev
->instance
);
2253 if (IS_ERR(kworker_task
)) {
2254 dev_err(&dev
->pci_dev
->dev
,
2255 "Failed to create queue del task\n");
2256 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
2257 nvme_disable_queue(dev
, i
);
2262 atomic_set(&dq
.refcount
, 0);
2263 dq
.worker
= &worker
;
2264 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2265 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2267 if (nvme_suspend_queue(nvmeq
))
2269 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
2270 nvmeq
->cmdinfo
.worker
= dq
.worker
;
2271 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
2272 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
2274 nvme_wait_dq(&dq
, dev
);
2275 kthread_stop(kworker_task
);
2278 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2282 dev
->initialized
= 0;
2284 spin_lock(&dev_list_lock
);
2285 list_del_init(&dev
->node
);
2286 spin_unlock(&dev_list_lock
);
2288 if (!dev
->bar
|| (dev
->bar
&& readl(&dev
->bar
->csts
) == -1)) {
2289 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2290 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2291 nvme_suspend_queue(nvmeq
);
2292 nvme_clear_queue(nvmeq
);
2295 nvme_disable_io_queues(dev
);
2296 nvme_shutdown_ctrl(dev
);
2297 nvme_disable_queue(dev
, 0);
2299 nvme_dev_unmap(dev
);
2302 static void nvme_dev_remove(struct nvme_dev
*dev
)
2306 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2307 if (ns
->disk
->flags
& GENHD_FL_UP
)
2308 del_gendisk(ns
->disk
);
2309 if (!blk_queue_dying(ns
->queue
))
2310 blk_cleanup_queue(ns
->queue
);
2314 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2316 struct device
*dmadev
= &dev
->pci_dev
->dev
;
2317 dev
->prp_page_pool
= dma_pool_create("prp list page", dmadev
,
2318 PAGE_SIZE
, PAGE_SIZE
, 0);
2319 if (!dev
->prp_page_pool
)
2322 /* Optimisation for I/Os between 4k and 128k */
2323 dev
->prp_small_pool
= dma_pool_create("prp list 256", dmadev
,
2325 if (!dev
->prp_small_pool
) {
2326 dma_pool_destroy(dev
->prp_page_pool
);
2332 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2334 dma_pool_destroy(dev
->prp_page_pool
);
2335 dma_pool_destroy(dev
->prp_small_pool
);
2338 static DEFINE_IDA(nvme_instance_ida
);
2340 static int nvme_set_instance(struct nvme_dev
*dev
)
2342 int instance
, error
;
2345 if (!ida_pre_get(&nvme_instance_ida
, GFP_KERNEL
))
2348 spin_lock(&dev_list_lock
);
2349 error
= ida_get_new(&nvme_instance_ida
, &instance
);
2350 spin_unlock(&dev_list_lock
);
2351 } while (error
== -EAGAIN
);
2356 dev
->instance
= instance
;
2360 static void nvme_release_instance(struct nvme_dev
*dev
)
2362 spin_lock(&dev_list_lock
);
2363 ida_remove(&nvme_instance_ida
, dev
->instance
);
2364 spin_unlock(&dev_list_lock
);
2367 static void nvme_free_namespaces(struct nvme_dev
*dev
)
2369 struct nvme_ns
*ns
, *next
;
2371 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
) {
2372 list_del(&ns
->list
);
2378 static void nvme_free_dev(struct kref
*kref
)
2380 struct nvme_dev
*dev
= container_of(kref
, struct nvme_dev
, kref
);
2382 nvme_free_namespaces(dev
);
2388 static int nvme_dev_open(struct inode
*inode
, struct file
*f
)
2390 struct nvme_dev
*dev
= container_of(f
->private_data
, struct nvme_dev
,
2392 kref_get(&dev
->kref
);
2393 f
->private_data
= dev
;
2397 static int nvme_dev_release(struct inode
*inode
, struct file
*f
)
2399 struct nvme_dev
*dev
= f
->private_data
;
2400 kref_put(&dev
->kref
, nvme_free_dev
);
2404 static long nvme_dev_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
2406 struct nvme_dev
*dev
= f
->private_data
;
2408 case NVME_IOCTL_ADMIN_CMD
:
2409 return nvme_user_admin_cmd(dev
, (void __user
*)arg
);
2415 static const struct file_operations nvme_dev_fops
= {
2416 .owner
= THIS_MODULE
,
2417 .open
= nvme_dev_open
,
2418 .release
= nvme_dev_release
,
2419 .unlocked_ioctl
= nvme_dev_ioctl
,
2420 .compat_ioctl
= nvme_dev_ioctl
,
2423 static int nvme_dev_start(struct nvme_dev
*dev
)
2427 result
= nvme_dev_map(dev
);
2431 result
= nvme_configure_admin_queue(dev
);
2435 spin_lock(&dev_list_lock
);
2436 list_add(&dev
->node
, &dev_list
);
2437 spin_unlock(&dev_list_lock
);
2439 result
= nvme_setup_io_queues(dev
);
2440 if (result
&& result
!= -EBUSY
)
2446 nvme_disable_queue(dev
, 0);
2447 spin_lock(&dev_list_lock
);
2448 list_del_init(&dev
->node
);
2449 spin_unlock(&dev_list_lock
);
2451 nvme_dev_unmap(dev
);
2455 static int nvme_remove_dead_ctrl(void *arg
)
2457 struct nvme_dev
*dev
= (struct nvme_dev
*)arg
;
2458 struct pci_dev
*pdev
= dev
->pci_dev
;
2460 if (pci_get_drvdata(pdev
))
2461 pci_stop_and_remove_bus_device(pdev
);
2462 kref_put(&dev
->kref
, nvme_free_dev
);
2466 static void nvme_remove_disks(struct work_struct
*ws
)
2469 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2471 nvme_dev_remove(dev
);
2472 spin_lock(&dev_list_lock
);
2473 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2474 BUG_ON(!dev
->queues
[i
] || !dev
->queues
[i
]->q_suspended
);
2475 nvme_free_queue(dev
->queues
[i
]);
2477 dev
->queues
[i
] = NULL
;
2479 spin_unlock(&dev_list_lock
);
2482 static int nvme_dev_resume(struct nvme_dev
*dev
)
2486 ret
= nvme_dev_start(dev
);
2487 if (ret
&& ret
!= -EBUSY
)
2489 if (ret
== -EBUSY
) {
2490 spin_lock(&dev_list_lock
);
2491 PREPARE_WORK(&dev
->reset_work
, nvme_remove_disks
);
2492 queue_work(nvme_workq
, &dev
->reset_work
);
2493 spin_unlock(&dev_list_lock
);
2495 dev
->initialized
= 1;
2499 static void nvme_dev_reset(struct nvme_dev
*dev
)
2501 nvme_dev_shutdown(dev
);
2502 if (nvme_dev_resume(dev
)) {
2503 dev_err(&dev
->pci_dev
->dev
, "Device failed to resume\n");
2504 kref_get(&dev
->kref
);
2505 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl
, dev
, "nvme%d",
2507 dev_err(&dev
->pci_dev
->dev
,
2508 "Failed to start controller remove task\n");
2509 kref_put(&dev
->kref
, nvme_free_dev
);
2514 static void nvme_reset_failed_dev(struct work_struct
*ws
)
2516 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2517 nvme_dev_reset(dev
);
2520 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2522 int result
= -ENOMEM
;
2523 struct nvme_dev
*dev
;
2525 dev
= kzalloc(sizeof(*dev
), GFP_KERNEL
);
2528 dev
->entry
= kcalloc(num_possible_cpus(), sizeof(*dev
->entry
),
2532 dev
->queues
= kcalloc(num_possible_cpus() + 1, sizeof(void *),
2537 INIT_LIST_HEAD(&dev
->namespaces
);
2538 INIT_WORK(&dev
->reset_work
, nvme_reset_failed_dev
);
2539 dev
->pci_dev
= pdev
;
2540 pci_set_drvdata(pdev
, dev
);
2541 result
= nvme_set_instance(dev
);
2545 result
= nvme_setup_prp_pools(dev
);
2549 result
= nvme_dev_start(dev
);
2551 if (result
== -EBUSY
)
2556 kref_init(&dev
->kref
);
2557 result
= nvme_dev_add(dev
);
2562 scnprintf(dev
->name
, sizeof(dev
->name
), "nvme%d", dev
->instance
);
2563 dev
->miscdev
.minor
= MISC_DYNAMIC_MINOR
;
2564 dev
->miscdev
.parent
= &pdev
->dev
;
2565 dev
->miscdev
.name
= dev
->name
;
2566 dev
->miscdev
.fops
= &nvme_dev_fops
;
2567 result
= misc_register(&dev
->miscdev
);
2571 dev
->initialized
= 1;
2575 nvme_dev_remove(dev
);
2576 nvme_free_namespaces(dev
);
2578 nvme_dev_shutdown(dev
);
2580 nvme_free_queues(dev
, 0);
2581 nvme_release_prp_pools(dev
);
2583 nvme_release_instance(dev
);
2591 static void nvme_shutdown(struct pci_dev
*pdev
)
2593 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2594 nvme_dev_shutdown(dev
);
2597 static void nvme_remove(struct pci_dev
*pdev
)
2599 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2601 spin_lock(&dev_list_lock
);
2602 list_del_init(&dev
->node
);
2603 spin_unlock(&dev_list_lock
);
2605 pci_set_drvdata(pdev
, NULL
);
2606 flush_work(&dev
->reset_work
);
2607 misc_deregister(&dev
->miscdev
);
2608 nvme_dev_remove(dev
);
2609 nvme_dev_shutdown(dev
);
2610 nvme_free_queues(dev
, 0);
2611 nvme_release_instance(dev
);
2612 nvme_release_prp_pools(dev
);
2613 kref_put(&dev
->kref
, nvme_free_dev
);
2616 /* These functions are yet to be implemented */
2617 #define nvme_error_detected NULL
2618 #define nvme_dump_registers NULL
2619 #define nvme_link_reset NULL
2620 #define nvme_slot_reset NULL
2621 #define nvme_error_resume NULL
2623 static int nvme_suspend(struct device
*dev
)
2625 struct pci_dev
*pdev
= to_pci_dev(dev
);
2626 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2628 nvme_dev_shutdown(ndev
);
2632 static int nvme_resume(struct device
*dev
)
2634 struct pci_dev
*pdev
= to_pci_dev(dev
);
2635 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2637 if (nvme_dev_resume(ndev
) && !work_busy(&ndev
->reset_work
)) {
2638 PREPARE_WORK(&ndev
->reset_work
, nvme_reset_failed_dev
);
2639 queue_work(nvme_workq
, &ndev
->reset_work
);
2644 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
2646 static const struct pci_error_handlers nvme_err_handler
= {
2647 .error_detected
= nvme_error_detected
,
2648 .mmio_enabled
= nvme_dump_registers
,
2649 .link_reset
= nvme_link_reset
,
2650 .slot_reset
= nvme_slot_reset
,
2651 .resume
= nvme_error_resume
,
2654 /* Move to pci_ids.h later */
2655 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
2657 static DEFINE_PCI_DEVICE_TABLE(nvme_id_table
) = {
2658 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
2661 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
2663 static struct pci_driver nvme_driver
= {
2665 .id_table
= nvme_id_table
,
2666 .probe
= nvme_probe
,
2667 .remove
= nvme_remove
,
2668 .shutdown
= nvme_shutdown
,
2670 .pm
= &nvme_dev_pm_ops
,
2672 .err_handler
= &nvme_err_handler
,
2675 static int __init
nvme_init(void)
2679 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
2680 if (IS_ERR(nvme_thread
))
2681 return PTR_ERR(nvme_thread
);
2684 nvme_workq
= create_singlethread_workqueue("nvme");
2688 result
= register_blkdev(nvme_major
, "nvme");
2691 else if (result
> 0)
2692 nvme_major
= result
;
2694 result
= pci_register_driver(&nvme_driver
);
2696 goto unregister_blkdev
;
2700 unregister_blkdev(nvme_major
, "nvme");
2702 destroy_workqueue(nvme_workq
);
2704 kthread_stop(nvme_thread
);
2708 static void __exit
nvme_exit(void)
2710 pci_unregister_driver(&nvme_driver
);
2711 unregister_blkdev(nvme_major
, "nvme");
2712 destroy_workqueue(nvme_workq
);
2713 kthread_stop(nvme_thread
);
2716 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2717 MODULE_LICENSE("GPL");
2718 MODULE_VERSION("0.8");
2719 module_init(nvme_init
);
2720 module_exit(nvme_exit
);