2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bio.h>
17 #include <linux/bitops.h>
18 #include <linux/blkdev.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/percpu.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/types.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #include <trace/events/block.h>
47 #define NVME_Q_DEPTH 1024
48 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
49 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
50 #define ADMIN_TIMEOUT (admin_timeout * HZ)
51 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
52 #define IOD_TIMEOUT (retry_time * HZ)
54 static unsigned char admin_timeout
= 60;
55 module_param(admin_timeout
, byte
, 0644);
56 MODULE_PARM_DESC(admin_timeout
, "timeout in seconds for admin commands");
58 unsigned char nvme_io_timeout
= 30;
59 module_param_named(io_timeout
, nvme_io_timeout
, byte
, 0644);
60 MODULE_PARM_DESC(io_timeout
, "timeout in seconds for I/O");
62 static unsigned char retry_time
= 30;
63 module_param(retry_time
, byte
, 0644);
64 MODULE_PARM_DESC(retry_time
, "time in seconds to retry failed I/O");
66 static unsigned char shutdown_timeout
= 5;
67 module_param(shutdown_timeout
, byte
, 0644);
68 MODULE_PARM_DESC(shutdown_timeout
, "timeout in seconds for controller shutdown");
70 static int nvme_major
;
71 module_param(nvme_major
, int, 0);
73 static int use_threaded_interrupts
;
74 module_param(use_threaded_interrupts
, int, 0);
76 static DEFINE_SPINLOCK(dev_list_lock
);
77 static LIST_HEAD(dev_list
);
78 static struct task_struct
*nvme_thread
;
79 static struct workqueue_struct
*nvme_workq
;
80 static wait_queue_head_t nvme_kthread_wait
;
81 static struct notifier_block nvme_nb
;
83 static void nvme_reset_failed_dev(struct work_struct
*ws
);
85 struct async_cmd_info
{
86 struct kthread_work work
;
87 struct kthread_worker
*worker
;
94 * An NVM Express queue. Each device has at least two (one for admin
95 * commands and one for I/O commands).
98 struct llist_node node
;
99 struct device
*q_dmadev
;
100 struct nvme_dev
*dev
;
101 char irqname
[24]; /* nvme4294967295-65535\0 */
103 struct nvme_command
*sq_cmds
;
104 volatile struct nvme_completion
*cqes
;
105 dma_addr_t sq_dma_addr
;
106 dma_addr_t cq_dma_addr
;
107 wait_queue_head_t sq_full
;
108 wait_queue_t sq_cong_wait
;
109 struct bio_list sq_cong
;
110 struct list_head iod_bio
;
121 cpumask_var_t cpu_mask
;
122 struct async_cmd_info cmdinfo
;
123 unsigned long cmdid_data
[];
127 * Check we didin't inadvertently grow the command struct
129 static inline void _nvme_check_size(void)
131 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
132 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
134 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
135 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
137 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
139 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
140 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
141 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
142 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
145 typedef void (*nvme_completion_fn
)(struct nvme_queue
*, void *,
146 struct nvme_completion
*);
148 struct nvme_cmd_info
{
149 nvme_completion_fn fn
;
151 unsigned long timeout
;
155 static struct nvme_cmd_info
*nvme_cmd_info(struct nvme_queue
*nvmeq
)
157 return (void *)&nvmeq
->cmdid_data
[BITS_TO_LONGS(nvmeq
->q_depth
)];
160 static unsigned nvme_queue_extra(int depth
)
162 return DIV_ROUND_UP(depth
, 8) + (depth
* sizeof(struct nvme_cmd_info
));
166 * alloc_cmdid() - Allocate a Command ID
167 * @nvmeq: The queue that will be used for this command
168 * @ctx: A pointer that will be passed to the handler
169 * @handler: The function to call on completion
171 * Allocate a Command ID for a queue. The data passed in will
172 * be passed to the completion handler. This is implemented by using
173 * the bottom two bits of the ctx pointer to store the handler ID.
174 * Passing in a pointer that's not 4-byte aligned will cause a BUG.
175 * We can change this if it becomes a problem.
177 * May be called with local interrupts disabled and the q_lock held,
178 * or with interrupts enabled and no locks held.
180 static int alloc_cmdid(struct nvme_queue
*nvmeq
, void *ctx
,
181 nvme_completion_fn handler
, unsigned timeout
)
183 int depth
= nvmeq
->q_depth
- 1;
184 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
188 cmdid
= find_first_zero_bit(nvmeq
->cmdid_data
, depth
);
191 } while (test_and_set_bit(cmdid
, nvmeq
->cmdid_data
));
193 info
[cmdid
].fn
= handler
;
194 info
[cmdid
].ctx
= ctx
;
195 info
[cmdid
].timeout
= jiffies
+ timeout
;
196 info
[cmdid
].aborted
= 0;
200 static int alloc_cmdid_killable(struct nvme_queue
*nvmeq
, void *ctx
,
201 nvme_completion_fn handler
, unsigned timeout
)
204 wait_event_killable(nvmeq
->sq_full
,
205 (cmdid
= alloc_cmdid(nvmeq
, ctx
, handler
, timeout
)) >= 0);
206 return (cmdid
< 0) ? -EINTR
: cmdid
;
209 /* Special values must be less than 0x1000 */
210 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
211 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
212 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
213 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
214 #define CMD_CTX_ABORT (0x318 + CMD_CTX_BASE)
215 #define CMD_CTX_ASYNC (0x31C + CMD_CTX_BASE)
217 static void special_completion(struct nvme_queue
*nvmeq
, void *ctx
,
218 struct nvme_completion
*cqe
)
220 if (ctx
== CMD_CTX_CANCELLED
)
222 if (ctx
== CMD_CTX_ABORT
) {
223 ++nvmeq
->dev
->abort_limit
;
226 if (ctx
== CMD_CTX_COMPLETED
) {
227 dev_warn(nvmeq
->q_dmadev
,
228 "completed id %d twice on queue %d\n",
229 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
232 if (ctx
== CMD_CTX_INVALID
) {
233 dev_warn(nvmeq
->q_dmadev
,
234 "invalid id %d completed on queue %d\n",
235 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
238 if (ctx
== CMD_CTX_ASYNC
) {
239 u32 result
= le32_to_cpup(&cqe
->result
);
240 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
242 if (status
== NVME_SC_SUCCESS
|| status
== NVME_SC_ABORT_REQ
)
243 ++nvmeq
->dev
->event_limit
;
244 if (status
== NVME_SC_SUCCESS
)
245 dev_warn(nvmeq
->q_dmadev
,
246 "async event result %08x\n", result
);
250 dev_warn(nvmeq
->q_dmadev
, "Unknown special completion %p\n", ctx
);
253 static void async_completion(struct nvme_queue
*nvmeq
, void *ctx
,
254 struct nvme_completion
*cqe
)
256 struct async_cmd_info
*cmdinfo
= ctx
;
257 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
258 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
259 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
263 * Called with local interrupts disabled and the q_lock held. May not sleep.
265 static void *free_cmdid(struct nvme_queue
*nvmeq
, int cmdid
,
266 nvme_completion_fn
*fn
)
269 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
271 if (cmdid
>= nvmeq
->q_depth
|| !info
[cmdid
].fn
) {
273 *fn
= special_completion
;
274 return CMD_CTX_INVALID
;
277 *fn
= info
[cmdid
].fn
;
278 ctx
= info
[cmdid
].ctx
;
279 info
[cmdid
].fn
= special_completion
;
280 info
[cmdid
].ctx
= CMD_CTX_COMPLETED
;
281 clear_bit(cmdid
, nvmeq
->cmdid_data
);
282 wake_up(&nvmeq
->sq_full
);
286 static void *cancel_cmdid(struct nvme_queue
*nvmeq
, int cmdid
,
287 nvme_completion_fn
*fn
)
290 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
292 *fn
= info
[cmdid
].fn
;
293 ctx
= info
[cmdid
].ctx
;
294 info
[cmdid
].fn
= special_completion
;
295 info
[cmdid
].ctx
= CMD_CTX_CANCELLED
;
299 static struct nvme_queue
*raw_nvmeq(struct nvme_dev
*dev
, int qid
)
301 return rcu_dereference_raw(dev
->queues
[qid
]);
304 static struct nvme_queue
*get_nvmeq(struct nvme_dev
*dev
) __acquires(RCU
)
306 struct nvme_queue
*nvmeq
;
307 unsigned queue_id
= get_cpu_var(*dev
->io_queue
);
310 nvmeq
= rcu_dereference(dev
->queues
[queue_id
]);
315 put_cpu_var(*dev
->io_queue
);
319 static void put_nvmeq(struct nvme_queue
*nvmeq
) __releases(RCU
)
322 put_cpu_var(nvmeq
->dev
->io_queue
);
325 static struct nvme_queue
*lock_nvmeq(struct nvme_dev
*dev
, int q_idx
)
328 struct nvme_queue
*nvmeq
;
331 nvmeq
= rcu_dereference(dev
->queues
[q_idx
]);
339 static void unlock_nvmeq(struct nvme_queue
*nvmeq
) __releases(RCU
)
345 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
346 * @nvmeq: The queue to use
347 * @cmd: The command to send
349 * Safe to use from interrupt context
351 static int nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
355 spin_lock_irqsave(&nvmeq
->q_lock
, flags
);
356 if (nvmeq
->q_suspended
) {
357 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
360 tail
= nvmeq
->sq_tail
;
361 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
362 if (++tail
== nvmeq
->q_depth
)
364 writel(tail
, nvmeq
->q_db
);
365 nvmeq
->sq_tail
= tail
;
366 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
371 static __le64
**iod_list(struct nvme_iod
*iod
)
373 return ((void *)iod
) + iod
->offset
;
377 * Will slightly overestimate the number of pages needed. This is OK
378 * as it only leads to a small amount of wasted memory for the lifetime of
381 static int nvme_npages(unsigned size
, struct nvme_dev
*dev
)
383 unsigned nprps
= DIV_ROUND_UP(size
+ dev
->page_size
, dev
->page_size
);
384 return DIV_ROUND_UP(8 * nprps
, dev
->page_size
- 8);
387 static struct nvme_iod
*
388 nvme_alloc_iod(unsigned nseg
, unsigned nbytes
, struct nvme_dev
*dev
, gfp_t gfp
)
390 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
391 sizeof(__le64
*) * nvme_npages(nbytes
, dev
) +
392 sizeof(struct scatterlist
) * nseg
, gfp
);
395 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
397 iod
->length
= nbytes
;
399 iod
->first_dma
= 0ULL;
400 iod
->start_time
= jiffies
;
406 void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
408 const int last_prp
= dev
->page_size
/ 8 - 1;
410 __le64
**list
= iod_list(iod
);
411 dma_addr_t prp_dma
= iod
->first_dma
;
413 if (iod
->npages
== 0)
414 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
415 for (i
= 0; i
< iod
->npages
; i
++) {
416 __le64
*prp_list
= list
[i
];
417 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
418 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
419 prp_dma
= next_prp_dma
;
424 static void nvme_start_io_acct(struct bio
*bio
)
426 struct gendisk
*disk
= bio
->bi_bdev
->bd_disk
;
427 if (blk_queue_io_stat(disk
->queue
)) {
428 const int rw
= bio_data_dir(bio
);
429 int cpu
= part_stat_lock();
430 part_round_stats(cpu
, &disk
->part0
);
431 part_stat_inc(cpu
, &disk
->part0
, ios
[rw
]);
432 part_stat_add(cpu
, &disk
->part0
, sectors
[rw
],
434 part_inc_in_flight(&disk
->part0
, rw
);
439 static void nvme_end_io_acct(struct bio
*bio
, unsigned long start_time
)
441 struct gendisk
*disk
= bio
->bi_bdev
->bd_disk
;
442 if (blk_queue_io_stat(disk
->queue
)) {
443 const int rw
= bio_data_dir(bio
);
444 unsigned long duration
= jiffies
- start_time
;
445 int cpu
= part_stat_lock();
446 part_stat_add(cpu
, &disk
->part0
, ticks
[rw
], duration
);
447 part_round_stats(cpu
, &disk
->part0
);
448 part_dec_in_flight(&disk
->part0
, rw
);
453 static int nvme_error_status(u16 status
)
455 switch (status
& 0x7ff) {
456 case NVME_SC_SUCCESS
:
458 case NVME_SC_CAP_EXCEEDED
:
465 static void bio_completion(struct nvme_queue
*nvmeq
, void *ctx
,
466 struct nvme_completion
*cqe
)
468 struct nvme_iod
*iod
= ctx
;
469 struct bio
*bio
= iod
->private;
470 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
473 if (unlikely(status
)) {
474 if (!(status
& NVME_SC_DNR
||
475 bio
->bi_rw
& REQ_FAILFAST_MASK
) &&
476 (jiffies
- iod
->start_time
) < IOD_TIMEOUT
) {
477 if (!waitqueue_active(&nvmeq
->sq_full
))
478 add_wait_queue(&nvmeq
->sq_full
,
479 &nvmeq
->sq_cong_wait
);
480 list_add_tail(&iod
->node
, &nvmeq
->iod_bio
);
481 wake_up(&nvmeq
->sq_full
);
484 error
= nvme_error_status(status
);
487 dma_unmap_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
,
488 bio_data_dir(bio
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
489 nvme_end_io_acct(bio
, iod
->start_time
);
491 nvme_free_iod(nvmeq
->dev
, iod
);
493 trace_block_bio_complete(bdev_get_queue(bio
->bi_bdev
), bio
, error
);
494 bio_endio(bio
, error
);
497 /* length is in bytes. gfp flags indicates whether we may sleep. */
498 int nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_iod
*iod
, int total_len
,
501 struct dma_pool
*pool
;
502 int length
= total_len
;
503 struct scatterlist
*sg
= iod
->sg
;
504 int dma_len
= sg_dma_len(sg
);
505 u64 dma_addr
= sg_dma_address(sg
);
506 int offset
= offset_in_page(dma_addr
);
508 __le64
**list
= iod_list(iod
);
511 u32 page_size
= dev
->page_size
;
513 length
-= (page_size
- offset
);
517 dma_len
-= (page_size
- offset
);
519 dma_addr
+= (page_size
- offset
);
522 dma_addr
= sg_dma_address(sg
);
523 dma_len
= sg_dma_len(sg
);
526 if (length
<= page_size
) {
527 iod
->first_dma
= dma_addr
;
531 nprps
= DIV_ROUND_UP(length
, page_size
);
532 if (nprps
<= (256 / 8)) {
533 pool
= dev
->prp_small_pool
;
536 pool
= dev
->prp_page_pool
;
540 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
542 iod
->first_dma
= dma_addr
;
544 return (total_len
- length
) + page_size
;
547 iod
->first_dma
= prp_dma
;
550 if (i
== page_size
>> 3) {
551 __le64
*old_prp_list
= prp_list
;
552 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
554 return total_len
- length
;
555 list
[iod
->npages
++] = prp_list
;
556 prp_list
[0] = old_prp_list
[i
- 1];
557 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
560 prp_list
[i
++] = cpu_to_le64(dma_addr
);
561 dma_len
-= page_size
;
562 dma_addr
+= page_size
;
570 dma_addr
= sg_dma_address(sg
);
571 dma_len
= sg_dma_len(sg
);
577 static int nvme_split_and_submit(struct bio
*bio
, struct nvme_queue
*nvmeq
,
580 struct bio
*split
= bio_split(bio
, len
>> 9, GFP_ATOMIC
, NULL
);
584 trace_block_split(bdev_get_queue(bio
->bi_bdev
), bio
,
585 split
->bi_iter
.bi_sector
);
586 bio_chain(split
, bio
);
588 if (!waitqueue_active(&nvmeq
->sq_full
))
589 add_wait_queue(&nvmeq
->sq_full
, &nvmeq
->sq_cong_wait
);
590 bio_list_add(&nvmeq
->sq_cong
, split
);
591 bio_list_add(&nvmeq
->sq_cong
, bio
);
592 wake_up(&nvmeq
->sq_full
);
597 /* NVMe scatterlists require no holes in the virtual address */
598 #define BIOVEC_NOT_VIRT_MERGEABLE(vec1, vec2) ((vec2)->bv_offset || \
599 (((vec1)->bv_offset + (vec1)->bv_len) % PAGE_SIZE))
601 static int nvme_map_bio(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
,
602 struct bio
*bio
, enum dma_data_direction dma_dir
, int psegs
)
604 struct bio_vec bvec
, bvprv
;
605 struct bvec_iter iter
;
606 struct scatterlist
*sg
= NULL
;
607 int length
= 0, nsegs
= 0, split_len
= bio
->bi_iter
.bi_size
;
610 if (nvmeq
->dev
->stripe_size
)
611 split_len
= nvmeq
->dev
->stripe_size
-
612 ((bio
->bi_iter
.bi_sector
<< 9) &
613 (nvmeq
->dev
->stripe_size
- 1));
615 sg_init_table(iod
->sg
, psegs
);
616 bio_for_each_segment(bvec
, bio
, iter
) {
617 if (!first
&& BIOVEC_PHYS_MERGEABLE(&bvprv
, &bvec
)) {
618 sg
->length
+= bvec
.bv_len
;
620 if (!first
&& BIOVEC_NOT_VIRT_MERGEABLE(&bvprv
, &bvec
))
621 return nvme_split_and_submit(bio
, nvmeq
,
624 sg
= sg
? sg
+ 1 : iod
->sg
;
625 sg_set_page(sg
, bvec
.bv_page
,
626 bvec
.bv_len
, bvec
.bv_offset
);
630 if (split_len
- length
< bvec
.bv_len
)
631 return nvme_split_and_submit(bio
, nvmeq
, split_len
);
632 length
+= bvec
.bv_len
;
638 if (dma_map_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
, dma_dir
) == 0)
641 BUG_ON(length
!= bio
->bi_iter
.bi_size
);
645 static int nvme_submit_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
646 struct bio
*bio
, struct nvme_iod
*iod
, int cmdid
)
648 struct nvme_dsm_range
*range
=
649 (struct nvme_dsm_range
*)iod_list(iod
)[0];
650 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
652 range
->cattr
= cpu_to_le32(0);
653 range
->nlb
= cpu_to_le32(bio
->bi_iter
.bi_size
>> ns
->lba_shift
);
654 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, bio
->bi_iter
.bi_sector
));
656 memset(cmnd
, 0, sizeof(*cmnd
));
657 cmnd
->dsm
.opcode
= nvme_cmd_dsm
;
658 cmnd
->dsm
.command_id
= cmdid
;
659 cmnd
->dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
660 cmnd
->dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
662 cmnd
->dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
664 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
666 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
671 static int nvme_submit_flush(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
674 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
676 memset(cmnd
, 0, sizeof(*cmnd
));
677 cmnd
->common
.opcode
= nvme_cmd_flush
;
678 cmnd
->common
.command_id
= cmdid
;
679 cmnd
->common
.nsid
= cpu_to_le32(ns
->ns_id
);
681 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
683 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
688 static int nvme_submit_iod(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
)
690 struct bio
*bio
= iod
->private;
691 struct nvme_ns
*ns
= bio
->bi_bdev
->bd_disk
->private_data
;
692 struct nvme_command
*cmnd
;
697 cmdid
= alloc_cmdid(nvmeq
, iod
, bio_completion
, NVME_IO_TIMEOUT
);
698 if (unlikely(cmdid
< 0))
701 if (bio
->bi_rw
& REQ_DISCARD
)
702 return nvme_submit_discard(nvmeq
, ns
, bio
, iod
, cmdid
);
703 if (bio
->bi_rw
& REQ_FLUSH
)
704 return nvme_submit_flush(nvmeq
, ns
, cmdid
);
707 if (bio
->bi_rw
& REQ_FUA
)
708 control
|= NVME_RW_FUA
;
709 if (bio
->bi_rw
& (REQ_FAILFAST_DEV
| REQ_RAHEAD
))
710 control
|= NVME_RW_LR
;
713 if (bio
->bi_rw
& REQ_RAHEAD
)
714 dsmgmt
|= NVME_RW_DSM_FREQ_PREFETCH
;
716 cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
717 memset(cmnd
, 0, sizeof(*cmnd
));
719 cmnd
->rw
.opcode
= bio_data_dir(bio
) ? nvme_cmd_write
: nvme_cmd_read
;
720 cmnd
->rw
.command_id
= cmdid
;
721 cmnd
->rw
.nsid
= cpu_to_le32(ns
->ns_id
);
722 cmnd
->rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
723 cmnd
->rw
.prp2
= cpu_to_le64(iod
->first_dma
);
724 cmnd
->rw
.slba
= cpu_to_le64(nvme_block_nr(ns
, bio
->bi_iter
.bi_sector
));
726 cpu_to_le16((bio
->bi_iter
.bi_size
>> ns
->lba_shift
) - 1);
727 cmnd
->rw
.control
= cpu_to_le16(control
);
728 cmnd
->rw
.dsmgmt
= cpu_to_le32(dsmgmt
);
730 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
732 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
737 static int nvme_split_flush_data(struct nvme_queue
*nvmeq
, struct bio
*bio
)
739 struct bio
*split
= bio_clone(bio
, GFP_ATOMIC
);
743 split
->bi_iter
.bi_size
= 0;
744 split
->bi_phys_segments
= 0;
745 bio
->bi_rw
&= ~REQ_FLUSH
;
746 bio_chain(split
, bio
);
748 if (!waitqueue_active(&nvmeq
->sq_full
))
749 add_wait_queue(&nvmeq
->sq_full
, &nvmeq
->sq_cong_wait
);
750 bio_list_add(&nvmeq
->sq_cong
, split
);
751 bio_list_add(&nvmeq
->sq_cong
, bio
);
752 wake_up_process(nvme_thread
);
758 * Called with local interrupts disabled and the q_lock held. May not sleep.
760 static int nvme_submit_bio_queue(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
763 struct nvme_iod
*iod
;
764 int psegs
= bio_phys_segments(ns
->queue
, bio
);
767 if ((bio
->bi_rw
& REQ_FLUSH
) && psegs
)
768 return nvme_split_flush_data(nvmeq
, bio
);
770 iod
= nvme_alloc_iod(psegs
, bio
->bi_iter
.bi_size
, ns
->dev
, GFP_ATOMIC
);
775 if (bio
->bi_rw
& REQ_DISCARD
) {
778 * We reuse the small pool to allocate the 16-byte range here
779 * as it is not worth having a special pool for these or
780 * additional cases to handle freeing the iod.
782 range
= dma_pool_alloc(nvmeq
->dev
->prp_small_pool
,
789 iod_list(iod
)[0] = (__le64
*)range
;
792 result
= nvme_map_bio(nvmeq
, iod
, bio
,
793 bio_data_dir(bio
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
,
797 if (nvme_setup_prps(nvmeq
->dev
, iod
, result
, GFP_ATOMIC
) !=
802 nvme_start_io_acct(bio
);
804 if (unlikely(nvme_submit_iod(nvmeq
, iod
))) {
805 if (!waitqueue_active(&nvmeq
->sq_full
))
806 add_wait_queue(&nvmeq
->sq_full
, &nvmeq
->sq_cong_wait
);
807 list_add_tail(&iod
->node
, &nvmeq
->iod_bio
);
812 nvme_free_iod(nvmeq
->dev
, iod
);
816 static int nvme_process_cq(struct nvme_queue
*nvmeq
)
820 head
= nvmeq
->cq_head
;
821 phase
= nvmeq
->cq_phase
;
825 nvme_completion_fn fn
;
826 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
827 if ((le16_to_cpu(cqe
.status
) & 1) != phase
)
829 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
830 if (++head
== nvmeq
->q_depth
) {
835 ctx
= free_cmdid(nvmeq
, cqe
.command_id
, &fn
);
836 fn(nvmeq
, ctx
, &cqe
);
839 /* If the controller ignores the cq head doorbell and continuously
840 * writes to the queue, it is theoretically possible to wrap around
841 * the queue twice and mistakenly return IRQ_NONE. Linux only
842 * requires that 0.1% of your interrupts are handled, so this isn't
845 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
848 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
849 nvmeq
->cq_head
= head
;
850 nvmeq
->cq_phase
= phase
;
856 static void nvme_make_request(struct request_queue
*q
, struct bio
*bio
)
858 struct nvme_ns
*ns
= q
->queuedata
;
859 struct nvme_queue
*nvmeq
= get_nvmeq(ns
->dev
);
863 bio_endio(bio
, -EIO
);
867 spin_lock_irq(&nvmeq
->q_lock
);
868 if (!nvmeq
->q_suspended
&& bio_list_empty(&nvmeq
->sq_cong
))
869 result
= nvme_submit_bio_queue(nvmeq
, ns
, bio
);
870 if (unlikely(result
)) {
871 if (!waitqueue_active(&nvmeq
->sq_full
))
872 add_wait_queue(&nvmeq
->sq_full
, &nvmeq
->sq_cong_wait
);
873 bio_list_add(&nvmeq
->sq_cong
, bio
);
876 nvme_process_cq(nvmeq
);
877 spin_unlock_irq(&nvmeq
->q_lock
);
881 static irqreturn_t
nvme_irq(int irq
, void *data
)
884 struct nvme_queue
*nvmeq
= data
;
885 spin_lock(&nvmeq
->q_lock
);
886 nvme_process_cq(nvmeq
);
887 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
889 spin_unlock(&nvmeq
->q_lock
);
893 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
895 struct nvme_queue
*nvmeq
= data
;
896 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
897 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
899 return IRQ_WAKE_THREAD
;
902 static void nvme_abort_command(struct nvme_queue
*nvmeq
, int cmdid
)
904 spin_lock_irq(&nvmeq
->q_lock
);
905 cancel_cmdid(nvmeq
, cmdid
, NULL
);
906 spin_unlock_irq(&nvmeq
->q_lock
);
909 struct sync_cmd_info
{
910 struct task_struct
*task
;
915 static void sync_completion(struct nvme_queue
*nvmeq
, void *ctx
,
916 struct nvme_completion
*cqe
)
918 struct sync_cmd_info
*cmdinfo
= ctx
;
919 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
920 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
921 wake_up_process(cmdinfo
->task
);
925 * Returns 0 on success. If the result is negative, it's a Linux error code;
926 * if the result is positive, it's an NVM Express status code
928 static int nvme_submit_sync_cmd(struct nvme_dev
*dev
, int q_idx
,
929 struct nvme_command
*cmd
,
930 u32
*result
, unsigned timeout
)
933 struct sync_cmd_info cmdinfo
;
934 struct nvme_queue
*nvmeq
;
936 nvmeq
= lock_nvmeq(dev
, q_idx
);
940 cmdinfo
.task
= current
;
941 cmdinfo
.status
= -EINTR
;
943 cmdid
= alloc_cmdid(nvmeq
, &cmdinfo
, sync_completion
, timeout
);
948 cmd
->common
.command_id
= cmdid
;
950 set_current_state(TASK_KILLABLE
);
951 ret
= nvme_submit_cmd(nvmeq
, cmd
);
953 free_cmdid(nvmeq
, cmdid
, NULL
);
955 set_current_state(TASK_RUNNING
);
959 schedule_timeout(timeout
);
961 if (cmdinfo
.status
== -EINTR
) {
962 nvmeq
= lock_nvmeq(dev
, q_idx
);
964 nvme_abort_command(nvmeq
, cmdid
);
971 *result
= cmdinfo
.result
;
973 return cmdinfo
.status
;
976 static int nvme_submit_async_cmd(struct nvme_queue
*nvmeq
,
977 struct nvme_command
*cmd
,
978 struct async_cmd_info
*cmdinfo
, unsigned timeout
)
982 cmdid
= alloc_cmdid_killable(nvmeq
, cmdinfo
, async_completion
, timeout
);
985 cmdinfo
->status
= -EINTR
;
986 cmd
->common
.command_id
= cmdid
;
987 return nvme_submit_cmd(nvmeq
, cmd
);
990 int nvme_submit_admin_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
993 return nvme_submit_sync_cmd(dev
, 0, cmd
, result
, ADMIN_TIMEOUT
);
996 int nvme_submit_io_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
999 return nvme_submit_sync_cmd(dev
, this_cpu_read(*dev
->io_queue
), cmd
,
1000 result
, NVME_IO_TIMEOUT
);
1003 static int nvme_submit_admin_cmd_async(struct nvme_dev
*dev
,
1004 struct nvme_command
*cmd
, struct async_cmd_info
*cmdinfo
)
1006 return nvme_submit_async_cmd(raw_nvmeq(dev
, 0), cmd
, cmdinfo
,
1010 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
1013 struct nvme_command c
;
1015 memset(&c
, 0, sizeof(c
));
1016 c
.delete_queue
.opcode
= opcode
;
1017 c
.delete_queue
.qid
= cpu_to_le16(id
);
1019 status
= nvme_submit_admin_cmd(dev
, &c
, NULL
);
1025 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
1026 struct nvme_queue
*nvmeq
)
1029 struct nvme_command c
;
1030 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
1032 memset(&c
, 0, sizeof(c
));
1033 c
.create_cq
.opcode
= nvme_admin_create_cq
;
1034 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
1035 c
.create_cq
.cqid
= cpu_to_le16(qid
);
1036 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1037 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
1038 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
1040 status
= nvme_submit_admin_cmd(dev
, &c
, NULL
);
1046 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
1047 struct nvme_queue
*nvmeq
)
1050 struct nvme_command c
;
1051 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
1053 memset(&c
, 0, sizeof(c
));
1054 c
.create_sq
.opcode
= nvme_admin_create_sq
;
1055 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
1056 c
.create_sq
.sqid
= cpu_to_le16(qid
);
1057 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1058 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
1059 c
.create_sq
.cqid
= cpu_to_le16(qid
);
1061 status
= nvme_submit_admin_cmd(dev
, &c
, NULL
);
1067 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
1069 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
1072 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
1074 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
1077 int nvme_identify(struct nvme_dev
*dev
, unsigned nsid
, unsigned cns
,
1078 dma_addr_t dma_addr
)
1080 struct nvme_command c
;
1082 memset(&c
, 0, sizeof(c
));
1083 c
.identify
.opcode
= nvme_admin_identify
;
1084 c
.identify
.nsid
= cpu_to_le32(nsid
);
1085 c
.identify
.prp1
= cpu_to_le64(dma_addr
);
1086 c
.identify
.cns
= cpu_to_le32(cns
);
1088 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
1091 int nvme_get_features(struct nvme_dev
*dev
, unsigned fid
, unsigned nsid
,
1092 dma_addr_t dma_addr
, u32
*result
)
1094 struct nvme_command c
;
1096 memset(&c
, 0, sizeof(c
));
1097 c
.features
.opcode
= nvme_admin_get_features
;
1098 c
.features
.nsid
= cpu_to_le32(nsid
);
1099 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1100 c
.features
.fid
= cpu_to_le32(fid
);
1102 return nvme_submit_admin_cmd(dev
, &c
, result
);
1105 int nvme_set_features(struct nvme_dev
*dev
, unsigned fid
, unsigned dword11
,
1106 dma_addr_t dma_addr
, u32
*result
)
1108 struct nvme_command c
;
1110 memset(&c
, 0, sizeof(c
));
1111 c
.features
.opcode
= nvme_admin_set_features
;
1112 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1113 c
.features
.fid
= cpu_to_le32(fid
);
1114 c
.features
.dword11
= cpu_to_le32(dword11
);
1116 return nvme_submit_admin_cmd(dev
, &c
, result
);
1120 * nvme_abort_cmd - Attempt aborting a command
1121 * @cmdid: Command id of a timed out IO
1122 * @queue: The queue with timed out IO
1124 * Schedule controller reset if the command was already aborted once before and
1125 * still hasn't been returned to the driver, or if this is the admin queue.
1127 static void nvme_abort_cmd(int cmdid
, struct nvme_queue
*nvmeq
)
1130 struct nvme_command cmd
;
1131 struct nvme_dev
*dev
= nvmeq
->dev
;
1132 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
1133 struct nvme_queue
*adminq
;
1135 if (!nvmeq
->qid
|| info
[cmdid
].aborted
) {
1136 if (work_busy(&dev
->reset_work
))
1138 list_del_init(&dev
->node
);
1139 dev_warn(&dev
->pci_dev
->dev
,
1140 "I/O %d QID %d timeout, reset controller\n", cmdid
,
1142 dev
->reset_workfn
= nvme_reset_failed_dev
;
1143 queue_work(nvme_workq
, &dev
->reset_work
);
1147 if (!dev
->abort_limit
)
1150 adminq
= rcu_dereference(dev
->queues
[0]);
1151 a_cmdid
= alloc_cmdid(adminq
, CMD_CTX_ABORT
, special_completion
,
1156 memset(&cmd
, 0, sizeof(cmd
));
1157 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1158 cmd
.abort
.cid
= cmdid
;
1159 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1160 cmd
.abort
.command_id
= a_cmdid
;
1163 info
[cmdid
].aborted
= 1;
1164 info
[cmdid
].timeout
= jiffies
+ ADMIN_TIMEOUT
;
1166 dev_warn(nvmeq
->q_dmadev
, "Aborting I/O %d QID %d\n", cmdid
,
1168 nvme_submit_cmd(adminq
, &cmd
);
1172 * nvme_cancel_ios - Cancel outstanding I/Os
1173 * @queue: The queue to cancel I/Os on
1174 * @timeout: True to only cancel I/Os which have timed out
1176 static void nvme_cancel_ios(struct nvme_queue
*nvmeq
, bool timeout
)
1178 int depth
= nvmeq
->q_depth
- 1;
1179 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
1180 unsigned long now
= jiffies
;
1183 for_each_set_bit(cmdid
, nvmeq
->cmdid_data
, depth
) {
1185 nvme_completion_fn fn
;
1186 static struct nvme_completion cqe
= {
1187 .status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1),
1190 if (timeout
&& !time_after(now
, info
[cmdid
].timeout
))
1192 if (info
[cmdid
].ctx
== CMD_CTX_CANCELLED
)
1194 if (timeout
&& info
[cmdid
].ctx
== CMD_CTX_ASYNC
)
1196 if (timeout
&& nvmeq
->dev
->initialized
) {
1197 nvme_abort_cmd(cmdid
, nvmeq
);
1200 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n", cmdid
,
1202 ctx
= cancel_cmdid(nvmeq
, cmdid
, &fn
);
1203 fn(nvmeq
, ctx
, &cqe
);
1207 static void nvme_free_queue(struct nvme_queue
*nvmeq
)
1209 spin_lock_irq(&nvmeq
->q_lock
);
1210 while (bio_list_peek(&nvmeq
->sq_cong
)) {
1211 struct bio
*bio
= bio_list_pop(&nvmeq
->sq_cong
);
1212 bio_endio(bio
, -EIO
);
1214 while (!list_empty(&nvmeq
->iod_bio
)) {
1215 static struct nvme_completion cqe
= {
1216 .status
= cpu_to_le16(
1217 (NVME_SC_ABORT_REQ
| NVME_SC_DNR
) << 1),
1219 struct nvme_iod
*iod
= list_first_entry(&nvmeq
->iod_bio
,
1222 list_del(&iod
->node
);
1223 bio_completion(nvmeq
, iod
, &cqe
);
1225 spin_unlock_irq(&nvmeq
->q_lock
);
1227 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1228 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1229 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1230 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1232 free_cpumask_var(nvmeq
->cpu_mask
);
1236 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1239 struct nvme_queue
*nvmeq
, *next
;
1240 struct llist_node
*entry
;
1243 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1244 nvmeq
= raw_nvmeq(dev
, i
);
1245 RCU_INIT_POINTER(dev
->queues
[i
], NULL
);
1246 llist_add(&nvmeq
->node
, &q_list
);
1250 entry
= llist_del_all(&q_list
);
1251 llist_for_each_entry_safe(nvmeq
, next
, entry
, node
)
1252 nvme_free_queue(nvmeq
);
1256 * nvme_suspend_queue - put queue into suspended state
1257 * @nvmeq - queue to suspend
1259 * Returns 1 if already suspended, 0 otherwise.
1261 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1263 int vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1265 spin_lock_irq(&nvmeq
->q_lock
);
1266 if (nvmeq
->q_suspended
) {
1267 spin_unlock_irq(&nvmeq
->q_lock
);
1270 nvmeq
->q_suspended
= 1;
1271 nvmeq
->dev
->online_queues
--;
1272 spin_unlock_irq(&nvmeq
->q_lock
);
1274 irq_set_affinity_hint(vector
, NULL
);
1275 free_irq(vector
, nvmeq
);
1280 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1282 spin_lock_irq(&nvmeq
->q_lock
);
1283 nvme_process_cq(nvmeq
);
1284 nvme_cancel_ios(nvmeq
, false);
1285 spin_unlock_irq(&nvmeq
->q_lock
);
1288 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1290 struct nvme_queue
*nvmeq
= raw_nvmeq(dev
, qid
);
1294 if (nvme_suspend_queue(nvmeq
))
1297 /* Don't tell the adapter to delete the admin queue.
1298 * Don't tell a removed adapter to delete IO queues. */
1299 if (qid
&& readl(&dev
->bar
->csts
) != -1) {
1300 adapter_delete_sq(dev
, qid
);
1301 adapter_delete_cq(dev
, qid
);
1303 nvme_clear_queue(nvmeq
);
1306 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1307 int depth
, int vector
)
1309 struct device
*dmadev
= &dev
->pci_dev
->dev
;
1310 unsigned extra
= nvme_queue_extra(depth
);
1311 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
) + extra
, GFP_KERNEL
);
1315 nvmeq
->cqes
= dma_zalloc_coherent(dmadev
, CQ_SIZE(depth
),
1316 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1320 nvmeq
->sq_cmds
= dma_alloc_coherent(dmadev
, SQ_SIZE(depth
),
1321 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1322 if (!nvmeq
->sq_cmds
)
1325 if (qid
&& !zalloc_cpumask_var(&nvmeq
->cpu_mask
, GFP_KERNEL
))
1328 nvmeq
->q_dmadev
= dmadev
;
1330 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1331 dev
->instance
, qid
);
1332 spin_lock_init(&nvmeq
->q_lock
);
1334 nvmeq
->cq_phase
= 1;
1335 init_waitqueue_head(&nvmeq
->sq_full
);
1336 init_waitqueue_entry(&nvmeq
->sq_cong_wait
, nvme_thread
);
1337 bio_list_init(&nvmeq
->sq_cong
);
1338 INIT_LIST_HEAD(&nvmeq
->iod_bio
);
1339 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1340 nvmeq
->q_depth
= depth
;
1341 nvmeq
->cq_vector
= vector
;
1343 nvmeq
->q_suspended
= 1;
1345 rcu_assign_pointer(dev
->queues
[qid
], nvmeq
);
1350 dma_free_coherent(dmadev
, SQ_SIZE(depth
), (void *)nvmeq
->sq_cmds
,
1351 nvmeq
->sq_dma_addr
);
1353 dma_free_coherent(dmadev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1354 nvmeq
->cq_dma_addr
);
1360 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1363 if (use_threaded_interrupts
)
1364 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1365 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1367 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1368 IRQF_SHARED
, name
, nvmeq
);
1371 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1373 struct nvme_dev
*dev
= nvmeq
->dev
;
1374 unsigned extra
= nvme_queue_extra(nvmeq
->q_depth
);
1378 nvmeq
->cq_phase
= 1;
1379 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1380 memset(nvmeq
->cmdid_data
, 0, extra
);
1381 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1382 nvme_cancel_ios(nvmeq
, false);
1383 nvmeq
->q_suspended
= 0;
1384 dev
->online_queues
++;
1387 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1389 struct nvme_dev
*dev
= nvmeq
->dev
;
1392 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1396 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1400 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1404 spin_lock_irq(&nvmeq
->q_lock
);
1405 nvme_init_queue(nvmeq
, qid
);
1406 spin_unlock_irq(&nvmeq
->q_lock
);
1411 adapter_delete_sq(dev
, qid
);
1413 adapter_delete_cq(dev
, qid
);
1417 static int nvme_wait_ready(struct nvme_dev
*dev
, u64 cap
, bool enabled
)
1419 unsigned long timeout
;
1420 u32 bit
= enabled
? NVME_CSTS_RDY
: 0;
1422 timeout
= ((NVME_CAP_TIMEOUT(cap
) + 1) * HZ
/ 2) + jiffies
;
1424 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_RDY
) != bit
) {
1426 if (fatal_signal_pending(current
))
1428 if (time_after(jiffies
, timeout
)) {
1429 dev_err(&dev
->pci_dev
->dev
,
1430 "Device not ready; aborting %s\n", enabled
?
1431 "initialisation" : "reset");
1440 * If the device has been passed off to us in an enabled state, just clear
1441 * the enabled bit. The spec says we should set the 'shutdown notification
1442 * bits', but doing so may cause the device to complete commands to the
1443 * admin queue ... and we don't know what memory that might be pointing at!
1445 static int nvme_disable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1447 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1448 dev
->ctrl_config
&= ~NVME_CC_ENABLE
;
1449 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1451 return nvme_wait_ready(dev
, cap
, false);
1454 static int nvme_enable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1456 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1457 dev
->ctrl_config
|= NVME_CC_ENABLE
;
1458 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1460 return nvme_wait_ready(dev
, cap
, true);
1463 static int nvme_shutdown_ctrl(struct nvme_dev
*dev
)
1465 unsigned long timeout
;
1467 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1468 dev
->ctrl_config
|= NVME_CC_SHN_NORMAL
;
1470 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1472 timeout
= SHUTDOWN_TIMEOUT
+ jiffies
;
1473 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_SHST_MASK
) !=
1474 NVME_CSTS_SHST_CMPLT
) {
1476 if (fatal_signal_pending(current
))
1478 if (time_after(jiffies
, timeout
)) {
1479 dev_err(&dev
->pci_dev
->dev
,
1480 "Device shutdown incomplete; abort shutdown\n");
1488 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1492 u64 cap
= readq(&dev
->bar
->cap
);
1493 struct nvme_queue
*nvmeq
;
1494 unsigned page_shift
= PAGE_SHIFT
;
1495 unsigned dev_page_min
= NVME_CAP_MPSMIN(cap
) + 12;
1496 unsigned dev_page_max
= NVME_CAP_MPSMAX(cap
) + 12;
1498 if (page_shift
< dev_page_min
) {
1499 dev_err(&dev
->pci_dev
->dev
,
1500 "Minimum device page size (%u) too large for "
1501 "host (%u)\n", 1 << dev_page_min
,
1505 if (page_shift
> dev_page_max
) {
1506 dev_info(&dev
->pci_dev
->dev
,
1507 "Device maximum page size (%u) smaller than "
1508 "host (%u); enabling work-around\n",
1509 1 << dev_page_max
, 1 << page_shift
);
1510 page_shift
= dev_page_max
;
1513 result
= nvme_disable_ctrl(dev
, cap
);
1517 nvmeq
= raw_nvmeq(dev
, 0);
1519 nvmeq
= nvme_alloc_queue(dev
, 0, 64, 0);
1524 aqa
= nvmeq
->q_depth
- 1;
1527 dev
->page_size
= 1 << page_shift
;
1529 dev
->ctrl_config
= NVME_CC_CSS_NVM
;
1530 dev
->ctrl_config
|= (page_shift
- 12) << NVME_CC_MPS_SHIFT
;
1531 dev
->ctrl_config
|= NVME_CC_ARB_RR
| NVME_CC_SHN_NONE
;
1532 dev
->ctrl_config
|= NVME_CC_IOSQES
| NVME_CC_IOCQES
;
1534 writel(aqa
, &dev
->bar
->aqa
);
1535 writeq(nvmeq
->sq_dma_addr
, &dev
->bar
->asq
);
1536 writeq(nvmeq
->cq_dma_addr
, &dev
->bar
->acq
);
1538 result
= nvme_enable_ctrl(dev
, cap
);
1542 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1546 spin_lock_irq(&nvmeq
->q_lock
);
1547 nvme_init_queue(nvmeq
, 0);
1548 spin_unlock_irq(&nvmeq
->q_lock
);
1552 struct nvme_iod
*nvme_map_user_pages(struct nvme_dev
*dev
, int write
,
1553 unsigned long addr
, unsigned length
)
1555 int i
, err
, count
, nents
, offset
;
1556 struct scatterlist
*sg
;
1557 struct page
**pages
;
1558 struct nvme_iod
*iod
;
1561 return ERR_PTR(-EINVAL
);
1562 if (!length
|| length
> INT_MAX
- PAGE_SIZE
)
1563 return ERR_PTR(-EINVAL
);
1565 offset
= offset_in_page(addr
);
1566 count
= DIV_ROUND_UP(offset
+ length
, PAGE_SIZE
);
1567 pages
= kcalloc(count
, sizeof(*pages
), GFP_KERNEL
);
1569 return ERR_PTR(-ENOMEM
);
1571 err
= get_user_pages_fast(addr
, count
, 1, pages
);
1579 iod
= nvme_alloc_iod(count
, length
, dev
, GFP_KERNEL
);
1584 sg_init_table(sg
, count
);
1585 for (i
= 0; i
< count
; i
++) {
1586 sg_set_page(&sg
[i
], pages
[i
],
1587 min_t(unsigned, length
, PAGE_SIZE
- offset
),
1589 length
-= (PAGE_SIZE
- offset
);
1592 sg_mark_end(&sg
[i
- 1]);
1595 nents
= dma_map_sg(&dev
->pci_dev
->dev
, sg
, count
,
1596 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1606 for (i
= 0; i
< count
; i
++)
1609 return ERR_PTR(err
);
1612 void nvme_unmap_user_pages(struct nvme_dev
*dev
, int write
,
1613 struct nvme_iod
*iod
)
1617 dma_unmap_sg(&dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
1618 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1620 for (i
= 0; i
< iod
->nents
; i
++)
1621 put_page(sg_page(&iod
->sg
[i
]));
1624 static int nvme_submit_io(struct nvme_ns
*ns
, struct nvme_user_io __user
*uio
)
1626 struct nvme_dev
*dev
= ns
->dev
;
1627 struct nvme_user_io io
;
1628 struct nvme_command c
;
1629 unsigned length
, meta_len
;
1631 struct nvme_iod
*iod
, *meta_iod
= NULL
;
1632 dma_addr_t meta_dma_addr
;
1633 void *meta
, *uninitialized_var(meta_mem
);
1635 if (copy_from_user(&io
, uio
, sizeof(io
)))
1637 length
= (io
.nblocks
+ 1) << ns
->lba_shift
;
1638 meta_len
= (io
.nblocks
+ 1) * ns
->ms
;
1640 if (meta_len
&& ((io
.metadata
& 3) || !io
.metadata
))
1643 switch (io
.opcode
) {
1644 case nvme_cmd_write
:
1646 case nvme_cmd_compare
:
1647 iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.addr
, length
);
1654 return PTR_ERR(iod
);
1656 memset(&c
, 0, sizeof(c
));
1657 c
.rw
.opcode
= io
.opcode
;
1658 c
.rw
.flags
= io
.flags
;
1659 c
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
1660 c
.rw
.slba
= cpu_to_le64(io
.slba
);
1661 c
.rw
.length
= cpu_to_le16(io
.nblocks
);
1662 c
.rw
.control
= cpu_to_le16(io
.control
);
1663 c
.rw
.dsmgmt
= cpu_to_le32(io
.dsmgmt
);
1664 c
.rw
.reftag
= cpu_to_le32(io
.reftag
);
1665 c
.rw
.apptag
= cpu_to_le16(io
.apptag
);
1666 c
.rw
.appmask
= cpu_to_le16(io
.appmask
);
1669 meta_iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.metadata
,
1671 if (IS_ERR(meta_iod
)) {
1672 status
= PTR_ERR(meta_iod
);
1677 meta_mem
= dma_alloc_coherent(&dev
->pci_dev
->dev
, meta_len
,
1678 &meta_dma_addr
, GFP_KERNEL
);
1684 if (io
.opcode
& 1) {
1685 int meta_offset
= 0;
1687 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1688 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1689 meta_iod
->sg
[i
].offset
;
1690 memcpy(meta_mem
+ meta_offset
, meta
,
1691 meta_iod
->sg
[i
].length
);
1692 kunmap_atomic(meta
);
1693 meta_offset
+= meta_iod
->sg
[i
].length
;
1697 c
.rw
.metadata
= cpu_to_le64(meta_dma_addr
);
1700 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1701 c
.rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1702 c
.rw
.prp2
= cpu_to_le64(iod
->first_dma
);
1704 if (length
!= (io
.nblocks
+ 1) << ns
->lba_shift
)
1707 status
= nvme_submit_io_cmd(dev
, &c
, NULL
);
1710 if (status
== NVME_SC_SUCCESS
&& !(io
.opcode
& 1)) {
1711 int meta_offset
= 0;
1713 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1714 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1715 meta_iod
->sg
[i
].offset
;
1716 memcpy(meta
, meta_mem
+ meta_offset
,
1717 meta_iod
->sg
[i
].length
);
1718 kunmap_atomic(meta
);
1719 meta_offset
+= meta_iod
->sg
[i
].length
;
1723 dma_free_coherent(&dev
->pci_dev
->dev
, meta_len
, meta_mem
,
1728 nvme_unmap_user_pages(dev
, io
.opcode
& 1, iod
);
1729 nvme_free_iod(dev
, iod
);
1732 nvme_unmap_user_pages(dev
, io
.opcode
& 1, meta_iod
);
1733 nvme_free_iod(dev
, meta_iod
);
1739 static int nvme_user_admin_cmd(struct nvme_dev
*dev
,
1740 struct nvme_admin_cmd __user
*ucmd
)
1742 struct nvme_admin_cmd cmd
;
1743 struct nvme_command c
;
1745 struct nvme_iod
*uninitialized_var(iod
);
1748 if (!capable(CAP_SYS_ADMIN
))
1750 if (copy_from_user(&cmd
, ucmd
, sizeof(cmd
)))
1753 memset(&c
, 0, sizeof(c
));
1754 c
.common
.opcode
= cmd
.opcode
;
1755 c
.common
.flags
= cmd
.flags
;
1756 c
.common
.nsid
= cpu_to_le32(cmd
.nsid
);
1757 c
.common
.cdw2
[0] = cpu_to_le32(cmd
.cdw2
);
1758 c
.common
.cdw2
[1] = cpu_to_le32(cmd
.cdw3
);
1759 c
.common
.cdw10
[0] = cpu_to_le32(cmd
.cdw10
);
1760 c
.common
.cdw10
[1] = cpu_to_le32(cmd
.cdw11
);
1761 c
.common
.cdw10
[2] = cpu_to_le32(cmd
.cdw12
);
1762 c
.common
.cdw10
[3] = cpu_to_le32(cmd
.cdw13
);
1763 c
.common
.cdw10
[4] = cpu_to_le32(cmd
.cdw14
);
1764 c
.common
.cdw10
[5] = cpu_to_le32(cmd
.cdw15
);
1766 length
= cmd
.data_len
;
1768 iod
= nvme_map_user_pages(dev
, cmd
.opcode
& 1, cmd
.addr
,
1771 return PTR_ERR(iod
);
1772 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1773 c
.common
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1774 c
.common
.prp2
= cpu_to_le64(iod
->first_dma
);
1777 timeout
= cmd
.timeout_ms
? msecs_to_jiffies(cmd
.timeout_ms
) :
1779 if (length
!= cmd
.data_len
)
1782 status
= nvme_submit_sync_cmd(dev
, 0, &c
, &cmd
.result
, timeout
);
1785 nvme_unmap_user_pages(dev
, cmd
.opcode
& 1, iod
);
1786 nvme_free_iod(dev
, iod
);
1789 if ((status
>= 0) && copy_to_user(&ucmd
->result
, &cmd
.result
,
1790 sizeof(cmd
.result
)))
1796 static int nvme_ioctl(struct block_device
*bdev
, fmode_t mode
, unsigned int cmd
,
1799 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1803 force_successful_syscall_return();
1805 case NVME_IOCTL_ADMIN_CMD
:
1806 return nvme_user_admin_cmd(ns
->dev
, (void __user
*)arg
);
1807 case NVME_IOCTL_SUBMIT_IO
:
1808 return nvme_submit_io(ns
, (void __user
*)arg
);
1809 case SG_GET_VERSION_NUM
:
1810 return nvme_sg_get_version_num((void __user
*)arg
);
1812 return nvme_sg_io(ns
, (void __user
*)arg
);
1818 #ifdef CONFIG_COMPAT
1819 static int nvme_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1820 unsigned int cmd
, unsigned long arg
)
1824 return -ENOIOCTLCMD
;
1826 return nvme_ioctl(bdev
, mode
, cmd
, arg
);
1829 #define nvme_compat_ioctl NULL
1832 static int nvme_open(struct block_device
*bdev
, fmode_t mode
)
1834 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1835 struct nvme_dev
*dev
= ns
->dev
;
1837 kref_get(&dev
->kref
);
1841 static void nvme_free_dev(struct kref
*kref
);
1843 static void nvme_release(struct gendisk
*disk
, fmode_t mode
)
1845 struct nvme_ns
*ns
= disk
->private_data
;
1846 struct nvme_dev
*dev
= ns
->dev
;
1848 kref_put(&dev
->kref
, nvme_free_dev
);
1851 static int nvme_getgeo(struct block_device
*bd
, struct hd_geometry
*geo
)
1853 /* some standard values */
1854 geo
->heads
= 1 << 6;
1855 geo
->sectors
= 1 << 5;
1856 geo
->cylinders
= get_capacity(bd
->bd_disk
) >> 11;
1860 static const struct block_device_operations nvme_fops
= {
1861 .owner
= THIS_MODULE
,
1862 .ioctl
= nvme_ioctl
,
1863 .compat_ioctl
= nvme_compat_ioctl
,
1865 .release
= nvme_release
,
1866 .getgeo
= nvme_getgeo
,
1869 static void nvme_resubmit_iods(struct nvme_queue
*nvmeq
)
1871 struct nvme_iod
*iod
, *next
;
1873 list_for_each_entry_safe(iod
, next
, &nvmeq
->iod_bio
, node
) {
1874 if (unlikely(nvme_submit_iod(nvmeq
, iod
)))
1876 list_del(&iod
->node
);
1877 if (bio_list_empty(&nvmeq
->sq_cong
) &&
1878 list_empty(&nvmeq
->iod_bio
))
1879 remove_wait_queue(&nvmeq
->sq_full
,
1880 &nvmeq
->sq_cong_wait
);
1884 static void nvme_resubmit_bios(struct nvme_queue
*nvmeq
)
1886 while (bio_list_peek(&nvmeq
->sq_cong
)) {
1887 struct bio
*bio
= bio_list_pop(&nvmeq
->sq_cong
);
1888 struct nvme_ns
*ns
= bio
->bi_bdev
->bd_disk
->private_data
;
1890 if (bio_list_empty(&nvmeq
->sq_cong
) &&
1891 list_empty(&nvmeq
->iod_bio
))
1892 remove_wait_queue(&nvmeq
->sq_full
,
1893 &nvmeq
->sq_cong_wait
);
1894 if (nvme_submit_bio_queue(nvmeq
, ns
, bio
)) {
1895 if (!waitqueue_active(&nvmeq
->sq_full
))
1896 add_wait_queue(&nvmeq
->sq_full
,
1897 &nvmeq
->sq_cong_wait
);
1898 bio_list_add_head(&nvmeq
->sq_cong
, bio
);
1904 static int nvme_submit_async_req(struct nvme_queue
*nvmeq
)
1906 struct nvme_command
*c
;
1909 cmdid
= alloc_cmdid(nvmeq
, CMD_CTX_ASYNC
, special_completion
, 0);
1913 c
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
1914 memset(c
, 0, sizeof(*c
));
1915 c
->common
.opcode
= nvme_admin_async_event
;
1916 c
->common
.command_id
= cmdid
;
1918 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
1920 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
1925 static int nvme_kthread(void *data
)
1927 struct nvme_dev
*dev
, *next
;
1929 while (!kthread_should_stop()) {
1930 set_current_state(TASK_INTERRUPTIBLE
);
1931 spin_lock(&dev_list_lock
);
1932 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
1934 if (readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
&&
1936 if (work_busy(&dev
->reset_work
))
1938 list_del_init(&dev
->node
);
1939 dev_warn(&dev
->pci_dev
->dev
,
1940 "Failed status, reset controller\n");
1941 dev
->reset_workfn
= nvme_reset_failed_dev
;
1942 queue_work(nvme_workq
, &dev
->reset_work
);
1946 for (i
= 0; i
< dev
->queue_count
; i
++) {
1947 struct nvme_queue
*nvmeq
=
1948 rcu_dereference(dev
->queues
[i
]);
1951 spin_lock_irq(&nvmeq
->q_lock
);
1952 if (nvmeq
->q_suspended
)
1954 nvme_process_cq(nvmeq
);
1955 nvme_cancel_ios(nvmeq
, true);
1956 nvme_resubmit_bios(nvmeq
);
1957 nvme_resubmit_iods(nvmeq
);
1959 while ((i
== 0) && (dev
->event_limit
> 0)) {
1960 if (nvme_submit_async_req(nvmeq
))
1965 spin_unlock_irq(&nvmeq
->q_lock
);
1969 spin_unlock(&dev_list_lock
);
1970 schedule_timeout(round_jiffies_relative(HZ
));
1975 static void nvme_config_discard(struct nvme_ns
*ns
)
1977 u32 logical_block_size
= queue_logical_block_size(ns
->queue
);
1978 ns
->queue
->limits
.discard_zeroes_data
= 0;
1979 ns
->queue
->limits
.discard_alignment
= logical_block_size
;
1980 ns
->queue
->limits
.discard_granularity
= logical_block_size
;
1981 ns
->queue
->limits
.max_discard_sectors
= 0xffffffff;
1982 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD
, ns
->queue
);
1985 static struct nvme_ns
*nvme_alloc_ns(struct nvme_dev
*dev
, unsigned nsid
,
1986 struct nvme_id_ns
*id
, struct nvme_lba_range_type
*rt
)
1989 struct gendisk
*disk
;
1992 if (rt
->attributes
& NVME_LBART_ATTRIB_HIDE
)
1995 ns
= kzalloc(sizeof(*ns
), GFP_KERNEL
);
1998 ns
->queue
= blk_alloc_queue(GFP_KERNEL
);
2001 ns
->queue
->queue_flags
= QUEUE_FLAG_DEFAULT
;
2002 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES
, ns
->queue
);
2003 queue_flag_set_unlocked(QUEUE_FLAG_NONROT
, ns
->queue
);
2004 queue_flag_clear_unlocked(QUEUE_FLAG_ADD_RANDOM
, ns
->queue
);
2005 blk_queue_make_request(ns
->queue
, nvme_make_request
);
2007 ns
->queue
->queuedata
= ns
;
2009 disk
= alloc_disk(0);
2011 goto out_free_queue
;
2014 lbaf
= id
->flbas
& 0xf;
2015 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
2016 ns
->ms
= le16_to_cpu(id
->lbaf
[lbaf
].ms
);
2017 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
2018 if (dev
->max_hw_sectors
)
2019 blk_queue_max_hw_sectors(ns
->queue
, dev
->max_hw_sectors
);
2020 if (dev
->vwc
& NVME_CTRL_VWC_PRESENT
)
2021 blk_queue_flush(ns
->queue
, REQ_FLUSH
| REQ_FUA
);
2023 disk
->major
= nvme_major
;
2024 disk
->first_minor
= 0;
2025 disk
->fops
= &nvme_fops
;
2026 disk
->private_data
= ns
;
2027 disk
->queue
= ns
->queue
;
2028 disk
->driverfs_dev
= &dev
->pci_dev
->dev
;
2029 disk
->flags
= GENHD_FL_EXT_DEVT
;
2030 sprintf(disk
->disk_name
, "nvme%dn%d", dev
->instance
, nsid
);
2031 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
2033 if (dev
->oncs
& NVME_CTRL_ONCS_DSM
)
2034 nvme_config_discard(ns
);
2039 blk_cleanup_queue(ns
->queue
);
2045 static int nvme_find_closest_node(int node
)
2047 int n
, val
, min_val
= INT_MAX
, best_node
= node
;
2049 for_each_online_node(n
) {
2052 val
= node_distance(node
, n
);
2053 if (val
< min_val
) {
2061 static void nvme_set_queue_cpus(cpumask_t
*qmask
, struct nvme_queue
*nvmeq
,
2065 for_each_cpu(cpu
, qmask
) {
2066 if (cpumask_weight(nvmeq
->cpu_mask
) >= count
)
2068 if (!cpumask_test_and_set_cpu(cpu
, nvmeq
->cpu_mask
))
2069 *per_cpu_ptr(nvmeq
->dev
->io_queue
, cpu
) = nvmeq
->qid
;
2073 static void nvme_add_cpus(cpumask_t
*mask
, const cpumask_t
*unassigned_cpus
,
2074 const cpumask_t
*new_mask
, struct nvme_queue
*nvmeq
, int cpus_per_queue
)
2077 for_each_cpu(next_cpu
, new_mask
) {
2078 cpumask_or(mask
, mask
, get_cpu_mask(next_cpu
));
2079 cpumask_or(mask
, mask
, topology_thread_cpumask(next_cpu
));
2080 cpumask_and(mask
, mask
, unassigned_cpus
);
2081 nvme_set_queue_cpus(mask
, nvmeq
, cpus_per_queue
);
2085 static void nvme_create_io_queues(struct nvme_dev
*dev
)
2089 max
= min(dev
->max_qid
, num_online_cpus());
2090 for (i
= dev
->queue_count
; i
<= max
; i
++)
2091 if (!nvme_alloc_queue(dev
, i
, dev
->q_depth
, i
- 1))
2094 max
= min(dev
->queue_count
- 1, num_online_cpus());
2095 for (i
= dev
->online_queues
; i
<= max
; i
++)
2096 if (nvme_create_queue(raw_nvmeq(dev
, i
), i
))
2101 * If there are fewer queues than online cpus, this will try to optimally
2102 * assign a queue to multiple cpus by grouping cpus that are "close" together:
2103 * thread siblings, core, socket, closest node, then whatever else is
2106 static void nvme_assign_io_queues(struct nvme_dev
*dev
)
2108 unsigned cpu
, cpus_per_queue
, queues
, remainder
, i
;
2109 cpumask_var_t unassigned_cpus
;
2111 nvme_create_io_queues(dev
);
2113 queues
= min(dev
->online_queues
- 1, num_online_cpus());
2117 cpus_per_queue
= num_online_cpus() / queues
;
2118 remainder
= queues
- (num_online_cpus() - queues
* cpus_per_queue
);
2120 if (!alloc_cpumask_var(&unassigned_cpus
, GFP_KERNEL
))
2123 cpumask_copy(unassigned_cpus
, cpu_online_mask
);
2124 cpu
= cpumask_first(unassigned_cpus
);
2125 for (i
= 1; i
<= queues
; i
++) {
2126 struct nvme_queue
*nvmeq
= lock_nvmeq(dev
, i
);
2129 cpumask_clear(nvmeq
->cpu_mask
);
2130 if (!cpumask_weight(unassigned_cpus
)) {
2131 unlock_nvmeq(nvmeq
);
2135 mask
= *get_cpu_mask(cpu
);
2136 nvme_set_queue_cpus(&mask
, nvmeq
, cpus_per_queue
);
2137 if (cpus_weight(mask
) < cpus_per_queue
)
2138 nvme_add_cpus(&mask
, unassigned_cpus
,
2139 topology_thread_cpumask(cpu
),
2140 nvmeq
, cpus_per_queue
);
2141 if (cpus_weight(mask
) < cpus_per_queue
)
2142 nvme_add_cpus(&mask
, unassigned_cpus
,
2143 topology_core_cpumask(cpu
),
2144 nvmeq
, cpus_per_queue
);
2145 if (cpus_weight(mask
) < cpus_per_queue
)
2146 nvme_add_cpus(&mask
, unassigned_cpus
,
2147 cpumask_of_node(cpu_to_node(cpu
)),
2148 nvmeq
, cpus_per_queue
);
2149 if (cpus_weight(mask
) < cpus_per_queue
)
2150 nvme_add_cpus(&mask
, unassigned_cpus
,
2152 nvme_find_closest_node(
2154 nvmeq
, cpus_per_queue
);
2155 if (cpus_weight(mask
) < cpus_per_queue
)
2156 nvme_add_cpus(&mask
, unassigned_cpus
,
2158 nvmeq
, cpus_per_queue
);
2160 WARN(cpumask_weight(nvmeq
->cpu_mask
) != cpus_per_queue
,
2161 "nvme%d qid:%d mis-matched queue-to-cpu assignment\n",
2164 irq_set_affinity_hint(dev
->entry
[nvmeq
->cq_vector
].vector
,
2166 cpumask_andnot(unassigned_cpus
, unassigned_cpus
,
2168 cpu
= cpumask_next(cpu
, unassigned_cpus
);
2169 if (remainder
&& !--remainder
)
2171 unlock_nvmeq(nvmeq
);
2173 WARN(cpumask_weight(unassigned_cpus
), "nvme%d unassigned online cpus\n",
2176 cpumask_andnot(unassigned_cpus
, cpu_possible_mask
, cpu_online_mask
);
2177 for_each_cpu(cpu
, unassigned_cpus
)
2178 *per_cpu_ptr(dev
->io_queue
, cpu
) = (i
++ % queues
) + 1;
2179 free_cpumask_var(unassigned_cpus
);
2182 static int set_queue_count(struct nvme_dev
*dev
, int count
)
2186 u32 q_count
= (count
- 1) | ((count
- 1) << 16);
2188 status
= nvme_set_features(dev
, NVME_FEAT_NUM_QUEUES
, q_count
, 0,
2193 dev_err(&dev
->pci_dev
->dev
, "Could not set queue count (%d)\n",
2197 return min(result
& 0xffff, result
>> 16) + 1;
2200 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
2202 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
2205 static void nvme_cpu_workfn(struct work_struct
*work
)
2207 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, cpu_work
);
2208 if (dev
->initialized
)
2209 nvme_assign_io_queues(dev
);
2212 static int nvme_cpu_notify(struct notifier_block
*self
,
2213 unsigned long action
, void *hcpu
)
2215 struct nvme_dev
*dev
;
2220 spin_lock(&dev_list_lock
);
2221 list_for_each_entry(dev
, &dev_list
, node
)
2222 schedule_work(&dev
->cpu_work
);
2223 spin_unlock(&dev_list_lock
);
2229 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
2231 struct nvme_queue
*adminq
= raw_nvmeq(dev
, 0);
2232 struct pci_dev
*pdev
= dev
->pci_dev
;
2233 int result
, i
, vecs
, nr_io_queues
, size
;
2235 nr_io_queues
= num_possible_cpus();
2236 result
= set_queue_count(dev
, nr_io_queues
);
2239 if (result
< nr_io_queues
)
2240 nr_io_queues
= result
;
2242 size
= db_bar_size(dev
, nr_io_queues
);
2246 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
2249 if (!--nr_io_queues
)
2251 size
= db_bar_size(dev
, nr_io_queues
);
2253 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2254 adminq
->q_db
= dev
->dbs
;
2257 /* Deregister the admin queue's interrupt */
2258 free_irq(dev
->entry
[0].vector
, adminq
);
2260 for (i
= 0; i
< nr_io_queues
; i
++)
2261 dev
->entry
[i
].entry
= i
;
2262 vecs
= pci_enable_msix_range(pdev
, dev
->entry
, 1, nr_io_queues
);
2264 vecs
= pci_enable_msi_range(pdev
, 1, min(nr_io_queues
, 32));
2268 for (i
= 0; i
< vecs
; i
++)
2269 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
2274 * Should investigate if there's a performance win from allocating
2275 * more queues than interrupt vectors; it might allow the submission
2276 * path to scale better, even if the receive path is limited by the
2277 * number of interrupts.
2279 nr_io_queues
= vecs
;
2280 dev
->max_qid
= nr_io_queues
;
2282 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
2284 adminq
->q_suspended
= 1;
2288 /* Free previously allocated queues that are no longer usable */
2289 nvme_free_queues(dev
, nr_io_queues
+ 1);
2290 nvme_assign_io_queues(dev
);
2295 nvme_free_queues(dev
, 1);
2300 * Return: error value if an error occurred setting up the queues or calling
2301 * Identify Device. 0 if these succeeded, even if adding some of the
2302 * namespaces failed. At the moment, these failures are silent. TBD which
2303 * failures should be reported.
2305 static int nvme_dev_add(struct nvme_dev
*dev
)
2307 struct pci_dev
*pdev
= dev
->pci_dev
;
2311 struct nvme_id_ctrl
*ctrl
;
2312 struct nvme_id_ns
*id_ns
;
2314 dma_addr_t dma_addr
;
2315 int shift
= NVME_CAP_MPSMIN(readq(&dev
->bar
->cap
)) + 12;
2317 mem
= dma_alloc_coherent(&pdev
->dev
, 8192, &dma_addr
, GFP_KERNEL
);
2321 res
= nvme_identify(dev
, 0, 1, dma_addr
);
2323 dev_err(&pdev
->dev
, "Identify Controller failed (%d)\n", res
);
2329 nn
= le32_to_cpup(&ctrl
->nn
);
2330 dev
->oncs
= le16_to_cpup(&ctrl
->oncs
);
2331 dev
->abort_limit
= ctrl
->acl
+ 1;
2332 dev
->vwc
= ctrl
->vwc
;
2333 dev
->event_limit
= min(ctrl
->aerl
+ 1, 8);
2334 memcpy(dev
->serial
, ctrl
->sn
, sizeof(ctrl
->sn
));
2335 memcpy(dev
->model
, ctrl
->mn
, sizeof(ctrl
->mn
));
2336 memcpy(dev
->firmware_rev
, ctrl
->fr
, sizeof(ctrl
->fr
));
2338 dev
->max_hw_sectors
= 1 << (ctrl
->mdts
+ shift
- 9);
2339 if ((pdev
->vendor
== PCI_VENDOR_ID_INTEL
) &&
2340 (pdev
->device
== 0x0953) && ctrl
->vs
[3])
2341 dev
->stripe_size
= 1 << (ctrl
->vs
[3] + shift
);
2344 for (i
= 1; i
<= nn
; i
++) {
2345 res
= nvme_identify(dev
, i
, 0, dma_addr
);
2349 if (id_ns
->ncap
== 0)
2352 res
= nvme_get_features(dev
, NVME_FEAT_LBA_RANGE
, i
,
2353 dma_addr
+ 4096, NULL
);
2355 memset(mem
+ 4096, 0, 4096);
2357 ns
= nvme_alloc_ns(dev
, i
, mem
, mem
+ 4096);
2359 list_add_tail(&ns
->list
, &dev
->namespaces
);
2361 list_for_each_entry(ns
, &dev
->namespaces
, list
)
2366 dma_free_coherent(&dev
->pci_dev
->dev
, 8192, mem
, dma_addr
);
2370 static int nvme_dev_map(struct nvme_dev
*dev
)
2373 int bars
, result
= -ENOMEM
;
2374 struct pci_dev
*pdev
= dev
->pci_dev
;
2376 if (pci_enable_device_mem(pdev
))
2379 dev
->entry
[0].vector
= pdev
->irq
;
2380 pci_set_master(pdev
);
2381 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2382 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
2385 if (dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64)) &&
2386 dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32)))
2389 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
2392 if (readl(&dev
->bar
->csts
) == -1) {
2396 cap
= readq(&dev
->bar
->cap
);
2397 dev
->q_depth
= min_t(int, NVME_CAP_MQES(cap
) + 1, NVME_Q_DEPTH
);
2398 dev
->db_stride
= 1 << NVME_CAP_STRIDE(cap
);
2399 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2407 pci_release_regions(pdev
);
2409 pci_disable_device(pdev
);
2413 static void nvme_dev_unmap(struct nvme_dev
*dev
)
2415 if (dev
->pci_dev
->msi_enabled
)
2416 pci_disable_msi(dev
->pci_dev
);
2417 else if (dev
->pci_dev
->msix_enabled
)
2418 pci_disable_msix(dev
->pci_dev
);
2423 pci_release_regions(dev
->pci_dev
);
2426 if (pci_is_enabled(dev
->pci_dev
))
2427 pci_disable_device(dev
->pci_dev
);
2430 struct nvme_delq_ctx
{
2431 struct task_struct
*waiter
;
2432 struct kthread_worker
*worker
;
2436 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
2438 dq
->waiter
= current
;
2442 set_current_state(TASK_KILLABLE
);
2443 if (!atomic_read(&dq
->refcount
))
2445 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
2446 fatal_signal_pending(current
)) {
2447 set_current_state(TASK_RUNNING
);
2449 nvme_disable_ctrl(dev
, readq(&dev
->bar
->cap
));
2450 nvme_disable_queue(dev
, 0);
2452 send_sig(SIGKILL
, dq
->worker
->task
, 1);
2453 flush_kthread_worker(dq
->worker
);
2457 set_current_state(TASK_RUNNING
);
2460 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
2462 atomic_dec(&dq
->refcount
);
2464 wake_up_process(dq
->waiter
);
2467 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
2469 atomic_inc(&dq
->refcount
);
2473 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
2475 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
2477 nvme_clear_queue(nvmeq
);
2481 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
2482 kthread_work_func_t fn
)
2484 struct nvme_command c
;
2486 memset(&c
, 0, sizeof(c
));
2487 c
.delete_queue
.opcode
= opcode
;
2488 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
2490 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
2491 return nvme_submit_admin_cmd_async(nvmeq
->dev
, &c
, &nvmeq
->cmdinfo
);
2494 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
2496 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2498 nvme_del_queue_end(nvmeq
);
2501 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
2503 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
2504 nvme_del_cq_work_handler
);
2507 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
2509 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2511 int status
= nvmeq
->cmdinfo
.status
;
2514 status
= nvme_delete_cq(nvmeq
);
2516 nvme_del_queue_end(nvmeq
);
2519 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
2521 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
2522 nvme_del_sq_work_handler
);
2525 static void nvme_del_queue_start(struct kthread_work
*work
)
2527 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2529 allow_signal(SIGKILL
);
2530 if (nvme_delete_sq(nvmeq
))
2531 nvme_del_queue_end(nvmeq
);
2534 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
2537 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
2538 struct nvme_delq_ctx dq
;
2539 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
2540 &worker
, "nvme%d", dev
->instance
);
2542 if (IS_ERR(kworker_task
)) {
2543 dev_err(&dev
->pci_dev
->dev
,
2544 "Failed to create queue del task\n");
2545 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
2546 nvme_disable_queue(dev
, i
);
2551 atomic_set(&dq
.refcount
, 0);
2552 dq
.worker
= &worker
;
2553 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2554 struct nvme_queue
*nvmeq
= raw_nvmeq(dev
, i
);
2556 if (nvme_suspend_queue(nvmeq
))
2558 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
2559 nvmeq
->cmdinfo
.worker
= dq
.worker
;
2560 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
2561 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
2563 nvme_wait_dq(&dq
, dev
);
2564 kthread_stop(kworker_task
);
2568 * Remove the node from the device list and check
2569 * for whether or not we need to stop the nvme_thread.
2571 static void nvme_dev_list_remove(struct nvme_dev
*dev
)
2573 struct task_struct
*tmp
= NULL
;
2575 spin_lock(&dev_list_lock
);
2576 list_del_init(&dev
->node
);
2577 if (list_empty(&dev_list
) && !IS_ERR_OR_NULL(nvme_thread
)) {
2581 spin_unlock(&dev_list_lock
);
2587 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2592 dev
->initialized
= 0;
2593 nvme_dev_list_remove(dev
);
2596 csts
= readl(&dev
->bar
->csts
);
2597 if (csts
& NVME_CSTS_CFS
|| !(csts
& NVME_CSTS_RDY
)) {
2598 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2599 struct nvme_queue
*nvmeq
= raw_nvmeq(dev
, i
);
2600 nvme_suspend_queue(nvmeq
);
2601 nvme_clear_queue(nvmeq
);
2604 nvme_disable_io_queues(dev
);
2605 nvme_shutdown_ctrl(dev
);
2606 nvme_disable_queue(dev
, 0);
2608 nvme_dev_unmap(dev
);
2611 static void nvme_dev_remove(struct nvme_dev
*dev
)
2615 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2616 if (ns
->disk
->flags
& GENHD_FL_UP
)
2617 del_gendisk(ns
->disk
);
2618 if (!blk_queue_dying(ns
->queue
))
2619 blk_cleanup_queue(ns
->queue
);
2623 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2625 struct device
*dmadev
= &dev
->pci_dev
->dev
;
2626 dev
->prp_page_pool
= dma_pool_create("prp list page", dmadev
,
2627 PAGE_SIZE
, PAGE_SIZE
, 0);
2628 if (!dev
->prp_page_pool
)
2631 /* Optimisation for I/Os between 4k and 128k */
2632 dev
->prp_small_pool
= dma_pool_create("prp list 256", dmadev
,
2634 if (!dev
->prp_small_pool
) {
2635 dma_pool_destroy(dev
->prp_page_pool
);
2641 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2643 dma_pool_destroy(dev
->prp_page_pool
);
2644 dma_pool_destroy(dev
->prp_small_pool
);
2647 static DEFINE_IDA(nvme_instance_ida
);
2649 static int nvme_set_instance(struct nvme_dev
*dev
)
2651 int instance
, error
;
2654 if (!ida_pre_get(&nvme_instance_ida
, GFP_KERNEL
))
2657 spin_lock(&dev_list_lock
);
2658 error
= ida_get_new(&nvme_instance_ida
, &instance
);
2659 spin_unlock(&dev_list_lock
);
2660 } while (error
== -EAGAIN
);
2665 dev
->instance
= instance
;
2669 static void nvme_release_instance(struct nvme_dev
*dev
)
2671 spin_lock(&dev_list_lock
);
2672 ida_remove(&nvme_instance_ida
, dev
->instance
);
2673 spin_unlock(&dev_list_lock
);
2676 static void nvme_free_namespaces(struct nvme_dev
*dev
)
2678 struct nvme_ns
*ns
, *next
;
2680 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
) {
2681 list_del(&ns
->list
);
2687 static void nvme_free_dev(struct kref
*kref
)
2689 struct nvme_dev
*dev
= container_of(kref
, struct nvme_dev
, kref
);
2691 pci_dev_put(dev
->pci_dev
);
2692 nvme_free_namespaces(dev
);
2693 free_percpu(dev
->io_queue
);
2699 static int nvme_dev_open(struct inode
*inode
, struct file
*f
)
2701 struct nvme_dev
*dev
= container_of(f
->private_data
, struct nvme_dev
,
2703 kref_get(&dev
->kref
);
2704 f
->private_data
= dev
;
2708 static int nvme_dev_release(struct inode
*inode
, struct file
*f
)
2710 struct nvme_dev
*dev
= f
->private_data
;
2711 kref_put(&dev
->kref
, nvme_free_dev
);
2715 static long nvme_dev_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
2717 struct nvme_dev
*dev
= f
->private_data
;
2719 case NVME_IOCTL_ADMIN_CMD
:
2720 return nvme_user_admin_cmd(dev
, (void __user
*)arg
);
2726 static const struct file_operations nvme_dev_fops
= {
2727 .owner
= THIS_MODULE
,
2728 .open
= nvme_dev_open
,
2729 .release
= nvme_dev_release
,
2730 .unlocked_ioctl
= nvme_dev_ioctl
,
2731 .compat_ioctl
= nvme_dev_ioctl
,
2734 static int nvme_dev_start(struct nvme_dev
*dev
)
2737 bool start_thread
= false;
2739 result
= nvme_dev_map(dev
);
2743 result
= nvme_configure_admin_queue(dev
);
2747 spin_lock(&dev_list_lock
);
2748 if (list_empty(&dev_list
) && IS_ERR_OR_NULL(nvme_thread
)) {
2749 start_thread
= true;
2752 list_add(&dev
->node
, &dev_list
);
2753 spin_unlock(&dev_list_lock
);
2756 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
2757 wake_up(&nvme_kthread_wait
);
2759 wait_event_killable(nvme_kthread_wait
, nvme_thread
);
2761 if (IS_ERR_OR_NULL(nvme_thread
)) {
2762 result
= nvme_thread
? PTR_ERR(nvme_thread
) : -EINTR
;
2766 result
= nvme_setup_io_queues(dev
);
2773 nvme_disable_queue(dev
, 0);
2774 nvme_dev_list_remove(dev
);
2776 nvme_dev_unmap(dev
);
2780 static int nvme_remove_dead_ctrl(void *arg
)
2782 struct nvme_dev
*dev
= (struct nvme_dev
*)arg
;
2783 struct pci_dev
*pdev
= dev
->pci_dev
;
2785 if (pci_get_drvdata(pdev
))
2786 pci_stop_and_remove_bus_device_locked(pdev
);
2787 kref_put(&dev
->kref
, nvme_free_dev
);
2791 static void nvme_remove_disks(struct work_struct
*ws
)
2793 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2795 nvme_free_queues(dev
, 1);
2796 nvme_dev_remove(dev
);
2799 static int nvme_dev_resume(struct nvme_dev
*dev
)
2803 ret
= nvme_dev_start(dev
);
2806 if (dev
->online_queues
< 2) {
2807 spin_lock(&dev_list_lock
);
2808 dev
->reset_workfn
= nvme_remove_disks
;
2809 queue_work(nvme_workq
, &dev
->reset_work
);
2810 spin_unlock(&dev_list_lock
);
2812 dev
->initialized
= 1;
2816 static void nvme_dev_reset(struct nvme_dev
*dev
)
2818 nvme_dev_shutdown(dev
);
2819 if (nvme_dev_resume(dev
)) {
2820 dev_err(&dev
->pci_dev
->dev
, "Device failed to resume\n");
2821 kref_get(&dev
->kref
);
2822 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl
, dev
, "nvme%d",
2824 dev_err(&dev
->pci_dev
->dev
,
2825 "Failed to start controller remove task\n");
2826 kref_put(&dev
->kref
, nvme_free_dev
);
2831 static void nvme_reset_failed_dev(struct work_struct
*ws
)
2833 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2834 nvme_dev_reset(dev
);
2837 static void nvme_reset_workfn(struct work_struct
*work
)
2839 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, reset_work
);
2840 dev
->reset_workfn(work
);
2843 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2845 int result
= -ENOMEM
;
2846 struct nvme_dev
*dev
;
2848 dev
= kzalloc(sizeof(*dev
), GFP_KERNEL
);
2851 dev
->entry
= kcalloc(num_possible_cpus(), sizeof(*dev
->entry
),
2855 dev
->queues
= kcalloc(num_possible_cpus() + 1, sizeof(void *),
2859 dev
->io_queue
= alloc_percpu(unsigned short);
2863 INIT_LIST_HEAD(&dev
->namespaces
);
2864 dev
->reset_workfn
= nvme_reset_failed_dev
;
2865 INIT_WORK(&dev
->reset_work
, nvme_reset_workfn
);
2866 INIT_WORK(&dev
->cpu_work
, nvme_cpu_workfn
);
2867 dev
->pci_dev
= pci_dev_get(pdev
);
2868 pci_set_drvdata(pdev
, dev
);
2869 result
= nvme_set_instance(dev
);
2873 result
= nvme_setup_prp_pools(dev
);
2877 kref_init(&dev
->kref
);
2878 result
= nvme_dev_start(dev
);
2882 if (dev
->online_queues
> 1)
2883 result
= nvme_dev_add(dev
);
2887 scnprintf(dev
->name
, sizeof(dev
->name
), "nvme%d", dev
->instance
);
2888 dev
->miscdev
.minor
= MISC_DYNAMIC_MINOR
;
2889 dev
->miscdev
.parent
= &pdev
->dev
;
2890 dev
->miscdev
.name
= dev
->name
;
2891 dev
->miscdev
.fops
= &nvme_dev_fops
;
2892 result
= misc_register(&dev
->miscdev
);
2896 dev
->initialized
= 1;
2900 nvme_dev_remove(dev
);
2901 nvme_free_namespaces(dev
);
2903 nvme_dev_shutdown(dev
);
2905 nvme_free_queues(dev
, 0);
2906 nvme_release_prp_pools(dev
);
2908 nvme_release_instance(dev
);
2910 pci_dev_put(dev
->pci_dev
);
2912 free_percpu(dev
->io_queue
);
2919 static void nvme_reset_notify(struct pci_dev
*pdev
, bool prepare
)
2921 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2924 nvme_dev_shutdown(dev
);
2926 nvme_dev_resume(dev
);
2929 static void nvme_shutdown(struct pci_dev
*pdev
)
2931 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2932 nvme_dev_shutdown(dev
);
2935 static void nvme_remove(struct pci_dev
*pdev
)
2937 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2939 spin_lock(&dev_list_lock
);
2940 list_del_init(&dev
->node
);
2941 spin_unlock(&dev_list_lock
);
2943 pci_set_drvdata(pdev
, NULL
);
2944 flush_work(&dev
->reset_work
);
2945 flush_work(&dev
->cpu_work
);
2946 misc_deregister(&dev
->miscdev
);
2947 nvme_dev_shutdown(dev
);
2948 nvme_free_queues(dev
, 0);
2949 nvme_dev_remove(dev
);
2950 nvme_release_instance(dev
);
2951 nvme_release_prp_pools(dev
);
2952 kref_put(&dev
->kref
, nvme_free_dev
);
2955 /* These functions are yet to be implemented */
2956 #define nvme_error_detected NULL
2957 #define nvme_dump_registers NULL
2958 #define nvme_link_reset NULL
2959 #define nvme_slot_reset NULL
2960 #define nvme_error_resume NULL
2962 #ifdef CONFIG_PM_SLEEP
2963 static int nvme_suspend(struct device
*dev
)
2965 struct pci_dev
*pdev
= to_pci_dev(dev
);
2966 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2968 nvme_dev_shutdown(ndev
);
2972 static int nvme_resume(struct device
*dev
)
2974 struct pci_dev
*pdev
= to_pci_dev(dev
);
2975 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2977 if (nvme_dev_resume(ndev
) && !work_busy(&ndev
->reset_work
)) {
2978 ndev
->reset_workfn
= nvme_reset_failed_dev
;
2979 queue_work(nvme_workq
, &ndev
->reset_work
);
2985 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
2987 static const struct pci_error_handlers nvme_err_handler
= {
2988 .error_detected
= nvme_error_detected
,
2989 .mmio_enabled
= nvme_dump_registers
,
2990 .link_reset
= nvme_link_reset
,
2991 .slot_reset
= nvme_slot_reset
,
2992 .resume
= nvme_error_resume
,
2993 .reset_notify
= nvme_reset_notify
,
2996 /* Move to pci_ids.h later */
2997 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
2999 static const struct pci_device_id nvme_id_table
[] = {
3000 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
3003 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
3005 static struct pci_driver nvme_driver
= {
3007 .id_table
= nvme_id_table
,
3008 .probe
= nvme_probe
,
3009 .remove
= nvme_remove
,
3010 .shutdown
= nvme_shutdown
,
3012 .pm
= &nvme_dev_pm_ops
,
3014 .err_handler
= &nvme_err_handler
,
3017 static int __init
nvme_init(void)
3021 init_waitqueue_head(&nvme_kthread_wait
);
3023 nvme_workq
= create_singlethread_workqueue("nvme");
3027 result
= register_blkdev(nvme_major
, "nvme");
3030 else if (result
> 0)
3031 nvme_major
= result
;
3033 nvme_nb
.notifier_call
= &nvme_cpu_notify
;
3034 result
= register_hotcpu_notifier(&nvme_nb
);
3036 goto unregister_blkdev
;
3038 result
= pci_register_driver(&nvme_driver
);
3040 goto unregister_hotcpu
;
3044 unregister_hotcpu_notifier(&nvme_nb
);
3046 unregister_blkdev(nvme_major
, "nvme");
3048 destroy_workqueue(nvme_workq
);
3052 static void __exit
nvme_exit(void)
3054 pci_unregister_driver(&nvme_driver
);
3055 unregister_hotcpu_notifier(&nvme_nb
);
3056 unregister_blkdev(nvme_major
, "nvme");
3057 destroy_workqueue(nvme_workq
);
3058 BUG_ON(nvme_thread
&& !IS_ERR(nvme_thread
));
3062 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3063 MODULE_LICENSE("GPL");
3064 MODULE_VERSION("0.9");
3065 module_init(nvme_init
);
3066 module_exit(nvme_exit
);