2 * Driver for the SWIM3 (Super Woz Integrated Machine 3)
3 * floppy controller found on Power Macintoshes.
5 * Copyright (C) 1996 Paul Mackerras.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
21 #include <linux/stddef.h>
22 #include <linux/kernel.h>
23 #include <linux/sched/signal.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
27 #include <linux/ioctl.h>
28 #include <linux/blk-mq.h>
29 #include <linux/interrupt.h>
30 #include <linux/mutex.h>
31 #include <linux/module.h>
32 #include <linux/spinlock.h>
33 #include <linux/wait.h>
35 #include <asm/dbdma.h>
37 #include <linux/uaccess.h>
38 #include <asm/mediabay.h>
39 #include <asm/machdep.h>
40 #include <asm/pmac_feature.h>
42 #define MAX_FLOPPIES 2
44 static DEFINE_MUTEX(swim3_mutex
);
45 static struct gendisk
*disks
[MAX_FLOPPIES
];
59 #define REG(x) unsigned char x; char x ## _pad[15];
62 * The names for these registers mostly represent speculation on my part.
63 * It will be interesting to see how close they are to the names Apple uses.
67 REG(timer
); /* counts down at 1MHz */
70 REG(select
); /* controls CA0, CA1, CA2 and LSTRB signals */
72 REG(control
); /* writing bits clears them */
73 REG(status
); /* writing bits sets them in control */
75 REG(nseek
); /* # tracks to seek */
76 REG(ctrack
); /* current track number */
77 REG(csect
); /* current sector number */
78 REG(gap3
); /* size of gap 3 in track format */
79 REG(sector
); /* sector # to read or write */
80 REG(nsect
); /* # sectors to read or write */
84 #define control_bic control
85 #define control_bis status
87 /* Bits in select register */
91 /* Bits in control register */
95 #define WRITE_SECTORS 0x10
96 #define DO_ACTION 0x08
97 #define DRIVE2_ENABLE 0x04
98 #define DRIVE_ENABLE 0x02
99 #define INTR_ENABLE 0x01
101 /* Bits in status register */
102 #define FIFO_1BYTE 0x80
103 #define FIFO_2BYTE 0x40
107 #define INTR_PENDING 0x02
108 #define MARK_BYTE 0x01
110 /* Bits in intr and intr_enable registers */
111 #define ERROR_INTR 0x20
112 #define DATA_CHANGED 0x10
113 #define TRANSFER_DONE 0x08
114 #define SEEN_SECTOR 0x04
115 #define SEEK_DONE 0x02
116 #define TIMER_DONE 0x01
118 /* Bits in error register */
119 #define ERR_DATA_CRC 0x80
120 #define ERR_ADDR_CRC 0x40
121 #define ERR_OVERRUN 0x04
122 #define ERR_UNDERRUN 0x01
124 /* Bits in setup register */
125 #define S_SW_RESET 0x80
126 #define S_GCR_WRITE 0x40
127 #define S_IBM_DRIVE 0x20
128 #define S_TEST_MODE 0x10
129 #define S_FCLK_DIV2 0x08
131 #define S_COPY_PROT 0x02
132 #define S_INV_WDATA 0x01
134 /* Select values for swim3_action */
135 #define SEEK_POSITIVE 0
136 #define SEEK_NEGATIVE 4
145 /* Select values for swim3_select and swim3_readbit */
149 #define RELAX 3 /* also eject in progress */
150 #define READ_DATA_0 4
151 #define ONEMEG_DRIVE 5
152 #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
153 #define DRIVE_PRESENT 7
156 #define TRACK_ZERO 10
158 #define READ_DATA_1 12
160 #define SEEK_COMPLETE 14
161 #define TWOMEG_MEDIA 15
163 /* Definitions of values used in writing and formatting */
164 #define DATA_ESCAPE 0x99
165 #define GCR_SYNC_EXC 0x3f
166 #define GCR_SYNC_CONV 0x80
167 #define GCR_FIRST_MARK 0xd5
168 #define GCR_SECOND_MARK 0xaa
169 #define GCR_ADDR_MARK "\xd5\xaa\x00"
170 #define GCR_DATA_MARK "\xd5\xaa\x0b"
171 #define GCR_SLIP_BYTE "\x27\xaa"
172 #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
174 #define DATA_99 "\x99\x99"
175 #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
176 #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
177 #define MFM_GAP_LEN 12
179 struct floppy_state
{
180 enum swim_state state
;
181 struct swim3 __iomem
*swim3
; /* hardware registers */
182 struct dbdma_regs __iomem
*dma
; /* DMA controller registers */
183 int swim3_intr
; /* interrupt number for SWIM3 */
184 int dma_intr
; /* interrupt number for DMA channel */
185 int cur_cyl
; /* cylinder head is on, or -1 */
186 int cur_sector
; /* last sector we saw go past */
187 int req_cyl
; /* the cylinder for the current r/w request */
188 int head
; /* head number ditto */
189 int req_sector
; /* sector number ditto */
190 int scount
; /* # sectors we're transferring at present */
193 int secpercyl
; /* disk geometry information */
196 int write_prot
; /* 1 if write-protected, 0 if not, -1 dunno */
197 struct dbdma_cmd
*dma_cmd
;
200 struct timer_list timeout
;
203 wait_queue_head_t wait
;
205 struct macio_dev
*mdev
;
206 char dbdma_cmd_space
[5 * sizeof(struct dbdma_cmd
)];
208 struct request
*cur_req
;
209 struct blk_mq_tag_set tag_set
;
212 #define swim3_err(fmt, arg...) dev_err(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
213 #define swim3_warn(fmt, arg...) dev_warn(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
214 #define swim3_info(fmt, arg...) dev_info(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
217 #define swim3_dbg(fmt, arg...) dev_dbg(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
219 #define swim3_dbg(fmt, arg...) do { } while(0)
222 static struct floppy_state floppy_states
[MAX_FLOPPIES
];
223 static int floppy_count
= 0;
224 static DEFINE_SPINLOCK(swim3_lock
);
226 static unsigned short write_preamble
[] = {
227 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
228 0, 0, 0, 0, 0, 0, /* sync field */
229 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
230 0x990f /* no escape for 512 bytes */
233 static unsigned short write_postamble
[] = {
234 0x9904, /* insert CRC */
236 0x9908, /* stop writing */
240 static void seek_track(struct floppy_state
*fs
, int n
);
241 static void init_dma(struct dbdma_cmd
*cp
, int cmd
, void *buf
, int count
);
242 static void act(struct floppy_state
*fs
);
243 static void scan_timeout(struct timer_list
*t
);
244 static void seek_timeout(struct timer_list
*t
);
245 static void settle_timeout(struct timer_list
*t
);
246 static void xfer_timeout(struct timer_list
*t
);
247 static irqreturn_t
swim3_interrupt(int irq
, void *dev_id
);
248 /*static void fd_dma_interrupt(int irq, void *dev_id);*/
249 static int grab_drive(struct floppy_state
*fs
, enum swim_state state
,
251 static void release_drive(struct floppy_state
*fs
);
252 static int fd_eject(struct floppy_state
*fs
);
253 static int floppy_ioctl(struct block_device
*bdev
, fmode_t mode
,
254 unsigned int cmd
, unsigned long param
);
255 static int floppy_open(struct block_device
*bdev
, fmode_t mode
);
256 static void floppy_release(struct gendisk
*disk
, fmode_t mode
);
257 static unsigned int floppy_check_events(struct gendisk
*disk
,
258 unsigned int clearing
);
259 static int floppy_revalidate(struct gendisk
*disk
);
261 static bool swim3_end_request(struct floppy_state
*fs
, blk_status_t err
, unsigned int nr_bytes
)
263 struct request
*req
= fs
->cur_req
;
265 swim3_dbg(" end request, err=%d nr_bytes=%d, cur_req=%p\n",
269 nr_bytes
= blk_rq_cur_bytes(req
);
270 if (blk_update_request(req
, err
, nr_bytes
))
272 __blk_mq_end_request(req
, err
);
277 static void swim3_select(struct floppy_state
*fs
, int sel
)
279 struct swim3 __iomem
*sw
= fs
->swim3
;
281 out_8(&sw
->select
, RELAX
);
283 out_8(&sw
->control_bis
, SELECT
);
285 out_8(&sw
->control_bic
, SELECT
);
286 out_8(&sw
->select
, sel
& CA_MASK
);
289 static void swim3_action(struct floppy_state
*fs
, int action
)
291 struct swim3 __iomem
*sw
= fs
->swim3
;
293 swim3_select(fs
, action
);
295 out_8(&sw
->select
, sw
->select
| LSTRB
);
297 out_8(&sw
->select
, sw
->select
& ~LSTRB
);
301 static int swim3_readbit(struct floppy_state
*fs
, int bit
)
303 struct swim3 __iomem
*sw
= fs
->swim3
;
306 swim3_select(fs
, bit
);
308 stat
= in_8(&sw
->status
);
309 return (stat
& DATA
) == 0;
312 static blk_status_t
swim3_queue_rq(struct blk_mq_hw_ctx
*hctx
,
313 const struct blk_mq_queue_data
*bd
)
315 struct floppy_state
*fs
= hctx
->queue
->queuedata
;
316 struct request
*req
= bd
->rq
;
319 spin_lock_irq(&swim3_lock
);
320 if (fs
->cur_req
|| fs
->state
!= idle
) {
321 spin_unlock_irq(&swim3_lock
);
322 return BLK_STS_DEV_RESOURCE
;
324 blk_mq_start_request(req
);
326 if (fs
->mdev
->media_bay
&&
327 check_media_bay(fs
->mdev
->media_bay
) != MB_FD
) {
328 swim3_dbg("%s", " media bay absent, dropping req\n");
329 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
333 swim3_dbg("%s", " disk ejected\n");
334 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
337 if (rq_data_dir(req
) == WRITE
) {
338 if (fs
->write_prot
< 0)
339 fs
->write_prot
= swim3_readbit(fs
, WRITE_PROT
);
340 if (fs
->write_prot
) {
341 swim3_dbg("%s", " try to write, disk write protected\n");
342 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
348 * Do not remove the cast. blk_rq_pos(req) is now a sector_t and can be
349 * 64 bits, but it will never go past 32 bits for this driver anyway, so
350 * we can safely cast it down and not have to do a 64/32 division
352 fs
->req_cyl
= ((long)blk_rq_pos(req
)) / fs
->secpercyl
;
353 x
= ((long)blk_rq_pos(req
)) % fs
->secpercyl
;
354 fs
->head
= x
/ fs
->secpertrack
;
355 fs
->req_sector
= x
% fs
->secpertrack
+ 1;
356 fs
->state
= do_transfer
;
362 spin_unlock_irq(&swim3_lock
);
366 static void set_timeout(struct floppy_state
*fs
, int nticks
,
367 void (*proc
)(struct timer_list
*t
))
369 if (fs
->timeout_pending
)
370 del_timer(&fs
->timeout
);
371 fs
->timeout
.expires
= jiffies
+ nticks
;
372 fs
->timeout
.function
= proc
;
373 add_timer(&fs
->timeout
);
374 fs
->timeout_pending
= 1;
377 static inline void scan_track(struct floppy_state
*fs
)
379 struct swim3 __iomem
*sw
= fs
->swim3
;
381 swim3_select(fs
, READ_DATA_0
);
382 in_8(&sw
->intr
); /* clear SEEN_SECTOR bit */
384 out_8(&sw
->intr_enable
, SEEN_SECTOR
);
385 out_8(&sw
->control_bis
, DO_ACTION
);
386 /* enable intr when track found */
387 set_timeout(fs
, HZ
, scan_timeout
); /* enable timeout */
390 static inline void seek_track(struct floppy_state
*fs
, int n
)
392 struct swim3 __iomem
*sw
= fs
->swim3
;
395 swim3_action(fs
, SEEK_POSITIVE
);
398 swim3_action(fs
, SEEK_NEGATIVE
);
401 fs
->expect_cyl
= (fs
->cur_cyl
>= 0)? fs
->cur_cyl
+ n
: -1;
402 swim3_select(fs
, STEP
);
404 /* enable intr when seek finished */
405 out_8(&sw
->intr_enable
, SEEK_DONE
);
406 out_8(&sw
->control_bis
, DO_SEEK
);
407 set_timeout(fs
, 3*HZ
, seek_timeout
); /* enable timeout */
411 static inline void init_dma(struct dbdma_cmd
*cp
, int cmd
,
412 void *buf
, int count
)
414 cp
->req_count
= cpu_to_le16(count
);
415 cp
->command
= cpu_to_le16(cmd
);
416 cp
->phy_addr
= cpu_to_le32(virt_to_bus(buf
));
420 static inline void setup_transfer(struct floppy_state
*fs
)
423 struct swim3 __iomem
*sw
= fs
->swim3
;
424 struct dbdma_cmd
*cp
= fs
->dma_cmd
;
425 struct dbdma_regs __iomem
*dr
= fs
->dma
;
426 struct request
*req
= fs
->cur_req
;
428 if (blk_rq_cur_sectors(req
) <= 0) {
429 swim3_warn("%s", "Transfer 0 sectors ?\n");
432 if (rq_data_dir(req
) == WRITE
)
435 n
= fs
->secpertrack
- fs
->req_sector
+ 1;
436 if (n
> blk_rq_cur_sectors(req
))
437 n
= blk_rq_cur_sectors(req
);
440 swim3_dbg(" setup xfer at sect %d (of %d) head %d for %d\n",
441 fs
->req_sector
, fs
->secpertrack
, fs
->head
, n
);
444 swim3_select(fs
, fs
->head
? READ_DATA_1
: READ_DATA_0
);
445 out_8(&sw
->sector
, fs
->req_sector
);
446 out_8(&sw
->nsect
, n
);
448 out_le32(&dr
->cmdptr
, virt_to_bus(cp
));
449 if (rq_data_dir(req
) == WRITE
) {
450 /* Set up 3 dma commands: write preamble, data, postamble */
451 init_dma(cp
, OUTPUT_MORE
, write_preamble
, sizeof(write_preamble
));
453 init_dma(cp
, OUTPUT_MORE
, bio_data(req
->bio
), 512);
455 init_dma(cp
, OUTPUT_LAST
, write_postamble
, sizeof(write_postamble
));
457 init_dma(cp
, INPUT_LAST
, bio_data(req
->bio
), n
* 512);
460 out_le16(&cp
->command
, DBDMA_STOP
);
461 out_8(&sw
->control_bic
, DO_ACTION
| WRITE_SECTORS
);
463 out_8(&sw
->control_bic
, DO_ACTION
| WRITE_SECTORS
);
464 if (rq_data_dir(req
) == WRITE
)
465 out_8(&sw
->control_bis
, WRITE_SECTORS
);
467 out_le32(&dr
->control
, (RUN
<< 16) | RUN
);
468 /* enable intr when transfer complete */
469 out_8(&sw
->intr_enable
, TRANSFER_DONE
);
470 out_8(&sw
->control_bis
, DO_ACTION
);
471 set_timeout(fs
, 2*HZ
, xfer_timeout
); /* enable timeout */
474 static void act(struct floppy_state
*fs
)
477 swim3_dbg(" act loop, state=%d, req_cyl=%d, cur_cyl=%d\n",
478 fs
->state
, fs
->req_cyl
, fs
->cur_cyl
);
482 return; /* XXX shouldn't get here */
485 if (swim3_readbit(fs
, TRACK_ZERO
)) {
486 swim3_dbg("%s", " locate track 0\n");
488 if (fs
->req_cyl
== 0)
489 fs
->state
= do_transfer
;
498 if (fs
->cur_cyl
< 0) {
500 fs
->state
= locating
;
503 if (fs
->req_cyl
== fs
->cur_cyl
) {
504 swim3_warn("%s", "Whoops, seeking 0\n");
505 fs
->state
= do_transfer
;
508 seek_track(fs
, fs
->req_cyl
- fs
->cur_cyl
);
512 /* check for SEEK_COMPLETE after 30ms */
513 fs
->settle_time
= (HZ
+ 32) / 33;
514 set_timeout(fs
, fs
->settle_time
, settle_timeout
);
518 if (fs
->cur_cyl
!= fs
->req_cyl
) {
519 if (fs
->retries
> 5) {
520 swim3_err("Wrong cylinder in transfer, want: %d got %d\n",
521 fs
->req_cyl
, fs
->cur_cyl
);
522 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
537 swim3_err("Unknown state %d\n", fs
->state
);
543 static void scan_timeout(struct timer_list
*t
)
545 struct floppy_state
*fs
= from_timer(fs
, t
, timeout
);
546 struct swim3 __iomem
*sw
= fs
->swim3
;
549 swim3_dbg("* scan timeout, state=%d\n", fs
->state
);
551 spin_lock_irqsave(&swim3_lock
, flags
);
552 fs
->timeout_pending
= 0;
553 out_8(&sw
->control_bic
, DO_ACTION
| WRITE_SECTORS
);
554 out_8(&sw
->select
, RELAX
);
555 out_8(&sw
->intr_enable
, 0);
557 if (fs
->retries
> 5) {
558 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
564 spin_unlock_irqrestore(&swim3_lock
, flags
);
567 static void seek_timeout(struct timer_list
*t
)
569 struct floppy_state
*fs
= from_timer(fs
, t
, timeout
);
570 struct swim3 __iomem
*sw
= fs
->swim3
;
573 swim3_dbg("* seek timeout, state=%d\n", fs
->state
);
575 spin_lock_irqsave(&swim3_lock
, flags
);
576 fs
->timeout_pending
= 0;
577 out_8(&sw
->control_bic
, DO_SEEK
);
578 out_8(&sw
->select
, RELAX
);
579 out_8(&sw
->intr_enable
, 0);
580 swim3_err("%s", "Seek timeout\n");
581 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
583 spin_unlock_irqrestore(&swim3_lock
, flags
);
586 static void settle_timeout(struct timer_list
*t
)
588 struct floppy_state
*fs
= from_timer(fs
, t
, timeout
);
589 struct swim3 __iomem
*sw
= fs
->swim3
;
592 swim3_dbg("* settle timeout, state=%d\n", fs
->state
);
594 spin_lock_irqsave(&swim3_lock
, flags
);
595 fs
->timeout_pending
= 0;
596 if (swim3_readbit(fs
, SEEK_COMPLETE
)) {
597 out_8(&sw
->select
, RELAX
);
598 fs
->state
= locating
;
602 out_8(&sw
->select
, RELAX
);
603 if (fs
->settle_time
< 2*HZ
) {
605 set_timeout(fs
, 1, settle_timeout
);
608 swim3_err("%s", "Seek settle timeout\n");
609 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
612 spin_unlock_irqrestore(&swim3_lock
, flags
);
615 static void xfer_timeout(struct timer_list
*t
)
617 struct floppy_state
*fs
= from_timer(fs
, t
, timeout
);
618 struct swim3 __iomem
*sw
= fs
->swim3
;
619 struct dbdma_regs __iomem
*dr
= fs
->dma
;
623 swim3_dbg("* xfer timeout, state=%d\n", fs
->state
);
625 spin_lock_irqsave(&swim3_lock
, flags
);
626 fs
->timeout_pending
= 0;
627 out_le32(&dr
->control
, RUN
<< 16);
628 /* We must wait a bit for dbdma to stop */
629 for (n
= 0; (in_le32(&dr
->status
) & ACTIVE
) && n
< 1000; n
++)
631 out_8(&sw
->intr_enable
, 0);
632 out_8(&sw
->control_bic
, WRITE_SECTORS
| DO_ACTION
);
633 out_8(&sw
->select
, RELAX
);
634 swim3_err("Timeout %sing sector %ld\n",
635 (rq_data_dir(fs
->cur_req
)==WRITE
? "writ": "read"),
636 (long)blk_rq_pos(fs
->cur_req
));
637 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
639 spin_unlock_irqrestore(&swim3_lock
, flags
);
642 static irqreturn_t
swim3_interrupt(int irq
, void *dev_id
)
644 struct floppy_state
*fs
= (struct floppy_state
*) dev_id
;
645 struct swim3 __iomem
*sw
= fs
->swim3
;
648 struct dbdma_regs __iomem
*dr
;
649 struct dbdma_cmd
*cp
;
651 struct request
*req
= fs
->cur_req
;
653 swim3_dbg("* interrupt, state=%d\n", fs
->state
);
655 spin_lock_irqsave(&swim3_lock
, flags
);
656 intr
= in_8(&sw
->intr
);
657 err
= (intr
& ERROR_INTR
)? in_8(&sw
->error
): 0;
658 if ((intr
& ERROR_INTR
) && fs
->state
!= do_transfer
)
659 swim3_err("Non-transfer error interrupt: state=%d, dir=%x, intr=%x, err=%x\n",
660 fs
->state
, rq_data_dir(req
), intr
, err
);
663 if (intr
& SEEN_SECTOR
) {
664 out_8(&sw
->control_bic
, DO_ACTION
| WRITE_SECTORS
);
665 out_8(&sw
->select
, RELAX
);
666 out_8(&sw
->intr_enable
, 0);
667 del_timer(&fs
->timeout
);
668 fs
->timeout_pending
= 0;
669 if (sw
->ctrack
== 0xff) {
670 swim3_err("%s", "Seen sector but cyl=ff?\n");
672 if (fs
->retries
> 5) {
673 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
681 fs
->cur_cyl
= sw
->ctrack
;
682 fs
->cur_sector
= sw
->csect
;
683 if (fs
->expect_cyl
!= -1 && fs
->expect_cyl
!= fs
->cur_cyl
)
684 swim3_err("Expected cyl %d, got %d\n",
685 fs
->expect_cyl
, fs
->cur_cyl
);
686 fs
->state
= do_transfer
;
692 if (sw
->nseek
== 0) {
693 out_8(&sw
->control_bic
, DO_SEEK
);
694 out_8(&sw
->select
, RELAX
);
695 out_8(&sw
->intr_enable
, 0);
696 del_timer(&fs
->timeout
);
697 fs
->timeout_pending
= 0;
698 if (fs
->state
== seeking
)
700 fs
->state
= settling
;
705 out_8(&sw
->intr_enable
, 0);
706 del_timer(&fs
->timeout
);
707 fs
->timeout_pending
= 0;
711 if ((intr
& (ERROR_INTR
| TRANSFER_DONE
)) == 0)
713 out_8(&sw
->intr_enable
, 0);
714 out_8(&sw
->control_bic
, WRITE_SECTORS
| DO_ACTION
);
715 out_8(&sw
->select
, RELAX
);
716 del_timer(&fs
->timeout
);
717 fs
->timeout_pending
= 0;
720 if (rq_data_dir(req
) == WRITE
)
723 * Check that the main data transfer has finished.
724 * On writing, the swim3 sometimes doesn't use
725 * up all the bytes of the postamble, so we can still
726 * see DMA active here. That doesn't matter as long
727 * as all the sector data has been transferred.
729 if ((intr
& ERROR_INTR
) == 0 && cp
->xfer_status
== 0) {
730 /* wait a little while for DMA to complete */
731 for (n
= 0; n
< 100; ++n
) {
732 if (cp
->xfer_status
!= 0)
739 out_le32(&dr
->control
, (RUN
| PAUSE
) << 16);
740 stat
= le16_to_cpu(cp
->xfer_status
);
741 resid
= le16_to_cpu(cp
->res_count
);
742 if (intr
& ERROR_INTR
) {
743 n
= fs
->scount
- 1 - resid
/ 512;
745 blk_update_request(req
, 0, n
<< 9);
748 if (fs
->retries
< 5) {
752 swim3_err("Error %sing block %ld (err=%x)\n",
753 rq_data_dir(req
) == WRITE
? "writ": "read",
754 (long)blk_rq_pos(req
), err
);
755 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
759 if ((stat
& ACTIVE
) == 0 || resid
!= 0) {
760 /* musta been an error */
761 swim3_err("fd dma error: stat=%x resid=%d\n", stat
, resid
);
762 swim3_err(" state=%d, dir=%x, intr=%x, err=%x\n",
763 fs
->state
, rq_data_dir(req
), intr
, err
);
764 swim3_end_request(fs
, BLK_STS_IOERR
, 0);
769 if (swim3_end_request(fs
, 0, fs
->scount
<< 9)) {
770 fs
->req_sector
+= fs
->scount
;
771 if (fs
->req_sector
> fs
->secpertrack
) {
772 fs
->req_sector
-= fs
->secpertrack
;
773 if (++fs
->head
> 1) {
784 swim3_err("Don't know what to do in state %d\n", fs
->state
);
786 spin_unlock_irqrestore(&swim3_lock
, flags
);
791 static void fd_dma_interrupt(int irq, void *dev_id)
796 /* Called under the mutex to grab exclusive access to a drive */
797 static int grab_drive(struct floppy_state
*fs
, enum swim_state state
,
802 swim3_dbg("%s", "-> grab drive\n");
804 spin_lock_irqsave(&swim3_lock
, flags
);
805 if (fs
->state
!= idle
&& fs
->state
!= available
) {
807 /* this will enable irqs in order to sleep */
809 wait_event_lock_irq(fs
->wait
,
810 fs
->state
== available
,
812 else if (wait_event_interruptible_lock_irq(fs
->wait
,
813 fs
->state
== available
,
816 spin_unlock_irqrestore(&swim3_lock
, flags
);
822 spin_unlock_irqrestore(&swim3_lock
, flags
);
827 static void release_drive(struct floppy_state
*fs
)
829 struct request_queue
*q
= disks
[fs
->index
]->queue
;
832 swim3_dbg("%s", "-> release drive\n");
834 spin_lock_irqsave(&swim3_lock
, flags
);
836 spin_unlock_irqrestore(&swim3_lock
, flags
);
838 blk_mq_freeze_queue(q
);
839 blk_mq_quiesce_queue(q
);
840 blk_mq_unquiesce_queue(q
);
841 blk_mq_unfreeze_queue(q
);
844 static int fd_eject(struct floppy_state
*fs
)
848 err
= grab_drive(fs
, ejecting
, 1);
851 swim3_action(fs
, EJECT
);
852 for (n
= 20; n
> 0; --n
) {
853 if (signal_pending(current
)) {
857 swim3_select(fs
, RELAX
);
858 schedule_timeout_interruptible(1);
859 if (swim3_readbit(fs
, DISK_IN
) == 0)
862 swim3_select(fs
, RELAX
);
869 static struct floppy_struct floppy_type
=
870 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL
}; /* 7 1.44MB 3.5" */
872 static int floppy_locked_ioctl(struct block_device
*bdev
, fmode_t mode
,
873 unsigned int cmd
, unsigned long param
)
875 struct floppy_state
*fs
= bdev
->bd_disk
->private_data
;
878 if ((cmd
& 0x80) && !capable(CAP_SYS_ADMIN
))
881 if (fs
->mdev
->media_bay
&&
882 check_media_bay(fs
->mdev
->media_bay
) != MB_FD
)
887 if (fs
->ref_count
!= 1)
892 if (copy_to_user((void __user
*) param
, &floppy_type
,
893 sizeof(struct floppy_struct
)))
900 static int floppy_ioctl(struct block_device
*bdev
, fmode_t mode
,
901 unsigned int cmd
, unsigned long param
)
905 mutex_lock(&swim3_mutex
);
906 ret
= floppy_locked_ioctl(bdev
, mode
, cmd
, param
);
907 mutex_unlock(&swim3_mutex
);
912 static int floppy_open(struct block_device
*bdev
, fmode_t mode
)
914 struct floppy_state
*fs
= bdev
->bd_disk
->private_data
;
915 struct swim3 __iomem
*sw
= fs
->swim3
;
918 if (fs
->ref_count
== 0) {
919 if (fs
->mdev
->media_bay
&&
920 check_media_bay(fs
->mdev
->media_bay
) != MB_FD
)
922 out_8(&sw
->setup
, S_IBM_DRIVE
| S_FCLK_DIV2
);
923 out_8(&sw
->control_bic
, 0xff);
924 out_8(&sw
->mode
, 0x95);
926 out_8(&sw
->intr_enable
, 0);
927 out_8(&sw
->control_bis
, DRIVE_ENABLE
| INTR_ENABLE
);
928 swim3_action(fs
, MOTOR_ON
);
931 for (n
= 0; n
< 2 * HZ
; ++n
) {
932 if (n
>= HZ
/30 && swim3_readbit(fs
, SEEK_COMPLETE
))
934 if (signal_pending(current
)) {
938 swim3_select(fs
, RELAX
);
939 schedule_timeout_interruptible(1);
941 if (err
== 0 && (swim3_readbit(fs
, SEEK_COMPLETE
) == 0
942 || swim3_readbit(fs
, DISK_IN
) == 0))
944 swim3_action(fs
, SETMFM
);
945 swim3_select(fs
, RELAX
);
947 } else if (fs
->ref_count
== -1 || mode
& FMODE_EXCL
)
950 if (err
== 0 && (mode
& FMODE_NDELAY
) == 0
951 && (mode
& (FMODE_READ
|FMODE_WRITE
))) {
952 check_disk_change(bdev
);
957 if (err
== 0 && (mode
& FMODE_WRITE
)) {
958 if (fs
->write_prot
< 0)
959 fs
->write_prot
= swim3_readbit(fs
, WRITE_PROT
);
965 if (fs
->ref_count
== 0) {
966 swim3_action(fs
, MOTOR_OFF
);
967 out_8(&sw
->control_bic
, DRIVE_ENABLE
| INTR_ENABLE
);
968 swim3_select(fs
, RELAX
);
973 if (mode
& FMODE_EXCL
)
981 static int floppy_unlocked_open(struct block_device
*bdev
, fmode_t mode
)
985 mutex_lock(&swim3_mutex
);
986 ret
= floppy_open(bdev
, mode
);
987 mutex_unlock(&swim3_mutex
);
992 static void floppy_release(struct gendisk
*disk
, fmode_t mode
)
994 struct floppy_state
*fs
= disk
->private_data
;
995 struct swim3 __iomem
*sw
= fs
->swim3
;
997 mutex_lock(&swim3_mutex
);
998 if (fs
->ref_count
> 0 && --fs
->ref_count
== 0) {
999 swim3_action(fs
, MOTOR_OFF
);
1000 out_8(&sw
->control_bic
, 0xff);
1001 swim3_select(fs
, RELAX
);
1003 mutex_unlock(&swim3_mutex
);
1006 static unsigned int floppy_check_events(struct gendisk
*disk
,
1007 unsigned int clearing
)
1009 struct floppy_state
*fs
= disk
->private_data
;
1010 return fs
->ejected
? DISK_EVENT_MEDIA_CHANGE
: 0;
1013 static int floppy_revalidate(struct gendisk
*disk
)
1015 struct floppy_state
*fs
= disk
->private_data
;
1016 struct swim3 __iomem
*sw
;
1019 if (fs
->mdev
->media_bay
&&
1020 check_media_bay(fs
->mdev
->media_bay
) != MB_FD
)
1024 grab_drive(fs
, revalidating
, 0);
1025 out_8(&sw
->intr_enable
, 0);
1026 out_8(&sw
->control_bis
, DRIVE_ENABLE
);
1027 swim3_action(fs
, MOTOR_ON
); /* necessary? */
1028 fs
->write_prot
= -1;
1031 for (n
= HZ
; n
> 0; --n
) {
1032 if (swim3_readbit(fs
, SEEK_COMPLETE
))
1034 if (signal_pending(current
))
1036 swim3_select(fs
, RELAX
);
1037 schedule_timeout_interruptible(1);
1039 ret
= swim3_readbit(fs
, SEEK_COMPLETE
) == 0
1040 || swim3_readbit(fs
, DISK_IN
) == 0;
1042 swim3_action(fs
, MOTOR_OFF
);
1045 swim3_action(fs
, SETMFM
);
1047 swim3_select(fs
, RELAX
);
1053 static const struct block_device_operations floppy_fops
= {
1054 .open
= floppy_unlocked_open
,
1055 .release
= floppy_release
,
1056 .ioctl
= floppy_ioctl
,
1057 .check_events
= floppy_check_events
,
1058 .revalidate_disk
= floppy_revalidate
,
1061 static const struct blk_mq_ops swim3_mq_ops
= {
1062 .queue_rq
= swim3_queue_rq
,
1065 static void swim3_mb_event(struct macio_dev
* mdev
, int mb_state
)
1067 struct floppy_state
*fs
= macio_get_drvdata(mdev
);
1068 struct swim3 __iomem
*sw
;
1075 if (mb_state
!= MB_FD
)
1079 out_8(&sw
->intr_enable
, 0);
1084 static int swim3_add_device(struct macio_dev
*mdev
, int index
)
1086 struct device_node
*swim
= mdev
->ofdev
.dev
.of_node
;
1087 struct floppy_state
*fs
= &floppy_states
[index
];
1090 /* Do this first for message macros */
1091 memset(fs
, 0, sizeof(*fs
));
1095 /* Check & Request resources */
1096 if (macio_resource_count(mdev
) < 2) {
1097 swim3_err("%s", "No address in device-tree\n");
1100 if (macio_irq_count(mdev
) < 1) {
1101 swim3_err("%s", "No interrupt in device-tree\n");
1104 if (macio_request_resource(mdev
, 0, "swim3 (mmio)")) {
1105 swim3_err("%s", "Can't request mmio resource\n");
1108 if (macio_request_resource(mdev
, 1, "swim3 (dma)")) {
1109 swim3_err("%s", "Can't request dma resource\n");
1110 macio_release_resource(mdev
, 0);
1113 dev_set_drvdata(&mdev
->ofdev
.dev
, fs
);
1115 if (mdev
->media_bay
== NULL
)
1116 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE
, swim
, 0, 1);
1119 fs
->swim3
= (struct swim3 __iomem
*)
1120 ioremap(macio_resource_start(mdev
, 0), 0x200);
1121 if (fs
->swim3
== NULL
) {
1122 swim3_err("%s", "Couldn't map mmio registers\n");
1126 fs
->dma
= (struct dbdma_regs __iomem
*)
1127 ioremap(macio_resource_start(mdev
, 1), 0x200);
1128 if (fs
->dma
== NULL
) {
1129 swim3_err("%s", "Couldn't map dma registers\n");
1134 fs
->swim3_intr
= macio_irq(mdev
, 0);
1135 fs
->dma_intr
= macio_irq(mdev
, 1);
1137 fs
->cur_sector
= -1;
1139 fs
->secpertrack
= 18;
1140 fs
->total_secs
= 2880;
1141 init_waitqueue_head(&fs
->wait
);
1143 fs
->dma_cmd
= (struct dbdma_cmd
*) DBDMA_ALIGN(fs
->dbdma_cmd_space
);
1144 memset(fs
->dma_cmd
, 0, 2 * sizeof(struct dbdma_cmd
));
1145 fs
->dma_cmd
[1].command
= cpu_to_le16(DBDMA_STOP
);
1147 if (mdev
->media_bay
== NULL
|| check_media_bay(mdev
->media_bay
) == MB_FD
)
1148 swim3_mb_event(mdev
, MB_FD
);
1150 if (request_irq(fs
->swim3_intr
, swim3_interrupt
, 0, "SWIM3", fs
)) {
1151 swim3_err("%s", "Couldn't request interrupt\n");
1152 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE
, swim
, 0, 0);
1157 timer_setup(&fs
->timeout
, NULL
, 0);
1159 swim3_info("SWIM3 floppy controller %s\n",
1160 mdev
->media_bay
? "in media bay" : "");
1169 macio_release_resource(mdev
, 0);
1170 macio_release_resource(mdev
, 1);
1175 static int swim3_attach(struct macio_dev
*mdev
,
1176 const struct of_device_id
*match
)
1178 struct floppy_state
*fs
;
1179 struct gendisk
*disk
;
1182 if (floppy_count
>= MAX_FLOPPIES
)
1185 if (floppy_count
== 0) {
1186 rc
= register_blkdev(FLOPPY_MAJOR
, "fd");
1191 fs
= &floppy_states
[floppy_count
];
1193 disk
= alloc_disk(1);
1196 goto out_unregister
;
1199 disk
->queue
= blk_mq_init_sq_queue(&fs
->tag_set
, &swim3_mq_ops
, 2,
1200 BLK_MQ_F_SHOULD_MERGE
);
1201 if (IS_ERR(disk
->queue
)) {
1202 rc
= PTR_ERR(disk
->queue
);
1206 blk_queue_bounce_limit(disk
->queue
, BLK_BOUNCE_HIGH
);
1207 disk
->queue
->queuedata
= fs
;
1209 rc
= swim3_add_device(mdev
, floppy_count
);
1211 goto out_cleanup_queue
;
1213 disk
->major
= FLOPPY_MAJOR
;
1214 disk
->first_minor
= floppy_count
;
1215 disk
->fops
= &floppy_fops
;
1216 disk
->private_data
= fs
;
1217 disk
->flags
|= GENHD_FL_REMOVABLE
;
1218 sprintf(disk
->disk_name
, "fd%d", floppy_count
);
1219 set_capacity(disk
, 2880);
1222 disks
[floppy_count
++] = disk
;
1226 blk_cleanup_queue(disk
->queue
);
1228 blk_mq_free_tag_set(&fs
->tag_set
);
1232 if (floppy_count
== 0)
1233 unregister_blkdev(FLOPPY_MAJOR
, "fd");
1237 static const struct of_device_id swim3_match
[] =
1243 .compatible
= "ohare-swim3"
1246 .compatible
= "swim3"
1248 { /* end of list */ }
1251 static struct macio_driver swim3_driver
=
1255 .of_match_table
= swim3_match
,
1257 .probe
= swim3_attach
,
1258 #ifdef CONFIG_PMAC_MEDIABAY
1259 .mediabay_event
= swim3_mb_event
,
1262 .suspend
= swim3_suspend
,
1263 .resume
= swim3_resume
,
1268 int swim3_init(void)
1270 macio_register_driver(&swim3_driver
);
1274 module_init(swim3_init
)
1276 MODULE_LICENSE("GPL");
1277 MODULE_AUTHOR("Paul Mackerras");
1278 MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR
);