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drivers/char/hpet.c: allow user controlled mmap for user processes
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1 /*
2 * Intel & MS High Precision Event Timer Implementation.
3 *
4 * Copyright (C) 2003 Intel Corporation
5 * Venki Pallipadi
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/miscdevice.h>
19 #include <linux/major.h>
20 #include <linux/ioport.h>
21 #include <linux/fcntl.h>
22 #include <linux/init.h>
23 #include <linux/poll.h>
24 #include <linux/mm.h>
25 #include <linux/proc_fs.h>
26 #include <linux/spinlock.h>
27 #include <linux/sysctl.h>
28 #include <linux/wait.h>
29 #include <linux/bcd.h>
30 #include <linux/seq_file.h>
31 #include <linux/bitops.h>
32 #include <linux/compat.h>
33 #include <linux/clocksource.h>
34 #include <linux/uaccess.h>
35 #include <linux/slab.h>
36 #include <linux/io.h>
37
38 #include <asm/current.h>
39 #include <asm/irq.h>
40 #include <asm/div64.h>
41
42 #include <linux/acpi.h>
43 #include <acpi/acpi_bus.h>
44 #include <linux/hpet.h>
45
46 /*
47 * The High Precision Event Timer driver.
48 * This driver is closely modelled after the rtc.c driver.
49 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
50 */
51 #define HPET_USER_FREQ (64)
52 #define HPET_DRIFT (500)
53
54 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
55
56
57 /* WARNING -- don't get confused. These macros are never used
58 * to write the (single) counter, and rarely to read it.
59 * They're badly named; to fix, someday.
60 */
61 #if BITS_PER_LONG == 64
62 #define write_counter(V, MC) writeq(V, MC)
63 #define read_counter(MC) readq(MC)
64 #else
65 #define write_counter(V, MC) writel(V, MC)
66 #define read_counter(MC) readl(MC)
67 #endif
68
69 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
70 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
71
72 /* This clocksource driver currently only works on ia64 */
73 #ifdef CONFIG_IA64
74 static void __iomem *hpet_mctr;
75
76 static cycle_t read_hpet(struct clocksource *cs)
77 {
78 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
79 }
80
81 static struct clocksource clocksource_hpet = {
82 .name = "hpet",
83 .rating = 250,
84 .read = read_hpet,
85 .mask = CLOCKSOURCE_MASK(64),
86 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
87 };
88 static struct clocksource *hpet_clocksource;
89 #endif
90
91 /* A lock for concurrent access by app and isr hpet activity. */
92 static DEFINE_SPINLOCK(hpet_lock);
93
94 #define HPET_DEV_NAME (7)
95
96 struct hpet_dev {
97 struct hpets *hd_hpets;
98 struct hpet __iomem *hd_hpet;
99 struct hpet_timer __iomem *hd_timer;
100 unsigned long hd_ireqfreq;
101 unsigned long hd_irqdata;
102 wait_queue_head_t hd_waitqueue;
103 struct fasync_struct *hd_async_queue;
104 unsigned int hd_flags;
105 unsigned int hd_irq;
106 unsigned int hd_hdwirq;
107 char hd_name[HPET_DEV_NAME];
108 };
109
110 struct hpets {
111 struct hpets *hp_next;
112 struct hpet __iomem *hp_hpet;
113 unsigned long hp_hpet_phys;
114 struct clocksource *hp_clocksource;
115 unsigned long long hp_tick_freq;
116 unsigned long hp_delta;
117 unsigned int hp_ntimer;
118 unsigned int hp_which;
119 struct hpet_dev hp_dev[1];
120 };
121
122 static struct hpets *hpets;
123
124 #define HPET_OPEN 0x0001
125 #define HPET_IE 0x0002 /* interrupt enabled */
126 #define HPET_PERIODIC 0x0004
127 #define HPET_SHARED_IRQ 0x0008
128
129
130 #ifndef readq
131 static inline unsigned long long readq(void __iomem *addr)
132 {
133 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
134 }
135 #endif
136
137 #ifndef writeq
138 static inline void writeq(unsigned long long v, void __iomem *addr)
139 {
140 writel(v & 0xffffffff, addr);
141 writel(v >> 32, addr + 4);
142 }
143 #endif
144
145 static irqreturn_t hpet_interrupt(int irq, void *data)
146 {
147 struct hpet_dev *devp;
148 unsigned long isr;
149
150 devp = data;
151 isr = 1 << (devp - devp->hd_hpets->hp_dev);
152
153 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
154 !(isr & readl(&devp->hd_hpet->hpet_isr)))
155 return IRQ_NONE;
156
157 spin_lock(&hpet_lock);
158 devp->hd_irqdata++;
159
160 /*
161 * For non-periodic timers, increment the accumulator.
162 * This has the effect of treating non-periodic like periodic.
163 */
164 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
165 unsigned long m, t, mc, base, k;
166 struct hpet __iomem *hpet = devp->hd_hpet;
167 struct hpets *hpetp = devp->hd_hpets;
168
169 t = devp->hd_ireqfreq;
170 m = read_counter(&devp->hd_timer->hpet_compare);
171 mc = read_counter(&hpet->hpet_mc);
172 /* The time for the next interrupt would logically be t + m,
173 * however, if we are very unlucky and the interrupt is delayed
174 * for longer than t then we will completely miss the next
175 * interrupt if we set t + m and an application will hang.
176 * Therefore we need to make a more complex computation assuming
177 * that there exists a k for which the following is true:
178 * k * t + base < mc + delta
179 * (k + 1) * t + base > mc + delta
180 * where t is the interval in hpet ticks for the given freq,
181 * base is the theoretical start value 0 < base < t,
182 * mc is the main counter value at the time of the interrupt,
183 * delta is the time it takes to write the a value to the
184 * comparator.
185 * k may then be computed as (mc - base + delta) / t .
186 */
187 base = mc % t;
188 k = (mc - base + hpetp->hp_delta) / t;
189 write_counter(t * (k + 1) + base,
190 &devp->hd_timer->hpet_compare);
191 }
192
193 if (devp->hd_flags & HPET_SHARED_IRQ)
194 writel(isr, &devp->hd_hpet->hpet_isr);
195 spin_unlock(&hpet_lock);
196
197 wake_up_interruptible(&devp->hd_waitqueue);
198
199 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
200
201 return IRQ_HANDLED;
202 }
203
204 static void hpet_timer_set_irq(struct hpet_dev *devp)
205 {
206 unsigned long v;
207 int irq, gsi;
208 struct hpet_timer __iomem *timer;
209
210 spin_lock_irq(&hpet_lock);
211 if (devp->hd_hdwirq) {
212 spin_unlock_irq(&hpet_lock);
213 return;
214 }
215
216 timer = devp->hd_timer;
217
218 /* we prefer level triggered mode */
219 v = readl(&timer->hpet_config);
220 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
221 v |= Tn_INT_TYPE_CNF_MASK;
222 writel(v, &timer->hpet_config);
223 }
224 spin_unlock_irq(&hpet_lock);
225
226 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
227 Tn_INT_ROUTE_CAP_SHIFT;
228
229 /*
230 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
231 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
232 */
233 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
234 v &= ~0xf3df;
235 else
236 v &= ~0xffff;
237
238 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
239 if (irq >= nr_irqs) {
240 irq = HPET_MAX_IRQ;
241 break;
242 }
243
244 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
245 ACPI_ACTIVE_LOW);
246 if (gsi > 0)
247 break;
248
249 /* FIXME: Setup interrupt source table */
250 }
251
252 if (irq < HPET_MAX_IRQ) {
253 spin_lock_irq(&hpet_lock);
254 v = readl(&timer->hpet_config);
255 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
256 writel(v, &timer->hpet_config);
257 devp->hd_hdwirq = gsi;
258 spin_unlock_irq(&hpet_lock);
259 }
260 return;
261 }
262
263 static int hpet_open(struct inode *inode, struct file *file)
264 {
265 struct hpet_dev *devp;
266 struct hpets *hpetp;
267 int i;
268
269 if (file->f_mode & FMODE_WRITE)
270 return -EINVAL;
271
272 mutex_lock(&hpet_mutex);
273 spin_lock_irq(&hpet_lock);
274
275 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
276 for (i = 0; i < hpetp->hp_ntimer; i++)
277 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
278 continue;
279 else {
280 devp = &hpetp->hp_dev[i];
281 break;
282 }
283
284 if (!devp) {
285 spin_unlock_irq(&hpet_lock);
286 mutex_unlock(&hpet_mutex);
287 return -EBUSY;
288 }
289
290 file->private_data = devp;
291 devp->hd_irqdata = 0;
292 devp->hd_flags |= HPET_OPEN;
293 spin_unlock_irq(&hpet_lock);
294 mutex_unlock(&hpet_mutex);
295
296 hpet_timer_set_irq(devp);
297
298 return 0;
299 }
300
301 static ssize_t
302 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
303 {
304 DECLARE_WAITQUEUE(wait, current);
305 unsigned long data;
306 ssize_t retval;
307 struct hpet_dev *devp;
308
309 devp = file->private_data;
310 if (!devp->hd_ireqfreq)
311 return -EIO;
312
313 if (count < sizeof(unsigned long))
314 return -EINVAL;
315
316 add_wait_queue(&devp->hd_waitqueue, &wait);
317
318 for ( ; ; ) {
319 set_current_state(TASK_INTERRUPTIBLE);
320
321 spin_lock_irq(&hpet_lock);
322 data = devp->hd_irqdata;
323 devp->hd_irqdata = 0;
324 spin_unlock_irq(&hpet_lock);
325
326 if (data)
327 break;
328 else if (file->f_flags & O_NONBLOCK) {
329 retval = -EAGAIN;
330 goto out;
331 } else if (signal_pending(current)) {
332 retval = -ERESTARTSYS;
333 goto out;
334 }
335 schedule();
336 }
337
338 retval = put_user(data, (unsigned long __user *)buf);
339 if (!retval)
340 retval = sizeof(unsigned long);
341 out:
342 __set_current_state(TASK_RUNNING);
343 remove_wait_queue(&devp->hd_waitqueue, &wait);
344
345 return retval;
346 }
347
348 static unsigned int hpet_poll(struct file *file, poll_table * wait)
349 {
350 unsigned long v;
351 struct hpet_dev *devp;
352
353 devp = file->private_data;
354
355 if (!devp->hd_ireqfreq)
356 return 0;
357
358 poll_wait(file, &devp->hd_waitqueue, wait);
359
360 spin_lock_irq(&hpet_lock);
361 v = devp->hd_irqdata;
362 spin_unlock_irq(&hpet_lock);
363
364 if (v != 0)
365 return POLLIN | POLLRDNORM;
366
367 return 0;
368 }
369
370 #ifdef CONFIG_HPET_MMAP
371 #ifdef CONFIG_HPET_MMAP_DEFAULT
372 static int hpet_mmap_enabled = 1;
373 #else
374 static int hpet_mmap_enabled = 0;
375 #endif
376
377 static __init int hpet_mmap_enable(char *str)
378 {
379 get_option(&str, &hpet_mmap_enabled);
380 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
381 return 1;
382 }
383 __setup("hpet_mmap", hpet_mmap_enable);
384
385 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
386 {
387 struct hpet_dev *devp;
388 unsigned long addr;
389
390 if (!hpet_mmap_enabled)
391 return -EACCES;
392
393 devp = file->private_data;
394 addr = devp->hd_hpets->hp_hpet_phys;
395
396 if (addr & (PAGE_SIZE - 1))
397 return -ENOSYS;
398
399 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
400 return vm_iomap_memory(vma, addr, PAGE_SIZE);
401 }
402 #else
403 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
404 {
405 return -ENOSYS;
406 }
407 #endif
408
409 static int hpet_fasync(int fd, struct file *file, int on)
410 {
411 struct hpet_dev *devp;
412
413 devp = file->private_data;
414
415 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
416 return 0;
417 else
418 return -EIO;
419 }
420
421 static int hpet_release(struct inode *inode, struct file *file)
422 {
423 struct hpet_dev *devp;
424 struct hpet_timer __iomem *timer;
425 int irq = 0;
426
427 devp = file->private_data;
428 timer = devp->hd_timer;
429
430 spin_lock_irq(&hpet_lock);
431
432 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
433 &timer->hpet_config);
434
435 irq = devp->hd_irq;
436 devp->hd_irq = 0;
437
438 devp->hd_ireqfreq = 0;
439
440 if (devp->hd_flags & HPET_PERIODIC
441 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
442 unsigned long v;
443
444 v = readq(&timer->hpet_config);
445 v ^= Tn_TYPE_CNF_MASK;
446 writeq(v, &timer->hpet_config);
447 }
448
449 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
450 spin_unlock_irq(&hpet_lock);
451
452 if (irq)
453 free_irq(irq, devp);
454
455 file->private_data = NULL;
456 return 0;
457 }
458
459 static int hpet_ioctl_ieon(struct hpet_dev *devp)
460 {
461 struct hpet_timer __iomem *timer;
462 struct hpet __iomem *hpet;
463 struct hpets *hpetp;
464 int irq;
465 unsigned long g, v, t, m;
466 unsigned long flags, isr;
467
468 timer = devp->hd_timer;
469 hpet = devp->hd_hpet;
470 hpetp = devp->hd_hpets;
471
472 if (!devp->hd_ireqfreq)
473 return -EIO;
474
475 spin_lock_irq(&hpet_lock);
476
477 if (devp->hd_flags & HPET_IE) {
478 spin_unlock_irq(&hpet_lock);
479 return -EBUSY;
480 }
481
482 devp->hd_flags |= HPET_IE;
483
484 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
485 devp->hd_flags |= HPET_SHARED_IRQ;
486 spin_unlock_irq(&hpet_lock);
487
488 irq = devp->hd_hdwirq;
489
490 if (irq) {
491 unsigned long irq_flags;
492
493 if (devp->hd_flags & HPET_SHARED_IRQ) {
494 /*
495 * To prevent the interrupt handler from seeing an
496 * unwanted interrupt status bit, program the timer
497 * so that it will not fire in the near future ...
498 */
499 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
500 &timer->hpet_config);
501 write_counter(read_counter(&hpet->hpet_mc),
502 &timer->hpet_compare);
503 /* ... and clear any left-over status. */
504 isr = 1 << (devp - devp->hd_hpets->hp_dev);
505 writel(isr, &hpet->hpet_isr);
506 }
507
508 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
509 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
510 if (request_irq(irq, hpet_interrupt, irq_flags,
511 devp->hd_name, (void *)devp)) {
512 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
513 irq = 0;
514 }
515 }
516
517 if (irq == 0) {
518 spin_lock_irq(&hpet_lock);
519 devp->hd_flags ^= HPET_IE;
520 spin_unlock_irq(&hpet_lock);
521 return -EIO;
522 }
523
524 devp->hd_irq = irq;
525 t = devp->hd_ireqfreq;
526 v = readq(&timer->hpet_config);
527
528 /* 64-bit comparators are not yet supported through the ioctls,
529 * so force this into 32-bit mode if it supports both modes
530 */
531 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
532
533 if (devp->hd_flags & HPET_PERIODIC) {
534 g |= Tn_TYPE_CNF_MASK;
535 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
536 writeq(v, &timer->hpet_config);
537 local_irq_save(flags);
538
539 /*
540 * NOTE: First we modify the hidden accumulator
541 * register supported by periodic-capable comparators.
542 * We never want to modify the (single) counter; that
543 * would affect all the comparators. The value written
544 * is the counter value when the first interrupt is due.
545 */
546 m = read_counter(&hpet->hpet_mc);
547 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
548 /*
549 * Then we modify the comparator, indicating the period
550 * for subsequent interrupt.
551 */
552 write_counter(t, &timer->hpet_compare);
553 } else {
554 local_irq_save(flags);
555 m = read_counter(&hpet->hpet_mc);
556 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
557 }
558
559 if (devp->hd_flags & HPET_SHARED_IRQ) {
560 isr = 1 << (devp - devp->hd_hpets->hp_dev);
561 writel(isr, &hpet->hpet_isr);
562 }
563 writeq(g, &timer->hpet_config);
564 local_irq_restore(flags);
565
566 return 0;
567 }
568
569 /* converts Hz to number of timer ticks */
570 static inline unsigned long hpet_time_div(struct hpets *hpets,
571 unsigned long dis)
572 {
573 unsigned long long m;
574
575 m = hpets->hp_tick_freq + (dis >> 1);
576 do_div(m, dis);
577 return (unsigned long)m;
578 }
579
580 static int
581 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
582 struct hpet_info *info)
583 {
584 struct hpet_timer __iomem *timer;
585 struct hpet __iomem *hpet;
586 struct hpets *hpetp;
587 int err;
588 unsigned long v;
589
590 switch (cmd) {
591 case HPET_IE_OFF:
592 case HPET_INFO:
593 case HPET_EPI:
594 case HPET_DPI:
595 case HPET_IRQFREQ:
596 timer = devp->hd_timer;
597 hpet = devp->hd_hpet;
598 hpetp = devp->hd_hpets;
599 break;
600 case HPET_IE_ON:
601 return hpet_ioctl_ieon(devp);
602 default:
603 return -EINVAL;
604 }
605
606 err = 0;
607
608 switch (cmd) {
609 case HPET_IE_OFF:
610 if ((devp->hd_flags & HPET_IE) == 0)
611 break;
612 v = readq(&timer->hpet_config);
613 v &= ~Tn_INT_ENB_CNF_MASK;
614 writeq(v, &timer->hpet_config);
615 if (devp->hd_irq) {
616 free_irq(devp->hd_irq, devp);
617 devp->hd_irq = 0;
618 }
619 devp->hd_flags ^= HPET_IE;
620 break;
621 case HPET_INFO:
622 {
623 memset(info, 0, sizeof(*info));
624 if (devp->hd_ireqfreq)
625 info->hi_ireqfreq =
626 hpet_time_div(hpetp, devp->hd_ireqfreq);
627 info->hi_flags =
628 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
629 info->hi_hpet = hpetp->hp_which;
630 info->hi_timer = devp - hpetp->hp_dev;
631 break;
632 }
633 case HPET_EPI:
634 v = readq(&timer->hpet_config);
635 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
636 err = -ENXIO;
637 break;
638 }
639 devp->hd_flags |= HPET_PERIODIC;
640 break;
641 case HPET_DPI:
642 v = readq(&timer->hpet_config);
643 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
644 err = -ENXIO;
645 break;
646 }
647 if (devp->hd_flags & HPET_PERIODIC &&
648 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
649 v = readq(&timer->hpet_config);
650 v ^= Tn_TYPE_CNF_MASK;
651 writeq(v, &timer->hpet_config);
652 }
653 devp->hd_flags &= ~HPET_PERIODIC;
654 break;
655 case HPET_IRQFREQ:
656 if ((arg > hpet_max_freq) &&
657 !capable(CAP_SYS_RESOURCE)) {
658 err = -EACCES;
659 break;
660 }
661
662 if (!arg) {
663 err = -EINVAL;
664 break;
665 }
666
667 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
668 }
669
670 return err;
671 }
672
673 static long
674 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
675 {
676 struct hpet_info info;
677 int err;
678
679 mutex_lock(&hpet_mutex);
680 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
681 mutex_unlock(&hpet_mutex);
682
683 if ((cmd == HPET_INFO) && !err &&
684 (copy_to_user((void __user *)arg, &info, sizeof(info))))
685 err = -EFAULT;
686
687 return err;
688 }
689
690 #ifdef CONFIG_COMPAT
691 struct compat_hpet_info {
692 compat_ulong_t hi_ireqfreq; /* Hz */
693 compat_ulong_t hi_flags; /* information */
694 unsigned short hi_hpet;
695 unsigned short hi_timer;
696 };
697
698 static long
699 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
700 {
701 struct hpet_info info;
702 int err;
703
704 mutex_lock(&hpet_mutex);
705 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
706 mutex_unlock(&hpet_mutex);
707
708 if ((cmd == HPET_INFO) && !err) {
709 struct compat_hpet_info __user *u = compat_ptr(arg);
710 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
711 put_user(info.hi_flags, &u->hi_flags) ||
712 put_user(info.hi_hpet, &u->hi_hpet) ||
713 put_user(info.hi_timer, &u->hi_timer))
714 err = -EFAULT;
715 }
716
717 return err;
718 }
719 #endif
720
721 static const struct file_operations hpet_fops = {
722 .owner = THIS_MODULE,
723 .llseek = no_llseek,
724 .read = hpet_read,
725 .poll = hpet_poll,
726 .unlocked_ioctl = hpet_ioctl,
727 #ifdef CONFIG_COMPAT
728 .compat_ioctl = hpet_compat_ioctl,
729 #endif
730 .open = hpet_open,
731 .release = hpet_release,
732 .fasync = hpet_fasync,
733 .mmap = hpet_mmap,
734 };
735
736 static int hpet_is_known(struct hpet_data *hdp)
737 {
738 struct hpets *hpetp;
739
740 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
741 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
742 return 1;
743
744 return 0;
745 }
746
747 static struct ctl_table hpet_table[] = {
748 {
749 .procname = "max-user-freq",
750 .data = &hpet_max_freq,
751 .maxlen = sizeof(int),
752 .mode = 0644,
753 .proc_handler = proc_dointvec,
754 },
755 {}
756 };
757
758 static struct ctl_table hpet_root[] = {
759 {
760 .procname = "hpet",
761 .maxlen = 0,
762 .mode = 0555,
763 .child = hpet_table,
764 },
765 {}
766 };
767
768 static struct ctl_table dev_root[] = {
769 {
770 .procname = "dev",
771 .maxlen = 0,
772 .mode = 0555,
773 .child = hpet_root,
774 },
775 {}
776 };
777
778 static struct ctl_table_header *sysctl_header;
779
780 /*
781 * Adjustment for when arming the timer with
782 * initial conditions. That is, main counter
783 * ticks expired before interrupts are enabled.
784 */
785 #define TICK_CALIBRATE (1000UL)
786
787 static unsigned long __hpet_calibrate(struct hpets *hpetp)
788 {
789 struct hpet_timer __iomem *timer = NULL;
790 unsigned long t, m, count, i, flags, start;
791 struct hpet_dev *devp;
792 int j;
793 struct hpet __iomem *hpet;
794
795 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
796 if ((devp->hd_flags & HPET_OPEN) == 0) {
797 timer = devp->hd_timer;
798 break;
799 }
800
801 if (!timer)
802 return 0;
803
804 hpet = hpetp->hp_hpet;
805 t = read_counter(&timer->hpet_compare);
806
807 i = 0;
808 count = hpet_time_div(hpetp, TICK_CALIBRATE);
809
810 local_irq_save(flags);
811
812 start = read_counter(&hpet->hpet_mc);
813
814 do {
815 m = read_counter(&hpet->hpet_mc);
816 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
817 } while (i++, (m - start) < count);
818
819 local_irq_restore(flags);
820
821 return (m - start) / i;
822 }
823
824 static unsigned long hpet_calibrate(struct hpets *hpetp)
825 {
826 unsigned long ret = ~0UL;
827 unsigned long tmp;
828
829 /*
830 * Try to calibrate until return value becomes stable small value.
831 * If SMI interruption occurs in calibration loop, the return value
832 * will be big. This avoids its impact.
833 */
834 for ( ; ; ) {
835 tmp = __hpet_calibrate(hpetp);
836 if (ret <= tmp)
837 break;
838 ret = tmp;
839 }
840
841 return ret;
842 }
843
844 int hpet_alloc(struct hpet_data *hdp)
845 {
846 u64 cap, mcfg;
847 struct hpet_dev *devp;
848 u32 i, ntimer;
849 struct hpets *hpetp;
850 size_t siz;
851 struct hpet __iomem *hpet;
852 static struct hpets *last;
853 unsigned long period;
854 unsigned long long temp;
855 u32 remainder;
856
857 /*
858 * hpet_alloc can be called by platform dependent code.
859 * If platform dependent code has allocated the hpet that
860 * ACPI has also reported, then we catch it here.
861 */
862 if (hpet_is_known(hdp)) {
863 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
864 __func__);
865 return 0;
866 }
867
868 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
869 sizeof(struct hpet_dev));
870
871 hpetp = kzalloc(siz, GFP_KERNEL);
872
873 if (!hpetp)
874 return -ENOMEM;
875
876 hpetp->hp_which = hpet_nhpet++;
877 hpetp->hp_hpet = hdp->hd_address;
878 hpetp->hp_hpet_phys = hdp->hd_phys_address;
879
880 hpetp->hp_ntimer = hdp->hd_nirqs;
881
882 for (i = 0; i < hdp->hd_nirqs; i++)
883 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
884
885 hpet = hpetp->hp_hpet;
886
887 cap = readq(&hpet->hpet_cap);
888
889 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
890
891 if (hpetp->hp_ntimer != ntimer) {
892 printk(KERN_WARNING "hpet: number irqs doesn't agree"
893 " with number of timers\n");
894 kfree(hpetp);
895 return -ENODEV;
896 }
897
898 if (last)
899 last->hp_next = hpetp;
900 else
901 hpets = hpetp;
902
903 last = hpetp;
904
905 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
906 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
907 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
908 temp += period >> 1; /* round */
909 do_div(temp, period);
910 hpetp->hp_tick_freq = temp; /* ticks per second */
911
912 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
913 hpetp->hp_which, hdp->hd_phys_address,
914 hpetp->hp_ntimer > 1 ? "s" : "");
915 for (i = 0; i < hpetp->hp_ntimer; i++)
916 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
917 printk(KERN_CONT "\n");
918
919 temp = hpetp->hp_tick_freq;
920 remainder = do_div(temp, 1000000);
921 printk(KERN_INFO
922 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
923 hpetp->hp_which, hpetp->hp_ntimer,
924 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
925 (unsigned) temp, remainder);
926
927 mcfg = readq(&hpet->hpet_config);
928 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
929 write_counter(0L, &hpet->hpet_mc);
930 mcfg |= HPET_ENABLE_CNF_MASK;
931 writeq(mcfg, &hpet->hpet_config);
932 }
933
934 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
935 struct hpet_timer __iomem *timer;
936
937 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
938
939 devp->hd_hpets = hpetp;
940 devp->hd_hpet = hpet;
941 devp->hd_timer = timer;
942
943 /*
944 * If the timer was reserved by platform code,
945 * then make timer unavailable for opens.
946 */
947 if (hdp->hd_state & (1 << i)) {
948 devp->hd_flags = HPET_OPEN;
949 continue;
950 }
951
952 init_waitqueue_head(&devp->hd_waitqueue);
953 }
954
955 hpetp->hp_delta = hpet_calibrate(hpetp);
956
957 /* This clocksource driver currently only works on ia64 */
958 #ifdef CONFIG_IA64
959 if (!hpet_clocksource) {
960 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
961 clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
962 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
963 hpetp->hp_clocksource = &clocksource_hpet;
964 hpet_clocksource = &clocksource_hpet;
965 }
966 #endif
967
968 return 0;
969 }
970
971 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
972 {
973 struct hpet_data *hdp;
974 acpi_status status;
975 struct acpi_resource_address64 addr;
976
977 hdp = data;
978
979 status = acpi_resource_to_address64(res, &addr);
980
981 if (ACPI_SUCCESS(status)) {
982 hdp->hd_phys_address = addr.minimum;
983 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
984
985 if (hpet_is_known(hdp)) {
986 iounmap(hdp->hd_address);
987 return AE_ALREADY_EXISTS;
988 }
989 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
990 struct acpi_resource_fixed_memory32 *fixmem32;
991
992 fixmem32 = &res->data.fixed_memory32;
993
994 hdp->hd_phys_address = fixmem32->address;
995 hdp->hd_address = ioremap(fixmem32->address,
996 HPET_RANGE_SIZE);
997
998 if (hpet_is_known(hdp)) {
999 iounmap(hdp->hd_address);
1000 return AE_ALREADY_EXISTS;
1001 }
1002 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
1003 struct acpi_resource_extended_irq *irqp;
1004 int i, irq;
1005
1006 irqp = &res->data.extended_irq;
1007
1008 for (i = 0; i < irqp->interrupt_count; i++) {
1009 if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
1010 break;
1011
1012 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
1013 irqp->triggering, irqp->polarity);
1014 if (irq < 0)
1015 return AE_ERROR;
1016
1017 hdp->hd_irq[hdp->hd_nirqs] = irq;
1018 hdp->hd_nirqs++;
1019 }
1020 }
1021
1022 return AE_OK;
1023 }
1024
1025 static int hpet_acpi_add(struct acpi_device *device)
1026 {
1027 acpi_status result;
1028 struct hpet_data data;
1029
1030 memset(&data, 0, sizeof(data));
1031
1032 result =
1033 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
1034 hpet_resources, &data);
1035
1036 if (ACPI_FAILURE(result))
1037 return -ENODEV;
1038
1039 if (!data.hd_address || !data.hd_nirqs) {
1040 if (data.hd_address)
1041 iounmap(data.hd_address);
1042 printk("%s: no address or irqs in _CRS\n", __func__);
1043 return -ENODEV;
1044 }
1045
1046 return hpet_alloc(&data);
1047 }
1048
1049 static int hpet_acpi_remove(struct acpi_device *device)
1050 {
1051 /* XXX need to unregister clocksource, dealloc mem, etc */
1052 return -EINVAL;
1053 }
1054
1055 static const struct acpi_device_id hpet_device_ids[] = {
1056 {"PNP0103", 0},
1057 {"", 0},
1058 };
1059 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
1060
1061 static struct acpi_driver hpet_acpi_driver = {
1062 .name = "hpet",
1063 .ids = hpet_device_ids,
1064 .ops = {
1065 .add = hpet_acpi_add,
1066 .remove = hpet_acpi_remove,
1067 },
1068 };
1069
1070 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1071
1072 static int __init hpet_init(void)
1073 {
1074 int result;
1075
1076 result = misc_register(&hpet_misc);
1077 if (result < 0)
1078 return -ENODEV;
1079
1080 sysctl_header = register_sysctl_table(dev_root);
1081
1082 result = acpi_bus_register_driver(&hpet_acpi_driver);
1083 if (result < 0) {
1084 if (sysctl_header)
1085 unregister_sysctl_table(sysctl_header);
1086 misc_deregister(&hpet_misc);
1087 return result;
1088 }
1089
1090 return 0;
1091 }
1092
1093 static void __exit hpet_exit(void)
1094 {
1095 acpi_bus_unregister_driver(&hpet_acpi_driver);
1096
1097 if (sysctl_header)
1098 unregister_sysctl_table(sysctl_header);
1099 misc_deregister(&hpet_misc);
1100
1101 return;
1102 }
1103
1104 module_init(hpet_init);
1105 module_exit(hpet_exit);
1106 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1107 MODULE_LICENSE("GPL");