]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/char/mxser.c
4b783d9bbd598ad883796d3f9bbe0d1d87988036
[mirror_ubuntu-zesty-kernel.git] / drivers / char / mxser.c
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
39 #include <linux/config.h>
40 #include <linux/module.h>
41 #include <linux/version.h>
42 #include <linux/autoconf.h>
43 #include <linux/errno.h>
44 #include <linux/signal.h>
45 #include <linux/sched.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/tty.h>
49 #include <linux/tty_flip.h>
50 #include <linux/serial.h>
51 #include <linux/serial_reg.h>
52 #include <linux/major.h>
53 #include <linux/string.h>
54 #include <linux/fcntl.h>
55 #include <linux/ptrace.h>
56 #include <linux/gfp.h>
57 #include <linux/ioport.h>
58 #include <linux/mm.h>
59 #include <linux/smp_lock.h>
60 #include <linux/delay.h>
61 #include <linux/pci.h>
62
63 #include <asm/system.h>
64 #include <asm/io.h>
65 #include <asm/irq.h>
66 #include <asm/bitops.h>
67 #include <asm/uaccess.h>
68
69 #include "mxser.h"
70
71 #define MXSER_VERSION "1.8"
72 #define MXSERMAJOR 174
73 #define MXSERCUMAJOR 175
74
75 #define MXSER_EVENT_TXLOW 1
76 #define MXSER_EVENT_HANGUP 2
77
78 #define MXSER_BOARDS 4 /* Max. boards */
79 #define MXSER_PORTS 32 /* Max. ports */
80 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
81 #define MXSER_ISR_PASS_LIMIT 256
82
83 #define MXSER_ERR_IOADDR -1
84 #define MXSER_ERR_IRQ -2
85 #define MXSER_ERR_IRQ_CONFLIT -3
86 #define MXSER_ERR_VECTOR -4
87
88 #define SERIAL_TYPE_NORMAL 1
89 #define SERIAL_TYPE_CALLOUT 2
90
91 #define WAKEUP_CHARS 256
92
93 #define UART_MCR_AFE 0x20
94 #define UART_LSR_SPECIAL 0x1E
95
96 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|IXON|IXOFF))
97
98 #define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? SA_SHIRQ : SA_INTERRUPT)
99
100 #define C168_ASIC_ID 1
101 #define C104_ASIC_ID 2
102 #define C102_ASIC_ID 0xB
103 #define CI132_ASIC_ID 4
104 #define CI134_ASIC_ID 3
105 #define CI104J_ASIC_ID 5
106
107 enum {
108 MXSER_BOARD_C168_ISA = 1,
109 MXSER_BOARD_C104_ISA,
110 MXSER_BOARD_CI104J,
111 MXSER_BOARD_C168_PCI,
112 MXSER_BOARD_C104_PCI,
113 MXSER_BOARD_C102_ISA,
114 MXSER_BOARD_CI132,
115 MXSER_BOARD_CI134,
116 MXSER_BOARD_CP132,
117 MXSER_BOARD_CP114,
118 MXSER_BOARD_CT114,
119 MXSER_BOARD_CP102,
120 MXSER_BOARD_CP104U,
121 MXSER_BOARD_CP168U,
122 MXSER_BOARD_CP132U,
123 MXSER_BOARD_CP134U,
124 MXSER_BOARD_CP104JU,
125 MXSER_BOARD_RC7000,
126 MXSER_BOARD_CP118U,
127 MXSER_BOARD_CP102UL,
128 MXSER_BOARD_CP102U,
129 };
130
131 static char *mxser_brdname[] = {
132 "C168 series",
133 "C104 series",
134 "CI-104J series",
135 "C168H/PCI series",
136 "C104H/PCI series",
137 "C102 series",
138 "CI-132 series",
139 "CI-134 series",
140 "CP-132 series",
141 "CP-114 series",
142 "CT-114 series",
143 "CP-102 series",
144 "CP-104U series",
145 "CP-168U series",
146 "CP-132U series",
147 "CP-134U series",
148 "CP-104JU series",
149 "Moxa UC7000 Serial",
150 "CP-118U series",
151 "CP-102UL series",
152 "CP-102U series",
153 };
154
155 static int mxser_numports[] = {
156 8, // C168-ISA
157 4, // C104-ISA
158 4, // CI104J
159 8, // C168-PCI
160 4, // C104-PCI
161 2, // C102-ISA
162 2, // CI132
163 4, // CI134
164 2, // CP132
165 4, // CP114
166 4, // CT114
167 2, // CP102
168 4, // CP104U
169 8, // CP168U
170 2, // CP132U
171 4, // CP134U
172 4, // CP104JU
173 8, // RC7000
174 8, // CP118U
175 2, // CP102UL
176 2, // CP102U
177 };
178
179 #define UART_TYPE_NUM 2
180
181 static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
182 MOXA_MUST_MU150_HWID,
183 MOXA_MUST_MU860_HWID
184 };
185
186 // This is only for PCI
187 #define UART_INFO_NUM 3
188 struct mxpciuart_info {
189 int type;
190 int tx_fifo;
191 int rx_fifo;
192 int xmit_fifo_size;
193 int rx_high_water;
194 int rx_trigger;
195 int rx_low_water;
196 long max_baud;
197 };
198
199 static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
200 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
201 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
202 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
203 };
204
205
206 #ifdef CONFIG_PCI
207
208 static struct pci_device_id mxser_pcibrds[] = {
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
216 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
217 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
218 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
219 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
220 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
221 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
222 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
223 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
224 {0}
225 };
226
227 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
228
229
230 #endif
231
232 typedef struct _moxa_pci_info {
233 unsigned short busNum;
234 unsigned short devNum;
235 struct pci_dev *pdev; // add by Victor Yu. 06-23-2003
236 } moxa_pci_info;
237
238 static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
239 static int ttymajor = MXSERMAJOR;
240 static int calloutmajor = MXSERCUMAJOR;
241 static int verbose = 0;
242
243 /* Variables for insmod */
244
245 MODULE_AUTHOR("Casper Yang");
246 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
247 MODULE_PARM(ioaddr, "1-4i");
248 MODULE_PARM(ttymajor, "i");
249 MODULE_PARM(calloutmajor, "i");
250 MODULE_PARM(verbose, "i");
251 MODULE_LICENSE("GPL");
252
253 struct mxser_log {
254 int tick;
255 unsigned long rxcnt[MXSER_PORTS];
256 unsigned long txcnt[MXSER_PORTS];
257 };
258
259
260 struct mxser_mon {
261 unsigned long rxcnt;
262 unsigned long txcnt;
263 unsigned long up_rxcnt;
264 unsigned long up_txcnt;
265 int modem_status;
266 unsigned char hold_reason;
267 };
268
269 struct mxser_mon_ext {
270 unsigned long rx_cnt[32];
271 unsigned long tx_cnt[32];
272 unsigned long up_rxcnt[32];
273 unsigned long up_txcnt[32];
274 int modem_status[32];
275
276 long baudrate[32];
277 int databits[32];
278 int stopbits[32];
279 int parity[32];
280 int flowctrl[32];
281 int fifo[32];
282 int iftype[32];
283 };
284 struct mxser_hwconf {
285 int board_type;
286 int ports;
287 int irq;
288 int vector;
289 int vector_mask;
290 int uart_type;
291 int ioaddr[MXSER_PORTS_PER_BOARD];
292 int baud_base[MXSER_PORTS_PER_BOARD];
293 moxa_pci_info pciInfo;
294 int IsMoxaMustChipFlag; // add by Victor Yu. 08-30-2002
295 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; // add by Victor Yu. 09-04-2002
296 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; // add by Victor Yu. 01-05-2004
297 };
298
299 struct mxser_struct {
300 int port;
301 int base; /* port base address */
302 int irq; /* port using irq no. */
303 int vector; /* port irq vector */
304 int vectormask; /* port vector mask */
305 int rx_high_water;
306 int rx_trigger; /* Rx fifo trigger level */
307 int rx_low_water;
308 int baud_base; /* max. speed */
309 int flags; /* defined in tty.h */
310 int type; /* UART type */
311 struct tty_struct *tty;
312 int read_status_mask;
313 int ignore_status_mask;
314 int xmit_fifo_size;
315 int custom_divisor;
316 int x_char; /* xon/xoff character */
317 int close_delay;
318 unsigned short closing_wait;
319 int IER; /* Interrupt Enable Register */
320 int MCR; /* Modem control register */
321 unsigned long event;
322 int count; /* # of fd on device */
323 int blocked_open; /* # of blocked opens */
324 long session; /* Session of opening process */
325 long pgrp; /* pgrp of opening process */
326 unsigned char *xmit_buf;
327 int xmit_head;
328 int xmit_tail;
329 int xmit_cnt;
330 struct work_struct tqueue;
331 struct termios normal_termios;
332 struct termios callout_termios;
333 wait_queue_head_t open_wait;
334 wait_queue_head_t close_wait;
335 wait_queue_head_t delta_msr_wait;
336 struct async_icount icount; /* kernel counters for the 4 input interrupts */
337 int timeout;
338 int IsMoxaMustChipFlag; // add by Victor Yu. 08-30-2002
339 int MaxCanSetBaudRate; // add by Victor Yu. 09-04-2002
340 int opmode_ioaddr; // add by Victor Yu. 01-05-2004
341 unsigned char stop_rx;
342 unsigned char ldisc_stop_rx;
343 long realbaud;
344 struct mxser_mon mon_data;
345 unsigned char err_shadow;
346 spinlock_t slock;
347 };
348
349
350 struct mxser_mstatus {
351 tcflag_t cflag;
352 int cts;
353 int dsr;
354 int ri;
355 int dcd;
356 };
357
358 static struct mxser_mstatus GMStatus[MXSER_PORTS];
359
360 static int mxserBoardCAP[MXSER_BOARDS] = {
361 0, 0, 0, 0
362 /* 0x180, 0x280, 0x200, 0x320 */
363 };
364
365 static struct tty_driver *mxvar_sdriver;
366 static struct mxser_struct mxvar_table[MXSER_PORTS];
367 static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
368 static struct termios *mxvar_termios[MXSER_PORTS + 1];
369 static struct termios *mxvar_termios_locked[MXSER_PORTS + 1];
370 static struct mxser_log mxvar_log;
371 static int mxvar_diagflag;
372 static unsigned char mxser_msr[MXSER_PORTS + 1];
373 static struct mxser_mon_ext mon_data_ext;
374 static int mxser_set_baud_method[MXSER_PORTS + 1];
375 static spinlock_t gm_lock;
376
377 /*
378 * This is used to figure out the divisor speeds and the timeouts
379 */
380
381 static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
382
383 /*
384 * static functions:
385 */
386
387 static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
388 static int mxser_init(void);
389
390 //static void mxser_poll(unsigned long);
391 static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
392 static int mxser_get_PCI_conf(int, int, int, struct mxser_hwconf *);
393 static void mxser_do_softint(void *);
394 static int mxser_open(struct tty_struct *, struct file *);
395 static void mxser_close(struct tty_struct *, struct file *);
396 static int mxser_write(struct tty_struct *, const unsigned char *, int);
397 static int mxser_write_room(struct tty_struct *);
398 static void mxser_flush_buffer(struct tty_struct *);
399 static int mxser_chars_in_buffer(struct tty_struct *);
400 static void mxser_flush_chars(struct tty_struct *);
401 static void mxser_put_char(struct tty_struct *, unsigned char);
402 static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
403 static int mxser_ioctl_special(unsigned int, void __user *);
404 static void mxser_throttle(struct tty_struct *);
405 static void mxser_unthrottle(struct tty_struct *);
406 static void mxser_set_termios(struct tty_struct *, struct termios *);
407 static void mxser_stop(struct tty_struct *);
408 static void mxser_start(struct tty_struct *);
409 static void mxser_hangup(struct tty_struct *);
410 static void mxser_rs_break(struct tty_struct *, int);
411 static irqreturn_t mxser_interrupt(int, void *, struct pt_regs *);
412 static void mxser_receive_chars(struct mxser_struct *, int *);
413 static void mxser_transmit_chars(struct mxser_struct *);
414 static void mxser_check_modem_status(struct mxser_struct *, int);
415 static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
416 static int mxser_startup(struct mxser_struct *);
417 static void mxser_shutdown(struct mxser_struct *);
418 static int mxser_change_speed(struct mxser_struct *, struct termios *old_termios);
419 static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
420 static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
421 static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
422 static void mxser_send_break(struct mxser_struct *, int);
423 static int mxser_tiocmget(struct tty_struct *, struct file *);
424 static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
425 static int mxser_set_baud(struct mxser_struct *info, long newspd);
426 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
427
428 static void mxser_startrx(struct tty_struct *tty);
429 static void mxser_stoprx(struct tty_struct *tty);
430
431
432 static int CheckIsMoxaMust(int io)
433 {
434 u8 oldmcr, hwid;
435 int i;
436
437 outb(0, io + UART_LCR);
438 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
439 oldmcr = inb(io + UART_MCR);
440 outb(0, io + UART_MCR);
441 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
442 if ((hwid = inb(io + UART_MCR)) != 0) {
443 outb(oldmcr, io + UART_MCR);
444 return (MOXA_OTHER_UART);
445 }
446
447 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
448 for (i = 0; i < UART_TYPE_NUM; i++) {
449 if (hwid == Gmoxa_uart_id[i])
450 return (int) hwid;
451 }
452 return MOXA_OTHER_UART;
453 }
454
455 // above is modified by Victor Yu. 08-15-2002
456
457 static struct tty_operations mxser_ops = {
458 .open = mxser_open,
459 .close = mxser_close,
460 .write = mxser_write,
461 .put_char = mxser_put_char,
462 .flush_chars = mxser_flush_chars,
463 .write_room = mxser_write_room,
464 .chars_in_buffer = mxser_chars_in_buffer,
465 .flush_buffer = mxser_flush_buffer,
466 .ioctl = mxser_ioctl,
467 .throttle = mxser_throttle,
468 .unthrottle = mxser_unthrottle,
469 .set_termios = mxser_set_termios,
470 .stop = mxser_stop,
471 .start = mxser_start,
472 .hangup = mxser_hangup,
473 .break_ctl = mxser_rs_break,
474 .wait_until_sent = mxser_wait_until_sent,
475 .tiocmget = mxser_tiocmget,
476 .tiocmset = mxser_tiocmset,
477 };
478
479 /*
480 * The MOXA Smartio/Industio serial driver boot-time initialization code!
481 */
482
483 static int __init mxser_module_init(void)
484 {
485 int ret;
486
487 if (verbose)
488 printk(KERN_DEBUG "Loading module mxser ...\n");
489 ret = mxser_init();
490 if (verbose)
491 printk(KERN_DEBUG "Done.\n");
492 return ret;
493 }
494
495 static void __exit mxser_module_exit(void)
496 {
497 int i, err = 0;
498
499 if (verbose)
500 printk(KERN_DEBUG "Unloading module mxser ...\n");
501
502 if ((err |= tty_unregister_driver(mxvar_sdriver)))
503 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
504
505 for (i = 0; i < MXSER_BOARDS; i++) {
506 struct pci_dev *pdev;
507
508 if (mxsercfg[i].board_type == -1)
509 continue;
510 else {
511 pdev = mxsercfg[i].pciInfo.pdev;
512 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
513 if (pdev != NULL) { //PCI
514 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
515 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
516 } else {
517 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
518 release_region(mxsercfg[i].vector, 1);
519 }
520 }
521 }
522 if (verbose)
523 printk(KERN_DEBUG "Done.\n");
524
525 }
526
527 static void process_txrx_fifo(struct mxser_struct *info)
528 {
529 int i;
530
531 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
532 info->rx_trigger = 1;
533 info->rx_high_water = 1;
534 info->rx_low_water = 1;
535 info->xmit_fifo_size = 1;
536 } else {
537 for (i = 0; i < UART_INFO_NUM; i++) {
538 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
539 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
540 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
541 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
542 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
543 break;
544 }
545 }
546 }
547 }
548
549 static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
550 {
551 struct mxser_struct *info;
552 int retval;
553 int i, n;
554
555 n = board * MXSER_PORTS_PER_BOARD;
556 info = &mxvar_table[n];
557 /*if (verbose) */ {
558 printk(KERN_DEBUG " ttyM%d - ttyM%d ", n, n + hwconf->ports - 1);
559 printk(" max. baud rate = %d bps.\n", hwconf->MaxCanSetBaudRate[0]);
560 }
561
562 for (i = 0; i < hwconf->ports; i++, n++, info++) {
563 info->port = n;
564 info->base = hwconf->ioaddr[i];
565 info->irq = hwconf->irq;
566 info->vector = hwconf->vector;
567 info->vectormask = hwconf->vector_mask;
568 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; // add by Victor Yu. 01-05-2004
569 info->stop_rx = 0;
570 info->ldisc_stop_rx = 0;
571
572 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
573 //Enhance mode enabled here
574 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
575 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
576 }
577
578 info->flags = ASYNC_SHARE_IRQ;
579 info->type = hwconf->uart_type;
580 info->baud_base = hwconf->baud_base[i];
581
582 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
583
584 process_txrx_fifo(info);
585
586
587 info->custom_divisor = hwconf->baud_base[i] * 16;
588 info->close_delay = 5 * HZ / 10;
589 info->closing_wait = 30 * HZ;
590 INIT_WORK(&info->tqueue, mxser_do_softint, info);
591 info->normal_termios = mxvar_sdriver->init_termios;
592 init_waitqueue_head(&info->open_wait);
593 init_waitqueue_head(&info->close_wait);
594 init_waitqueue_head(&info->delta_msr_wait);
595 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
596 info->err_shadow = 0;
597 spin_lock_init(&info->slock);
598 }
599 /*
600 * Allocate the IRQ if necessary
601 */
602
603
604 /* before set INT ISR, disable all int */
605 for (i = 0; i < hwconf->ports; i++) {
606 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0, hwconf->ioaddr[i] + UART_IER);
607 }
608
609 n = board * MXSER_PORTS_PER_BOARD;
610 info = &mxvar_table[n];
611
612 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info), "mxser", info);
613 if (retval) {
614 printk(KERN_ERR "Board %d: %s", board, mxser_brdname[hwconf->board_type - 1]);
615 printk(" Request irq fail,IRQ (%d) may be conflit with another device.\n", info->irq);
616 return retval;
617 }
618 return 0;
619 }
620
621
622 static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
623 {
624 mxsercfg[board] = *hwconf;
625 }
626
627 #ifdef CONFIG_PCI
628 static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
629 {
630 int i, j;
631 // unsigned int val;
632 unsigned int ioaddress;
633 struct pci_dev *pdev = hwconf->pciInfo.pdev;
634
635 //io address
636 hwconf->board_type = board_type;
637 hwconf->ports = mxser_numports[board_type - 1];
638 ioaddress = pci_resource_start(pdev, 2);
639 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2), "mxser(IO)");
640
641 for (i = 0; i < hwconf->ports; i++) {
642 hwconf->ioaddr[i] = ioaddress + 8 * i;
643 }
644
645 //vector
646 ioaddress = pci_resource_start(pdev, 3);
647 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3), "mxser(vector)");
648 hwconf->vector = ioaddress;
649
650 //irq
651 hwconf->irq = hwconf->pciInfo.pdev->irq;
652
653 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
654 hwconf->uart_type = PORT_16550A;
655 hwconf->vector_mask = 0;
656
657
658 for (i = 0; i < hwconf->ports; i++) {
659 for (j = 0; j < UART_INFO_NUM; j++) {
660 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
661 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
662
663 //exception....CP-102
664 if (board_type == MXSER_BOARD_CP102)
665 hwconf->MaxCanSetBaudRate[i] = 921600;
666 break;
667 }
668 }
669 }
670
671 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
672 for (i = 0; i < hwconf->ports; i++) {
673 if (i < 4)
674 hwconf->opmode_ioaddr[i] = ioaddress + 4;
675 else
676 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
677 }
678 outb(0, ioaddress + 4); // default set to RS232 mode
679 outb(0, ioaddress + 0x0c); //default set to RS232 mode
680 }
681
682 for (i = 0; i < hwconf->ports; i++) {
683 hwconf->vector_mask |= (1 << i);
684 hwconf->baud_base[i] = 921600;
685 }
686 return (0);
687 }
688 #endif
689
690 static int mxser_init(void)
691 {
692 int i, m, retval, b, n;
693 int ret1;
694 struct pci_dev *pdev = NULL;
695 int index;
696 unsigned char busnum, devnum;
697 struct mxser_hwconf hwconf;
698
699 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
700 if (!mxvar_sdriver)
701 return -ENOMEM;
702 spin_lock_init(&gm_lock);
703
704 for (i = 0; i < MXSER_BOARDS; i++) {
705 mxsercfg[i].board_type = -1;
706 }
707
708 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", MXSER_VERSION);
709
710 /* Initialize the tty_driver structure */
711 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
712 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
713 mxvar_sdriver->name = "ttyM";
714 mxvar_sdriver->major = ttymajor;
715 mxvar_sdriver->minor_start = 0;
716 mxvar_sdriver->num = MXSER_PORTS + 1;
717 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
718 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
719 mxvar_sdriver->init_termios = tty_std_termios;
720 mxvar_sdriver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
721 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
722 tty_set_operations(mxvar_sdriver, &mxser_ops);
723 mxvar_sdriver->ttys = mxvar_tty;
724 mxvar_sdriver->termios = mxvar_termios;
725 mxvar_sdriver->termios_locked = mxvar_termios_locked;
726
727 mxvar_diagflag = 0;
728 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
729 memset(&mxvar_log, 0, sizeof(struct mxser_log));
730
731 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
732 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
733 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
734 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
735
736 m = 0;
737 /* Start finding ISA boards here */
738 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
739 int cap;
740 if (!(cap = mxserBoardCAP[b]))
741 continue;
742
743 retval = mxser_get_ISA_conf(cap, &hwconf);
744
745 if (retval != 0)
746 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n", mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
747
748 if (retval <= 0) {
749 if (retval == MXSER_ERR_IRQ)
750 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
751 else if (retval == MXSER_ERR_IRQ_CONFLIT)
752 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
753 else if (retval == MXSER_ERR_VECTOR)
754 printk(KERN_ERR "Invalid interrupt vector,board not configured\n");
755 else if (retval == MXSER_ERR_IOADDR)
756 printk(KERN_ERR "Invalid I/O address,board not configured\n");
757
758 continue;
759 }
760
761 hwconf.pciInfo.busNum = 0;
762 hwconf.pciInfo.devNum = 0;
763 hwconf.pciInfo.pdev = NULL;
764
765 mxser_getcfg(m, &hwconf);
766 //init mxsercfg first, or mxsercfg data is not correct on ISR.
767 //mxser_initbrd will hook ISR.
768 if (mxser_initbrd(m, &hwconf) < 0)
769 continue;
770
771
772 m++;
773 }
774
775 /* Start finding ISA boards from module arg */
776 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
777 int cap;
778 if (!(cap = ioaddr[b]))
779 continue;
780
781 retval = mxser_get_ISA_conf(cap, &hwconf);
782
783 if (retval != 0)
784 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n", mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
785
786 if (retval <= 0) {
787 if (retval == MXSER_ERR_IRQ)
788 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
789 else if (retval == MXSER_ERR_IRQ_CONFLIT)
790 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
791 else if (retval == MXSER_ERR_VECTOR)
792 printk(KERN_ERR "Invalid interrupt vector,board not configured\n");
793 else if (retval == MXSER_ERR_IOADDR)
794 printk(KERN_ERR "Invalid I/O address,board not configured\n");
795
796 continue;
797 }
798
799 hwconf.pciInfo.busNum = 0;
800 hwconf.pciInfo.devNum = 0;
801 hwconf.pciInfo.pdev = NULL;
802
803 mxser_getcfg(m, &hwconf);
804 //init mxsercfg first, or mxsercfg data is not correct on ISR.
805 //mxser_initbrd will hook ISR.
806 if (mxser_initbrd(m, &hwconf) < 0)
807 continue;
808
809 m++;
810 }
811
812 /* start finding PCI board here */
813 #ifdef CONFIG_PCI
814 n = (sizeof(mxser_pcibrds) / sizeof(mxser_pcibrds[0])) - 1;
815 index = 0;
816 b = 0;
817 while (b < n) {
818 pdev = pci_find_device(mxser_pcibrds[b].vendor, mxser_pcibrds[b].device, pdev);
819 if (pdev == NULL) {
820 b++;
821 continue;
822 }
823 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
824 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
825 hwconf.pciInfo.pdev = pdev;
826 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n", mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1], busnum, devnum >> 3);
827 index++;
828 if (m >= MXSER_BOARDS) {
829 printk(KERN_ERR "Too many Smartio/Industio family boards find (maximum %d),board not configured\n", MXSER_BOARDS);
830 } else {
831 if (pci_enable_device(pdev)) {
832 printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
833 continue;
834 }
835 retval = mxser_get_PCI_conf(busnum, devnum, (int) mxser_pcibrds[b].driver_data, &hwconf);
836 if (retval < 0) {
837 if (retval == MXSER_ERR_IRQ)
838 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
839 else if (retval == MXSER_ERR_IRQ_CONFLIT)
840 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
841 else if (retval == MXSER_ERR_VECTOR)
842 printk(KERN_ERR "Invalid interrupt vector,board not configured\n");
843 else if (retval == MXSER_ERR_IOADDR)
844 printk(KERN_ERR "Invalid I/O address,board not configured\n");
845 continue;
846 }
847 mxser_getcfg(m, &hwconf);
848 //init mxsercfg first, or mxsercfg data is not correct on ISR.
849 //mxser_initbrd will hook ISR.
850 if (mxser_initbrd(m, &hwconf) < 0)
851 continue;
852 m++;
853 }
854 }
855 #endif
856
857 ret1 = 0;
858 if (!(ret1 = tty_register_driver(mxvar_sdriver))) {
859 return 0;
860 } else
861 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family driver !\n");
862
863
864 if (ret1) {
865 for (i = 0; i < MXSER_BOARDS; i++) {
866 if (mxsercfg[i].board_type == -1)
867 continue;
868 else {
869 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
870 //todo: release io, vector
871 }
872 }
873 return -1;
874 }
875
876 return (0);
877 }
878
879 static void mxser_do_softint(void *private_)
880 {
881 struct mxser_struct *info = (struct mxser_struct *) private_;
882 struct tty_struct *tty;
883
884 tty = info->tty;
885
886 if (tty) {
887 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
888 tty_wakeup(tty);
889 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
890 tty_hangup(tty);
891 }
892 }
893
894 static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
895 {
896 unsigned char status = 0;
897
898 status = inb(baseaddr + UART_MSR);
899
900 mxser_msr[port] &= 0x0F;
901 mxser_msr[port] |= status;
902 status = mxser_msr[port];
903 if (mode)
904 mxser_msr[port] = 0;
905
906 return status;
907 }
908
909 /*
910 * This routine is called whenever a serial port is opened. It
911 * enables interrupts for a serial port, linking in its async structure into
912 * the IRQ chain. It also performs the serial-specific
913 * initialization for the tty structure.
914 */
915 static int mxser_open(struct tty_struct *tty, struct file *filp)
916 {
917 struct mxser_struct *info;
918 int retval, line;
919
920 line = tty->index;
921 if (line == MXSER_PORTS)
922 return 0;
923 if (line < 0 || line > MXSER_PORTS)
924 return -ENODEV;
925 info = mxvar_table + line;
926 if (!info->base)
927 return (-ENODEV);
928
929 tty->driver_data = info;
930 info->tty = tty;
931 /*
932 * Start up serial port
933 */
934 retval = mxser_startup(info);
935 if (retval)
936 return (retval);
937
938 retval = mxser_block_til_ready(tty, filp, info);
939 if (retval)
940 return (retval);
941
942 info->count++;
943
944 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
945 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
946 *tty->termios = info->normal_termios;
947 else
948 *tty->termios = info->callout_termios;
949 mxser_change_speed(info, NULL);
950 }
951
952 info->session = current->signal->session;
953 info->pgrp = process_group(current);
954 clear_bit(TTY_DONT_FLIP, &tty->flags);
955
956 //status = mxser_get_msr(info->base, 0, info->port);
957 //mxser_check_modem_status(info, status);
958
959 /* unmark here for very high baud rate (ex. 921600 bps) used
960 */
961 tty->low_latency = 1;
962 return 0;
963 }
964
965 /*
966 * This routine is called when the serial port gets closed. First, we
967 * wait for the last remaining data to be sent. Then, we unlink its
968 * async structure from the interrupt chain if necessary, and we free
969 * that IRQ if nothing is left in the chain.
970 */
971 static void mxser_close(struct tty_struct *tty, struct file *filp)
972 {
973 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
974
975 unsigned long timeout;
976 unsigned long flags;
977 struct tty_ldisc *ld;
978
979 if (tty->index == MXSER_PORTS)
980 return;
981 if (!info)
982 BUG();
983
984 spin_lock_irqsave(&info->slock, flags);
985
986 if (tty_hung_up_p(filp)) {
987 spin_unlock_irqrestore(&info->slock, flags);
988 return;
989 }
990 if ((tty->count == 1) && (info->count != 1)) {
991 /*
992 * Uh, oh. tty->count is 1, which means that the tty
993 * structure will be freed. Info->count should always
994 * be one in these conditions. If it's greater than
995 * one, we've got real problems, since it means the
996 * serial port won't be shutdown.
997 */
998 printk(KERN_ERR "mxser_close: bad serial port count; tty->count is 1, " "info->count is %d\n", info->count);
999 info->count = 1;
1000 }
1001 if (--info->count < 0) {
1002 printk(KERN_ERR "mxser_close: bad serial port count for ttys%d: %d\n", info->port, info->count);
1003 info->count = 0;
1004 }
1005 if (info->count) {
1006 spin_unlock_irqrestore(&info->slock, flags);
1007 return;
1008 }
1009 info->flags |= ASYNC_CLOSING;
1010 spin_unlock_irqrestore(&info->slock, flags);
1011 /*
1012 * Save the termios structure, since this port may have
1013 * separate termios for callout and dialin.
1014 */
1015 if (info->flags & ASYNC_NORMAL_ACTIVE)
1016 info->normal_termios = *tty->termios;
1017 /*
1018 * Now we wait for the transmit buffer to clear; and we notify
1019 * the line discipline to only process XON/XOFF characters.
1020 */
1021 tty->closing = 1;
1022 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1023 tty_wait_until_sent(tty, info->closing_wait);
1024 /*
1025 * At this point we stop accepting input. To do this, we
1026 * disable the receive line status interrupts, and tell the
1027 * interrupt driver to stop checking the data ready bit in the
1028 * line status register.
1029 */
1030 info->IER &= ~UART_IER_RLSI;
1031 if (info->IsMoxaMustChipFlag)
1032 info->IER &= ~MOXA_MUST_RECV_ISR;
1033 /* by William
1034 info->read_status_mask &= ~UART_LSR_DR;
1035 */
1036 if (info->flags & ASYNC_INITIALIZED) {
1037 outb(info->IER, info->base + UART_IER);
1038 /*
1039 * Before we drop DTR, make sure the UART transmitter
1040 * has completely drained; this is especially
1041 * important if there is a transmit FIFO!
1042 */
1043 timeout = jiffies + HZ;
1044 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
1045 schedule_timeout_interruptible(5);
1046 if (time_after(jiffies, timeout))
1047 break;
1048 }
1049 }
1050 mxser_shutdown(info);
1051
1052 if (tty->driver->flush_buffer)
1053 tty->driver->flush_buffer(tty);
1054
1055 ld = tty_ldisc_ref(tty);
1056 if (ld) {
1057 if(ld->flush_buffer)
1058 ld->flush_buffer(tty);
1059 tty_ldisc_deref(ld);
1060 }
1061
1062 tty->closing = 0;
1063 info->event = 0;
1064 info->tty = NULL;
1065 if (info->blocked_open) {
1066 if (info->close_delay)
1067 schedule_timeout_interruptible(info->close_delay);
1068 wake_up_interruptible(&info->open_wait);
1069 }
1070
1071 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1072 wake_up_interruptible(&info->close_wait);
1073
1074 }
1075
1076 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1077 {
1078 int c, total = 0;
1079 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1080 unsigned long flags;
1081
1082 if (!tty || !info->xmit_buf)
1083 return (0);
1084
1085 while (1) {
1086 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, SERIAL_XMIT_SIZE - info->xmit_head));
1087 if (c <= 0)
1088 break;
1089
1090 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1091 spin_lock_irqsave(&info->slock, flags);
1092 info->xmit_head = (info->xmit_head + c) & (SERIAL_XMIT_SIZE - 1);
1093 info->xmit_cnt += c;
1094 spin_unlock_irqrestore(&info->slock, flags);
1095
1096 buf += c;
1097 count -= c;
1098 total += c;
1099
1100 }
1101
1102 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
1103 if (!tty->hw_stopped || (info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
1104 spin_lock_irqsave(&info->slock, flags);
1105 info->IER |= UART_IER_THRI;
1106 outb(info->IER, info->base + UART_IER);
1107 spin_unlock_irqrestore(&info->slock, flags);
1108 }
1109 }
1110 return total;
1111 }
1112
1113 static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1114 {
1115 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1116 unsigned long flags;
1117
1118 if (!tty || !info->xmit_buf)
1119 return;
1120
1121 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1122 return;
1123
1124 spin_lock_irqsave(&info->slock, flags);
1125 info->xmit_buf[info->xmit_head++] = ch;
1126 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1127 info->xmit_cnt++;
1128 spin_unlock_irqrestore(&info->slock, flags);
1129 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
1130 if (!tty->hw_stopped || (info->type == PORT_16550A) || info->IsMoxaMustChipFlag) {
1131 spin_lock_irqsave(&info->slock, flags);
1132 info->IER |= UART_IER_THRI;
1133 outb(info->IER, info->base + UART_IER);
1134 spin_unlock_irqrestore(&info->slock, flags);
1135 }
1136 }
1137 }
1138
1139
1140 static void mxser_flush_chars(struct tty_struct *tty)
1141 {
1142 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1143 unsigned long flags;
1144
1145 if (info->xmit_cnt <= 0 || tty->stopped || !info->xmit_buf || (tty->hw_stopped && (info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)))
1146 return;
1147
1148 spin_lock_irqsave(&info->slock, flags);
1149
1150 info->IER |= UART_IER_THRI;
1151 outb(info->IER, info->base + UART_IER);
1152
1153 spin_unlock_irqrestore(&info->slock, flags);
1154 }
1155
1156 static int mxser_write_room(struct tty_struct *tty)
1157 {
1158 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1159 int ret;
1160
1161 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1162 if (ret < 0)
1163 ret = 0;
1164 return (ret);
1165 }
1166
1167 static int mxser_chars_in_buffer(struct tty_struct *tty)
1168 {
1169 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1170 return info->xmit_cnt;
1171 }
1172
1173 static void mxser_flush_buffer(struct tty_struct *tty)
1174 {
1175 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1176 char fcr;
1177 unsigned long flags;
1178
1179
1180 spin_lock_irqsave(&info->slock, flags);
1181 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1182
1183 /* below added by shinhay */
1184 fcr = inb(info->base + UART_FCR);
1185 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), info->base + UART_FCR);
1186 outb(fcr, info->base + UART_FCR);
1187
1188 spin_unlock_irqrestore(&info->slock, flags);
1189 /* above added by shinhay */
1190
1191 wake_up_interruptible(&tty->write_wait);
1192 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
1193 (tty->ldisc.write_wakeup) (tty);
1194 }
1195
1196 static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1197 {
1198 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1199 int retval;
1200 struct async_icount cprev, cnow; /* kernel counter temps */
1201 struct serial_icounter_struct __user *p_cuser;
1202 unsigned long templ;
1203 unsigned long flags;
1204 void __user *argp = (void __user *)arg;
1205
1206 if (tty->index == MXSER_PORTS)
1207 return (mxser_ioctl_special(cmd, argp));
1208
1209 // following add by Victor Yu. 01-05-2004
1210 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1211 int opmode, p;
1212 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1213 int shiftbit;
1214 unsigned char val, mask;
1215
1216 p = info->port % 4;
1217 if (cmd == MOXA_SET_OP_MODE) {
1218 if (get_user(opmode, (int __user *) argp))
1219 return -EFAULT;
1220 if (opmode != RS232_MODE && opmode != RS485_2WIRE_MODE && opmode != RS422_MODE && opmode != RS485_4WIRE_MODE)
1221 return -EFAULT;
1222 mask = ModeMask[p];
1223 shiftbit = p * 2;
1224 val = inb(info->opmode_ioaddr);
1225 val &= mask;
1226 val |= (opmode << shiftbit);
1227 outb(val, info->opmode_ioaddr);
1228 } else {
1229 shiftbit = p * 2;
1230 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1231 opmode &= OP_MODE_MASK;
1232 if (copy_to_user(argp, &opmode, sizeof(int)))
1233 return -EFAULT;
1234 }
1235 return 0;
1236 }
1237 // above add by Victor Yu. 01-05-2004
1238
1239 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1240 if (tty->flags & (1 << TTY_IO_ERROR))
1241 return (-EIO);
1242 }
1243 switch (cmd) {
1244 case TCSBRK: /* SVID version: non-zero arg --> no break */
1245 retval = tty_check_change(tty);
1246 if (retval)
1247 return (retval);
1248 tty_wait_until_sent(tty, 0);
1249 if (!arg)
1250 mxser_send_break(info, HZ / 4); /* 1/4 second */
1251 return (0);
1252 case TCSBRKP: /* support for POSIX tcsendbreak() */
1253 retval = tty_check_change(tty);
1254 if (retval)
1255 return (retval);
1256 tty_wait_until_sent(tty, 0);
1257 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1258 return (0);
1259 case TIOCGSOFTCAR:
1260 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *) argp);
1261 case TIOCSSOFTCAR:
1262 if (get_user(templ, (unsigned long __user *) argp))
1263 return -EFAULT;
1264 arg = templ;
1265 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
1266 return (0);
1267 case TIOCGSERIAL:
1268 return mxser_get_serial_info(info, argp);
1269 case TIOCSSERIAL:
1270 return mxser_set_serial_info(info, argp);
1271 case TIOCSERGETLSR: /* Get line status register */
1272 return mxser_get_lsr_info(info, argp);
1273 /*
1274 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1275 * - mask passed in arg for lines of interest
1276 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1277 * Caller should use TIOCGICOUNT to see which one it was
1278 */
1279 case TIOCMIWAIT:{
1280 DECLARE_WAITQUEUE(wait, current);
1281 int ret;
1282 spin_lock_irqsave(&info->slock, flags);
1283 cprev = info->icount; /* note the counters on entry */
1284 spin_unlock_irqrestore(&info->slock, flags);
1285
1286 add_wait_queue(&info->delta_msr_wait, &wait);
1287 while (1) {
1288 spin_lock_irqsave(&info->slock, flags);
1289 cnow = info->icount; /* atomic copy */
1290 spin_unlock_irqrestore(&info->slock, flags);
1291
1292 set_current_state(TASK_INTERRUPTIBLE);
1293 if (((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts))) {
1294 ret = 0;
1295 break;
1296 }
1297 /* see if a signal did it */
1298 if (signal_pending(current)) {
1299 ret = -ERESTARTSYS;
1300 break;
1301 }
1302 cprev = cnow;
1303 }
1304 current->state = TASK_RUNNING;
1305 remove_wait_queue(&info->delta_msr_wait, &wait);
1306 break;
1307 }
1308 /* NOTREACHED */
1309 /*
1310 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1311 * Return: write counters to the user passed counter struct
1312 * NB: both 1->0 and 0->1 transitions are counted except for
1313 * RI where only 0->1 is counted.
1314 */
1315 case TIOCGICOUNT:
1316 spin_lock_irqsave(&info->slock, flags);
1317 cnow = info->icount;
1318 spin_unlock_irqrestore(&info->slock, flags);
1319 p_cuser = argp;
1320 /* modified by casper 1/11/2000 */
1321 if (put_user(cnow.frame, &p_cuser->frame))
1322 return -EFAULT;
1323 if (put_user(cnow.brk, &p_cuser->brk))
1324 return -EFAULT;
1325 if (put_user(cnow.overrun, &p_cuser->overrun))
1326 return -EFAULT;
1327 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1328 return -EFAULT;
1329 if (put_user(cnow.parity, &p_cuser->parity))
1330 return -EFAULT;
1331 if (put_user(cnow.rx, &p_cuser->rx))
1332 return -EFAULT;
1333 if (put_user(cnow.tx, &p_cuser->tx))
1334 return -EFAULT;
1335 put_user(cnow.cts, &p_cuser->cts);
1336 put_user(cnow.dsr, &p_cuser->dsr);
1337 put_user(cnow.rng, &p_cuser->rng);
1338 put_user(cnow.dcd, &p_cuser->dcd);
1339
1340 /* */
1341 return 0;
1342 case MOXA_HighSpeedOn:
1343 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *) argp);
1344
1345 case MOXA_SDS_RSTICOUNTER:{
1346 info->mon_data.rxcnt = 0;
1347 info->mon_data.txcnt = 0;
1348 return 0;
1349 }
1350 // (above) added by James.
1351 case MOXA_ASPP_SETBAUD:{
1352 long baud;
1353 if (get_user(baud, (long __user *) argp))
1354 return -EFAULT;
1355 mxser_set_baud(info, baud);
1356 return 0;
1357 }
1358 case MOXA_ASPP_GETBAUD:
1359 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1360 return -EFAULT;
1361
1362 return 0;
1363
1364 case MOXA_ASPP_OQUEUE:{
1365 int len, lsr;
1366
1367 len = mxser_chars_in_buffer(tty);
1368
1369 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1370
1371 len += (lsr ? 0 : 1);
1372
1373 if (copy_to_user(argp, &len, sizeof(int)))
1374 return -EFAULT;
1375
1376 return 0;
1377 }
1378 case MOXA_ASPP_MON:{
1379 int mcr, status;
1380 // info->mon_data.ser_param = tty->termios->c_cflag;
1381
1382 status = mxser_get_msr(info->base, 1, info->port, info);
1383 mxser_check_modem_status(info, status);
1384
1385 mcr = inb(info->base + UART_MCR);
1386 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1387 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1388 else
1389 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1390
1391 if (mcr & MOXA_MUST_MCR_TX_XON)
1392 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1393 else
1394 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1395
1396 if (info->tty->hw_stopped)
1397 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1398 else
1399 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1400
1401
1402 if (copy_to_user(argp, &info->mon_data, sizeof(struct mxser_mon)))
1403 return -EFAULT;
1404
1405 return 0;
1406
1407 }
1408
1409 case MOXA_ASPP_LSTATUS:{
1410 if (copy_to_user(argp, &info->err_shadow, sizeof(unsigned char)))
1411 return -EFAULT;
1412
1413 info->err_shadow = 0;
1414 return 0;
1415
1416 }
1417 case MOXA_SET_BAUD_METHOD:{
1418 int method;
1419 if (get_user(method, (int __user *) argp))
1420 return -EFAULT;
1421 mxser_set_baud_method[info->port] = method;
1422 if (copy_to_user(argp, &method, sizeof(int)))
1423 return -EFAULT;
1424
1425 return 0;
1426 }
1427 default:
1428 return -ENOIOCTLCMD;
1429 }
1430 return 0;
1431 }
1432
1433 #ifndef CMSPAR
1434 #define CMSPAR 010000000000
1435 #endif
1436
1437 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1438 {
1439 int i, result, status;
1440
1441 switch (cmd) {
1442 case MOXA_GET_CONF:
1443 if (copy_to_user(argp, mxsercfg, sizeof(struct mxser_hwconf) * 4))
1444 return -EFAULT;
1445 return 0;
1446 case MOXA_GET_MAJOR:
1447 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1448 return -EFAULT;
1449 return 0;
1450
1451 case MOXA_GET_CUMAJOR:
1452 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1453 return -EFAULT;
1454 return 0;
1455
1456 case MOXA_CHKPORTENABLE:
1457 result = 0;
1458 for (i = 0; i < MXSER_PORTS; i++) {
1459 if (mxvar_table[i].base)
1460 result |= (1 << i);
1461 }
1462 return put_user(result, (unsigned long __user *) argp);
1463 case MOXA_GETDATACOUNT:
1464 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1465 return -EFAULT;
1466 return (0);
1467 case MOXA_GETMSTATUS:
1468 for (i = 0; i < MXSER_PORTS; i++) {
1469 GMStatus[i].ri = 0;
1470 if (!mxvar_table[i].base) {
1471 GMStatus[i].dcd = 0;
1472 GMStatus[i].dsr = 0;
1473 GMStatus[i].cts = 0;
1474 continue;
1475 }
1476
1477 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1478 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1479 else
1480 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1481
1482 status = inb(mxvar_table[i].base + UART_MSR);
1483 if (status & 0x80 /*UART_MSR_DCD */ )
1484 GMStatus[i].dcd = 1;
1485 else
1486 GMStatus[i].dcd = 0;
1487
1488 if (status & 0x20 /*UART_MSR_DSR */ )
1489 GMStatus[i].dsr = 1;
1490 else
1491 GMStatus[i].dsr = 0;
1492
1493
1494 if (status & 0x10 /*UART_MSR_CTS */ )
1495 GMStatus[i].cts = 1;
1496 else
1497 GMStatus[i].cts = 0;
1498 }
1499 if (copy_to_user(argp, GMStatus, sizeof(struct mxser_mstatus) * MXSER_PORTS))
1500 return -EFAULT;
1501 return 0;
1502 case MOXA_ASPP_MON_EXT:{
1503 int status;
1504 int opmode, p;
1505 int shiftbit;
1506 unsigned cflag, iflag;
1507
1508 for (i = 0; i < MXSER_PORTS; i++) {
1509
1510 if (!mxvar_table[i].base)
1511 continue;
1512
1513 status = mxser_get_msr(mxvar_table[i].base, 0, i, &(mxvar_table[i]));
1514 // mxser_check_modem_status(&mxvar_table[i], status);
1515 if (status & UART_MSR_TERI)
1516 mxvar_table[i].icount.rng++;
1517 if (status & UART_MSR_DDSR)
1518 mxvar_table[i].icount.dsr++;
1519 if (status & UART_MSR_DDCD)
1520 mxvar_table[i].icount.dcd++;
1521 if (status & UART_MSR_DCTS)
1522 mxvar_table[i].icount.cts++;
1523
1524 mxvar_table[i].mon_data.modem_status = status;
1525 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1526 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1527 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1528 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1529 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1530 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1531
1532 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1533 cflag = mxvar_table[i].normal_termios.c_cflag;
1534 iflag = mxvar_table[i].normal_termios.c_iflag;
1535 } else {
1536 cflag = mxvar_table[i].tty->termios->c_cflag;
1537 iflag = mxvar_table[i].tty->termios->c_iflag;
1538 }
1539
1540 mon_data_ext.databits[i] = cflag & CSIZE;
1541
1542 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1543
1544 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1545
1546 mon_data_ext.flowctrl[i] = 0x00;
1547
1548 if (cflag & CRTSCTS)
1549 mon_data_ext.flowctrl[i] |= 0x03;
1550
1551 if (iflag & (IXON | IXOFF))
1552 mon_data_ext.flowctrl[i] |= 0x0C;
1553
1554 if (mxvar_table[i].type == PORT_16550A)
1555 mon_data_ext.fifo[i] = 1;
1556 else
1557 mon_data_ext.fifo[i] = 0;
1558
1559 p = i % 4;
1560 shiftbit = p * 2;
1561 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1562 opmode &= OP_MODE_MASK;
1563
1564 mon_data_ext.iftype[i] = opmode;
1565
1566 }
1567 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1568 return -EFAULT;
1569
1570 return 0;
1571
1572 }
1573 default:
1574 return -ENOIOCTLCMD;
1575 }
1576 return 0;
1577 }
1578
1579
1580 static void mxser_stoprx(struct tty_struct *tty)
1581 {
1582 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1583 //unsigned long flags;
1584
1585
1586 info->ldisc_stop_rx = 1;
1587 if (I_IXOFF(tty)) {
1588
1589 //MX_LOCK(&info->slock);
1590 // following add by Victor Yu. 09-02-2002
1591 if (info->IsMoxaMustChipFlag) {
1592 info->IER &= ~MOXA_MUST_RECV_ISR;
1593 outb(info->IER, info->base + UART_IER);
1594 } else {
1595 // above add by Victor Yu. 09-02-2002
1596
1597 info->x_char = STOP_CHAR(tty);
1598 // outb(info->IER, 0); // mask by Victor Yu. 09-02-2002
1599 outb(0, info->base + UART_IER);
1600 info->IER |= UART_IER_THRI;
1601 outb(info->IER, info->base + UART_IER); /* force Tx interrupt */
1602 } // add by Victor Yu. 09-02-2002
1603 //MX_UNLOCK(&info->slock);
1604 }
1605
1606 if (info->tty->termios->c_cflag & CRTSCTS) {
1607 //MX_LOCK(&info->slock);
1608 info->MCR &= ~UART_MCR_RTS;
1609 outb(info->MCR, info->base + UART_MCR);
1610 //MX_UNLOCK(&info->slock);
1611 }
1612 }
1613
1614 static void mxser_startrx(struct tty_struct *tty)
1615 {
1616 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1617 //unsigned long flags;
1618
1619 info->ldisc_stop_rx = 0;
1620 if (I_IXOFF(tty)) {
1621 if (info->x_char)
1622 info->x_char = 0;
1623 else {
1624 //MX_LOCK(&info->slock);
1625
1626 // following add by Victor Yu. 09-02-2002
1627 if (info->IsMoxaMustChipFlag) {
1628 info->IER |= MOXA_MUST_RECV_ISR;
1629 outb(info->IER, info->base + UART_IER);
1630 } else {
1631 // above add by Victor Yu. 09-02-2002
1632
1633 info->x_char = START_CHAR(tty);
1634 // outb(info->IER, 0); // mask by Victor Yu. 09-02-2002
1635 outb(0, info->base + UART_IER); // add by Victor Yu. 09-02-2002
1636 info->IER |= UART_IER_THRI; /* force Tx interrupt */
1637 outb(info->IER, info->base + UART_IER);
1638 } // add by Victor Yu. 09-02-2002
1639 //MX_UNLOCK(&info->slock);
1640 }
1641 }
1642
1643 if (info->tty->termios->c_cflag & CRTSCTS) {
1644 //MX_LOCK(&info->slock);
1645 info->MCR |= UART_MCR_RTS;
1646 outb(info->MCR, info->base + UART_MCR);
1647 //MX_UNLOCK(&info->slock);
1648 }
1649 }
1650
1651 /*
1652 * This routine is called by the upper-layer tty layer to signal that
1653 * incoming characters should be throttled.
1654 */
1655 static void mxser_throttle(struct tty_struct *tty)
1656 {
1657 //struct mxser_struct *info = (struct mxser_struct *)tty->driver_data;
1658 //unsigned long flags;
1659 //MX_LOCK(&info->slock);
1660 mxser_stoprx(tty);
1661 //MX_UNLOCK(&info->slock);
1662 }
1663
1664 static void mxser_unthrottle(struct tty_struct *tty)
1665 {
1666 //struct mxser_struct *info = (struct mxser_struct *)tty->driver_data;
1667 //unsigned long flags;
1668 //MX_LOCK(&info->slock);
1669 mxser_startrx(tty);
1670 //MX_UNLOCK(&info->slock);
1671 }
1672
1673 static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios)
1674 {
1675 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1676 unsigned long flags;
1677
1678 if ((tty->termios->c_cflag != old_termios->c_cflag) || (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
1679
1680 mxser_change_speed(info, old_termios);
1681
1682 if ((old_termios->c_cflag & CRTSCTS) && !(tty->termios->c_cflag & CRTSCTS)) {
1683 tty->hw_stopped = 0;
1684 mxser_start(tty);
1685 }
1686 }
1687
1688 /* Handle sw stopped */
1689 if ((old_termios->c_iflag & IXON) && !(tty->termios->c_iflag & IXON)) {
1690 tty->stopped = 0;
1691
1692 // following add by Victor Yu. 09-02-2002
1693 if (info->IsMoxaMustChipFlag) {
1694 spin_lock_irqsave(&info->slock, flags);
1695 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1696 spin_unlock_irqrestore(&info->slock, flags);
1697 }
1698 // above add by Victor Yu. 09-02-2002
1699
1700 mxser_start(tty);
1701 }
1702 }
1703
1704 /*
1705 * mxser_stop() and mxser_start()
1706 *
1707 * This routines are called before setting or resetting tty->stopped.
1708 * They enable or disable transmitter interrupts, as necessary.
1709 */
1710 static void mxser_stop(struct tty_struct *tty)
1711 {
1712 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1713 unsigned long flags;
1714
1715 spin_lock_irqsave(&info->slock, flags);
1716 if (info->IER & UART_IER_THRI) {
1717 info->IER &= ~UART_IER_THRI;
1718 outb(info->IER, info->base + UART_IER);
1719 }
1720 spin_unlock_irqrestore(&info->slock, flags);
1721 }
1722
1723 static void mxser_start(struct tty_struct *tty)
1724 {
1725 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1726 unsigned long flags;
1727
1728 spin_lock_irqsave(&info->slock, flags);
1729 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1730 info->IER |= UART_IER_THRI;
1731 outb(info->IER, info->base + UART_IER);
1732 }
1733 spin_unlock_irqrestore(&info->slock, flags);
1734 }
1735
1736 /*
1737 * mxser_wait_until_sent() --- wait until the transmitter is empty
1738 */
1739 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1740 {
1741 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1742 unsigned long orig_jiffies, char_time;
1743 int lsr;
1744
1745 if (info->type == PORT_UNKNOWN)
1746 return;
1747
1748 if (info->xmit_fifo_size == 0)
1749 return; /* Just in case.... */
1750
1751 orig_jiffies = jiffies;
1752 /*
1753 * Set the check interval to be 1/5 of the estimated time to
1754 * send a single character, and make it at least 1. The check
1755 * interval should also be less than the timeout.
1756 *
1757 * Note: we have to use pretty tight timings here to satisfy
1758 * the NIST-PCTS.
1759 */
1760 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1761 char_time = char_time / 5;
1762 if (char_time == 0)
1763 char_time = 1;
1764 if (timeout && timeout < char_time)
1765 char_time = timeout;
1766 /*
1767 * If the transmitter hasn't cleared in twice the approximate
1768 * amount of time to send the entire FIFO, it probably won't
1769 * ever clear. This assumes the UART isn't doing flow
1770 * control, which is currently the case. Hence, if it ever
1771 * takes longer than info->timeout, this is probably due to a
1772 * UART bug of some kind. So, we clamp the timeout parameter at
1773 * 2*info->timeout.
1774 */
1775 if (!timeout || timeout > 2 * info->timeout)
1776 timeout = 2 * info->timeout;
1777 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1778 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1779 printk("jiff=%lu...", jiffies);
1780 #endif
1781 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1782 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1783 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1784 #endif
1785 schedule_timeout_interruptible(char_time);
1786 if (signal_pending(current))
1787 break;
1788 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1789 break;
1790 }
1791 set_current_state(TASK_RUNNING);
1792
1793 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1794 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1795 #endif
1796 }
1797
1798
1799 /*
1800 * This routine is called by tty_hangup() when a hangup is signaled.
1801 */
1802 void mxser_hangup(struct tty_struct *tty)
1803 {
1804 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1805
1806 mxser_flush_buffer(tty);
1807 mxser_shutdown(info);
1808 info->event = 0;
1809 info->count = 0;
1810 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1811 info->tty = NULL;
1812 wake_up_interruptible(&info->open_wait);
1813 }
1814
1815
1816 // added by James 03-12-2004.
1817 /*
1818 * mxser_rs_break() --- routine which turns the break handling on or off
1819 */
1820 static void mxser_rs_break(struct tty_struct *tty, int break_state)
1821 {
1822 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1823 unsigned long flags;
1824
1825 spin_lock_irqsave(&info->slock, flags);
1826 if (break_state == -1)
1827 outb(inb(info->base + UART_LCR) | UART_LCR_SBC, info->base + UART_LCR);
1828 else
1829 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC, info->base + UART_LCR);
1830 spin_unlock_irqrestore(&info->slock, flags);
1831 }
1832
1833 // (above) added by James.
1834
1835
1836 /*
1837 * This is the serial driver's generic interrupt routine
1838 */
1839 static irqreturn_t mxser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1840 {
1841 int status, iir, i;
1842 struct mxser_struct *info;
1843 struct mxser_struct *port;
1844 int max, irqbits, bits, msr;
1845 int pass_counter = 0;
1846 int handled = IRQ_NONE;
1847
1848 port = NULL;
1849 //spin_lock(&gm_lock);
1850
1851 for (i = 0; i < MXSER_BOARDS; i++) {
1852 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1853 port = dev_id;
1854 break;
1855 }
1856 }
1857
1858 if (i == MXSER_BOARDS) {
1859 goto irq_stop;
1860 }
1861 if (port == 0) {
1862 goto irq_stop;
1863 }
1864 max = mxser_numports[mxsercfg[i].board_type - 1];
1865 while (1) {
1866 irqbits = inb(port->vector) & port->vectormask;
1867 if (irqbits == port->vectormask) {
1868 break;
1869 }
1870
1871 handled = IRQ_HANDLED;
1872 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
1873 if (irqbits == port->vectormask) {
1874 break;
1875 }
1876 if (bits & irqbits)
1877 continue;
1878 info = port + i;
1879
1880 // following add by Victor Yu. 09-13-2002
1881 iir = inb(info->base + UART_IIR);
1882 if (iir & UART_IIR_NO_INT)
1883 continue;
1884 iir &= MOXA_MUST_IIR_MASK;
1885 if (!info->tty) {
1886 status = inb(info->base + UART_LSR);
1887 outb(0x27, info->base + UART_FCR);
1888 inb(info->base + UART_MSR);
1889 continue;
1890 }
1891 // above add by Victor Yu. 09-13-2002
1892 /*
1893 if ( info->tty->flip.count < TTY_FLIPBUF_SIZE/4 ){
1894 info->IER |= MOXA_MUST_RECV_ISR;
1895 outb(info->IER, info->base + UART_IER);
1896 }
1897 */
1898
1899
1900 /* mask by Victor Yu. 09-13-2002
1901 if ( !info->tty ||
1902 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1903 continue;
1904 */
1905 /* mask by Victor Yu. 09-02-2002
1906 status = inb(info->base + UART_LSR) & info->read_status_mask;
1907 */
1908
1909 // following add by Victor Yu. 09-02-2002
1910 status = inb(info->base + UART_LSR);
1911
1912 if (status & UART_LSR_PE) {
1913 info->err_shadow |= NPPI_NOTIFY_PARITY;
1914 }
1915 if (status & UART_LSR_FE) {
1916 info->err_shadow |= NPPI_NOTIFY_FRAMING;
1917 }
1918 if (status & UART_LSR_OE) {
1919 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1920 }
1921 if (status & UART_LSR_BI)
1922 info->err_shadow |= NPPI_NOTIFY_BREAK;
1923
1924 if (info->IsMoxaMustChipFlag) {
1925 /*
1926 if ( (status & 0x02) && !(status & 0x01) ) {
1927 outb(info->base+UART_FCR, 0x23);
1928 continue;
1929 }
1930 */
1931 if (iir == MOXA_MUST_IIR_GDA || iir == MOXA_MUST_IIR_RDA || iir == MOXA_MUST_IIR_RTO || iir == MOXA_MUST_IIR_LSR)
1932 mxser_receive_chars(info, &status);
1933
1934 } else {
1935 // above add by Victor Yu. 09-02-2002
1936
1937 status &= info->read_status_mask;
1938 if (status & UART_LSR_DR)
1939 mxser_receive_chars(info, &status);
1940 }
1941 msr = inb(info->base + UART_MSR);
1942 if (msr & UART_MSR_ANY_DELTA) {
1943 mxser_check_modem_status(info, msr);
1944 }
1945 // following add by Victor Yu. 09-13-2002
1946 if (info->IsMoxaMustChipFlag) {
1947 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
1948 mxser_transmit_chars(info);
1949 }
1950 } else {
1951 // above add by Victor Yu. 09-13-2002
1952
1953 if (status & UART_LSR_THRE) {
1954 /* 8-2-99 by William
1955 if ( info->x_char || (info->xmit_cnt > 0) )
1956 */
1957 mxser_transmit_chars(info);
1958 }
1959 }
1960 }
1961 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
1962 break; /* Prevent infinite loops */
1963 }
1964 }
1965
1966 irq_stop:
1967 //spin_unlock(&gm_lock);
1968 return handled;
1969 }
1970
1971 static void mxser_receive_chars(struct mxser_struct *info, int *status)
1972 {
1973 struct tty_struct *tty = info->tty;
1974 unsigned char ch, gdl;
1975 int ignored = 0;
1976 int cnt = 0;
1977 int recv_room;
1978 int max = 256;
1979 unsigned long flags;
1980
1981 spin_lock_irqsave(&info->slock, flags);
1982
1983 recv_room = tty->ldisc.receive_room(tty);
1984 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
1985 //mxser_throttle(tty);
1986 mxser_stoprx(tty);
1987 //return;
1988 }
1989
1990 // following add by Victor Yu. 09-02-2002
1991 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
1992
1993 if (*status & UART_LSR_SPECIAL) {
1994 goto intr_old;
1995 }
1996 // following add by Victor Yu. 02-11-2004
1997 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID && (*status & MOXA_MUST_LSR_RERR))
1998 goto intr_old;
1999 // above add by Victor Yu. 02-14-2004
2000 if (*status & MOXA_MUST_LSR_RERR)
2001 goto intr_old;
2002
2003 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2004
2005 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID) // add by Victor Yu. 02-11-2004
2006 gdl &= MOXA_MUST_GDL_MASK;
2007 if (gdl >= recv_room) {
2008 if (!info->ldisc_stop_rx) {
2009 //mxser_throttle(tty);
2010 mxser_stoprx(tty);
2011 }
2012 //return;
2013 }
2014 while (gdl--) {
2015 ch = inb(info->base + UART_RX);
2016 tty_insert_flip_char(tty, ch, 0);
2017 cnt++;
2018 /*
2019 if((cnt>=HI_WATER) && (info->stop_rx==0)){
2020 mxser_stoprx(tty);
2021 info->stop_rx=1;
2022 break;
2023 } */
2024 }
2025 goto end_intr;
2026 }
2027 intr_old:
2028 // above add by Victor Yu. 09-02-2002
2029
2030 do {
2031 if (max-- < 0)
2032 break;
2033 /*
2034 if((cnt>=HI_WATER) && (info->stop_rx==0)){
2035 mxser_stoprx(tty);
2036 info->stop_rx=1;
2037 break;
2038 }
2039 */
2040
2041 ch = inb(info->base + UART_RX);
2042 // following add by Victor Yu. 09-02-2002
2043 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2044 outb(0x23, info->base + UART_FCR);
2045 *status &= info->read_status_mask;
2046 // above add by Victor Yu. 09-02-2002
2047 if (*status & info->ignore_status_mask) {
2048 if (++ignored > 100)
2049 break;
2050 } else {
2051 char flag = 0;
2052 if (*status & UART_LSR_SPECIAL) {
2053 if (*status & UART_LSR_BI) {
2054 flag = TTY_BREAK;
2055 /* added by casper 1/11/2000 */
2056 info->icount.brk++;
2057 /* */
2058 if (info->flags & ASYNC_SAK)
2059 do_SAK(tty);
2060 } else if (*status & UART_LSR_PE) {
2061 flag = TTY_PARITY;
2062 /* added by casper 1/11/2000 */
2063 info->icount.parity++;
2064 /* */
2065 } else if (*status & UART_LSR_FE) {
2066 flag = TTY_FRAME;
2067 /* added by casper 1/11/2000 */
2068 info->icount.frame++;
2069 /* */
2070 } else if (*status & UART_LSR_OE) {
2071 flag = TTY_OVERRUN;
2072 /* added by casper 1/11/2000 */
2073 info->icount.overrun++;
2074 /* */
2075 }
2076 }
2077 tty_insert_flip_char(tty, ch, flag);
2078 cnt++;
2079 if (cnt >= recv_room) {
2080 if (!info->ldisc_stop_rx) {
2081 //mxser_throttle(tty);
2082 mxser_stoprx(tty);
2083 }
2084 break;
2085 }
2086
2087 }
2088
2089 // following add by Victor Yu. 09-02-2002
2090 if (info->IsMoxaMustChipFlag)
2091 break;
2092 // above add by Victor Yu. 09-02-2002
2093
2094 /* mask by Victor Yu. 09-02-2002
2095 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2096 */
2097 // following add by Victor Yu. 09-02-2002
2098 *status = inb(info->base + UART_LSR);
2099 // above add by Victor Yu. 09-02-2002
2100 } while (*status & UART_LSR_DR);
2101
2102 end_intr: // add by Victor Yu. 09-02-2002
2103
2104 mxvar_log.rxcnt[info->port] += cnt;
2105 info->mon_data.rxcnt += cnt;
2106 info->mon_data.up_rxcnt += cnt;
2107 spin_unlock_irqrestore(&info->slock, flags);
2108
2109 tty_flip_buffer_push(tty);
2110 }
2111
2112 static void mxser_transmit_chars(struct mxser_struct *info)
2113 {
2114 int count, cnt;
2115 unsigned long flags;
2116
2117 spin_lock_irqsave(&info->slock, flags);
2118
2119 if (info->x_char) {
2120 outb(info->x_char, info->base + UART_TX);
2121 info->x_char = 0;
2122 mxvar_log.txcnt[info->port]++;
2123 info->mon_data.txcnt++;
2124 info->mon_data.up_txcnt++;
2125
2126 /* added by casper 1/11/2000 */
2127 info->icount.tx++;
2128 /* */
2129 spin_unlock_irqrestore(&info->slock, flags);
2130 return;
2131 }
2132
2133 if (info->xmit_buf == 0) {
2134 spin_unlock_irqrestore(&info->slock, flags);
2135 return;
2136 }
2137
2138 if ((info->xmit_cnt <= 0) || info->tty->stopped || (info->tty->hw_stopped && (info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag))) {
2139 info->IER &= ~UART_IER_THRI;
2140 outb(info->IER, info->base + UART_IER);
2141 spin_unlock_irqrestore(&info->slock, flags);
2142 return;
2143 }
2144
2145 cnt = info->xmit_cnt;
2146 count = info->xmit_fifo_size;
2147 do {
2148 outb(info->xmit_buf[info->xmit_tail++], info->base + UART_TX);
2149 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2150 if (--info->xmit_cnt <= 0)
2151 break;
2152 } while (--count > 0);
2153 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2154
2155 // added by James 03-12-2004.
2156 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2157 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
2158 // (above) added by James.
2159
2160 /* added by casper 1/11/2000 */
2161 info->icount.tx += (cnt - info->xmit_cnt);
2162 /* */
2163
2164 if (info->xmit_cnt < WAKEUP_CHARS) {
2165 set_bit(MXSER_EVENT_TXLOW, &info->event);
2166 schedule_work(&info->tqueue);
2167 }
2168 if (info->xmit_cnt <= 0) {
2169 info->IER &= ~UART_IER_THRI;
2170 outb(info->IER, info->base + UART_IER);
2171 }
2172 spin_unlock_irqrestore(&info->slock, flags);
2173 }
2174
2175 static void mxser_check_modem_status(struct mxser_struct *info, int status)
2176 {
2177 /* update input line counters */
2178 if (status & UART_MSR_TERI)
2179 info->icount.rng++;
2180 if (status & UART_MSR_DDSR)
2181 info->icount.dsr++;
2182 if (status & UART_MSR_DDCD)
2183 info->icount.dcd++;
2184 if (status & UART_MSR_DCTS)
2185 info->icount.cts++;
2186 info->mon_data.modem_status = status;
2187 wake_up_interruptible(&info->delta_msr_wait);
2188
2189
2190 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2191 if (status & UART_MSR_DCD)
2192 wake_up_interruptible(&info->open_wait);
2193 schedule_work(&info->tqueue);
2194 }
2195
2196 if (info->flags & ASYNC_CTS_FLOW) {
2197 if (info->tty->hw_stopped) {
2198 if (status & UART_MSR_CTS) {
2199 info->tty->hw_stopped = 0;
2200
2201 if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
2202 info->IER |= UART_IER_THRI;
2203 outb(info->IER, info->base + UART_IER);
2204 }
2205 set_bit(MXSER_EVENT_TXLOW, &info->event);
2206 schedule_work(&info->tqueue); }
2207 } else {
2208 if (!(status & UART_MSR_CTS)) {
2209 info->tty->hw_stopped = 1;
2210 if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
2211 info->IER &= ~UART_IER_THRI;
2212 outb(info->IER, info->base + UART_IER);
2213 }
2214 }
2215 }
2216 }
2217 }
2218
2219 static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2220 {
2221 DECLARE_WAITQUEUE(wait, current);
2222 int retval;
2223 int do_clocal = 0;
2224 unsigned long flags;
2225
2226 /*
2227 * If non-blocking mode is set, or the port is not enabled,
2228 * then make the check up front and then exit.
2229 */
2230 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2231 info->flags |= ASYNC_NORMAL_ACTIVE;
2232 return (0);
2233 }
2234
2235 if (tty->termios->c_cflag & CLOCAL)
2236 do_clocal = 1;
2237
2238 /*
2239 * Block waiting for the carrier detect and the line to become
2240 * free (i.e., not in use by the callout). While we are in
2241 * this loop, info->count is dropped by one, so that
2242 * mxser_close() knows when to free things. We restore it upon
2243 * exit, either normal or abnormal.
2244 */
2245 retval = 0;
2246 add_wait_queue(&info->open_wait, &wait);
2247
2248 spin_lock_irqsave(&info->slock, flags);
2249 if (!tty_hung_up_p(filp))
2250 info->count--;
2251 spin_unlock_irqrestore(&info->slock, flags);
2252 info->blocked_open++;
2253 while (1) {
2254 spin_lock_irqsave(&info->slock, flags);
2255 outb(inb(info->base + UART_MCR) | UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
2256 spin_unlock_irqrestore(&info->slock, flags);
2257 set_current_state(TASK_INTERRUPTIBLE);
2258 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2259 if (info->flags & ASYNC_HUP_NOTIFY)
2260 retval = -EAGAIN;
2261 else
2262 retval = -ERESTARTSYS;
2263 break;
2264 }
2265 if (!(info->flags & ASYNC_CLOSING) && (do_clocal || (inb(info->base + UART_MSR) & UART_MSR_DCD)))
2266 break;
2267 if (signal_pending(current)) {
2268 retval = -ERESTARTSYS;
2269 break;
2270 }
2271 schedule();
2272 }
2273 set_current_state(TASK_RUNNING);
2274 remove_wait_queue(&info->open_wait, &wait);
2275 if (!tty_hung_up_p(filp))
2276 info->count++;
2277 info->blocked_open--;
2278 if (retval)
2279 return (retval);
2280 info->flags |= ASYNC_NORMAL_ACTIVE;
2281 return (0);
2282 }
2283
2284 static int mxser_startup(struct mxser_struct *info)
2285 {
2286
2287 unsigned long page;
2288 unsigned long flags;
2289
2290 page = __get_free_page(GFP_KERNEL);
2291 if (!page)
2292 return (-ENOMEM);
2293
2294 spin_lock_irqsave(&info->slock, flags);
2295
2296 if (info->flags & ASYNC_INITIALIZED) {
2297 free_page(page);
2298 spin_unlock_irqrestore(&info->slock, flags);
2299 return (0);
2300 }
2301
2302 if (!info->base || !info->type) {
2303 if (info->tty)
2304 set_bit(TTY_IO_ERROR, &info->tty->flags);
2305 free_page(page);
2306 spin_unlock_irqrestore(&info->slock, flags);
2307 return (0);
2308 }
2309 if (info->xmit_buf)
2310 free_page(page);
2311 else
2312 info->xmit_buf = (unsigned char *) page;
2313
2314 /*
2315 * Clear the FIFO buffers and disable them
2316 * (they will be reenabled in mxser_change_speed())
2317 */
2318 if (info->IsMoxaMustChipFlag)
2319 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
2320 else
2321 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), info->base + UART_FCR);
2322
2323 /*
2324 * At this point there's no way the LSR could still be 0xFF;
2325 * if it is, then bail out, because there's likely no UART
2326 * here.
2327 */
2328 if (inb(info->base + UART_LSR) == 0xff) {
2329 spin_unlock_irqrestore(&info->slock, flags);
2330 if (capable(CAP_SYS_ADMIN)) {
2331 if (info->tty)
2332 set_bit(TTY_IO_ERROR, &info->tty->flags);
2333 return (0);
2334 } else
2335 return (-ENODEV);
2336 }
2337
2338 /*
2339 * Clear the interrupt registers.
2340 */
2341 (void) inb(info->base + UART_LSR);
2342 (void) inb(info->base + UART_RX);
2343 (void) inb(info->base + UART_IIR);
2344 (void) inb(info->base + UART_MSR);
2345
2346 /*
2347 * Now, initialize the UART
2348 */
2349 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2350 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2351 outb(info->MCR, info->base + UART_MCR);
2352
2353 /*
2354 * Finally, enable interrupts
2355 */
2356 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
2357 // info->IER = UART_IER_RLSI | UART_IER_RDI;
2358
2359 // following add by Victor Yu. 08-30-2002
2360 if (info->IsMoxaMustChipFlag)
2361 info->IER |= MOXA_MUST_IER_EGDAI;
2362 // above add by Victor Yu. 08-30-2002
2363 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2364
2365 /*
2366 * And clear the interrupt registers again for luck.
2367 */
2368 (void) inb(info->base + UART_LSR);
2369 (void) inb(info->base + UART_RX);
2370 (void) inb(info->base + UART_IIR);
2371 (void) inb(info->base + UART_MSR);
2372
2373 if (info->tty)
2374 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2375 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2376
2377 /*
2378 * and set the speed of the serial port
2379 */
2380 spin_unlock_irqrestore(&info->slock, flags);
2381 mxser_change_speed(info, NULL);
2382
2383 info->flags |= ASYNC_INITIALIZED;
2384 return (0);
2385 }
2386
2387 /*
2388 * This routine will shutdown a serial port; interrupts maybe disabled, and
2389 * DTR is dropped if the hangup on close termio flag is on.
2390 */
2391 static void mxser_shutdown(struct mxser_struct *info)
2392 {
2393 unsigned long flags;
2394
2395 if (!(info->flags & ASYNC_INITIALIZED))
2396 return;
2397
2398 spin_lock_irqsave(&info->slock, flags);
2399
2400 /*
2401 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2402 * here so the queue might never be waken up
2403 */
2404 wake_up_interruptible(&info->delta_msr_wait);
2405
2406 /*
2407 * Free the IRQ, if necessary
2408 */
2409 if (info->xmit_buf) {
2410 free_page((unsigned long) info->xmit_buf);
2411 info->xmit_buf = NULL;
2412 }
2413
2414 info->IER = 0;
2415 outb(0x00, info->base + UART_IER);
2416
2417 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2418 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2419 outb(info->MCR, info->base + UART_MCR);
2420
2421 /* clear Rx/Tx FIFO's */
2422 // following add by Victor Yu. 08-30-2002
2423 if (info->IsMoxaMustChipFlag)
2424 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
2425 else
2426 // above add by Victor Yu. 08-30-2002
2427 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), info->base + UART_FCR);
2428
2429 /* read data port to reset things */
2430 (void) inb(info->base + UART_RX);
2431
2432 if (info->tty)
2433 set_bit(TTY_IO_ERROR, &info->tty->flags);
2434
2435 info->flags &= ~ASYNC_INITIALIZED;
2436
2437 // following add by Victor Yu. 09-23-2002
2438 if (info->IsMoxaMustChipFlag) {
2439 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
2440 }
2441 // above add by Victor Yu. 09-23-2002
2442
2443 spin_unlock_irqrestore(&info->slock, flags);
2444 }
2445
2446 /*
2447 * This routine is called to set the UART divisor registers to match
2448 * the specified baud rate for a serial port.
2449 */
2450 static int mxser_change_speed(struct mxser_struct *info, struct termios *old_termios)
2451 {
2452 unsigned cflag, cval, fcr;
2453 int ret = 0;
2454 unsigned char status;
2455 long baud;
2456 unsigned long flags;
2457
2458
2459 if (!info->tty || !info->tty->termios)
2460 return ret;
2461 cflag = info->tty->termios->c_cflag;
2462 if (!(info->base))
2463 return ret;
2464
2465
2466 #ifndef B921600
2467 #define B921600 (B460800 +1)
2468 #endif
2469 if (mxser_set_baud_method[info->port] == 0) {
2470 switch (cflag & (CBAUD | CBAUDEX)) {
2471 case B921600:
2472 baud = 921600;
2473 break;
2474 case B460800:
2475 baud = 460800;
2476 break;
2477 case B230400:
2478 baud = 230400;
2479 break;
2480 case B115200:
2481 baud = 115200;
2482 break;
2483 case B57600:
2484 baud = 57600;
2485 break;
2486 case B38400:
2487 baud = 38400;
2488 break;
2489 case B19200:
2490 baud = 19200;
2491 break;
2492 case B9600:
2493 baud = 9600;
2494 break;
2495 case B4800:
2496 baud = 4800;
2497 break;
2498 case B2400:
2499 baud = 2400;
2500 break;
2501 case B1800:
2502 baud = 1800;
2503 break;
2504 case B1200:
2505 baud = 1200;
2506 break;
2507 case B600:
2508 baud = 600;
2509 break;
2510 case B300:
2511 baud = 300;
2512 break;
2513 case B200:
2514 baud = 200;
2515 break;
2516 case B150:
2517 baud = 150;
2518 break;
2519 case B134:
2520 baud = 134;
2521 break;
2522 case B110:
2523 baud = 110;
2524 break;
2525 case B75:
2526 baud = 75;
2527 break;
2528 case B50:
2529 baud = 50;
2530 break;
2531 default:
2532 baud = 0;
2533 break;
2534 }
2535 mxser_set_baud(info, baud);
2536 }
2537
2538 /* byte size and parity */
2539 switch (cflag & CSIZE) {
2540 case CS5:
2541 cval = 0x00;
2542 break;
2543 case CS6:
2544 cval = 0x01;
2545 break;
2546 case CS7:
2547 cval = 0x02;
2548 break;
2549 case CS8:
2550 cval = 0x03;
2551 break;
2552 default:
2553 cval = 0x00;
2554 break; /* too keep GCC shut... */
2555 }
2556 if (cflag & CSTOPB)
2557 cval |= 0x04;
2558 if (cflag & PARENB)
2559 cval |= UART_LCR_PARITY;
2560 if (!(cflag & PARODD)) {
2561 cval |= UART_LCR_EPAR;
2562 }
2563 if (cflag & CMSPAR)
2564 cval |= UART_LCR_SPAR;
2565
2566 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2567 if (info->IsMoxaMustChipFlag) {
2568 fcr = UART_FCR_ENABLE_FIFO;
2569 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2570 SET_MOXA_MUST_FIFO_VALUE(info);
2571 } else
2572 fcr = 0;
2573 } else {
2574 fcr = UART_FCR_ENABLE_FIFO;
2575 // following add by Victor Yu. 08-30-2002
2576 if (info->IsMoxaMustChipFlag) {
2577 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2578 SET_MOXA_MUST_FIFO_VALUE(info);
2579 } else {
2580 // above add by Victor Yu. 08-30-2002
2581
2582 switch (info->rx_trigger) {
2583 case 1:
2584 fcr |= UART_FCR_TRIGGER_1;
2585 break;
2586 case 4:
2587 fcr |= UART_FCR_TRIGGER_4;
2588 break;
2589 case 8:
2590 fcr |= UART_FCR_TRIGGER_8;
2591 break;
2592 default:
2593 fcr |= UART_FCR_TRIGGER_14;
2594 break;
2595 }
2596 }
2597 }
2598
2599 /* CTS flow control flag and modem status interrupts */
2600 info->IER &= ~UART_IER_MSI;
2601 info->MCR &= ~UART_MCR_AFE;
2602 if (cflag & CRTSCTS) {
2603 info->flags |= ASYNC_CTS_FLOW;
2604 info->IER |= UART_IER_MSI;
2605 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2606 info->MCR |= UART_MCR_AFE;
2607 //status = mxser_get_msr(info->base, 0, info->port);
2608 /* save_flags(flags);
2609 cli();
2610 status = inb(baseaddr + UART_MSR);
2611 restore_flags(flags);*/
2612 //mxser_check_modem_status(info, status);
2613 } else {
2614 //status = mxser_get_msr(info->base, 0, info->port);
2615
2616 //MX_LOCK(&info->slock);
2617 status = inb(info->base + UART_MSR);
2618 //MX_UNLOCK(&info->slock);
2619 if (info->tty->hw_stopped) {
2620 if (status & UART_MSR_CTS) {
2621 info->tty->hw_stopped = 0;
2622 if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
2623 info->IER |= UART_IER_THRI;
2624 outb(info->IER, info->base + UART_IER);
2625 }
2626 set_bit(MXSER_EVENT_TXLOW, &info->event);
2627 schedule_work(&info->tqueue); }
2628 } else {
2629 if (!(status & UART_MSR_CTS)) {
2630 info->tty->hw_stopped = 1;
2631 if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
2632 info->IER &= ~UART_IER_THRI;
2633 outb(info->IER, info->base + UART_IER);
2634 }
2635 }
2636 }
2637 }
2638 } else {
2639 info->flags &= ~ASYNC_CTS_FLOW;
2640 }
2641 outb(info->MCR, info->base + UART_MCR);
2642 if (cflag & CLOCAL) {
2643 info->flags &= ~ASYNC_CHECK_CD;
2644 } else {
2645 info->flags |= ASYNC_CHECK_CD;
2646 info->IER |= UART_IER_MSI;
2647 }
2648 outb(info->IER, info->base + UART_IER);
2649
2650 /*
2651 * Set up parity check flag
2652 */
2653 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2654 if (I_INPCK(info->tty))
2655 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2656 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2657 info->read_status_mask |= UART_LSR_BI;
2658
2659 info->ignore_status_mask = 0;
2660
2661 if (I_IGNBRK(info->tty)) {
2662 info->ignore_status_mask |= UART_LSR_BI;
2663 info->read_status_mask |= UART_LSR_BI;
2664 /*
2665 * If we're ignore parity and break indicators, ignore
2666 * overruns too. (For real raw support).
2667 */
2668 if (I_IGNPAR(info->tty)) {
2669 info->ignore_status_mask |= UART_LSR_OE | UART_LSR_PE | UART_LSR_FE;
2670 info->read_status_mask |= UART_LSR_OE | UART_LSR_PE | UART_LSR_FE;
2671 }
2672 }
2673 // following add by Victor Yu. 09-02-2002
2674 if (info->IsMoxaMustChipFlag) {
2675 spin_lock_irqsave(&info->slock, flags);
2676 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2677 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2678 if (I_IXON(info->tty)) {
2679 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2680 } else {
2681 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2682 }
2683 if (I_IXOFF(info->tty)) {
2684 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2685 } else {
2686 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2687 }
2688 /*
2689 if ( I_IXANY(info->tty) ) {
2690 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2691 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2692 } else {
2693 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2694 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2695 }
2696 */
2697 spin_unlock_irqrestore(&info->slock, flags);
2698 }
2699 // above add by Victor Yu. 09-02-2002
2700
2701
2702 outb(fcr, info->base + UART_FCR); /* set fcr */
2703 outb(cval, info->base + UART_LCR);
2704
2705 return ret;
2706 }
2707
2708
2709 static int mxser_set_baud(struct mxser_struct *info, long newspd)
2710 {
2711 int quot = 0;
2712 unsigned char cval;
2713 int ret = 0;
2714 unsigned long flags;
2715
2716 if (!info->tty || !info->tty->termios)
2717 return ret;
2718
2719 if (!(info->base))
2720 return ret;
2721
2722 if (newspd > info->MaxCanSetBaudRate)
2723 return 0;
2724
2725 info->realbaud = newspd;
2726 if (newspd == 134) {
2727 quot = (2 * info->baud_base / 269);
2728 } else if (newspd) {
2729 quot = info->baud_base / newspd;
2730
2731 if (quot == 0)
2732 quot = 1;
2733
2734 } else {
2735 quot = 0;
2736 }
2737
2738 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2739 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2740
2741 if (quot) {
2742 spin_lock_irqsave(&info->slock, flags);
2743 info->MCR |= UART_MCR_DTR;
2744 outb(info->MCR, info->base + UART_MCR);
2745 spin_unlock_irqrestore(&info->slock, flags);
2746 } else {
2747 spin_lock_irqsave(&info->slock, flags);
2748 info->MCR &= ~UART_MCR_DTR;
2749 outb(info->MCR, info->base + UART_MCR);
2750 spin_unlock_irqrestore(&info->slock, flags);
2751 return ret;
2752 }
2753
2754 cval = inb(info->base + UART_LCR);
2755
2756 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2757
2758 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2759 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2760 outb(cval, info->base + UART_LCR); /* reset DLAB */
2761
2762
2763 return ret;
2764 }
2765
2766
2767
2768 /*
2769 * ------------------------------------------------------------
2770 * friends of mxser_ioctl()
2771 * ------------------------------------------------------------
2772 */
2773 static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2774 {
2775 struct serial_struct tmp;
2776
2777 if (!retinfo)
2778 return (-EFAULT);
2779 memset(&tmp, 0, sizeof(tmp));
2780 tmp.type = info->type;
2781 tmp.line = info->port;
2782 tmp.port = info->base;
2783 tmp.irq = info->irq;
2784 tmp.flags = info->flags;
2785 tmp.baud_base = info->baud_base;
2786 tmp.close_delay = info->close_delay;
2787 tmp.closing_wait = info->closing_wait;
2788 tmp.custom_divisor = info->custom_divisor;
2789 tmp.hub6 = 0;
2790 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2791 return -EFAULT;
2792 return (0);
2793 }
2794
2795 static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2796 {
2797 struct serial_struct new_serial;
2798 unsigned int flags;
2799 int retval = 0;
2800
2801 if (!new_info || !info->base)
2802 return (-EFAULT);
2803 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2804 return -EFAULT;
2805
2806 if ((new_serial.irq != info->irq) || (new_serial.port != info->base) || (new_serial.custom_divisor != info->custom_divisor) || (new_serial.baud_base != info->baud_base))
2807 return (-EPERM);
2808
2809 flags = info->flags & ASYNC_SPD_MASK;
2810
2811 if (!capable(CAP_SYS_ADMIN)) {
2812 if ((new_serial.baud_base != info->baud_base) || (new_serial.close_delay != info->close_delay) || ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2813 return (-EPERM);
2814 info->flags = ((info->flags & ~ASYNC_USR_MASK) | (new_serial.flags & ASYNC_USR_MASK));
2815 } else {
2816 /*
2817 * OK, past this point, all the error checking has been done.
2818 * At this point, we start making changes.....
2819 */
2820 info->flags = ((info->flags & ~ASYNC_FLAGS) | (new_serial.flags & ASYNC_FLAGS));
2821 info->close_delay = new_serial.close_delay * HZ / 100;
2822 info->closing_wait = new_serial.closing_wait * HZ / 100;
2823 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2824 info->tty->low_latency = 0; //(info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2825 }
2826
2827 /* added by casper, 3/17/2000, for mouse */
2828 info->type = new_serial.type;
2829
2830 process_txrx_fifo(info);
2831
2832 /* */
2833 if (info->flags & ASYNC_INITIALIZED) {
2834 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2835 mxser_change_speed(info, NULL);
2836 }
2837 } else {
2838 retval = mxser_startup(info);
2839 }
2840 return (retval);
2841 }
2842
2843 /*
2844 * mxser_get_lsr_info - get line status register info
2845 *
2846 * Purpose: Let user call ioctl() to get info when the UART physically
2847 * is emptied. On bus types like RS485, the transmitter must
2848 * release the bus after transmitting. This must be done when
2849 * the transmit shift register is empty, not be done when the
2850 * transmit holding register is empty. This functionality
2851 * allows an RS485 driver to be written in user space.
2852 */
2853 static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2854 {
2855 unsigned char status;
2856 unsigned int result;
2857 unsigned long flags;
2858
2859 spin_lock_irqsave(&info->slock, flags);
2860 status = inb(info->base + UART_LSR);
2861 spin_unlock_irqrestore(&info->slock, flags);
2862 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2863 return put_user(result, value);
2864 }
2865
2866 /*
2867 * This routine sends a break character out the serial port.
2868 */
2869 static void mxser_send_break(struct mxser_struct *info, int duration)
2870 {
2871 unsigned long flags;
2872
2873 if (!info->base)
2874 return;
2875 set_current_state(TASK_INTERRUPTIBLE);
2876 spin_lock_irqsave(&info->slock, flags);
2877 outb(inb(info->base + UART_LCR) | UART_LCR_SBC, info->base + UART_LCR);
2878 spin_unlock_irqrestore(&info->slock, flags);
2879 schedule_timeout(duration);
2880 spin_lock_irqsave(&info->slock, flags);
2881 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC, info->base + UART_LCR);
2882 spin_unlock_irqrestore(&info->slock, flags);
2883 }
2884
2885 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2886 {
2887 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
2888 unsigned char control, status;
2889 unsigned long flags;
2890
2891
2892 if (tty->index == MXSER_PORTS)
2893 return (-ENOIOCTLCMD);
2894 if (tty->flags & (1 << TTY_IO_ERROR))
2895 return (-EIO);
2896
2897 control = info->MCR;
2898
2899 spin_lock_irqsave(&info->slock, flags);
2900 status = inb(info->base + UART_MSR);
2901 if (status & UART_MSR_ANY_DELTA)
2902 mxser_check_modem_status(info, status);
2903 spin_unlock_irqrestore(&info->slock, flags);
2904 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
2905 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
2906 }
2907
2908 static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
2909 {
2910 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
2911 unsigned long flags;
2912
2913
2914 if (tty->index == MXSER_PORTS)
2915 return -ENOIOCTLCMD;
2916 if (tty->flags & (1 << TTY_IO_ERROR))
2917 return -EIO;
2918
2919 spin_lock_irqsave(&info->slock, flags);
2920
2921 if (set & TIOCM_RTS)
2922 info->MCR |= UART_MCR_RTS;
2923 if (set & TIOCM_DTR)
2924 info->MCR |= UART_MCR_DTR;
2925
2926 if (clear & TIOCM_RTS)
2927 info->MCR &= ~UART_MCR_RTS;
2928 if (clear & TIOCM_DTR)
2929 info->MCR &= ~UART_MCR_DTR;
2930
2931 outb(info->MCR, info->base + UART_MCR);
2932 spin_unlock_irqrestore(&info->slock, flags);
2933 return 0;
2934 }
2935
2936
2937 static int mxser_read_register(int, unsigned short *);
2938 static int mxser_program_mode(int);
2939 static void mxser_normal_mode(int);
2940
2941 static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
2942 {
2943 int id, i, bits;
2944 unsigned short regs[16], irq;
2945 unsigned char scratch, scratch2;
2946
2947 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
2948
2949 id = mxser_read_register(cap, regs);
2950 if (id == C168_ASIC_ID) {
2951 hwconf->board_type = MXSER_BOARD_C168_ISA;
2952 hwconf->ports = 8;
2953 } else if (id == C104_ASIC_ID) {
2954 hwconf->board_type = MXSER_BOARD_C104_ISA;
2955 hwconf->ports = 4;
2956 } else if (id == C102_ASIC_ID) {
2957 hwconf->board_type = MXSER_BOARD_C102_ISA;
2958 hwconf->ports = 2;
2959 } else if (id == CI132_ASIC_ID) {
2960 hwconf->board_type = MXSER_BOARD_CI132;
2961 hwconf->ports = 2;
2962 } else if (id == CI134_ASIC_ID) {
2963 hwconf->board_type = MXSER_BOARD_CI134;
2964 hwconf->ports = 4;
2965 } else if (id == CI104J_ASIC_ID) {
2966 hwconf->board_type = MXSER_BOARD_CI104J;
2967 hwconf->ports = 4;
2968 } else
2969 return (0);
2970
2971 irq = 0;
2972 if (hwconf->ports == 2) {
2973 irq = regs[9] & 0xF000;
2974 irq = irq | (irq >> 4);
2975 if (irq != (regs[9] & 0xFF00))
2976 return (MXSER_ERR_IRQ_CONFLIT);
2977 } else if (hwconf->ports == 4) {
2978 irq = regs[9] & 0xF000;
2979 irq = irq | (irq >> 4);
2980 irq = irq | (irq >> 8);
2981 if (irq != regs[9])
2982 return (MXSER_ERR_IRQ_CONFLIT);
2983 } else if (hwconf->ports == 8) {
2984 irq = regs[9] & 0xF000;
2985 irq = irq | (irq >> 4);
2986 irq = irq | (irq >> 8);
2987 if ((irq != regs[9]) || (irq != regs[10]))
2988 return (MXSER_ERR_IRQ_CONFLIT);
2989 }
2990
2991 if (!irq) {
2992 return (MXSER_ERR_IRQ);
2993 }
2994 hwconf->irq = ((int) (irq & 0xF000) >> 12);
2995 for (i = 0; i < 8; i++)
2996 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
2997 if ((regs[12] & 0x80) == 0) {
2998 return (MXSER_ERR_VECTOR);
2999 }
3000 hwconf->vector = (int) regs[11]; /* interrupt vector */
3001 if (id == 1)
3002 hwconf->vector_mask = 0x00FF;
3003 else
3004 hwconf->vector_mask = 0x000F;
3005 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
3006 if (regs[12] & bits) {
3007 hwconf->baud_base[i] = 921600;
3008 hwconf->MaxCanSetBaudRate[i] = 921600; // add by Victor Yu. 09-04-2002
3009 } else {
3010 hwconf->baud_base[i] = 115200;
3011 hwconf->MaxCanSetBaudRate[i] = 115200; // add by Victor Yu. 09-04-2002
3012 }
3013 }
3014 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3015 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3016 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3017 outb(scratch2, cap + UART_LCR);
3018 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3019 scratch = inb(cap + UART_IIR);
3020
3021 if (scratch & 0xC0)
3022 hwconf->uart_type = PORT_16550A;
3023 else
3024 hwconf->uart_type = PORT_16450;
3025 if (id == 1)
3026 hwconf->ports = 8;
3027 else
3028 hwconf->ports = 4;
3029 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3030 request_region(hwconf->vector, 1, "mxser(vector)");
3031 return (hwconf->ports);
3032 }
3033
3034 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3035 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3036 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3037 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3038 #define EN_CCMD 0x000 /* Chip's command register */
3039 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3040 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3041 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3042 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3043 #define EN0_DCFG 0x00E /* Data configuration reg WR */
3044 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3045 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3046 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3047 static int mxser_read_register(int port, unsigned short *regs)
3048 {
3049 int i, k, value, id;
3050 unsigned int j;
3051
3052 id = mxser_program_mode(port);
3053 if (id < 0)
3054 return (id);
3055 for (i = 0; i < 14; i++) {
3056 k = (i & 0x3F) | 0x180;
3057 for (j = 0x100; j > 0; j >>= 1) {
3058 outb(CHIP_CS, port);
3059 if (k & j) {
3060 outb(CHIP_CS | CHIP_DO, port);
3061 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3062 } else {
3063 outb(CHIP_CS, port);
3064 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3065 }
3066 }
3067 (void) inb(port);
3068 value = 0;
3069 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3070 outb(CHIP_CS, port);
3071 outb(CHIP_CS | CHIP_SK, port);
3072 if (inb(port) & CHIP_DI)
3073 value |= j;
3074 }
3075 regs[i] = value;
3076 outb(0, port);
3077 }
3078 mxser_normal_mode(port);
3079 return (id);
3080 }
3081
3082 static int mxser_program_mode(int port)
3083 {
3084 int id, i, j, n;
3085 //unsigned long flags;
3086
3087 spin_lock(&gm_lock);
3088 outb(0, port);
3089 outb(0, port);
3090 outb(0, port);
3091 (void) inb(port);
3092 (void) inb(port);
3093 outb(0, port);
3094 (void) inb(port);
3095 //restore_flags(flags);
3096 spin_unlock(&gm_lock);
3097
3098 id = inb(port + 1) & 0x1F;
3099 if ((id != C168_ASIC_ID) && (id != C104_ASIC_ID) && (id != C102_ASIC_ID) && (id != CI132_ASIC_ID) && (id != CI134_ASIC_ID) && (id != CI104J_ASIC_ID))
3100 return (-1);
3101 for (i = 0, j = 0; i < 4; i++) {
3102 n = inb(port + 2);
3103 if (n == 'M') {
3104 j = 1;
3105 } else if ((j == 1) && (n == 1)) {
3106 j = 2;
3107 break;
3108 } else
3109 j = 0;
3110 }
3111 if (j != 2)
3112 id = -2;
3113 return (id);
3114 }
3115
3116 static void mxser_normal_mode(int port)
3117 {
3118 int i, n;
3119
3120 outb(0xA5, port + 1);
3121 outb(0x80, port + 3);
3122 outb(12, port + 0); /* 9600 bps */
3123 outb(0, port + 1);
3124 outb(0x03, port + 3); /* 8 data bits */
3125 outb(0x13, port + 4); /* loop back mode */
3126 for (i = 0; i < 16; i++) {
3127 n = inb(port + 5);
3128 if ((n & 0x61) == 0x60)
3129 break;
3130 if ((n & 1) == 1)
3131 (void) inb(port);
3132 }
3133 outb(0x00, port + 4);
3134 }
3135
3136 module_init(mxser_module_init);
3137 module_exit(mxser_module_exit);