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[mirror_ubuntu-jammy-kernel.git] / drivers / char / mxser.c
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
19 * - Fixed x86_64 cleanness
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/serial_reg.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/gfp.h>
37 #include <linux/ioport.h>
38 #include <linux/mm.h>
39 #include <linux/delay.h>
40 #include <linux/pci.h>
41 #include <linux/bitops.h>
42
43 #include <asm/system.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/uaccess.h>
47
48 #include "mxser.h"
49
50 #define MXSER_VERSION "2.0.4" /* 1.12 */
51 #define MXSERMAJOR 174
52
53 #define MXSER_BOARDS 4 /* Max. boards */
54 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
55 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56 #define MXSER_ISR_PASS_LIMIT 100
57
58 /*CheckIsMoxaMust return value*/
59 #define MOXA_OTHER_UART 0x00
60 #define MOXA_MUST_MU150_HWID 0x01
61 #define MOXA_MUST_MU860_HWID 0x02
62
63 #define WAKEUP_CHARS 256
64
65 #define UART_MCR_AFE 0x20
66 #define UART_LSR_SPECIAL 0x1E
67
68 #define PCI_DEVICE_ID_POS104UL 0x1044
69 #define PCI_DEVICE_ID_CB108 0x1080
70 #define PCI_DEVICE_ID_CP102UF 0x1023
71 #define PCI_DEVICE_ID_CB114 0x1142
72 #define PCI_DEVICE_ID_CP114UL 0x1143
73 #define PCI_DEVICE_ID_CB134I 0x1341
74 #define PCI_DEVICE_ID_CP138U 0x1380
75
76
77 #define C168_ASIC_ID 1
78 #define C104_ASIC_ID 2
79 #define C102_ASIC_ID 0xB
80 #define CI132_ASIC_ID 4
81 #define CI134_ASIC_ID 3
82 #define CI104J_ASIC_ID 5
83
84 #define MXSER_HIGHBAUD 1
85 #define MXSER_HAS2 2
86
87 /* This is only for PCI */
88 static const struct {
89 int type;
90 int tx_fifo;
91 int rx_fifo;
92 int xmit_fifo_size;
93 int rx_high_water;
94 int rx_trigger;
95 int rx_low_water;
96 long max_baud;
97 } Gpci_uart_info[] = {
98 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
99 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
100 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
101 };
102 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
103
104 struct mxser_cardinfo {
105 char *name;
106 unsigned int nports;
107 unsigned int flags;
108 };
109
110 static const struct mxser_cardinfo mxser_cards[] = {
111 /* 0*/ { "C168 series", 8, },
112 { "C104 series", 4, },
113 { "CI-104J series", 4, },
114 { "C168H/PCI series", 8, },
115 { "C104H/PCI series", 4, },
116 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
117 { "CI-132 series", 4, MXSER_HAS2 },
118 { "CI-134 series", 4, },
119 { "CP-132 series", 2, },
120 { "CP-114 series", 4, },
121 /*10*/ { "CT-114 series", 4, },
122 { "CP-102 series", 2, MXSER_HIGHBAUD },
123 { "CP-104U series", 4, },
124 { "CP-168U series", 8, },
125 { "CP-132U series", 2, },
126 /*15*/ { "CP-134U series", 4, },
127 { "CP-104JU series", 4, },
128 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
129 { "CP-118U series", 8, },
130 { "CP-102UL series", 2, },
131 /*20*/ { "CP-102U series", 2, },
132 { "CP-118EL series", 8, },
133 { "CP-168EL series", 8, },
134 { "CP-104EL series", 4, },
135 { "CB-108 series", 8, },
136 /*25*/ { "CB-114 series", 4, },
137 { "CB-134I series", 4, },
138 { "CP-138U series", 8, },
139 { "POS-104UL series", 4, },
140 { "CP-114UL series", 4, },
141 /*30*/ { "CP-102UF series", 2, }
142 };
143
144 /* driver_data correspond to the lines in the structure above
145 see also ISA probe function before you change something */
146 static struct pci_device_id mxser_pcibrds[] = {
147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
172 { }
173 };
174 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
175
176 static unsigned long ioaddr[MXSER_BOARDS];
177 static int ttymajor = MXSERMAJOR;
178
179 /* Variables for insmod */
180
181 MODULE_AUTHOR("Casper Yang");
182 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
183 module_param_array(ioaddr, ulong, NULL, 0);
184 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
185 module_param(ttymajor, int, 0);
186 MODULE_LICENSE("GPL");
187
188 struct mxser_log {
189 int tick;
190 unsigned long rxcnt[MXSER_PORTS];
191 unsigned long txcnt[MXSER_PORTS];
192 };
193
194 struct mxser_mon {
195 unsigned long rxcnt;
196 unsigned long txcnt;
197 unsigned long up_rxcnt;
198 unsigned long up_txcnt;
199 int modem_status;
200 unsigned char hold_reason;
201 };
202
203 struct mxser_mon_ext {
204 unsigned long rx_cnt[32];
205 unsigned long tx_cnt[32];
206 unsigned long up_rxcnt[32];
207 unsigned long up_txcnt[32];
208 int modem_status[32];
209
210 long baudrate[32];
211 int databits[32];
212 int stopbits[32];
213 int parity[32];
214 int flowctrl[32];
215 int fifo[32];
216 int iftype[32];
217 };
218
219 struct mxser_board;
220
221 struct mxser_port {
222 struct tty_port port;
223 struct mxser_board *board;
224
225 unsigned long ioaddr;
226 unsigned long opmode_ioaddr;
227 int max_baud;
228
229 int rx_high_water;
230 int rx_trigger; /* Rx fifo trigger level */
231 int rx_low_water;
232 int baud_base; /* max. speed */
233 int type; /* UART type */
234
235 int x_char; /* xon/xoff character */
236 int IER; /* Interrupt Enable Register */
237 int MCR; /* Modem control register */
238
239 unsigned char stop_rx;
240 unsigned char ldisc_stop_rx;
241
242 int custom_divisor;
243 unsigned char err_shadow;
244
245 struct async_icount icount; /* kernel counters for 4 input interrupts */
246 int timeout;
247
248 int read_status_mask;
249 int ignore_status_mask;
250 int xmit_fifo_size;
251 int xmit_head;
252 int xmit_tail;
253 int xmit_cnt;
254
255 struct ktermios normal_termios;
256
257 struct mxser_mon mon_data;
258
259 spinlock_t slock;
260 wait_queue_head_t delta_msr_wait;
261 };
262
263 struct mxser_board {
264 unsigned int idx;
265 int irq;
266 const struct mxser_cardinfo *info;
267 unsigned long vector;
268 unsigned long vector_mask;
269
270 int chip_flag;
271 int uart_type;
272
273 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
274 };
275
276 struct mxser_mstatus {
277 tcflag_t cflag;
278 int cts;
279 int dsr;
280 int ri;
281 int dcd;
282 };
283
284 static struct mxser_board mxser_boards[MXSER_BOARDS];
285 static struct tty_driver *mxvar_sdriver;
286 static struct mxser_log mxvar_log;
287 static int mxser_set_baud_method[MXSER_PORTS + 1];
288
289 static void mxser_enable_must_enchance_mode(unsigned long baseio)
290 {
291 u8 oldlcr;
292 u8 efr;
293
294 oldlcr = inb(baseio + UART_LCR);
295 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
296
297 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
298 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
299
300 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
301 outb(oldlcr, baseio + UART_LCR);
302 }
303
304 static void mxser_disable_must_enchance_mode(unsigned long baseio)
305 {
306 u8 oldlcr;
307 u8 efr;
308
309 oldlcr = inb(baseio + UART_LCR);
310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
311
312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
314
315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
316 outb(oldlcr, baseio + UART_LCR);
317 }
318
319 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
320 {
321 u8 oldlcr;
322 u8 efr;
323
324 oldlcr = inb(baseio + UART_LCR);
325 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
326
327 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
328 efr &= ~MOXA_MUST_EFR_BANK_MASK;
329 efr |= MOXA_MUST_EFR_BANK0;
330
331 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
332 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
333 outb(oldlcr, baseio + UART_LCR);
334 }
335
336 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
337 {
338 u8 oldlcr;
339 u8 efr;
340
341 oldlcr = inb(baseio + UART_LCR);
342 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
343
344 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
345 efr &= ~MOXA_MUST_EFR_BANK_MASK;
346 efr |= MOXA_MUST_EFR_BANK0;
347
348 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
349 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
350 outb(oldlcr, baseio + UART_LCR);
351 }
352
353 static void mxser_set_must_fifo_value(struct mxser_port *info)
354 {
355 u8 oldlcr;
356 u8 efr;
357
358 oldlcr = inb(info->ioaddr + UART_LCR);
359 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
360
361 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
362 efr &= ~MOXA_MUST_EFR_BANK_MASK;
363 efr |= MOXA_MUST_EFR_BANK1;
364
365 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
366 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
367 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
368 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
369 outb(oldlcr, info->ioaddr + UART_LCR);
370 }
371
372 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
373 {
374 u8 oldlcr;
375 u8 efr;
376
377 oldlcr = inb(baseio + UART_LCR);
378 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
379
380 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
381 efr &= ~MOXA_MUST_EFR_BANK_MASK;
382 efr |= MOXA_MUST_EFR_BANK2;
383
384 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
385 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
386 outb(oldlcr, baseio + UART_LCR);
387 }
388
389 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
390 {
391 u8 oldlcr;
392 u8 efr;
393
394 oldlcr = inb(baseio + UART_LCR);
395 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
396
397 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
398 efr &= ~MOXA_MUST_EFR_BANK_MASK;
399 efr |= MOXA_MUST_EFR_BANK2;
400
401 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
402 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
403 outb(oldlcr, baseio + UART_LCR);
404 }
405
406 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
407 {
408 u8 oldlcr;
409 u8 efr;
410
411 oldlcr = inb(baseio + UART_LCR);
412 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
413
414 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
415 efr &= ~MOXA_MUST_EFR_SF_MASK;
416
417 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
418 outb(oldlcr, baseio + UART_LCR);
419 }
420
421 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
422 {
423 u8 oldlcr;
424 u8 efr;
425
426 oldlcr = inb(baseio + UART_LCR);
427 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
428
429 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
430 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
431 efr |= MOXA_MUST_EFR_SF_TX1;
432
433 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
434 outb(oldlcr, baseio + UART_LCR);
435 }
436
437 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
438 {
439 u8 oldlcr;
440 u8 efr;
441
442 oldlcr = inb(baseio + UART_LCR);
443 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
444
445 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
446 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
447
448 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
449 outb(oldlcr, baseio + UART_LCR);
450 }
451
452 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
453 {
454 u8 oldlcr;
455 u8 efr;
456
457 oldlcr = inb(baseio + UART_LCR);
458 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
459
460 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
461 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
462 efr |= MOXA_MUST_EFR_SF_RX1;
463
464 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
465 outb(oldlcr, baseio + UART_LCR);
466 }
467
468 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
469 {
470 u8 oldlcr;
471 u8 efr;
472
473 oldlcr = inb(baseio + UART_LCR);
474 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
475
476 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
477 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
478
479 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
480 outb(oldlcr, baseio + UART_LCR);
481 }
482
483 #ifdef CONFIG_PCI
484 static int __devinit CheckIsMoxaMust(unsigned long io)
485 {
486 u8 oldmcr, hwid;
487 int i;
488
489 outb(0, io + UART_LCR);
490 mxser_disable_must_enchance_mode(io);
491 oldmcr = inb(io + UART_MCR);
492 outb(0, io + UART_MCR);
493 mxser_set_must_xon1_value(io, 0x11);
494 if ((hwid = inb(io + UART_MCR)) != 0) {
495 outb(oldmcr, io + UART_MCR);
496 return MOXA_OTHER_UART;
497 }
498
499 mxser_get_must_hardware_id(io, &hwid);
500 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
501 if (hwid == Gpci_uart_info[i].type)
502 return (int)hwid;
503 }
504 return MOXA_OTHER_UART;
505 }
506 #endif
507
508 static void process_txrx_fifo(struct mxser_port *info)
509 {
510 int i;
511
512 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
513 info->rx_trigger = 1;
514 info->rx_high_water = 1;
515 info->rx_low_water = 1;
516 info->xmit_fifo_size = 1;
517 } else
518 for (i = 0; i < UART_INFO_NUM; i++)
519 if (info->board->chip_flag == Gpci_uart_info[i].type) {
520 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
521 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
522 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
523 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
524 break;
525 }
526 }
527
528 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
529 {
530 static unsigned char mxser_msr[MXSER_PORTS + 1];
531 unsigned char status = 0;
532
533 status = inb(baseaddr + UART_MSR);
534
535 mxser_msr[port] &= 0x0F;
536 mxser_msr[port] |= status;
537 status = mxser_msr[port];
538 if (mode)
539 mxser_msr[port] = 0;
540
541 return status;
542 }
543
544 static int mxser_carrier_raised(struct tty_port *port)
545 {
546 struct mxser_port *mp = container_of(port, struct mxser_port, port);
547 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
548 }
549
550 static void mxser_dtr_rts(struct tty_port *port, int on)
551 {
552 struct mxser_port *mp = container_of(port, struct mxser_port, port);
553 unsigned long flags;
554
555 spin_lock_irqsave(&mp->slock, flags);
556 if (on)
557 outb(inb(mp->ioaddr + UART_MCR) |
558 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
559 else
560 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
561 mp->ioaddr + UART_MCR);
562 spin_unlock_irqrestore(&mp->slock, flags);
563 }
564
565 static int mxser_set_baud(struct tty_struct *tty, long newspd)
566 {
567 struct mxser_port *info = tty->driver_data;
568 int quot = 0, baud;
569 unsigned char cval;
570
571 if (!info->ioaddr)
572 return -1;
573
574 if (newspd > info->max_baud)
575 return -1;
576
577 if (newspd == 134) {
578 quot = 2 * info->baud_base / 269;
579 tty_encode_baud_rate(tty, 134, 134);
580 } else if (newspd) {
581 quot = info->baud_base / newspd;
582 if (quot == 0)
583 quot = 1;
584 baud = info->baud_base/quot;
585 tty_encode_baud_rate(tty, baud, baud);
586 } else {
587 quot = 0;
588 }
589
590 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
591 info->timeout += HZ / 50; /* Add .02 seconds of slop */
592
593 if (quot) {
594 info->MCR |= UART_MCR_DTR;
595 outb(info->MCR, info->ioaddr + UART_MCR);
596 } else {
597 info->MCR &= ~UART_MCR_DTR;
598 outb(info->MCR, info->ioaddr + UART_MCR);
599 return 0;
600 }
601
602 cval = inb(info->ioaddr + UART_LCR);
603
604 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
605
606 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
607 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
608 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
609
610 #ifdef BOTHER
611 if (C_BAUD(tty) == BOTHER) {
612 quot = info->baud_base % newspd;
613 quot *= 8;
614 if (quot % newspd > newspd / 2) {
615 quot /= newspd;
616 quot++;
617 } else
618 quot /= newspd;
619
620 mxser_set_must_enum_value(info->ioaddr, quot);
621 } else
622 #endif
623 mxser_set_must_enum_value(info->ioaddr, 0);
624
625 return 0;
626 }
627
628 /*
629 * This routine is called to set the UART divisor registers to match
630 * the specified baud rate for a serial port.
631 */
632 static int mxser_change_speed(struct tty_struct *tty,
633 struct ktermios *old_termios)
634 {
635 struct mxser_port *info = tty->driver_data;
636 unsigned cflag, cval, fcr;
637 int ret = 0;
638 unsigned char status;
639
640 cflag = tty->termios->c_cflag;
641 if (!info->ioaddr)
642 return ret;
643
644 if (mxser_set_baud_method[tty->index] == 0)
645 mxser_set_baud(tty, tty_get_baud_rate(tty));
646
647 /* byte size and parity */
648 switch (cflag & CSIZE) {
649 case CS5:
650 cval = 0x00;
651 break;
652 case CS6:
653 cval = 0x01;
654 break;
655 case CS7:
656 cval = 0x02;
657 break;
658 case CS8:
659 cval = 0x03;
660 break;
661 default:
662 cval = 0x00;
663 break; /* too keep GCC shut... */
664 }
665 if (cflag & CSTOPB)
666 cval |= 0x04;
667 if (cflag & PARENB)
668 cval |= UART_LCR_PARITY;
669 if (!(cflag & PARODD))
670 cval |= UART_LCR_EPAR;
671 if (cflag & CMSPAR)
672 cval |= UART_LCR_SPAR;
673
674 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
675 if (info->board->chip_flag) {
676 fcr = UART_FCR_ENABLE_FIFO;
677 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
678 mxser_set_must_fifo_value(info);
679 } else
680 fcr = 0;
681 } else {
682 fcr = UART_FCR_ENABLE_FIFO;
683 if (info->board->chip_flag) {
684 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
685 mxser_set_must_fifo_value(info);
686 } else {
687 switch (info->rx_trigger) {
688 case 1:
689 fcr |= UART_FCR_TRIGGER_1;
690 break;
691 case 4:
692 fcr |= UART_FCR_TRIGGER_4;
693 break;
694 case 8:
695 fcr |= UART_FCR_TRIGGER_8;
696 break;
697 default:
698 fcr |= UART_FCR_TRIGGER_14;
699 break;
700 }
701 }
702 }
703
704 /* CTS flow control flag and modem status interrupts */
705 info->IER &= ~UART_IER_MSI;
706 info->MCR &= ~UART_MCR_AFE;
707 if (cflag & CRTSCTS) {
708 info->port.flags |= ASYNC_CTS_FLOW;
709 info->IER |= UART_IER_MSI;
710 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
711 info->MCR |= UART_MCR_AFE;
712 } else {
713 status = inb(info->ioaddr + UART_MSR);
714 if (tty->hw_stopped) {
715 if (status & UART_MSR_CTS) {
716 tty->hw_stopped = 0;
717 if (info->type != PORT_16550A &&
718 !info->board->chip_flag) {
719 outb(info->IER & ~UART_IER_THRI,
720 info->ioaddr +
721 UART_IER);
722 info->IER |= UART_IER_THRI;
723 outb(info->IER, info->ioaddr +
724 UART_IER);
725 }
726 tty_wakeup(tty);
727 }
728 } else {
729 if (!(status & UART_MSR_CTS)) {
730 tty->hw_stopped = 1;
731 if ((info->type != PORT_16550A) &&
732 (!info->board->chip_flag)) {
733 info->IER &= ~UART_IER_THRI;
734 outb(info->IER, info->ioaddr +
735 UART_IER);
736 }
737 }
738 }
739 }
740 } else {
741 info->port.flags &= ~ASYNC_CTS_FLOW;
742 }
743 outb(info->MCR, info->ioaddr + UART_MCR);
744 if (cflag & CLOCAL) {
745 info->port.flags &= ~ASYNC_CHECK_CD;
746 } else {
747 info->port.flags |= ASYNC_CHECK_CD;
748 info->IER |= UART_IER_MSI;
749 }
750 outb(info->IER, info->ioaddr + UART_IER);
751
752 /*
753 * Set up parity check flag
754 */
755 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
756 if (I_INPCK(tty))
757 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
758 if (I_BRKINT(tty) || I_PARMRK(tty))
759 info->read_status_mask |= UART_LSR_BI;
760
761 info->ignore_status_mask = 0;
762
763 if (I_IGNBRK(tty)) {
764 info->ignore_status_mask |= UART_LSR_BI;
765 info->read_status_mask |= UART_LSR_BI;
766 /*
767 * If we're ignore parity and break indicators, ignore
768 * overruns too. (For real raw support).
769 */
770 if (I_IGNPAR(tty)) {
771 info->ignore_status_mask |=
772 UART_LSR_OE |
773 UART_LSR_PE |
774 UART_LSR_FE;
775 info->read_status_mask |=
776 UART_LSR_OE |
777 UART_LSR_PE |
778 UART_LSR_FE;
779 }
780 }
781 if (info->board->chip_flag) {
782 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
783 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
784 if (I_IXON(tty)) {
785 mxser_enable_must_rx_software_flow_control(
786 info->ioaddr);
787 } else {
788 mxser_disable_must_rx_software_flow_control(
789 info->ioaddr);
790 }
791 if (I_IXOFF(tty)) {
792 mxser_enable_must_tx_software_flow_control(
793 info->ioaddr);
794 } else {
795 mxser_disable_must_tx_software_flow_control(
796 info->ioaddr);
797 }
798 }
799
800
801 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
802 outb(cval, info->ioaddr + UART_LCR);
803
804 return ret;
805 }
806
807 static void mxser_check_modem_status(struct tty_struct *tty,
808 struct mxser_port *port, int status)
809 {
810 /* update input line counters */
811 if (status & UART_MSR_TERI)
812 port->icount.rng++;
813 if (status & UART_MSR_DDSR)
814 port->icount.dsr++;
815 if (status & UART_MSR_DDCD)
816 port->icount.dcd++;
817 if (status & UART_MSR_DCTS)
818 port->icount.cts++;
819 port->mon_data.modem_status = status;
820 wake_up_interruptible(&port->delta_msr_wait);
821
822 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
823 if (status & UART_MSR_DCD)
824 wake_up_interruptible(&port->port.open_wait);
825 }
826
827 if (port->port.flags & ASYNC_CTS_FLOW) {
828 if (tty->hw_stopped) {
829 if (status & UART_MSR_CTS) {
830 tty->hw_stopped = 0;
831
832 if ((port->type != PORT_16550A) &&
833 (!port->board->chip_flag)) {
834 outb(port->IER & ~UART_IER_THRI,
835 port->ioaddr + UART_IER);
836 port->IER |= UART_IER_THRI;
837 outb(port->IER, port->ioaddr +
838 UART_IER);
839 }
840 tty_wakeup(tty);
841 }
842 } else {
843 if (!(status & UART_MSR_CTS)) {
844 tty->hw_stopped = 1;
845 if (port->type != PORT_16550A &&
846 !port->board->chip_flag) {
847 port->IER &= ~UART_IER_THRI;
848 outb(port->IER, port->ioaddr +
849 UART_IER);
850 }
851 }
852 }
853 }
854 }
855
856 static int mxser_startup(struct tty_struct *tty)
857 {
858 struct mxser_port *info = tty->driver_data;
859 unsigned long page;
860 unsigned long flags;
861
862 page = __get_free_page(GFP_KERNEL);
863 if (!page)
864 return -ENOMEM;
865
866 spin_lock_irqsave(&info->slock, flags);
867
868 if (info->port.flags & ASYNC_INITIALIZED) {
869 free_page(page);
870 spin_unlock_irqrestore(&info->slock, flags);
871 return 0;
872 }
873
874 if (!info->ioaddr || !info->type) {
875 set_bit(TTY_IO_ERROR, &tty->flags);
876 free_page(page);
877 spin_unlock_irqrestore(&info->slock, flags);
878 return 0;
879 }
880 if (info->port.xmit_buf)
881 free_page(page);
882 else
883 info->port.xmit_buf = (unsigned char *) page;
884
885 /*
886 * Clear the FIFO buffers and disable them
887 * (they will be reenabled in mxser_change_speed())
888 */
889 if (info->board->chip_flag)
890 outb((UART_FCR_CLEAR_RCVR |
891 UART_FCR_CLEAR_XMIT |
892 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
893 else
894 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
895 info->ioaddr + UART_FCR);
896
897 /*
898 * At this point there's no way the LSR could still be 0xFF;
899 * if it is, then bail out, because there's likely no UART
900 * here.
901 */
902 if (inb(info->ioaddr + UART_LSR) == 0xff) {
903 spin_unlock_irqrestore(&info->slock, flags);
904 if (capable(CAP_SYS_ADMIN)) {
905 if (tty)
906 set_bit(TTY_IO_ERROR, &tty->flags);
907 return 0;
908 } else
909 return -ENODEV;
910 }
911
912 /*
913 * Clear the interrupt registers.
914 */
915 (void) inb(info->ioaddr + UART_LSR);
916 (void) inb(info->ioaddr + UART_RX);
917 (void) inb(info->ioaddr + UART_IIR);
918 (void) inb(info->ioaddr + UART_MSR);
919
920 /*
921 * Now, initialize the UART
922 */
923 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
924 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
925 outb(info->MCR, info->ioaddr + UART_MCR);
926
927 /*
928 * Finally, enable interrupts
929 */
930 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
931
932 if (info->board->chip_flag)
933 info->IER |= MOXA_MUST_IER_EGDAI;
934 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
935
936 /*
937 * And clear the interrupt registers again for luck.
938 */
939 (void) inb(info->ioaddr + UART_LSR);
940 (void) inb(info->ioaddr + UART_RX);
941 (void) inb(info->ioaddr + UART_IIR);
942 (void) inb(info->ioaddr + UART_MSR);
943
944 clear_bit(TTY_IO_ERROR, &tty->flags);
945 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
946
947 /*
948 * and set the speed of the serial port
949 */
950 mxser_change_speed(tty, NULL);
951 info->port.flags |= ASYNC_INITIALIZED;
952 spin_unlock_irqrestore(&info->slock, flags);
953
954 return 0;
955 }
956
957 /*
958 * This routine will shutdown a serial port; interrupts maybe disabled, and
959 * DTR is dropped if the hangup on close termio flag is on.
960 */
961 static void mxser_shutdown(struct tty_struct *tty)
962 {
963 struct mxser_port *info = tty->driver_data;
964 unsigned long flags;
965
966 if (!(info->port.flags & ASYNC_INITIALIZED))
967 return;
968
969 spin_lock_irqsave(&info->slock, flags);
970
971 /*
972 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
973 * here so the queue might never be waken up
974 */
975 wake_up_interruptible(&info->delta_msr_wait);
976
977 /*
978 * Free the IRQ, if necessary
979 */
980 if (info->port.xmit_buf) {
981 free_page((unsigned long) info->port.xmit_buf);
982 info->port.xmit_buf = NULL;
983 }
984
985 info->IER = 0;
986 outb(0x00, info->ioaddr + UART_IER);
987
988 if (tty->termios->c_cflag & HUPCL)
989 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
990 outb(info->MCR, info->ioaddr + UART_MCR);
991
992 /* clear Rx/Tx FIFO's */
993 if (info->board->chip_flag)
994 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
995 MOXA_MUST_FCR_GDA_MODE_ENABLE,
996 info->ioaddr + UART_FCR);
997 else
998 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
999 info->ioaddr + UART_FCR);
1000
1001 /* read data port to reset things */
1002 (void) inb(info->ioaddr + UART_RX);
1003
1004 set_bit(TTY_IO_ERROR, &tty->flags);
1005
1006 info->port.flags &= ~ASYNC_INITIALIZED;
1007
1008 if (info->board->chip_flag)
1009 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1010
1011 spin_unlock_irqrestore(&info->slock, flags);
1012 }
1013
1014 /*
1015 * This routine is called whenever a serial port is opened. It
1016 * enables interrupts for a serial port, linking in its async structure into
1017 * the IRQ chain. It also performs the serial-specific
1018 * initialization for the tty structure.
1019 */
1020 static int mxser_open(struct tty_struct *tty, struct file *filp)
1021 {
1022 struct mxser_port *info;
1023 unsigned long flags;
1024 int retval, line;
1025
1026 line = tty->index;
1027 if (line == MXSER_PORTS)
1028 return 0;
1029 if (line < 0 || line > MXSER_PORTS)
1030 return -ENODEV;
1031 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1032 if (!info->ioaddr)
1033 return -ENODEV;
1034
1035 tty->driver_data = info;
1036 tty_port_tty_set(&info->port, tty);
1037 /*
1038 * Start up serial port
1039 */
1040 spin_lock_irqsave(&info->port.lock, flags);
1041 info->port.count++;
1042 spin_unlock_irqrestore(&info->port.lock, flags);
1043 retval = mxser_startup(tty);
1044 if (retval)
1045 return retval;
1046
1047 retval = tty_port_block_til_ready(&info->port, tty, filp);
1048 if (retval)
1049 return retval;
1050
1051 return 0;
1052 }
1053
1054 static void mxser_flush_buffer(struct tty_struct *tty)
1055 {
1056 struct mxser_port *info = tty->driver_data;
1057 char fcr;
1058 unsigned long flags;
1059
1060
1061 spin_lock_irqsave(&info->slock, flags);
1062 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1063
1064 fcr = inb(info->ioaddr + UART_FCR);
1065 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1066 info->ioaddr + UART_FCR);
1067 outb(fcr, info->ioaddr + UART_FCR);
1068
1069 spin_unlock_irqrestore(&info->slock, flags);
1070
1071 tty_wakeup(tty);
1072 }
1073
1074
1075 /*
1076 * This routine is called when the serial port gets closed. First, we
1077 * wait for the last remaining data to be sent. Then, we unlink its
1078 * async structure from the interrupt chain if necessary, and we free
1079 * that IRQ if nothing is left in the chain.
1080 */
1081 static void mxser_close(struct tty_struct *tty, struct file *filp)
1082 {
1083 struct mxser_port *info = tty->driver_data;
1084 struct tty_port *port = &info->port;
1085
1086 unsigned long timeout;
1087
1088 if (tty->index == MXSER_PORTS)
1089 return;
1090 if (!info)
1091 return;
1092
1093 if (tty_port_close_start(port, tty, filp) == 0)
1094 return;
1095
1096 /*
1097 * Save the termios structure, since this port may have
1098 * separate termios for callout and dialin.
1099 *
1100 * FIXME: Can this go ?
1101 */
1102 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
1103 info->normal_termios = *tty->termios;
1104 /*
1105 * At this point we stop accepting input. To do this, we
1106 * disable the receive line status interrupts, and tell the
1107 * interrupt driver to stop checking the data ready bit in the
1108 * line status register.
1109 */
1110 info->IER &= ~UART_IER_RLSI;
1111 if (info->board->chip_flag)
1112 info->IER &= ~MOXA_MUST_RECV_ISR;
1113
1114 if (info->port.flags & ASYNC_INITIALIZED) {
1115 outb(info->IER, info->ioaddr + UART_IER);
1116 /*
1117 * Before we drop DTR, make sure the UART transmitter
1118 * has completely drained; this is especially
1119 * important if there is a transmit FIFO!
1120 */
1121 timeout = jiffies + HZ;
1122 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1123 schedule_timeout_interruptible(5);
1124 if (time_after(jiffies, timeout))
1125 break;
1126 }
1127 }
1128 mxser_shutdown(tty);
1129 mxser_flush_buffer(tty);
1130
1131 /* Right now the tty_port set is done outside of the close_end helper
1132 as we don't yet have everyone using refcounts */
1133 tty_port_close_end(port, tty);
1134 tty_port_tty_set(port, NULL);
1135 }
1136
1137 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1138 {
1139 int c, total = 0;
1140 struct mxser_port *info = tty->driver_data;
1141 unsigned long flags;
1142
1143 if (!info->port.xmit_buf)
1144 return 0;
1145
1146 while (1) {
1147 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1148 SERIAL_XMIT_SIZE - info->xmit_head));
1149 if (c <= 0)
1150 break;
1151
1152 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1153 spin_lock_irqsave(&info->slock, flags);
1154 info->xmit_head = (info->xmit_head + c) &
1155 (SERIAL_XMIT_SIZE - 1);
1156 info->xmit_cnt += c;
1157 spin_unlock_irqrestore(&info->slock, flags);
1158
1159 buf += c;
1160 count -= c;
1161 total += c;
1162 }
1163
1164 if (info->xmit_cnt && !tty->stopped) {
1165 if (!tty->hw_stopped ||
1166 (info->type == PORT_16550A) ||
1167 (info->board->chip_flag)) {
1168 spin_lock_irqsave(&info->slock, flags);
1169 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1170 UART_IER);
1171 info->IER |= UART_IER_THRI;
1172 outb(info->IER, info->ioaddr + UART_IER);
1173 spin_unlock_irqrestore(&info->slock, flags);
1174 }
1175 }
1176 return total;
1177 }
1178
1179 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1180 {
1181 struct mxser_port *info = tty->driver_data;
1182 unsigned long flags;
1183
1184 if (!info->port.xmit_buf)
1185 return 0;
1186
1187 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1188 return 0;
1189
1190 spin_lock_irqsave(&info->slock, flags);
1191 info->port.xmit_buf[info->xmit_head++] = ch;
1192 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1193 info->xmit_cnt++;
1194 spin_unlock_irqrestore(&info->slock, flags);
1195 if (!tty->stopped) {
1196 if (!tty->hw_stopped ||
1197 (info->type == PORT_16550A) ||
1198 info->board->chip_flag) {
1199 spin_lock_irqsave(&info->slock, flags);
1200 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1201 info->IER |= UART_IER_THRI;
1202 outb(info->IER, info->ioaddr + UART_IER);
1203 spin_unlock_irqrestore(&info->slock, flags);
1204 }
1205 }
1206 return 1;
1207 }
1208
1209
1210 static void mxser_flush_chars(struct tty_struct *tty)
1211 {
1212 struct mxser_port *info = tty->driver_data;
1213 unsigned long flags;
1214
1215 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1216 (tty->hw_stopped && info->type != PORT_16550A &&
1217 !info->board->chip_flag))
1218 return;
1219
1220 spin_lock_irqsave(&info->slock, flags);
1221
1222 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1223 info->IER |= UART_IER_THRI;
1224 outb(info->IER, info->ioaddr + UART_IER);
1225
1226 spin_unlock_irqrestore(&info->slock, flags);
1227 }
1228
1229 static int mxser_write_room(struct tty_struct *tty)
1230 {
1231 struct mxser_port *info = tty->driver_data;
1232 int ret;
1233
1234 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1235 return ret < 0 ? 0 : ret;
1236 }
1237
1238 static int mxser_chars_in_buffer(struct tty_struct *tty)
1239 {
1240 struct mxser_port *info = tty->driver_data;
1241 return info->xmit_cnt;
1242 }
1243
1244 /*
1245 * ------------------------------------------------------------
1246 * friends of mxser_ioctl()
1247 * ------------------------------------------------------------
1248 */
1249 static int mxser_get_serial_info(struct tty_struct *tty,
1250 struct serial_struct __user *retinfo)
1251 {
1252 struct mxser_port *info = tty->driver_data;
1253 struct serial_struct tmp = {
1254 .type = info->type,
1255 .line = tty->index,
1256 .port = info->ioaddr,
1257 .irq = info->board->irq,
1258 .flags = info->port.flags,
1259 .baud_base = info->baud_base,
1260 .close_delay = info->port.close_delay,
1261 .closing_wait = info->port.closing_wait,
1262 .custom_divisor = info->custom_divisor,
1263 .hub6 = 0
1264 };
1265 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1266 return -EFAULT;
1267 return 0;
1268 }
1269
1270 static int mxser_set_serial_info(struct tty_struct *tty,
1271 struct serial_struct __user *new_info)
1272 {
1273 struct mxser_port *info = tty->driver_data;
1274 struct serial_struct new_serial;
1275 speed_t baud;
1276 unsigned long sl_flags;
1277 unsigned int flags;
1278 int retval = 0;
1279
1280 if (!new_info || !info->ioaddr)
1281 return -ENODEV;
1282 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1283 return -EFAULT;
1284
1285 if (new_serial.irq != info->board->irq ||
1286 new_serial.port != info->ioaddr)
1287 return -EINVAL;
1288
1289 flags = info->port.flags & ASYNC_SPD_MASK;
1290
1291 if (!capable(CAP_SYS_ADMIN)) {
1292 if ((new_serial.baud_base != info->baud_base) ||
1293 (new_serial.close_delay != info->port.close_delay) ||
1294 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1295 return -EPERM;
1296 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1297 (new_serial.flags & ASYNC_USR_MASK));
1298 } else {
1299 /*
1300 * OK, past this point, all the error checking has been done.
1301 * At this point, we start making changes.....
1302 */
1303 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1304 (new_serial.flags & ASYNC_FLAGS));
1305 info->port.close_delay = new_serial.close_delay * HZ / 100;
1306 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
1307 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1308 ? 1 : 0;
1309 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1310 (new_serial.baud_base != info->baud_base ||
1311 new_serial.custom_divisor !=
1312 info->custom_divisor)) {
1313 baud = new_serial.baud_base / new_serial.custom_divisor;
1314 tty_encode_baud_rate(tty, baud, baud);
1315 }
1316 }
1317
1318 info->type = new_serial.type;
1319
1320 process_txrx_fifo(info);
1321
1322 if (info->port.flags & ASYNC_INITIALIZED) {
1323 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1324 spin_lock_irqsave(&info->slock, sl_flags);
1325 mxser_change_speed(tty, NULL);
1326 spin_unlock_irqrestore(&info->slock, sl_flags);
1327 }
1328 } else
1329 retval = mxser_startup(tty);
1330
1331 return retval;
1332 }
1333
1334 /*
1335 * mxser_get_lsr_info - get line status register info
1336 *
1337 * Purpose: Let user call ioctl() to get info when the UART physically
1338 * is emptied. On bus types like RS485, the transmitter must
1339 * release the bus after transmitting. This must be done when
1340 * the transmit shift register is empty, not be done when the
1341 * transmit holding register is empty. This functionality
1342 * allows an RS485 driver to be written in user space.
1343 */
1344 static int mxser_get_lsr_info(struct mxser_port *info,
1345 unsigned int __user *value)
1346 {
1347 unsigned char status;
1348 unsigned int result;
1349 unsigned long flags;
1350
1351 spin_lock_irqsave(&info->slock, flags);
1352 status = inb(info->ioaddr + UART_LSR);
1353 spin_unlock_irqrestore(&info->slock, flags);
1354 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1355 return put_user(result, value);
1356 }
1357
1358 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1359 {
1360 struct mxser_port *info = tty->driver_data;
1361 unsigned char control, status;
1362 unsigned long flags;
1363
1364
1365 if (tty->index == MXSER_PORTS)
1366 return -ENOIOCTLCMD;
1367 if (test_bit(TTY_IO_ERROR, &tty->flags))
1368 return -EIO;
1369
1370 control = info->MCR;
1371
1372 spin_lock_irqsave(&info->slock, flags);
1373 status = inb(info->ioaddr + UART_MSR);
1374 if (status & UART_MSR_ANY_DELTA)
1375 mxser_check_modem_status(tty, info, status);
1376 spin_unlock_irqrestore(&info->slock, flags);
1377 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1378 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1379 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1380 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1381 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1382 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1383 }
1384
1385 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1386 unsigned int set, unsigned int clear)
1387 {
1388 struct mxser_port *info = tty->driver_data;
1389 unsigned long flags;
1390
1391
1392 if (tty->index == MXSER_PORTS)
1393 return -ENOIOCTLCMD;
1394 if (test_bit(TTY_IO_ERROR, &tty->flags))
1395 return -EIO;
1396
1397 spin_lock_irqsave(&info->slock, flags);
1398
1399 if (set & TIOCM_RTS)
1400 info->MCR |= UART_MCR_RTS;
1401 if (set & TIOCM_DTR)
1402 info->MCR |= UART_MCR_DTR;
1403
1404 if (clear & TIOCM_RTS)
1405 info->MCR &= ~UART_MCR_RTS;
1406 if (clear & TIOCM_DTR)
1407 info->MCR &= ~UART_MCR_DTR;
1408
1409 outb(info->MCR, info->ioaddr + UART_MCR);
1410 spin_unlock_irqrestore(&info->slock, flags);
1411 return 0;
1412 }
1413
1414 static int __init mxser_program_mode(int port)
1415 {
1416 int id, i, j, n;
1417
1418 outb(0, port);
1419 outb(0, port);
1420 outb(0, port);
1421 (void)inb(port);
1422 (void)inb(port);
1423 outb(0, port);
1424 (void)inb(port);
1425
1426 id = inb(port + 1) & 0x1F;
1427 if ((id != C168_ASIC_ID) &&
1428 (id != C104_ASIC_ID) &&
1429 (id != C102_ASIC_ID) &&
1430 (id != CI132_ASIC_ID) &&
1431 (id != CI134_ASIC_ID) &&
1432 (id != CI104J_ASIC_ID))
1433 return -1;
1434 for (i = 0, j = 0; i < 4; i++) {
1435 n = inb(port + 2);
1436 if (n == 'M') {
1437 j = 1;
1438 } else if ((j == 1) && (n == 1)) {
1439 j = 2;
1440 break;
1441 } else
1442 j = 0;
1443 }
1444 if (j != 2)
1445 id = -2;
1446 return id;
1447 }
1448
1449 static void __init mxser_normal_mode(int port)
1450 {
1451 int i, n;
1452
1453 outb(0xA5, port + 1);
1454 outb(0x80, port + 3);
1455 outb(12, port + 0); /* 9600 bps */
1456 outb(0, port + 1);
1457 outb(0x03, port + 3); /* 8 data bits */
1458 outb(0x13, port + 4); /* loop back mode */
1459 for (i = 0; i < 16; i++) {
1460 n = inb(port + 5);
1461 if ((n & 0x61) == 0x60)
1462 break;
1463 if ((n & 1) == 1)
1464 (void)inb(port);
1465 }
1466 outb(0x00, port + 4);
1467 }
1468
1469 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1470 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1471 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1472 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1473 #define EN_CCMD 0x000 /* Chip's command register */
1474 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1475 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1476 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1477 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1478 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1479 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1480 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1481 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1482 static int __init mxser_read_register(int port, unsigned short *regs)
1483 {
1484 int i, k, value, id;
1485 unsigned int j;
1486
1487 id = mxser_program_mode(port);
1488 if (id < 0)
1489 return id;
1490 for (i = 0; i < 14; i++) {
1491 k = (i & 0x3F) | 0x180;
1492 for (j = 0x100; j > 0; j >>= 1) {
1493 outb(CHIP_CS, port);
1494 if (k & j) {
1495 outb(CHIP_CS | CHIP_DO, port);
1496 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1497 } else {
1498 outb(CHIP_CS, port);
1499 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1500 }
1501 }
1502 (void)inb(port);
1503 value = 0;
1504 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1505 outb(CHIP_CS, port);
1506 outb(CHIP_CS | CHIP_SK, port);
1507 if (inb(port) & CHIP_DI)
1508 value |= j;
1509 }
1510 regs[i] = value;
1511 outb(0, port);
1512 }
1513 mxser_normal_mode(port);
1514 return id;
1515 }
1516
1517 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1518 {
1519 struct mxser_port *port;
1520 struct tty_struct *tty;
1521 int result, status;
1522 unsigned int i, j;
1523 int ret = 0;
1524
1525 switch (cmd) {
1526 case MOXA_GET_MAJOR:
1527 if (printk_ratelimit())
1528 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1529 "%x (GET_MAJOR), fix your userspace\n",
1530 current->comm, cmd);
1531 return put_user(ttymajor, (int __user *)argp);
1532
1533 case MOXA_CHKPORTENABLE:
1534 result = 0;
1535 lock_kernel();
1536 for (i = 0; i < MXSER_BOARDS; i++)
1537 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1538 if (mxser_boards[i].ports[j].ioaddr)
1539 result |= (1 << i);
1540 unlock_kernel();
1541 return put_user(result, (unsigned long __user *)argp);
1542 case MOXA_GETDATACOUNT:
1543 lock_kernel();
1544 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1545 ret = -EFAULT;
1546 unlock_kernel();
1547 return ret;
1548 case MOXA_GETMSTATUS: {
1549 struct mxser_mstatus ms, __user *msu = argp;
1550 lock_kernel();
1551 for (i = 0; i < MXSER_BOARDS; i++)
1552 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1553 port = &mxser_boards[i].ports[j];
1554 memset(&ms, 0, sizeof(ms));
1555
1556 if (!port->ioaddr)
1557 goto copy;
1558
1559 tty = tty_port_tty_get(&port->port);
1560
1561 if (!tty || !tty->termios)
1562 ms.cflag = port->normal_termios.c_cflag;
1563 else
1564 ms.cflag = tty->termios->c_cflag;
1565 tty_kref_put(tty);
1566 status = inb(port->ioaddr + UART_MSR);
1567 if (status & UART_MSR_DCD)
1568 ms.dcd = 1;
1569 if (status & UART_MSR_DSR)
1570 ms.dsr = 1;
1571 if (status & UART_MSR_CTS)
1572 ms.cts = 1;
1573 copy:
1574 if (copy_to_user(msu, &ms, sizeof(ms))) {
1575 unlock_kernel();
1576 return -EFAULT;
1577 }
1578 msu++;
1579 }
1580 unlock_kernel();
1581 return 0;
1582 }
1583 case MOXA_ASPP_MON_EXT: {
1584 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1585 unsigned int cflag, iflag, p;
1586 u8 opmode;
1587
1588 me = kzalloc(sizeof(*me), GFP_KERNEL);
1589 if (!me)
1590 return -ENOMEM;
1591
1592 lock_kernel();
1593 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1594 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1595 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1596 i = MXSER_BOARDS;
1597 break;
1598 }
1599 port = &mxser_boards[i].ports[j];
1600 if (!port->ioaddr)
1601 continue;
1602
1603 status = mxser_get_msr(port->ioaddr, 0, p);
1604
1605 if (status & UART_MSR_TERI)
1606 port->icount.rng++;
1607 if (status & UART_MSR_DDSR)
1608 port->icount.dsr++;
1609 if (status & UART_MSR_DDCD)
1610 port->icount.dcd++;
1611 if (status & UART_MSR_DCTS)
1612 port->icount.cts++;
1613
1614 port->mon_data.modem_status = status;
1615 me->rx_cnt[p] = port->mon_data.rxcnt;
1616 me->tx_cnt[p] = port->mon_data.txcnt;
1617 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1618 me->up_txcnt[p] = port->mon_data.up_txcnt;
1619 me->modem_status[p] =
1620 port->mon_data.modem_status;
1621 tty = tty_port_tty_get(&port->port);
1622
1623 if (!tty || !tty->termios) {
1624 cflag = port->normal_termios.c_cflag;
1625 iflag = port->normal_termios.c_iflag;
1626 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1627 } else {
1628 cflag = tty->termios->c_cflag;
1629 iflag = tty->termios->c_iflag;
1630 me->baudrate[p] = tty_get_baud_rate(tty);
1631 }
1632 tty_kref_put(tty);
1633
1634 me->databits[p] = cflag & CSIZE;
1635 me->stopbits[p] = cflag & CSTOPB;
1636 me->parity[p] = cflag & (PARENB | PARODD |
1637 CMSPAR);
1638
1639 if (cflag & CRTSCTS)
1640 me->flowctrl[p] |= 0x03;
1641
1642 if (iflag & (IXON | IXOFF))
1643 me->flowctrl[p] |= 0x0C;
1644
1645 if (port->type == PORT_16550A)
1646 me->fifo[p] = 1;
1647
1648 opmode = inb(port->opmode_ioaddr) >>
1649 ((p % 4) * 2);
1650 opmode &= OP_MODE_MASK;
1651 me->iftype[p] = opmode;
1652 }
1653 }
1654 unlock_kernel();
1655 if (copy_to_user(argp, me, sizeof(*me)))
1656 ret = -EFAULT;
1657 kfree(me);
1658 return ret;
1659 }
1660 default:
1661 return -ENOIOCTLCMD;
1662 }
1663 return 0;
1664 }
1665
1666 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1667 struct async_icount *cprev)
1668 {
1669 struct async_icount cnow;
1670 unsigned long flags;
1671 int ret;
1672
1673 spin_lock_irqsave(&info->slock, flags);
1674 cnow = info->icount; /* atomic copy */
1675 spin_unlock_irqrestore(&info->slock, flags);
1676
1677 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1678 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1679 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1680 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1681
1682 *cprev = cnow;
1683
1684 return ret;
1685 }
1686
1687 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1688 unsigned int cmd, unsigned long arg)
1689 {
1690 struct mxser_port *info = tty->driver_data;
1691 struct async_icount cnow;
1692 unsigned long flags;
1693 void __user *argp = (void __user *)arg;
1694 int retval;
1695
1696 if (tty->index == MXSER_PORTS)
1697 return mxser_ioctl_special(cmd, argp);
1698
1699 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1700 int p;
1701 unsigned long opmode;
1702 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1703 int shiftbit;
1704 unsigned char val, mask;
1705
1706 p = tty->index % 4;
1707 if (cmd == MOXA_SET_OP_MODE) {
1708 if (get_user(opmode, (int __user *) argp))
1709 return -EFAULT;
1710 if (opmode != RS232_MODE &&
1711 opmode != RS485_2WIRE_MODE &&
1712 opmode != RS422_MODE &&
1713 opmode != RS485_4WIRE_MODE)
1714 return -EFAULT;
1715 lock_kernel();
1716 mask = ModeMask[p];
1717 shiftbit = p * 2;
1718 val = inb(info->opmode_ioaddr);
1719 val &= mask;
1720 val |= (opmode << shiftbit);
1721 outb(val, info->opmode_ioaddr);
1722 unlock_kernel();
1723 } else {
1724 lock_kernel();
1725 shiftbit = p * 2;
1726 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1727 opmode &= OP_MODE_MASK;
1728 unlock_kernel();
1729 if (put_user(opmode, (int __user *)argp))
1730 return -EFAULT;
1731 }
1732 return 0;
1733 }
1734
1735 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1736 test_bit(TTY_IO_ERROR, &tty->flags))
1737 return -EIO;
1738
1739 switch (cmd) {
1740 case TIOCGSERIAL:
1741 lock_kernel();
1742 retval = mxser_get_serial_info(tty, argp);
1743 unlock_kernel();
1744 return retval;
1745 case TIOCSSERIAL:
1746 lock_kernel();
1747 retval = mxser_set_serial_info(tty, argp);
1748 unlock_kernel();
1749 return retval;
1750 case TIOCSERGETLSR: /* Get line status register */
1751 return mxser_get_lsr_info(info, argp);
1752 /*
1753 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1754 * - mask passed in arg for lines of interest
1755 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1756 * Caller should use TIOCGICOUNT to see which one it was
1757 */
1758 case TIOCMIWAIT:
1759 spin_lock_irqsave(&info->slock, flags);
1760 cnow = info->icount; /* note the counters on entry */
1761 spin_unlock_irqrestore(&info->slock, flags);
1762
1763 return wait_event_interruptible(info->delta_msr_wait,
1764 mxser_cflags_changed(info, arg, &cnow));
1765 /*
1766 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1767 * Return: write counters to the user passed counter struct
1768 * NB: both 1->0 and 0->1 transitions are counted except for
1769 * RI where only 0->1 is counted.
1770 */
1771 case TIOCGICOUNT: {
1772 struct serial_icounter_struct icnt = { 0 };
1773 spin_lock_irqsave(&info->slock, flags);
1774 cnow = info->icount;
1775 spin_unlock_irqrestore(&info->slock, flags);
1776
1777 icnt.frame = cnow.frame;
1778 icnt.brk = cnow.brk;
1779 icnt.overrun = cnow.overrun;
1780 icnt.buf_overrun = cnow.buf_overrun;
1781 icnt.parity = cnow.parity;
1782 icnt.rx = cnow.rx;
1783 icnt.tx = cnow.tx;
1784 icnt.cts = cnow.cts;
1785 icnt.dsr = cnow.dsr;
1786 icnt.rng = cnow.rng;
1787 icnt.dcd = cnow.dcd;
1788
1789 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1790 }
1791 case MOXA_HighSpeedOn:
1792 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1793 case MOXA_SDS_RSTICOUNTER:
1794 lock_kernel();
1795 info->mon_data.rxcnt = 0;
1796 info->mon_data.txcnt = 0;
1797 unlock_kernel();
1798 return 0;
1799
1800 case MOXA_ASPP_OQUEUE:{
1801 int len, lsr;
1802
1803 lock_kernel();
1804 len = mxser_chars_in_buffer(tty);
1805 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1806 len += (lsr ? 0 : 1);
1807 unlock_kernel();
1808
1809 return put_user(len, (int __user *)argp);
1810 }
1811 case MOXA_ASPP_MON: {
1812 int mcr, status;
1813
1814 lock_kernel();
1815 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1816 mxser_check_modem_status(tty, info, status);
1817
1818 mcr = inb(info->ioaddr + UART_MCR);
1819 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1820 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1821 else
1822 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1823
1824 if (mcr & MOXA_MUST_MCR_TX_XON)
1825 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1826 else
1827 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1828
1829 if (tty->hw_stopped)
1830 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1831 else
1832 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1833 unlock_kernel();
1834 if (copy_to_user(argp, &info->mon_data,
1835 sizeof(struct mxser_mon)))
1836 return -EFAULT;
1837
1838 return 0;
1839 }
1840 case MOXA_ASPP_LSTATUS: {
1841 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1842 return -EFAULT;
1843
1844 info->err_shadow = 0;
1845 return 0;
1846 }
1847 case MOXA_SET_BAUD_METHOD: {
1848 int method;
1849
1850 if (get_user(method, (int __user *)argp))
1851 return -EFAULT;
1852 mxser_set_baud_method[tty->index] = method;
1853 return put_user(method, (int __user *)argp);
1854 }
1855 default:
1856 return -ENOIOCTLCMD;
1857 }
1858 return 0;
1859 }
1860
1861 static void mxser_stoprx(struct tty_struct *tty)
1862 {
1863 struct mxser_port *info = tty->driver_data;
1864
1865 info->ldisc_stop_rx = 1;
1866 if (I_IXOFF(tty)) {
1867 if (info->board->chip_flag) {
1868 info->IER &= ~MOXA_MUST_RECV_ISR;
1869 outb(info->IER, info->ioaddr + UART_IER);
1870 } else {
1871 info->x_char = STOP_CHAR(tty);
1872 outb(0, info->ioaddr + UART_IER);
1873 info->IER |= UART_IER_THRI;
1874 outb(info->IER, info->ioaddr + UART_IER);
1875 }
1876 }
1877
1878 if (tty->termios->c_cflag & CRTSCTS) {
1879 info->MCR &= ~UART_MCR_RTS;
1880 outb(info->MCR, info->ioaddr + UART_MCR);
1881 }
1882 }
1883
1884 /*
1885 * This routine is called by the upper-layer tty layer to signal that
1886 * incoming characters should be throttled.
1887 */
1888 static void mxser_throttle(struct tty_struct *tty)
1889 {
1890 mxser_stoprx(tty);
1891 }
1892
1893 static void mxser_unthrottle(struct tty_struct *tty)
1894 {
1895 struct mxser_port *info = tty->driver_data;
1896
1897 /* startrx */
1898 info->ldisc_stop_rx = 0;
1899 if (I_IXOFF(tty)) {
1900 if (info->x_char)
1901 info->x_char = 0;
1902 else {
1903 if (info->board->chip_flag) {
1904 info->IER |= MOXA_MUST_RECV_ISR;
1905 outb(info->IER, info->ioaddr + UART_IER);
1906 } else {
1907 info->x_char = START_CHAR(tty);
1908 outb(0, info->ioaddr + UART_IER);
1909 info->IER |= UART_IER_THRI;
1910 outb(info->IER, info->ioaddr + UART_IER);
1911 }
1912 }
1913 }
1914
1915 if (tty->termios->c_cflag & CRTSCTS) {
1916 info->MCR |= UART_MCR_RTS;
1917 outb(info->MCR, info->ioaddr + UART_MCR);
1918 }
1919 }
1920
1921 /*
1922 * mxser_stop() and mxser_start()
1923 *
1924 * This routines are called before setting or resetting tty->stopped.
1925 * They enable or disable transmitter interrupts, as necessary.
1926 */
1927 static void mxser_stop(struct tty_struct *tty)
1928 {
1929 struct mxser_port *info = tty->driver_data;
1930 unsigned long flags;
1931
1932 spin_lock_irqsave(&info->slock, flags);
1933 if (info->IER & UART_IER_THRI) {
1934 info->IER &= ~UART_IER_THRI;
1935 outb(info->IER, info->ioaddr + UART_IER);
1936 }
1937 spin_unlock_irqrestore(&info->slock, flags);
1938 }
1939
1940 static void mxser_start(struct tty_struct *tty)
1941 {
1942 struct mxser_port *info = tty->driver_data;
1943 unsigned long flags;
1944
1945 spin_lock_irqsave(&info->slock, flags);
1946 if (info->xmit_cnt && info->port.xmit_buf) {
1947 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1948 info->IER |= UART_IER_THRI;
1949 outb(info->IER, info->ioaddr + UART_IER);
1950 }
1951 spin_unlock_irqrestore(&info->slock, flags);
1952 }
1953
1954 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1955 {
1956 struct mxser_port *info = tty->driver_data;
1957 unsigned long flags;
1958
1959 spin_lock_irqsave(&info->slock, flags);
1960 mxser_change_speed(tty, old_termios);
1961 spin_unlock_irqrestore(&info->slock, flags);
1962
1963 if ((old_termios->c_cflag & CRTSCTS) &&
1964 !(tty->termios->c_cflag & CRTSCTS)) {
1965 tty->hw_stopped = 0;
1966 mxser_start(tty);
1967 }
1968
1969 /* Handle sw stopped */
1970 if ((old_termios->c_iflag & IXON) &&
1971 !(tty->termios->c_iflag & IXON)) {
1972 tty->stopped = 0;
1973
1974 if (info->board->chip_flag) {
1975 spin_lock_irqsave(&info->slock, flags);
1976 mxser_disable_must_rx_software_flow_control(
1977 info->ioaddr);
1978 spin_unlock_irqrestore(&info->slock, flags);
1979 }
1980
1981 mxser_start(tty);
1982 }
1983 }
1984
1985 /*
1986 * mxser_wait_until_sent() --- wait until the transmitter is empty
1987 */
1988 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1989 {
1990 struct mxser_port *info = tty->driver_data;
1991 unsigned long orig_jiffies, char_time;
1992 int lsr;
1993
1994 if (info->type == PORT_UNKNOWN)
1995 return;
1996
1997 if (info->xmit_fifo_size == 0)
1998 return; /* Just in case.... */
1999
2000 orig_jiffies = jiffies;
2001 /*
2002 * Set the check interval to be 1/5 of the estimated time to
2003 * send a single character, and make it at least 1. The check
2004 * interval should also be less than the timeout.
2005 *
2006 * Note: we have to use pretty tight timings here to satisfy
2007 * the NIST-PCTS.
2008 */
2009 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2010 char_time = char_time / 5;
2011 if (char_time == 0)
2012 char_time = 1;
2013 if (timeout && timeout < char_time)
2014 char_time = timeout;
2015 /*
2016 * If the transmitter hasn't cleared in twice the approximate
2017 * amount of time to send the entire FIFO, it probably won't
2018 * ever clear. This assumes the UART isn't doing flow
2019 * control, which is currently the case. Hence, if it ever
2020 * takes longer than info->timeout, this is probably due to a
2021 * UART bug of some kind. So, we clamp the timeout parameter at
2022 * 2*info->timeout.
2023 */
2024 if (!timeout || timeout > 2 * info->timeout)
2025 timeout = 2 * info->timeout;
2026 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2027 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2028 timeout, char_time);
2029 printk("jiff=%lu...", jiffies);
2030 #endif
2031 lock_kernel();
2032 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2033 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2034 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2035 #endif
2036 schedule_timeout_interruptible(char_time);
2037 if (signal_pending(current))
2038 break;
2039 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2040 break;
2041 }
2042 set_current_state(TASK_RUNNING);
2043 unlock_kernel();
2044
2045 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2046 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2047 #endif
2048 }
2049
2050 /*
2051 * This routine is called by tty_hangup() when a hangup is signaled.
2052 */
2053 static void mxser_hangup(struct tty_struct *tty)
2054 {
2055 struct mxser_port *info = tty->driver_data;
2056
2057 mxser_flush_buffer(tty);
2058 mxser_shutdown(tty);
2059 tty_port_hangup(&info->port);
2060 }
2061
2062 /*
2063 * mxser_rs_break() --- routine which turns the break handling on or off
2064 */
2065 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2066 {
2067 struct mxser_port *info = tty->driver_data;
2068 unsigned long flags;
2069
2070 spin_lock_irqsave(&info->slock, flags);
2071 if (break_state == -1)
2072 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2073 info->ioaddr + UART_LCR);
2074 else
2075 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2076 info->ioaddr + UART_LCR);
2077 spin_unlock_irqrestore(&info->slock, flags);
2078 return 0;
2079 }
2080
2081 static void mxser_receive_chars(struct tty_struct *tty,
2082 struct mxser_port *port, int *status)
2083 {
2084 unsigned char ch, gdl;
2085 int ignored = 0;
2086 int cnt = 0;
2087 int recv_room;
2088 int max = 256;
2089
2090 recv_room = tty->receive_room;
2091 if (recv_room == 0 && !port->ldisc_stop_rx)
2092 mxser_stoprx(tty);
2093 if (port->board->chip_flag != MOXA_OTHER_UART) {
2094
2095 if (*status & UART_LSR_SPECIAL)
2096 goto intr_old;
2097 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2098 (*status & MOXA_MUST_LSR_RERR))
2099 goto intr_old;
2100 if (*status & MOXA_MUST_LSR_RERR)
2101 goto intr_old;
2102
2103 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2104
2105 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2106 gdl &= MOXA_MUST_GDL_MASK;
2107 if (gdl >= recv_room) {
2108 if (!port->ldisc_stop_rx)
2109 mxser_stoprx(tty);
2110 }
2111 while (gdl--) {
2112 ch = inb(port->ioaddr + UART_RX);
2113 tty_insert_flip_char(tty, ch, 0);
2114 cnt++;
2115 }
2116 goto end_intr;
2117 }
2118 intr_old:
2119
2120 do {
2121 if (max-- < 0)
2122 break;
2123
2124 ch = inb(port->ioaddr + UART_RX);
2125 if (port->board->chip_flag && (*status & UART_LSR_OE))
2126 outb(0x23, port->ioaddr + UART_FCR);
2127 *status &= port->read_status_mask;
2128 if (*status & port->ignore_status_mask) {
2129 if (++ignored > 100)
2130 break;
2131 } else {
2132 char flag = 0;
2133 if (*status & UART_LSR_SPECIAL) {
2134 if (*status & UART_LSR_BI) {
2135 flag = TTY_BREAK;
2136 port->icount.brk++;
2137
2138 if (port->port.flags & ASYNC_SAK)
2139 do_SAK(tty);
2140 } else if (*status & UART_LSR_PE) {
2141 flag = TTY_PARITY;
2142 port->icount.parity++;
2143 } else if (*status & UART_LSR_FE) {
2144 flag = TTY_FRAME;
2145 port->icount.frame++;
2146 } else if (*status & UART_LSR_OE) {
2147 flag = TTY_OVERRUN;
2148 port->icount.overrun++;
2149 } else
2150 flag = TTY_BREAK;
2151 }
2152 tty_insert_flip_char(tty, ch, flag);
2153 cnt++;
2154 if (cnt >= recv_room) {
2155 if (!port->ldisc_stop_rx)
2156 mxser_stoprx(tty);
2157 break;
2158 }
2159
2160 }
2161
2162 if (port->board->chip_flag)
2163 break;
2164
2165 *status = inb(port->ioaddr + UART_LSR);
2166 } while (*status & UART_LSR_DR);
2167
2168 end_intr:
2169 mxvar_log.rxcnt[tty->index] += cnt;
2170 port->mon_data.rxcnt += cnt;
2171 port->mon_data.up_rxcnt += cnt;
2172
2173 /*
2174 * We are called from an interrupt context with &port->slock
2175 * being held. Drop it temporarily in order to prevent
2176 * recursive locking.
2177 */
2178 spin_unlock(&port->slock);
2179 tty_flip_buffer_push(tty);
2180 spin_lock(&port->slock);
2181 }
2182
2183 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2184 {
2185 int count, cnt;
2186
2187 if (port->x_char) {
2188 outb(port->x_char, port->ioaddr + UART_TX);
2189 port->x_char = 0;
2190 mxvar_log.txcnt[tty->index]++;
2191 port->mon_data.txcnt++;
2192 port->mon_data.up_txcnt++;
2193 port->icount.tx++;
2194 return;
2195 }
2196
2197 if (port->port.xmit_buf == NULL)
2198 return;
2199
2200 if (port->xmit_cnt <= 0 || tty->stopped ||
2201 (tty->hw_stopped &&
2202 (port->type != PORT_16550A) &&
2203 (!port->board->chip_flag))) {
2204 port->IER &= ~UART_IER_THRI;
2205 outb(port->IER, port->ioaddr + UART_IER);
2206 return;
2207 }
2208
2209 cnt = port->xmit_cnt;
2210 count = port->xmit_fifo_size;
2211 do {
2212 outb(port->port.xmit_buf[port->xmit_tail++],
2213 port->ioaddr + UART_TX);
2214 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2215 if (--port->xmit_cnt <= 0)
2216 break;
2217 } while (--count > 0);
2218 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2219
2220 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2221 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2222 port->icount.tx += (cnt - port->xmit_cnt);
2223
2224 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2225 tty_wakeup(tty);
2226
2227 if (port->xmit_cnt <= 0) {
2228 port->IER &= ~UART_IER_THRI;
2229 outb(port->IER, port->ioaddr + UART_IER);
2230 }
2231 }
2232
2233 /*
2234 * This is the serial driver's generic interrupt routine
2235 */
2236 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2237 {
2238 int status, iir, i;
2239 struct mxser_board *brd = NULL;
2240 struct mxser_port *port;
2241 int max, irqbits, bits, msr;
2242 unsigned int int_cnt, pass_counter = 0;
2243 int handled = IRQ_NONE;
2244 struct tty_struct *tty;
2245
2246 for (i = 0; i < MXSER_BOARDS; i++)
2247 if (dev_id == &mxser_boards[i]) {
2248 brd = dev_id;
2249 break;
2250 }
2251
2252 if (i == MXSER_BOARDS)
2253 goto irq_stop;
2254 if (brd == NULL)
2255 goto irq_stop;
2256 max = brd->info->nports;
2257 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2258 irqbits = inb(brd->vector) & brd->vector_mask;
2259 if (irqbits == brd->vector_mask)
2260 break;
2261
2262 handled = IRQ_HANDLED;
2263 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2264 if (irqbits == brd->vector_mask)
2265 break;
2266 if (bits & irqbits)
2267 continue;
2268 port = &brd->ports[i];
2269
2270 int_cnt = 0;
2271 spin_lock(&port->slock);
2272 do {
2273 iir = inb(port->ioaddr + UART_IIR);
2274 if (iir & UART_IIR_NO_INT)
2275 break;
2276 iir &= MOXA_MUST_IIR_MASK;
2277 tty = tty_port_tty_get(&port->port);
2278 if (!tty ||
2279 (port->port.flags & ASYNC_CLOSING) ||
2280 !(port->port.flags &
2281 ASYNC_INITIALIZED)) {
2282 status = inb(port->ioaddr + UART_LSR);
2283 outb(0x27, port->ioaddr + UART_FCR);
2284 inb(port->ioaddr + UART_MSR);
2285 tty_kref_put(tty);
2286 break;
2287 }
2288
2289 status = inb(port->ioaddr + UART_LSR);
2290
2291 if (status & UART_LSR_PE)
2292 port->err_shadow |= NPPI_NOTIFY_PARITY;
2293 if (status & UART_LSR_FE)
2294 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2295 if (status & UART_LSR_OE)
2296 port->err_shadow |=
2297 NPPI_NOTIFY_HW_OVERRUN;
2298 if (status & UART_LSR_BI)
2299 port->err_shadow |= NPPI_NOTIFY_BREAK;
2300
2301 if (port->board->chip_flag) {
2302 if (iir == MOXA_MUST_IIR_GDA ||
2303 iir == MOXA_MUST_IIR_RDA ||
2304 iir == MOXA_MUST_IIR_RTO ||
2305 iir == MOXA_MUST_IIR_LSR)
2306 mxser_receive_chars(tty, port,
2307 &status);
2308
2309 } else {
2310 status &= port->read_status_mask;
2311 if (status & UART_LSR_DR)
2312 mxser_receive_chars(tty, port,
2313 &status);
2314 }
2315 msr = inb(port->ioaddr + UART_MSR);
2316 if (msr & UART_MSR_ANY_DELTA)
2317 mxser_check_modem_status(tty, port, msr);
2318
2319 if (port->board->chip_flag) {
2320 if (iir == 0x02 && (status &
2321 UART_LSR_THRE))
2322 mxser_transmit_chars(tty, port);
2323 } else {
2324 if (status & UART_LSR_THRE)
2325 mxser_transmit_chars(tty, port);
2326 }
2327 tty_kref_put(tty);
2328 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2329 spin_unlock(&port->slock);
2330 }
2331 }
2332
2333 irq_stop:
2334 return handled;
2335 }
2336
2337 static const struct tty_operations mxser_ops = {
2338 .open = mxser_open,
2339 .close = mxser_close,
2340 .write = mxser_write,
2341 .put_char = mxser_put_char,
2342 .flush_chars = mxser_flush_chars,
2343 .write_room = mxser_write_room,
2344 .chars_in_buffer = mxser_chars_in_buffer,
2345 .flush_buffer = mxser_flush_buffer,
2346 .ioctl = mxser_ioctl,
2347 .throttle = mxser_throttle,
2348 .unthrottle = mxser_unthrottle,
2349 .set_termios = mxser_set_termios,
2350 .stop = mxser_stop,
2351 .start = mxser_start,
2352 .hangup = mxser_hangup,
2353 .break_ctl = mxser_rs_break,
2354 .wait_until_sent = mxser_wait_until_sent,
2355 .tiocmget = mxser_tiocmget,
2356 .tiocmset = mxser_tiocmset,
2357 };
2358
2359 struct tty_port_operations mxser_port_ops = {
2360 .carrier_raised = mxser_carrier_raised,
2361 .dtr_rts = mxser_dtr_rts,
2362 };
2363
2364 /*
2365 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2366 */
2367
2368 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2369 unsigned int irq)
2370 {
2371 if (irq)
2372 free_irq(brd->irq, brd);
2373 if (pdev != NULL) { /* PCI */
2374 #ifdef CONFIG_PCI
2375 pci_release_region(pdev, 2);
2376 pci_release_region(pdev, 3);
2377 #endif
2378 } else {
2379 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2380 release_region(brd->vector, 1);
2381 }
2382 }
2383
2384 static int __devinit mxser_initbrd(struct mxser_board *brd,
2385 struct pci_dev *pdev)
2386 {
2387 struct mxser_port *info;
2388 unsigned int i;
2389 int retval;
2390
2391 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2392 brd->ports[0].max_baud);
2393
2394 for (i = 0; i < brd->info->nports; i++) {
2395 info = &brd->ports[i];
2396 tty_port_init(&info->port);
2397 info->port.ops = &mxser_port_ops;
2398 info->board = brd;
2399 info->stop_rx = 0;
2400 info->ldisc_stop_rx = 0;
2401
2402 /* Enhance mode enabled here */
2403 if (brd->chip_flag != MOXA_OTHER_UART)
2404 mxser_enable_must_enchance_mode(info->ioaddr);
2405
2406 info->port.flags = ASYNC_SHARE_IRQ;
2407 info->type = brd->uart_type;
2408
2409 process_txrx_fifo(info);
2410
2411 info->custom_divisor = info->baud_base * 16;
2412 info->port.close_delay = 5 * HZ / 10;
2413 info->port.closing_wait = 30 * HZ;
2414 info->normal_termios = mxvar_sdriver->init_termios;
2415 init_waitqueue_head(&info->delta_msr_wait);
2416 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2417 info->err_shadow = 0;
2418 spin_lock_init(&info->slock);
2419
2420 /* before set INT ISR, disable all int */
2421 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2422 info->ioaddr + UART_IER);
2423 }
2424
2425 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2426 brd);
2427 if (retval) {
2428 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2429 "conflict with another device.\n",
2430 brd->info->name, brd->irq);
2431 /* We hold resources, we need to release them. */
2432 mxser_release_res(brd, pdev, 0);
2433 }
2434 return retval;
2435 }
2436
2437 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2438 {
2439 int id, i, bits;
2440 unsigned short regs[16], irq;
2441 unsigned char scratch, scratch2;
2442
2443 brd->chip_flag = MOXA_OTHER_UART;
2444
2445 id = mxser_read_register(cap, regs);
2446 switch (id) {
2447 case C168_ASIC_ID:
2448 brd->info = &mxser_cards[0];
2449 break;
2450 case C104_ASIC_ID:
2451 brd->info = &mxser_cards[1];
2452 break;
2453 case CI104J_ASIC_ID:
2454 brd->info = &mxser_cards[2];
2455 break;
2456 case C102_ASIC_ID:
2457 brd->info = &mxser_cards[5];
2458 break;
2459 case CI132_ASIC_ID:
2460 brd->info = &mxser_cards[6];
2461 break;
2462 case CI134_ASIC_ID:
2463 brd->info = &mxser_cards[7];
2464 break;
2465 default:
2466 return 0;
2467 }
2468
2469 irq = 0;
2470 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2471 Flag-hack checks if configuration should be read as 2-port here. */
2472 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2473 irq = regs[9] & 0xF000;
2474 irq = irq | (irq >> 4);
2475 if (irq != (regs[9] & 0xFF00))
2476 goto err_irqconflict;
2477 } else if (brd->info->nports == 4) {
2478 irq = regs[9] & 0xF000;
2479 irq = irq | (irq >> 4);
2480 irq = irq | (irq >> 8);
2481 if (irq != regs[9])
2482 goto err_irqconflict;
2483 } else if (brd->info->nports == 8) {
2484 irq = regs[9] & 0xF000;
2485 irq = irq | (irq >> 4);
2486 irq = irq | (irq >> 8);
2487 if ((irq != regs[9]) || (irq != regs[10]))
2488 goto err_irqconflict;
2489 }
2490
2491 if (!irq) {
2492 printk(KERN_ERR "mxser: interrupt number unset\n");
2493 return -EIO;
2494 }
2495 brd->irq = ((int)(irq & 0xF000) >> 12);
2496 for (i = 0; i < 8; i++)
2497 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2498 if ((regs[12] & 0x80) == 0) {
2499 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2500 return -EIO;
2501 }
2502 brd->vector = (int)regs[11]; /* interrupt vector */
2503 if (id == 1)
2504 brd->vector_mask = 0x00FF;
2505 else
2506 brd->vector_mask = 0x000F;
2507 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2508 if (regs[12] & bits) {
2509 brd->ports[i].baud_base = 921600;
2510 brd->ports[i].max_baud = 921600;
2511 } else {
2512 brd->ports[i].baud_base = 115200;
2513 brd->ports[i].max_baud = 115200;
2514 }
2515 }
2516 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2517 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2518 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2519 outb(scratch2, cap + UART_LCR);
2520 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2521 scratch = inb(cap + UART_IIR);
2522
2523 if (scratch & 0xC0)
2524 brd->uart_type = PORT_16550A;
2525 else
2526 brd->uart_type = PORT_16450;
2527 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2528 "mxser(IO)")) {
2529 printk(KERN_ERR "mxser: can't request ports I/O region: "
2530 "0x%.8lx-0x%.8lx\n",
2531 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2532 8 * brd->info->nports - 1);
2533 return -EIO;
2534 }
2535 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2536 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2537 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2538 "0x%.8lx-0x%.8lx\n",
2539 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2540 8 * brd->info->nports - 1);
2541 return -EIO;
2542 }
2543 return brd->info->nports;
2544
2545 err_irqconflict:
2546 printk(KERN_ERR "mxser: invalid interrupt number\n");
2547 return -EIO;
2548 }
2549
2550 static int __devinit mxser_probe(struct pci_dev *pdev,
2551 const struct pci_device_id *ent)
2552 {
2553 #ifdef CONFIG_PCI
2554 struct mxser_board *brd;
2555 unsigned int i, j;
2556 unsigned long ioaddress;
2557 int retval = -EINVAL;
2558
2559 for (i = 0; i < MXSER_BOARDS; i++)
2560 if (mxser_boards[i].info == NULL)
2561 break;
2562
2563 if (i >= MXSER_BOARDS) {
2564 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2565 "not configured\n", MXSER_BOARDS);
2566 goto err;
2567 }
2568
2569 brd = &mxser_boards[i];
2570 brd->idx = i * MXSER_PORTS_PER_BOARD;
2571 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2572 mxser_cards[ent->driver_data].name,
2573 pdev->bus->number, PCI_SLOT(pdev->devfn));
2574
2575 retval = pci_enable_device(pdev);
2576 if (retval) {
2577 dev_err(&pdev->dev, "PCI enable failed\n");
2578 goto err;
2579 }
2580
2581 /* io address */
2582 ioaddress = pci_resource_start(pdev, 2);
2583 retval = pci_request_region(pdev, 2, "mxser(IO)");
2584 if (retval)
2585 goto err;
2586
2587 brd->info = &mxser_cards[ent->driver_data];
2588 for (i = 0; i < brd->info->nports; i++)
2589 brd->ports[i].ioaddr = ioaddress + 8 * i;
2590
2591 /* vector */
2592 ioaddress = pci_resource_start(pdev, 3);
2593 retval = pci_request_region(pdev, 3, "mxser(vector)");
2594 if (retval)
2595 goto err_relio;
2596 brd->vector = ioaddress;
2597
2598 /* irq */
2599 brd->irq = pdev->irq;
2600
2601 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2602 brd->uart_type = PORT_16550A;
2603 brd->vector_mask = 0;
2604
2605 for (i = 0; i < brd->info->nports; i++) {
2606 for (j = 0; j < UART_INFO_NUM; j++) {
2607 if (Gpci_uart_info[j].type == brd->chip_flag) {
2608 brd->ports[i].max_baud =
2609 Gpci_uart_info[j].max_baud;
2610
2611 /* exception....CP-102 */
2612 if (brd->info->flags & MXSER_HIGHBAUD)
2613 brd->ports[i].max_baud = 921600;
2614 break;
2615 }
2616 }
2617 }
2618
2619 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2620 for (i = 0; i < brd->info->nports; i++) {
2621 if (i < 4)
2622 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2623 else
2624 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2625 }
2626 outb(0, ioaddress + 4); /* default set to RS232 mode */
2627 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2628 }
2629
2630 for (i = 0; i < brd->info->nports; i++) {
2631 brd->vector_mask |= (1 << i);
2632 brd->ports[i].baud_base = 921600;
2633 }
2634
2635 /* mxser_initbrd will hook ISR. */
2636 retval = mxser_initbrd(brd, pdev);
2637 if (retval)
2638 goto err_null;
2639
2640 for (i = 0; i < brd->info->nports; i++)
2641 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2642
2643 pci_set_drvdata(pdev, brd);
2644
2645 return 0;
2646 err_relio:
2647 pci_release_region(pdev, 2);
2648 err_null:
2649 brd->info = NULL;
2650 err:
2651 return retval;
2652 #else
2653 return -ENODEV;
2654 #endif
2655 }
2656
2657 static void __devexit mxser_remove(struct pci_dev *pdev)
2658 {
2659 struct mxser_board *brd = pci_get_drvdata(pdev);
2660 unsigned int i;
2661
2662 for (i = 0; i < brd->info->nports; i++)
2663 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2664
2665 mxser_release_res(brd, pdev, 1);
2666 brd->info = NULL;
2667 }
2668
2669 static struct pci_driver mxser_driver = {
2670 .name = "mxser",
2671 .id_table = mxser_pcibrds,
2672 .probe = mxser_probe,
2673 .remove = __devexit_p(mxser_remove)
2674 };
2675
2676 static int __init mxser_module_init(void)
2677 {
2678 struct mxser_board *brd;
2679 unsigned int b, i, m;
2680 int retval;
2681
2682 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2683 if (!mxvar_sdriver)
2684 return -ENOMEM;
2685
2686 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2687 MXSER_VERSION);
2688
2689 /* Initialize the tty_driver structure */
2690 mxvar_sdriver->owner = THIS_MODULE;
2691 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2692 mxvar_sdriver->name = "ttyMI";
2693 mxvar_sdriver->major = ttymajor;
2694 mxvar_sdriver->minor_start = 0;
2695 mxvar_sdriver->num = MXSER_PORTS + 1;
2696 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2697 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2698 mxvar_sdriver->init_termios = tty_std_termios;
2699 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2700 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2701 tty_set_operations(mxvar_sdriver, &mxser_ops);
2702
2703 retval = tty_register_driver(mxvar_sdriver);
2704 if (retval) {
2705 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2706 "tty driver !\n");
2707 goto err_put;
2708 }
2709
2710 /* Start finding ISA boards here */
2711 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2712 if (!ioaddr[b])
2713 continue;
2714
2715 brd = &mxser_boards[m];
2716 retval = mxser_get_ISA_conf(ioaddr[b], brd);
2717 if (retval <= 0) {
2718 brd->info = NULL;
2719 continue;
2720 }
2721
2722 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2723 brd->info->name, ioaddr[b]);
2724
2725 /* mxser_initbrd will hook ISR. */
2726 if (mxser_initbrd(brd, NULL) < 0) {
2727 brd->info = NULL;
2728 continue;
2729 }
2730
2731 brd->idx = m * MXSER_PORTS_PER_BOARD;
2732 for (i = 0; i < brd->info->nports; i++)
2733 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
2734
2735 m++;
2736 }
2737
2738 retval = pci_register_driver(&mxser_driver);
2739 if (retval) {
2740 printk(KERN_ERR "mxser: can't register pci driver\n");
2741 if (!m) {
2742 retval = -ENODEV;
2743 goto err_unr;
2744 } /* else: we have some ISA cards under control */
2745 }
2746
2747 return 0;
2748 err_unr:
2749 tty_unregister_driver(mxvar_sdriver);
2750 err_put:
2751 put_tty_driver(mxvar_sdriver);
2752 return retval;
2753 }
2754
2755 static void __exit mxser_module_exit(void)
2756 {
2757 unsigned int i, j;
2758
2759 pci_unregister_driver(&mxser_driver);
2760
2761 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2762 if (mxser_boards[i].info != NULL)
2763 for (j = 0; j < mxser_boards[i].info->nports; j++)
2764 tty_unregister_device(mxvar_sdriver,
2765 mxser_boards[i].idx + j);
2766 tty_unregister_driver(mxvar_sdriver);
2767 put_tty_driver(mxvar_sdriver);
2768
2769 for (i = 0; i < MXSER_BOARDS; i++)
2770 if (mxser_boards[i].info != NULL)
2771 mxser_release_res(&mxser_boards[i], NULL, 1);
2772 }
2773
2774 module_init(mxser_module_init);
2775 module_exit(mxser_module_exit);
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