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1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com.tw).
5 * Copyright (C) 2006-2007 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
19 * - Fixed sleep with spinlock held in mxser_send_break
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/serial_reg.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/gfp.h>
37 #include <linux/ioport.h>
38 #include <linux/mm.h>
39 #include <linux/delay.h>
40 #include <linux/pci.h>
41 #include <linux/bitops.h>
42
43 #include <asm/system.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/uaccess.h>
47
48 #include "mxser.h"
49
50 #define MXSER_VERSION "2.0.2" /* 1.10 */
51 #define MXSERMAJOR 174
52 #define MXSERCUMAJOR 175
53
54 #define MXSER_BOARDS 4 /* Max. boards */
55 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
56 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
57 #define MXSER_ISR_PASS_LIMIT 100
58
59 #define MXSER_ERR_IOADDR -1
60 #define MXSER_ERR_IRQ -2
61 #define MXSER_ERR_IRQ_CONFLIT -3
62 #define MXSER_ERR_VECTOR -4
63
64 /*CheckIsMoxaMust return value*/
65 #define MOXA_OTHER_UART 0x00
66 #define MOXA_MUST_MU150_HWID 0x01
67 #define MOXA_MUST_MU860_HWID 0x02
68
69 #define WAKEUP_CHARS 256
70
71 #define UART_MCR_AFE 0x20
72 #define UART_LSR_SPECIAL 0x1E
73
74 #define PCI_DEVICE_ID_CB108 0x1080
75 #define PCI_DEVICE_ID_CB114 0x1142
76 #define PCI_DEVICE_ID_CB134I 0x1341
77 #define PCI_DEVICE_ID_CP138U 0x1380
78 #define PCI_DEVICE_ID_POS104UL 0x1044
79
80
81 #define C168_ASIC_ID 1
82 #define C104_ASIC_ID 2
83 #define C102_ASIC_ID 0xB
84 #define CI132_ASIC_ID 4
85 #define CI134_ASIC_ID 3
86 #define CI104J_ASIC_ID 5
87
88 #define MXSER_HIGHBAUD 1
89 #define MXSER_HAS2 2
90
91 /* This is only for PCI */
92 static const struct {
93 int type;
94 int tx_fifo;
95 int rx_fifo;
96 int xmit_fifo_size;
97 int rx_high_water;
98 int rx_trigger;
99 int rx_low_water;
100 long max_baud;
101 } Gpci_uart_info[] = {
102 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
103 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
104 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
105 };
106 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
107
108 struct mxser_cardinfo {
109 char *name;
110 unsigned int nports;
111 unsigned int flags;
112 };
113
114 static const struct mxser_cardinfo mxser_cards[] = {
115 /* 0*/ { "C168 series", 8, },
116 { "C104 series", 4, },
117 { "CI-104J series", 4, },
118 { "C168H/PCI series", 8, },
119 { "C104H/PCI series", 4, },
120 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
121 { "CI-132 series", 4, MXSER_HAS2 },
122 { "CI-134 series", 4, },
123 { "CP-132 series", 2, },
124 { "CP-114 series", 4, },
125 /*10*/ { "CT-114 series", 4, },
126 { "CP-102 series", 2, MXSER_HIGHBAUD },
127 { "CP-104U series", 4, },
128 { "CP-168U series", 8, },
129 { "CP-132U series", 2, },
130 /*15*/ { "CP-134U series", 4, },
131 { "CP-104JU series", 4, },
132 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
133 { "CP-118U series", 8, },
134 { "CP-102UL series", 2, },
135 /*20*/ { "CP-102U series", 2, },
136 { "CP-118EL series", 8, },
137 { "CP-168EL series", 8, },
138 { "CP-104EL series", 4, },
139 { "CB-108 series", 8, },
140 /*25*/ { "CB-114 series", 4, },
141 { "CB-134I series", 4, },
142 { "CP-138U series", 8, },
143 { "POS-104UL series", 4, }
144 };
145
146 /* driver_data correspond to the lines in the structure above
147 see also ISA probe function before you change something */
148 static struct pci_device_id mxser_pcibrds[] = {
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
172 { }
173 };
174 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
175
176 static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
177 static int ttymajor = MXSERMAJOR;
178
179 /* Variables for insmod */
180
181 MODULE_AUTHOR("Casper Yang");
182 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
183 module_param_array(ioaddr, int, NULL, 0);
184 module_param(ttymajor, int, 0);
185 MODULE_LICENSE("GPL");
186
187 struct mxser_log {
188 int tick;
189 unsigned long rxcnt[MXSER_PORTS];
190 unsigned long txcnt[MXSER_PORTS];
191 };
192
193
194 struct mxser_mon {
195 unsigned long rxcnt;
196 unsigned long txcnt;
197 unsigned long up_rxcnt;
198 unsigned long up_txcnt;
199 int modem_status;
200 unsigned char hold_reason;
201 };
202
203 struct mxser_mon_ext {
204 unsigned long rx_cnt[32];
205 unsigned long tx_cnt[32];
206 unsigned long up_rxcnt[32];
207 unsigned long up_txcnt[32];
208 int modem_status[32];
209
210 long baudrate[32];
211 int databits[32];
212 int stopbits[32];
213 int parity[32];
214 int flowctrl[32];
215 int fifo[32];
216 int iftype[32];
217 };
218
219 struct mxser_board;
220
221 struct mxser_port {
222 struct mxser_board *board;
223 struct tty_struct *tty;
224
225 unsigned long ioaddr;
226 unsigned long opmode_ioaddr;
227 int max_baud;
228
229 int rx_high_water;
230 int rx_trigger; /* Rx fifo trigger level */
231 int rx_low_water;
232 int baud_base; /* max. speed */
233 int type; /* UART type */
234 int flags; /* defined in tty.h */
235
236 int x_char; /* xon/xoff character */
237 int IER; /* Interrupt Enable Register */
238 int MCR; /* Modem control register */
239
240 unsigned char stop_rx;
241 unsigned char ldisc_stop_rx;
242
243 int custom_divisor;
244 int close_delay;
245 unsigned short closing_wait;
246 unsigned char err_shadow;
247 unsigned long event;
248
249 int count; /* # of fd on device */
250 int blocked_open; /* # of blocked opens */
251 struct async_icount icount; /* kernel counters for 4 input interrupts */
252 int timeout;
253
254 int read_status_mask;
255 int ignore_status_mask;
256 int xmit_fifo_size;
257 unsigned char *xmit_buf;
258 int xmit_head;
259 int xmit_tail;
260 int xmit_cnt;
261
262 struct ktermios normal_termios;
263
264 struct mxser_mon mon_data;
265
266 spinlock_t slock;
267 wait_queue_head_t open_wait;
268 wait_queue_head_t delta_msr_wait;
269 };
270
271 struct mxser_board {
272 unsigned int idx;
273 int irq;
274 const struct mxser_cardinfo *info;
275 unsigned long vector;
276 unsigned long vector_mask;
277
278 int chip_flag;
279 int uart_type;
280
281 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
282 };
283
284 struct mxser_mstatus {
285 tcflag_t cflag;
286 int cts;
287 int dsr;
288 int ri;
289 int dcd;
290 };
291
292 static struct mxser_mstatus GMStatus[MXSER_PORTS];
293
294 static int mxserBoardCAP[MXSER_BOARDS] = {
295 0, 0, 0, 0
296 /* 0x180, 0x280, 0x200, 0x320 */
297 };
298
299 static struct mxser_board mxser_boards[MXSER_BOARDS];
300 static struct tty_driver *mxvar_sdriver;
301 static struct mxser_log mxvar_log;
302 static int mxvar_diagflag;
303 static unsigned char mxser_msr[MXSER_PORTS + 1];
304 static struct mxser_mon_ext mon_data_ext;
305 static int mxser_set_baud_method[MXSER_PORTS + 1];
306
307 #ifdef CONFIG_PCI
308 static int __devinit CheckIsMoxaMust(unsigned long io)
309 {
310 u8 oldmcr, hwid;
311 int i;
312
313 outb(0, io + UART_LCR);
314 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
315 oldmcr = inb(io + UART_MCR);
316 outb(0, io + UART_MCR);
317 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
318 if ((hwid = inb(io + UART_MCR)) != 0) {
319 outb(oldmcr, io + UART_MCR);
320 return MOXA_OTHER_UART;
321 }
322
323 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
324 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
325 if (hwid == Gpci_uart_info[i].type)
326 return (int)hwid;
327 }
328 return MOXA_OTHER_UART;
329 }
330 #endif
331
332 static void process_txrx_fifo(struct mxser_port *info)
333 {
334 int i;
335
336 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
337 info->rx_trigger = 1;
338 info->rx_high_water = 1;
339 info->rx_low_water = 1;
340 info->xmit_fifo_size = 1;
341 } else
342 for (i = 0; i < UART_INFO_NUM; i++)
343 if (info->board->chip_flag == Gpci_uart_info[i].type) {
344 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
345 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
346 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
347 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
348 break;
349 }
350 }
351
352 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
353 {
354 unsigned char status = 0;
355
356 status = inb(baseaddr + UART_MSR);
357
358 mxser_msr[port] &= 0x0F;
359 mxser_msr[port] |= status;
360 status = mxser_msr[port];
361 if (mode)
362 mxser_msr[port] = 0;
363
364 return status;
365 }
366
367 static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
368 struct mxser_port *port)
369 {
370 DECLARE_WAITQUEUE(wait, current);
371 int retval;
372 int do_clocal = 0;
373 unsigned long flags;
374
375 /*
376 * If non-blocking mode is set, or the port is not enabled,
377 * then make the check up front and then exit.
378 */
379 if ((filp->f_flags & O_NONBLOCK) ||
380 test_bit(TTY_IO_ERROR, &tty->flags)) {
381 port->flags |= ASYNC_NORMAL_ACTIVE;
382 return 0;
383 }
384
385 if (tty->termios->c_cflag & CLOCAL)
386 do_clocal = 1;
387
388 /*
389 * Block waiting for the carrier detect and the line to become
390 * free (i.e., not in use by the callout). While we are in
391 * this loop, port->count is dropped by one, so that
392 * mxser_close() knows when to free things. We restore it upon
393 * exit, either normal or abnormal.
394 */
395 retval = 0;
396 add_wait_queue(&port->open_wait, &wait);
397
398 spin_lock_irqsave(&port->slock, flags);
399 if (!tty_hung_up_p(filp))
400 port->count--;
401 spin_unlock_irqrestore(&port->slock, flags);
402 port->blocked_open++;
403 while (1) {
404 spin_lock_irqsave(&port->slock, flags);
405 outb(inb(port->ioaddr + UART_MCR) |
406 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
407 spin_unlock_irqrestore(&port->slock, flags);
408 set_current_state(TASK_INTERRUPTIBLE);
409 if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) {
410 if (port->flags & ASYNC_HUP_NOTIFY)
411 retval = -EAGAIN;
412 else
413 retval = -ERESTARTSYS;
414 break;
415 }
416 if (!(port->flags & ASYNC_CLOSING) &&
417 (do_clocal ||
418 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
419 break;
420 if (signal_pending(current)) {
421 retval = -ERESTARTSYS;
422 break;
423 }
424 schedule();
425 }
426 set_current_state(TASK_RUNNING);
427 remove_wait_queue(&port->open_wait, &wait);
428 if (!tty_hung_up_p(filp))
429 port->count++;
430 port->blocked_open--;
431 if (retval)
432 return retval;
433 port->flags |= ASYNC_NORMAL_ACTIVE;
434 return 0;
435 }
436
437 static int mxser_set_baud(struct mxser_port *info, long newspd)
438 {
439 int quot = 0, baud;
440 unsigned char cval;
441
442 if (!info->tty || !info->tty->termios)
443 return -1;
444
445 if (!(info->ioaddr))
446 return -1;
447
448 if (newspd > info->max_baud)
449 return -1;
450
451 if (newspd == 134) {
452 quot = 2 * info->baud_base / 269;
453 tty_encode_baud_rate(info->tty, 134, 134);
454 } else if (newspd) {
455 quot = info->baud_base / newspd;
456 if (quot == 0)
457 quot = 1;
458 baud = info->baud_base/quot;
459 tty_encode_baud_rate(info->tty, baud, baud);
460 } else {
461 quot = 0;
462 }
463
464 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
465 info->timeout += HZ / 50; /* Add .02 seconds of slop */
466
467 if (quot) {
468 info->MCR |= UART_MCR_DTR;
469 outb(info->MCR, info->ioaddr + UART_MCR);
470 } else {
471 info->MCR &= ~UART_MCR_DTR;
472 outb(info->MCR, info->ioaddr + UART_MCR);
473 return 0;
474 }
475
476 cval = inb(info->ioaddr + UART_LCR);
477
478 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
479
480 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
481 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
482 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
483
484 #ifdef BOTHER
485 if (C_BAUD(info->tty) == BOTHER) {
486 quot = info->baud_base % newspd;
487 quot *= 8;
488 if (quot % newspd > newspd / 2) {
489 quot /= newspd;
490 quot++;
491 } else
492 quot /= newspd;
493
494 SET_MOXA_MUST_ENUM_VALUE(info->ioaddr, quot);
495 } else
496 #endif
497 SET_MOXA_MUST_ENUM_VALUE(info->ioaddr, 0);
498
499 return 0;
500 }
501
502 /*
503 * This routine is called to set the UART divisor registers to match
504 * the specified baud rate for a serial port.
505 */
506 static int mxser_change_speed(struct mxser_port *info,
507 struct ktermios *old_termios)
508 {
509 unsigned cflag, cval, fcr;
510 int ret = 0;
511 unsigned char status;
512
513 if (!info->tty || !info->tty->termios)
514 return ret;
515 cflag = info->tty->termios->c_cflag;
516 if (!(info->ioaddr))
517 return ret;
518
519 if (mxser_set_baud_method[info->tty->index] == 0)
520 mxser_set_baud(info, tty_get_baud_rate(info->tty));
521
522 /* byte size and parity */
523 switch (cflag & CSIZE) {
524 case CS5:
525 cval = 0x00;
526 break;
527 case CS6:
528 cval = 0x01;
529 break;
530 case CS7:
531 cval = 0x02;
532 break;
533 case CS8:
534 cval = 0x03;
535 break;
536 default:
537 cval = 0x00;
538 break; /* too keep GCC shut... */
539 }
540 if (cflag & CSTOPB)
541 cval |= 0x04;
542 if (cflag & PARENB)
543 cval |= UART_LCR_PARITY;
544 if (!(cflag & PARODD))
545 cval |= UART_LCR_EPAR;
546 if (cflag & CMSPAR)
547 cval |= UART_LCR_SPAR;
548
549 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
550 if (info->board->chip_flag) {
551 fcr = UART_FCR_ENABLE_FIFO;
552 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
553 SET_MOXA_MUST_FIFO_VALUE(info);
554 } else
555 fcr = 0;
556 } else {
557 fcr = UART_FCR_ENABLE_FIFO;
558 if (info->board->chip_flag) {
559 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
560 SET_MOXA_MUST_FIFO_VALUE(info);
561 } else {
562 switch (info->rx_trigger) {
563 case 1:
564 fcr |= UART_FCR_TRIGGER_1;
565 break;
566 case 4:
567 fcr |= UART_FCR_TRIGGER_4;
568 break;
569 case 8:
570 fcr |= UART_FCR_TRIGGER_8;
571 break;
572 default:
573 fcr |= UART_FCR_TRIGGER_14;
574 break;
575 }
576 }
577 }
578
579 /* CTS flow control flag and modem status interrupts */
580 info->IER &= ~UART_IER_MSI;
581 info->MCR &= ~UART_MCR_AFE;
582 if (cflag & CRTSCTS) {
583 info->flags |= ASYNC_CTS_FLOW;
584 info->IER |= UART_IER_MSI;
585 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
586 info->MCR |= UART_MCR_AFE;
587 } else {
588 status = inb(info->ioaddr + UART_MSR);
589 if (info->tty->hw_stopped) {
590 if (status & UART_MSR_CTS) {
591 info->tty->hw_stopped = 0;
592 if (info->type != PORT_16550A &&
593 !info->board->chip_flag) {
594 outb(info->IER & ~UART_IER_THRI,
595 info->ioaddr +
596 UART_IER);
597 info->IER |= UART_IER_THRI;
598 outb(info->IER, info->ioaddr +
599 UART_IER);
600 }
601 tty_wakeup(info->tty);
602 }
603 } else {
604 if (!(status & UART_MSR_CTS)) {
605 info->tty->hw_stopped = 1;
606 if ((info->type != PORT_16550A) &&
607 (!info->board->chip_flag)) {
608 info->IER &= ~UART_IER_THRI;
609 outb(info->IER, info->ioaddr +
610 UART_IER);
611 }
612 }
613 }
614 }
615 } else {
616 info->flags &= ~ASYNC_CTS_FLOW;
617 }
618 outb(info->MCR, info->ioaddr + UART_MCR);
619 if (cflag & CLOCAL) {
620 info->flags &= ~ASYNC_CHECK_CD;
621 } else {
622 info->flags |= ASYNC_CHECK_CD;
623 info->IER |= UART_IER_MSI;
624 }
625 outb(info->IER, info->ioaddr + UART_IER);
626
627 /*
628 * Set up parity check flag
629 */
630 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
631 if (I_INPCK(info->tty))
632 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
633 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
634 info->read_status_mask |= UART_LSR_BI;
635
636 info->ignore_status_mask = 0;
637
638 if (I_IGNBRK(info->tty)) {
639 info->ignore_status_mask |= UART_LSR_BI;
640 info->read_status_mask |= UART_LSR_BI;
641 /*
642 * If we're ignore parity and break indicators, ignore
643 * overruns too. (For real raw support).
644 */
645 if (I_IGNPAR(info->tty)) {
646 info->ignore_status_mask |=
647 UART_LSR_OE |
648 UART_LSR_PE |
649 UART_LSR_FE;
650 info->read_status_mask |=
651 UART_LSR_OE |
652 UART_LSR_PE |
653 UART_LSR_FE;
654 }
655 }
656 if (info->board->chip_flag) {
657 SET_MOXA_MUST_XON1_VALUE(info->ioaddr, START_CHAR(info->tty));
658 SET_MOXA_MUST_XOFF1_VALUE(info->ioaddr, STOP_CHAR(info->tty));
659 if (I_IXON(info->tty)) {
660 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
661 } else {
662 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
663 }
664 if (I_IXOFF(info->tty)) {
665 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
666 } else {
667 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
668 }
669 }
670
671
672 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
673 outb(cval, info->ioaddr + UART_LCR);
674
675 return ret;
676 }
677
678 static void mxser_check_modem_status(struct mxser_port *port, int status)
679 {
680 /* update input line counters */
681 if (status & UART_MSR_TERI)
682 port->icount.rng++;
683 if (status & UART_MSR_DDSR)
684 port->icount.dsr++;
685 if (status & UART_MSR_DDCD)
686 port->icount.dcd++;
687 if (status & UART_MSR_DCTS)
688 port->icount.cts++;
689 port->mon_data.modem_status = status;
690 wake_up_interruptible(&port->delta_msr_wait);
691
692 if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
693 if (status & UART_MSR_DCD)
694 wake_up_interruptible(&port->open_wait);
695 }
696
697 if (port->flags & ASYNC_CTS_FLOW) {
698 if (port->tty->hw_stopped) {
699 if (status & UART_MSR_CTS) {
700 port->tty->hw_stopped = 0;
701
702 if ((port->type != PORT_16550A) &&
703 (!port->board->chip_flag)) {
704 outb(port->IER & ~UART_IER_THRI,
705 port->ioaddr + UART_IER);
706 port->IER |= UART_IER_THRI;
707 outb(port->IER, port->ioaddr +
708 UART_IER);
709 }
710 tty_wakeup(port->tty);
711 }
712 } else {
713 if (!(status & UART_MSR_CTS)) {
714 port->tty->hw_stopped = 1;
715 if (port->type != PORT_16550A &&
716 !port->board->chip_flag) {
717 port->IER &= ~UART_IER_THRI;
718 outb(port->IER, port->ioaddr +
719 UART_IER);
720 }
721 }
722 }
723 }
724 }
725
726 static int mxser_startup(struct mxser_port *info)
727 {
728 unsigned long page;
729 unsigned long flags;
730
731 page = __get_free_page(GFP_KERNEL);
732 if (!page)
733 return -ENOMEM;
734
735 spin_lock_irqsave(&info->slock, flags);
736
737 if (info->flags & ASYNC_INITIALIZED) {
738 free_page(page);
739 spin_unlock_irqrestore(&info->slock, flags);
740 return 0;
741 }
742
743 if (!info->ioaddr || !info->type) {
744 if (info->tty)
745 set_bit(TTY_IO_ERROR, &info->tty->flags);
746 free_page(page);
747 spin_unlock_irqrestore(&info->slock, flags);
748 return 0;
749 }
750 if (info->xmit_buf)
751 free_page(page);
752 else
753 info->xmit_buf = (unsigned char *) page;
754
755 /*
756 * Clear the FIFO buffers and disable them
757 * (they will be reenabled in mxser_change_speed())
758 */
759 if (info->board->chip_flag)
760 outb((UART_FCR_CLEAR_RCVR |
761 UART_FCR_CLEAR_XMIT |
762 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
763 else
764 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
765 info->ioaddr + UART_FCR);
766
767 /*
768 * At this point there's no way the LSR could still be 0xFF;
769 * if it is, then bail out, because there's likely no UART
770 * here.
771 */
772 if (inb(info->ioaddr + UART_LSR) == 0xff) {
773 spin_unlock_irqrestore(&info->slock, flags);
774 if (capable(CAP_SYS_ADMIN)) {
775 if (info->tty)
776 set_bit(TTY_IO_ERROR, &info->tty->flags);
777 return 0;
778 } else
779 return -ENODEV;
780 }
781
782 /*
783 * Clear the interrupt registers.
784 */
785 (void) inb(info->ioaddr + UART_LSR);
786 (void) inb(info->ioaddr + UART_RX);
787 (void) inb(info->ioaddr + UART_IIR);
788 (void) inb(info->ioaddr + UART_MSR);
789
790 /*
791 * Now, initialize the UART
792 */
793 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
794 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
795 outb(info->MCR, info->ioaddr + UART_MCR);
796
797 /*
798 * Finally, enable interrupts
799 */
800 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
801
802 if (info->board->chip_flag)
803 info->IER |= MOXA_MUST_IER_EGDAI;
804 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
805
806 /*
807 * And clear the interrupt registers again for luck.
808 */
809 (void) inb(info->ioaddr + UART_LSR);
810 (void) inb(info->ioaddr + UART_RX);
811 (void) inb(info->ioaddr + UART_IIR);
812 (void) inb(info->ioaddr + UART_MSR);
813
814 if (info->tty)
815 clear_bit(TTY_IO_ERROR, &info->tty->flags);
816 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
817
818 /*
819 * and set the speed of the serial port
820 */
821 mxser_change_speed(info, NULL);
822 info->flags |= ASYNC_INITIALIZED;
823 spin_unlock_irqrestore(&info->slock, flags);
824
825 return 0;
826 }
827
828 /*
829 * This routine will shutdown a serial port; interrupts maybe disabled, and
830 * DTR is dropped if the hangup on close termio flag is on.
831 */
832 static void mxser_shutdown(struct mxser_port *info)
833 {
834 unsigned long flags;
835
836 if (!(info->flags & ASYNC_INITIALIZED))
837 return;
838
839 spin_lock_irqsave(&info->slock, flags);
840
841 /*
842 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
843 * here so the queue might never be waken up
844 */
845 wake_up_interruptible(&info->delta_msr_wait);
846
847 /*
848 * Free the IRQ, if necessary
849 */
850 if (info->xmit_buf) {
851 free_page((unsigned long) info->xmit_buf);
852 info->xmit_buf = NULL;
853 }
854
855 info->IER = 0;
856 outb(0x00, info->ioaddr + UART_IER);
857
858 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
859 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
860 outb(info->MCR, info->ioaddr + UART_MCR);
861
862 /* clear Rx/Tx FIFO's */
863 if (info->board->chip_flag)
864 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
865 MOXA_MUST_FCR_GDA_MODE_ENABLE,
866 info->ioaddr + UART_FCR);
867 else
868 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
869 info->ioaddr + UART_FCR);
870
871 /* read data port to reset things */
872 (void) inb(info->ioaddr + UART_RX);
873
874 if (info->tty)
875 set_bit(TTY_IO_ERROR, &info->tty->flags);
876
877 info->flags &= ~ASYNC_INITIALIZED;
878
879 if (info->board->chip_flag)
880 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
881
882 spin_unlock_irqrestore(&info->slock, flags);
883 }
884
885 /*
886 * This routine is called whenever a serial port is opened. It
887 * enables interrupts for a serial port, linking in its async structure into
888 * the IRQ chain. It also performs the serial-specific
889 * initialization for the tty structure.
890 */
891 static int mxser_open(struct tty_struct *tty, struct file *filp)
892 {
893 struct mxser_port *info;
894 unsigned long flags;
895 int retval, line;
896
897 line = tty->index;
898 if (line == MXSER_PORTS)
899 return 0;
900 if (line < 0 || line > MXSER_PORTS)
901 return -ENODEV;
902 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
903 if (!info->ioaddr)
904 return -ENODEV;
905
906 tty->driver_data = info;
907 info->tty = tty;
908 /*
909 * Start up serial port
910 */
911 spin_lock_irqsave(&info->slock, flags);
912 info->count++;
913 spin_unlock_irqrestore(&info->slock, flags);
914 retval = mxser_startup(info);
915 if (retval)
916 return retval;
917
918 retval = mxser_block_til_ready(tty, filp, info);
919 if (retval)
920 return retval;
921
922 /* unmark here for very high baud rate (ex. 921600 bps) used */
923 tty->low_latency = 1;
924 return 0;
925 }
926
927 /*
928 * This routine is called when the serial port gets closed. First, we
929 * wait for the last remaining data to be sent. Then, we unlink its
930 * async structure from the interrupt chain if necessary, and we free
931 * that IRQ if nothing is left in the chain.
932 */
933 static void mxser_close(struct tty_struct *tty, struct file *filp)
934 {
935 struct mxser_port *info = tty->driver_data;
936
937 unsigned long timeout;
938 unsigned long flags;
939
940 if (tty->index == MXSER_PORTS)
941 return;
942 if (!info)
943 return;
944
945 spin_lock_irqsave(&info->slock, flags);
946
947 if (tty_hung_up_p(filp)) {
948 spin_unlock_irqrestore(&info->slock, flags);
949 return;
950 }
951 if ((tty->count == 1) && (info->count != 1)) {
952 /*
953 * Uh, oh. tty->count is 1, which means that the tty
954 * structure will be freed. Info->count should always
955 * be one in these conditions. If it's greater than
956 * one, we've got real problems, since it means the
957 * serial port won't be shutdown.
958 */
959 printk(KERN_ERR "mxser_close: bad serial port count; "
960 "tty->count is 1, info->count is %d\n", info->count);
961 info->count = 1;
962 }
963 if (--info->count < 0) {
964 printk(KERN_ERR "mxser_close: bad serial port count for "
965 "ttys%d: %d\n", tty->index, info->count);
966 info->count = 0;
967 }
968 if (info->count) {
969 spin_unlock_irqrestore(&info->slock, flags);
970 return;
971 }
972 info->flags |= ASYNC_CLOSING;
973 spin_unlock_irqrestore(&info->slock, flags);
974 /*
975 * Save the termios structure, since this port may have
976 * separate termios for callout and dialin.
977 */
978 if (info->flags & ASYNC_NORMAL_ACTIVE)
979 info->normal_termios = *tty->termios;
980 /*
981 * Now we wait for the transmit buffer to clear; and we notify
982 * the line discipline to only process XON/XOFF characters.
983 */
984 tty->closing = 1;
985 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
986 tty_wait_until_sent(tty, info->closing_wait);
987 /*
988 * At this point we stop accepting input. To do this, we
989 * disable the receive line status interrupts, and tell the
990 * interrupt driver to stop checking the data ready bit in the
991 * line status register.
992 */
993 info->IER &= ~UART_IER_RLSI;
994 if (info->board->chip_flag)
995 info->IER &= ~MOXA_MUST_RECV_ISR;
996
997 if (info->flags & ASYNC_INITIALIZED) {
998 outb(info->IER, info->ioaddr + UART_IER);
999 /*
1000 * Before we drop DTR, make sure the UART transmitter
1001 * has completely drained; this is especially
1002 * important if there is a transmit FIFO!
1003 */
1004 timeout = jiffies + HZ;
1005 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1006 schedule_timeout_interruptible(5);
1007 if (time_after(jiffies, timeout))
1008 break;
1009 }
1010 }
1011 mxser_shutdown(info);
1012
1013 if (tty->driver->flush_buffer)
1014 tty->driver->flush_buffer(tty);
1015
1016 tty_ldisc_flush(tty);
1017
1018 tty->closing = 0;
1019 info->event = 0;
1020 info->tty = NULL;
1021 if (info->blocked_open) {
1022 if (info->close_delay)
1023 schedule_timeout_interruptible(info->close_delay);
1024 wake_up_interruptible(&info->open_wait);
1025 }
1026
1027 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1028 }
1029
1030 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1031 {
1032 int c, total = 0;
1033 struct mxser_port *info = tty->driver_data;
1034 unsigned long flags;
1035
1036 if (!info->xmit_buf)
1037 return 0;
1038
1039 while (1) {
1040 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1041 SERIAL_XMIT_SIZE - info->xmit_head));
1042 if (c <= 0)
1043 break;
1044
1045 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1046 spin_lock_irqsave(&info->slock, flags);
1047 info->xmit_head = (info->xmit_head + c) &
1048 (SERIAL_XMIT_SIZE - 1);
1049 info->xmit_cnt += c;
1050 spin_unlock_irqrestore(&info->slock, flags);
1051
1052 buf += c;
1053 count -= c;
1054 total += c;
1055 }
1056
1057 if (info->xmit_cnt && !tty->stopped) {
1058 if (!tty->hw_stopped ||
1059 (info->type == PORT_16550A) ||
1060 (info->board->chip_flag)) {
1061 spin_lock_irqsave(&info->slock, flags);
1062 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1063 UART_IER);
1064 info->IER |= UART_IER_THRI;
1065 outb(info->IER, info->ioaddr + UART_IER);
1066 spin_unlock_irqrestore(&info->slock, flags);
1067 }
1068 }
1069 return total;
1070 }
1071
1072 static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1073 {
1074 struct mxser_port *info = tty->driver_data;
1075 unsigned long flags;
1076
1077 if (!info->xmit_buf)
1078 return;
1079
1080 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1081 return;
1082
1083 spin_lock_irqsave(&info->slock, flags);
1084 info->xmit_buf[info->xmit_head++] = ch;
1085 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1086 info->xmit_cnt++;
1087 spin_unlock_irqrestore(&info->slock, flags);
1088 if (!tty->stopped) {
1089 if (!tty->hw_stopped ||
1090 (info->type == PORT_16550A) ||
1091 info->board->chip_flag) {
1092 spin_lock_irqsave(&info->slock, flags);
1093 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1094 info->IER |= UART_IER_THRI;
1095 outb(info->IER, info->ioaddr + UART_IER);
1096 spin_unlock_irqrestore(&info->slock, flags);
1097 }
1098 }
1099 }
1100
1101
1102 static void mxser_flush_chars(struct tty_struct *tty)
1103 {
1104 struct mxser_port *info = tty->driver_data;
1105 unsigned long flags;
1106
1107 if (info->xmit_cnt <= 0 ||
1108 tty->stopped ||
1109 !info->xmit_buf ||
1110 (tty->hw_stopped &&
1111 (info->type != PORT_16550A) &&
1112 (!info->board->chip_flag)
1113 ))
1114 return;
1115
1116 spin_lock_irqsave(&info->slock, flags);
1117
1118 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1119 info->IER |= UART_IER_THRI;
1120 outb(info->IER, info->ioaddr + UART_IER);
1121
1122 spin_unlock_irqrestore(&info->slock, flags);
1123 }
1124
1125 static int mxser_write_room(struct tty_struct *tty)
1126 {
1127 struct mxser_port *info = tty->driver_data;
1128 int ret;
1129
1130 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1131 if (ret < 0)
1132 ret = 0;
1133 return ret;
1134 }
1135
1136 static int mxser_chars_in_buffer(struct tty_struct *tty)
1137 {
1138 struct mxser_port *info = tty->driver_data;
1139 return info->xmit_cnt;
1140 }
1141
1142 static void mxser_flush_buffer(struct tty_struct *tty)
1143 {
1144 struct mxser_port *info = tty->driver_data;
1145 char fcr;
1146 unsigned long flags;
1147
1148
1149 spin_lock_irqsave(&info->slock, flags);
1150 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1151
1152 fcr = inb(info->ioaddr + UART_FCR);
1153 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1154 info->ioaddr + UART_FCR);
1155 outb(fcr, info->ioaddr + UART_FCR);
1156
1157 spin_unlock_irqrestore(&info->slock, flags);
1158
1159 tty_wakeup(tty);
1160 }
1161
1162 /*
1163 * ------------------------------------------------------------
1164 * friends of mxser_ioctl()
1165 * ------------------------------------------------------------
1166 */
1167 static int mxser_get_serial_info(struct mxser_port *info,
1168 struct serial_struct __user *retinfo)
1169 {
1170 struct serial_struct tmp = {
1171 .type = info->type,
1172 .line = info->tty->index,
1173 .port = info->ioaddr,
1174 .irq = info->board->irq,
1175 .flags = info->flags,
1176 .baud_base = info->baud_base,
1177 .close_delay = info->close_delay,
1178 .closing_wait = info->closing_wait,
1179 .custom_divisor = info->custom_divisor,
1180 .hub6 = 0
1181 };
1182 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1183 return -EFAULT;
1184 return 0;
1185 }
1186
1187 static int mxser_set_serial_info(struct mxser_port *info,
1188 struct serial_struct __user *new_info)
1189 {
1190 struct serial_struct new_serial;
1191 unsigned long sl_flags;
1192 unsigned int flags;
1193 int retval = 0;
1194
1195 if (!new_info || !info->ioaddr)
1196 return -EFAULT;
1197 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1198 return -EFAULT;
1199
1200 if ((new_serial.irq != info->board->irq) ||
1201 (new_serial.port != info->ioaddr) ||
1202 (new_serial.custom_divisor != info->custom_divisor) ||
1203 (new_serial.baud_base != info->baud_base))
1204 return -EPERM;
1205
1206 flags = info->flags & ASYNC_SPD_MASK;
1207
1208 if (!capable(CAP_SYS_ADMIN)) {
1209 if ((new_serial.baud_base != info->baud_base) ||
1210 (new_serial.close_delay != info->close_delay) ||
1211 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
1212 return -EPERM;
1213 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1214 (new_serial.flags & ASYNC_USR_MASK));
1215 } else {
1216 /*
1217 * OK, past this point, all the error checking has been done.
1218 * At this point, we start making changes.....
1219 */
1220 info->flags = ((info->flags & ~ASYNC_FLAGS) |
1221 (new_serial.flags & ASYNC_FLAGS));
1222 info->close_delay = new_serial.close_delay * HZ / 100;
1223 info->closing_wait = new_serial.closing_wait * HZ / 100;
1224 info->tty->low_latency =
1225 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1226 info->tty->low_latency = 0;
1227 }
1228
1229 info->type = new_serial.type;
1230
1231 process_txrx_fifo(info);
1232
1233 if (info->flags & ASYNC_INITIALIZED) {
1234 if (flags != (info->flags & ASYNC_SPD_MASK)) {
1235 spin_lock_irqsave(&info->slock, sl_flags);
1236 mxser_change_speed(info, NULL);
1237 spin_unlock_irqrestore(&info->slock, sl_flags);
1238 }
1239 } else
1240 retval = mxser_startup(info);
1241
1242 return retval;
1243 }
1244
1245 /*
1246 * mxser_get_lsr_info - get line status register info
1247 *
1248 * Purpose: Let user call ioctl() to get info when the UART physically
1249 * is emptied. On bus types like RS485, the transmitter must
1250 * release the bus after transmitting. This must be done when
1251 * the transmit shift register is empty, not be done when the
1252 * transmit holding register is empty. This functionality
1253 * allows an RS485 driver to be written in user space.
1254 */
1255 static int mxser_get_lsr_info(struct mxser_port *info,
1256 unsigned int __user *value)
1257 {
1258 unsigned char status;
1259 unsigned int result;
1260 unsigned long flags;
1261
1262 spin_lock_irqsave(&info->slock, flags);
1263 status = inb(info->ioaddr + UART_LSR);
1264 spin_unlock_irqrestore(&info->slock, flags);
1265 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1266 return put_user(result, value);
1267 }
1268
1269 /*
1270 * This routine sends a break character out the serial port.
1271 */
1272 static void mxser_send_break(struct mxser_port *info, int duration)
1273 {
1274 unsigned long flags;
1275
1276 if (!info->ioaddr)
1277 return;
1278 set_current_state(TASK_INTERRUPTIBLE);
1279 spin_lock_irqsave(&info->slock, flags);
1280 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
1281 info->ioaddr + UART_LCR);
1282 spin_unlock_irqrestore(&info->slock, flags);
1283 schedule_timeout(duration);
1284 spin_lock_irqsave(&info->slock, flags);
1285 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
1286 info->ioaddr + UART_LCR);
1287 spin_unlock_irqrestore(&info->slock, flags);
1288 }
1289
1290 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1291 {
1292 struct mxser_port *info = tty->driver_data;
1293 unsigned char control, status;
1294 unsigned long flags;
1295
1296
1297 if (tty->index == MXSER_PORTS)
1298 return -ENOIOCTLCMD;
1299 if (test_bit(TTY_IO_ERROR, &tty->flags))
1300 return -EIO;
1301
1302 control = info->MCR;
1303
1304 spin_lock_irqsave(&info->slock, flags);
1305 status = inb(info->ioaddr + UART_MSR);
1306 if (status & UART_MSR_ANY_DELTA)
1307 mxser_check_modem_status(info, status);
1308 spin_unlock_irqrestore(&info->slock, flags);
1309 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1310 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1311 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1312 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1313 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1314 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1315 }
1316
1317 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1318 unsigned int set, unsigned int clear)
1319 {
1320 struct mxser_port *info = tty->driver_data;
1321 unsigned long flags;
1322
1323
1324 if (tty->index == MXSER_PORTS)
1325 return -ENOIOCTLCMD;
1326 if (test_bit(TTY_IO_ERROR, &tty->flags))
1327 return -EIO;
1328
1329 spin_lock_irqsave(&info->slock, flags);
1330
1331 if (set & TIOCM_RTS)
1332 info->MCR |= UART_MCR_RTS;
1333 if (set & TIOCM_DTR)
1334 info->MCR |= UART_MCR_DTR;
1335
1336 if (clear & TIOCM_RTS)
1337 info->MCR &= ~UART_MCR_RTS;
1338 if (clear & TIOCM_DTR)
1339 info->MCR &= ~UART_MCR_DTR;
1340
1341 outb(info->MCR, info->ioaddr + UART_MCR);
1342 spin_unlock_irqrestore(&info->slock, flags);
1343 return 0;
1344 }
1345
1346 static int __init mxser_program_mode(int port)
1347 {
1348 int id, i, j, n;
1349
1350 outb(0, port);
1351 outb(0, port);
1352 outb(0, port);
1353 (void)inb(port);
1354 (void)inb(port);
1355 outb(0, port);
1356 (void)inb(port);
1357
1358 id = inb(port + 1) & 0x1F;
1359 if ((id != C168_ASIC_ID) &&
1360 (id != C104_ASIC_ID) &&
1361 (id != C102_ASIC_ID) &&
1362 (id != CI132_ASIC_ID) &&
1363 (id != CI134_ASIC_ID) &&
1364 (id != CI104J_ASIC_ID))
1365 return -1;
1366 for (i = 0, j = 0; i < 4; i++) {
1367 n = inb(port + 2);
1368 if (n == 'M') {
1369 j = 1;
1370 } else if ((j == 1) && (n == 1)) {
1371 j = 2;
1372 break;
1373 } else
1374 j = 0;
1375 }
1376 if (j != 2)
1377 id = -2;
1378 return id;
1379 }
1380
1381 static void __init mxser_normal_mode(int port)
1382 {
1383 int i, n;
1384
1385 outb(0xA5, port + 1);
1386 outb(0x80, port + 3);
1387 outb(12, port + 0); /* 9600 bps */
1388 outb(0, port + 1);
1389 outb(0x03, port + 3); /* 8 data bits */
1390 outb(0x13, port + 4); /* loop back mode */
1391 for (i = 0; i < 16; i++) {
1392 n = inb(port + 5);
1393 if ((n & 0x61) == 0x60)
1394 break;
1395 if ((n & 1) == 1)
1396 (void)inb(port);
1397 }
1398 outb(0x00, port + 4);
1399 }
1400
1401 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1402 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1403 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1404 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1405 #define EN_CCMD 0x000 /* Chip's command register */
1406 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1407 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1408 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1409 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1410 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1411 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1412 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1413 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1414 static int __init mxser_read_register(int port, unsigned short *regs)
1415 {
1416 int i, k, value, id;
1417 unsigned int j;
1418
1419 id = mxser_program_mode(port);
1420 if (id < 0)
1421 return id;
1422 for (i = 0; i < 14; i++) {
1423 k = (i & 0x3F) | 0x180;
1424 for (j = 0x100; j > 0; j >>= 1) {
1425 outb(CHIP_CS, port);
1426 if (k & j) {
1427 outb(CHIP_CS | CHIP_DO, port);
1428 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1429 } else {
1430 outb(CHIP_CS, port);
1431 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1432 }
1433 }
1434 (void)inb(port);
1435 value = 0;
1436 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1437 outb(CHIP_CS, port);
1438 outb(CHIP_CS | CHIP_SK, port);
1439 if (inb(port) & CHIP_DI)
1440 value |= j;
1441 }
1442 regs[i] = value;
1443 outb(0, port);
1444 }
1445 mxser_normal_mode(port);
1446 return id;
1447 }
1448
1449 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1450 {
1451 struct mxser_port *port;
1452 int result, status;
1453 unsigned int i, j;
1454
1455 switch (cmd) {
1456 case MOXA_GET_MAJOR:
1457 return put_user(ttymajor, (int __user *)argp);
1458
1459 case MOXA_CHKPORTENABLE:
1460 result = 0;
1461
1462 for (i = 0; i < MXSER_BOARDS; i++)
1463 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1464 if (mxser_boards[i].ports[j].ioaddr)
1465 result |= (1 << i);
1466
1467 return put_user(result, (unsigned long __user *)argp);
1468 case MOXA_GETDATACOUNT:
1469 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1470 return -EFAULT;
1471 return 0;
1472 case MOXA_GETMSTATUS:
1473 for (i = 0; i < MXSER_BOARDS; i++)
1474 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1475 port = &mxser_boards[i].ports[j];
1476
1477 GMStatus[i].ri = 0;
1478 if (!port->ioaddr) {
1479 GMStatus[i].dcd = 0;
1480 GMStatus[i].dsr = 0;
1481 GMStatus[i].cts = 0;
1482 continue;
1483 }
1484
1485 if (!port->tty || !port->tty->termios)
1486 GMStatus[i].cflag =
1487 port->normal_termios.c_cflag;
1488 else
1489 GMStatus[i].cflag =
1490 port->tty->termios->c_cflag;
1491
1492 status = inb(port->ioaddr + UART_MSR);
1493 if (status & 0x80 /*UART_MSR_DCD */ )
1494 GMStatus[i].dcd = 1;
1495 else
1496 GMStatus[i].dcd = 0;
1497
1498 if (status & 0x20 /*UART_MSR_DSR */ )
1499 GMStatus[i].dsr = 1;
1500 else
1501 GMStatus[i].dsr = 0;
1502
1503
1504 if (status & 0x10 /*UART_MSR_CTS */ )
1505 GMStatus[i].cts = 1;
1506 else
1507 GMStatus[i].cts = 0;
1508 }
1509 if (copy_to_user(argp, GMStatus,
1510 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1511 return -EFAULT;
1512 return 0;
1513 case MOXA_ASPP_MON_EXT: {
1514 int p, shiftbit;
1515 unsigned long opmode;
1516 unsigned cflag, iflag;
1517
1518 for (i = 0; i < MXSER_BOARDS; i++)
1519 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1520 port = &mxser_boards[i].ports[j];
1521 if (!port->ioaddr)
1522 continue;
1523
1524 status = mxser_get_msr(port->ioaddr, 0, i);
1525
1526 if (status & UART_MSR_TERI)
1527 port->icount.rng++;
1528 if (status & UART_MSR_DDSR)
1529 port->icount.dsr++;
1530 if (status & UART_MSR_DDCD)
1531 port->icount.dcd++;
1532 if (status & UART_MSR_DCTS)
1533 port->icount.cts++;
1534
1535 port->mon_data.modem_status = status;
1536 mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
1537 mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
1538 mon_data_ext.up_rxcnt[i] =
1539 port->mon_data.up_rxcnt;
1540 mon_data_ext.up_txcnt[i] =
1541 port->mon_data.up_txcnt;
1542 mon_data_ext.modem_status[i] =
1543 port->mon_data.modem_status;
1544 mon_data_ext.baudrate[i] =
1545 tty_get_baud_rate(port->tty);
1546
1547 if (!port->tty || !port->tty->termios) {
1548 cflag = port->normal_termios.c_cflag;
1549 iflag = port->normal_termios.c_iflag;
1550 } else {
1551 cflag = port->tty->termios->c_cflag;
1552 iflag = port->tty->termios->c_iflag;
1553 }
1554
1555 mon_data_ext.databits[i] = cflag & CSIZE;
1556
1557 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1558
1559 mon_data_ext.parity[i] =
1560 cflag & (PARENB | PARODD | CMSPAR);
1561
1562 mon_data_ext.flowctrl[i] = 0x00;
1563
1564 if (cflag & CRTSCTS)
1565 mon_data_ext.flowctrl[i] |= 0x03;
1566
1567 if (iflag & (IXON | IXOFF))
1568 mon_data_ext.flowctrl[i] |= 0x0C;
1569
1570 if (port->type == PORT_16550A)
1571 mon_data_ext.fifo[i] = 1;
1572 else
1573 mon_data_ext.fifo[i] = 0;
1574
1575 p = i % 4;
1576 shiftbit = p * 2;
1577 opmode = inb(port->opmode_ioaddr) >> shiftbit;
1578 opmode &= OP_MODE_MASK;
1579
1580 mon_data_ext.iftype[i] = opmode;
1581
1582 }
1583 if (copy_to_user(argp, &mon_data_ext,
1584 sizeof(mon_data_ext)))
1585 return -EFAULT;
1586
1587 return 0;
1588
1589 } default:
1590 return -ENOIOCTLCMD;
1591 }
1592 return 0;
1593 }
1594
1595 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1596 struct async_icount *cprev)
1597 {
1598 struct async_icount cnow;
1599 unsigned long flags;
1600 int ret;
1601
1602 spin_lock_irqsave(&info->slock, flags);
1603 cnow = info->icount; /* atomic copy */
1604 spin_unlock_irqrestore(&info->slock, flags);
1605
1606 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1607 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1608 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1609 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1610
1611 *cprev = cnow;
1612
1613 return ret;
1614 }
1615
1616 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1617 unsigned int cmd, unsigned long arg)
1618 {
1619 struct mxser_port *info = tty->driver_data;
1620 struct async_icount cnow;
1621 struct serial_icounter_struct __user *p_cuser;
1622 unsigned long flags;
1623 void __user *argp = (void __user *)arg;
1624 int retval;
1625
1626 if (tty->index == MXSER_PORTS)
1627 return mxser_ioctl_special(cmd, argp);
1628
1629 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1630 int p;
1631 unsigned long opmode;
1632 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1633 int shiftbit;
1634 unsigned char val, mask;
1635
1636 p = tty->index % 4;
1637 if (cmd == MOXA_SET_OP_MODE) {
1638 if (get_user(opmode, (int __user *) argp))
1639 return -EFAULT;
1640 if (opmode != RS232_MODE &&
1641 opmode != RS485_2WIRE_MODE &&
1642 opmode != RS422_MODE &&
1643 opmode != RS485_4WIRE_MODE)
1644 return -EFAULT;
1645 mask = ModeMask[p];
1646 shiftbit = p * 2;
1647 val = inb(info->opmode_ioaddr);
1648 val &= mask;
1649 val |= (opmode << shiftbit);
1650 outb(val, info->opmode_ioaddr);
1651 } else {
1652 shiftbit = p * 2;
1653 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1654 opmode &= OP_MODE_MASK;
1655 if (put_user(opmode, (int __user *)argp))
1656 return -EFAULT;
1657 }
1658 return 0;
1659 }
1660
1661 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1662 test_bit(TTY_IO_ERROR, &tty->flags))
1663 return -EIO;
1664
1665 switch (cmd) {
1666 case TCSBRK: /* SVID version: non-zero arg --> no break */
1667 retval = tty_check_change(tty);
1668 if (retval)
1669 return retval;
1670 tty_wait_until_sent(tty, 0);
1671 if (!arg)
1672 mxser_send_break(info, HZ / 4); /* 1/4 second */
1673 return 0;
1674 case TCSBRKP: /* support for POSIX tcsendbreak() */
1675 retval = tty_check_change(tty);
1676 if (retval)
1677 return retval;
1678 tty_wait_until_sent(tty, 0);
1679 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1680 return 0;
1681 case TIOCGSOFTCAR:
1682 return put_user(!!C_CLOCAL(tty), (unsigned long __user *)argp);
1683 case TIOCSSOFTCAR:
1684 if (get_user(arg, (unsigned long __user *)argp))
1685 return -EFAULT;
1686 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
1687 return 0;
1688 case TIOCGSERIAL:
1689 return mxser_get_serial_info(info, argp);
1690 case TIOCSSERIAL:
1691 return mxser_set_serial_info(info, argp);
1692 case TIOCSERGETLSR: /* Get line status register */
1693 return mxser_get_lsr_info(info, argp);
1694 /*
1695 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1696 * - mask passed in arg for lines of interest
1697 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1698 * Caller should use TIOCGICOUNT to see which one it was
1699 */
1700 case TIOCMIWAIT:
1701 spin_lock_irqsave(&info->slock, flags);
1702 cnow = info->icount; /* note the counters on entry */
1703 spin_unlock_irqrestore(&info->slock, flags);
1704
1705 return wait_event_interruptible(info->delta_msr_wait,
1706 mxser_cflags_changed(info, arg, &cnow));
1707 /*
1708 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1709 * Return: write counters to the user passed counter struct
1710 * NB: both 1->0 and 0->1 transitions are counted except for
1711 * RI where only 0->1 is counted.
1712 */
1713 case TIOCGICOUNT:
1714 spin_lock_irqsave(&info->slock, flags);
1715 cnow = info->icount;
1716 spin_unlock_irqrestore(&info->slock, flags);
1717 p_cuser = argp;
1718 if (put_user(cnow.frame, &p_cuser->frame))
1719 return -EFAULT;
1720 if (put_user(cnow.brk, &p_cuser->brk))
1721 return -EFAULT;
1722 if (put_user(cnow.overrun, &p_cuser->overrun))
1723 return -EFAULT;
1724 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1725 return -EFAULT;
1726 if (put_user(cnow.parity, &p_cuser->parity))
1727 return -EFAULT;
1728 if (put_user(cnow.rx, &p_cuser->rx))
1729 return -EFAULT;
1730 if (put_user(cnow.tx, &p_cuser->tx))
1731 return -EFAULT;
1732 put_user(cnow.cts, &p_cuser->cts);
1733 put_user(cnow.dsr, &p_cuser->dsr);
1734 put_user(cnow.rng, &p_cuser->rng);
1735 put_user(cnow.dcd, &p_cuser->dcd);
1736 return 0;
1737 case MOXA_HighSpeedOn:
1738 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1739 case MOXA_SDS_RSTICOUNTER:
1740 info->mon_data.rxcnt = 0;
1741 info->mon_data.txcnt = 0;
1742 return 0;
1743
1744 case MOXA_ASPP_OQUEUE:{
1745 int len, lsr;
1746
1747 len = mxser_chars_in_buffer(tty);
1748
1749 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1750
1751 len += (lsr ? 0 : 1);
1752
1753 return put_user(len, (int __user *)argp);
1754 }
1755 case MOXA_ASPP_MON: {
1756 int mcr, status;
1757
1758 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1759 mxser_check_modem_status(info, status);
1760
1761 mcr = inb(info->ioaddr + UART_MCR);
1762 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1763 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1764 else
1765 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1766
1767 if (mcr & MOXA_MUST_MCR_TX_XON)
1768 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1769 else
1770 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1771
1772 if (info->tty->hw_stopped)
1773 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1774 else
1775 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1776
1777 if (copy_to_user(argp, &info->mon_data,
1778 sizeof(struct mxser_mon)))
1779 return -EFAULT;
1780
1781 return 0;
1782 }
1783 case MOXA_ASPP_LSTATUS: {
1784 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1785 return -EFAULT;
1786
1787 info->err_shadow = 0;
1788 return 0;
1789 }
1790 case MOXA_SET_BAUD_METHOD: {
1791 int method;
1792
1793 if (get_user(method, (int __user *)argp))
1794 return -EFAULT;
1795 mxser_set_baud_method[tty->index] = method;
1796 return put_user(method, (int __user *)argp);
1797 }
1798 default:
1799 return -ENOIOCTLCMD;
1800 }
1801 return 0;
1802 }
1803
1804 static void mxser_stoprx(struct tty_struct *tty)
1805 {
1806 struct mxser_port *info = tty->driver_data;
1807
1808 info->ldisc_stop_rx = 1;
1809 if (I_IXOFF(tty)) {
1810 if (info->board->chip_flag) {
1811 info->IER &= ~MOXA_MUST_RECV_ISR;
1812 outb(info->IER, info->ioaddr + UART_IER);
1813 } else {
1814 info->x_char = STOP_CHAR(tty);
1815 outb(0, info->ioaddr + UART_IER);
1816 info->IER |= UART_IER_THRI;
1817 outb(info->IER, info->ioaddr + UART_IER);
1818 }
1819 }
1820
1821 if (info->tty->termios->c_cflag & CRTSCTS) {
1822 info->MCR &= ~UART_MCR_RTS;
1823 outb(info->MCR, info->ioaddr + UART_MCR);
1824 }
1825 }
1826
1827 /*
1828 * This routine is called by the upper-layer tty layer to signal that
1829 * incoming characters should be throttled.
1830 */
1831 static void mxser_throttle(struct tty_struct *tty)
1832 {
1833 mxser_stoprx(tty);
1834 }
1835
1836 static void mxser_unthrottle(struct tty_struct *tty)
1837 {
1838 struct mxser_port *info = tty->driver_data;
1839
1840 /* startrx */
1841 info->ldisc_stop_rx = 0;
1842 if (I_IXOFF(tty)) {
1843 if (info->x_char)
1844 info->x_char = 0;
1845 else {
1846 if (info->board->chip_flag) {
1847 info->IER |= MOXA_MUST_RECV_ISR;
1848 outb(info->IER, info->ioaddr + UART_IER);
1849 } else {
1850 info->x_char = START_CHAR(tty);
1851 outb(0, info->ioaddr + UART_IER);
1852 info->IER |= UART_IER_THRI;
1853 outb(info->IER, info->ioaddr + UART_IER);
1854 }
1855 }
1856 }
1857
1858 if (info->tty->termios->c_cflag & CRTSCTS) {
1859 info->MCR |= UART_MCR_RTS;
1860 outb(info->MCR, info->ioaddr + UART_MCR);
1861 }
1862 }
1863
1864 /*
1865 * mxser_stop() and mxser_start()
1866 *
1867 * This routines are called before setting or resetting tty->stopped.
1868 * They enable or disable transmitter interrupts, as necessary.
1869 */
1870 static void mxser_stop(struct tty_struct *tty)
1871 {
1872 struct mxser_port *info = tty->driver_data;
1873 unsigned long flags;
1874
1875 spin_lock_irqsave(&info->slock, flags);
1876 if (info->IER & UART_IER_THRI) {
1877 info->IER &= ~UART_IER_THRI;
1878 outb(info->IER, info->ioaddr + UART_IER);
1879 }
1880 spin_unlock_irqrestore(&info->slock, flags);
1881 }
1882
1883 static void mxser_start(struct tty_struct *tty)
1884 {
1885 struct mxser_port *info = tty->driver_data;
1886 unsigned long flags;
1887
1888 spin_lock_irqsave(&info->slock, flags);
1889 if (info->xmit_cnt && info->xmit_buf) {
1890 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1891 info->IER |= UART_IER_THRI;
1892 outb(info->IER, info->ioaddr + UART_IER);
1893 }
1894 spin_unlock_irqrestore(&info->slock, flags);
1895 }
1896
1897 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1898 {
1899 struct mxser_port *info = tty->driver_data;
1900 unsigned long flags;
1901
1902 spin_lock_irqsave(&info->slock, flags);
1903 mxser_change_speed(info, old_termios);
1904 spin_unlock_irqrestore(&info->slock, flags);
1905
1906 if ((old_termios->c_cflag & CRTSCTS) &&
1907 !(tty->termios->c_cflag & CRTSCTS)) {
1908 tty->hw_stopped = 0;
1909 mxser_start(tty);
1910 }
1911
1912 /* Handle sw stopped */
1913 if ((old_termios->c_iflag & IXON) &&
1914 !(tty->termios->c_iflag & IXON)) {
1915 tty->stopped = 0;
1916
1917 if (info->board->chip_flag) {
1918 spin_lock_irqsave(&info->slock, flags);
1919 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1920 spin_unlock_irqrestore(&info->slock, flags);
1921 }
1922
1923 mxser_start(tty);
1924 }
1925 }
1926
1927 /*
1928 * mxser_wait_until_sent() --- wait until the transmitter is empty
1929 */
1930 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1931 {
1932 struct mxser_port *info = tty->driver_data;
1933 unsigned long orig_jiffies, char_time;
1934 int lsr;
1935
1936 if (info->type == PORT_UNKNOWN)
1937 return;
1938
1939 if (info->xmit_fifo_size == 0)
1940 return; /* Just in case.... */
1941
1942 orig_jiffies = jiffies;
1943 /*
1944 * Set the check interval to be 1/5 of the estimated time to
1945 * send a single character, and make it at least 1. The check
1946 * interval should also be less than the timeout.
1947 *
1948 * Note: we have to use pretty tight timings here to satisfy
1949 * the NIST-PCTS.
1950 */
1951 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1952 char_time = char_time / 5;
1953 if (char_time == 0)
1954 char_time = 1;
1955 if (timeout && timeout < char_time)
1956 char_time = timeout;
1957 /*
1958 * If the transmitter hasn't cleared in twice the approximate
1959 * amount of time to send the entire FIFO, it probably won't
1960 * ever clear. This assumes the UART isn't doing flow
1961 * control, which is currently the case. Hence, if it ever
1962 * takes longer than info->timeout, this is probably due to a
1963 * UART bug of some kind. So, we clamp the timeout parameter at
1964 * 2*info->timeout.
1965 */
1966 if (!timeout || timeout > 2 * info->timeout)
1967 timeout = 2 * info->timeout;
1968 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1969 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1970 timeout, char_time);
1971 printk("jiff=%lu...", jiffies);
1972 #endif
1973 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1974 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1975 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1976 #endif
1977 schedule_timeout_interruptible(char_time);
1978 if (signal_pending(current))
1979 break;
1980 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1981 break;
1982 }
1983 set_current_state(TASK_RUNNING);
1984
1985 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1986 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1987 #endif
1988 }
1989
1990 /*
1991 * This routine is called by tty_hangup() when a hangup is signaled.
1992 */
1993 static void mxser_hangup(struct tty_struct *tty)
1994 {
1995 struct mxser_port *info = tty->driver_data;
1996
1997 mxser_flush_buffer(tty);
1998 mxser_shutdown(info);
1999 info->event = 0;
2000 info->count = 0;
2001 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2002 info->tty = NULL;
2003 wake_up_interruptible(&info->open_wait);
2004 }
2005
2006 /*
2007 * mxser_rs_break() --- routine which turns the break handling on or off
2008 */
2009 static void mxser_rs_break(struct tty_struct *tty, int break_state)
2010 {
2011 struct mxser_port *info = tty->driver_data;
2012 unsigned long flags;
2013
2014 spin_lock_irqsave(&info->slock, flags);
2015 if (break_state == -1)
2016 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2017 info->ioaddr + UART_LCR);
2018 else
2019 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2020 info->ioaddr + UART_LCR);
2021 spin_unlock_irqrestore(&info->slock, flags);
2022 }
2023
2024 static void mxser_receive_chars(struct mxser_port *port, int *status)
2025 {
2026 struct tty_struct *tty = port->tty;
2027 unsigned char ch, gdl;
2028 int ignored = 0;
2029 int cnt = 0;
2030 int recv_room;
2031 int max = 256;
2032
2033 recv_room = tty->receive_room;
2034 if ((recv_room == 0) && (!port->ldisc_stop_rx))
2035 mxser_stoprx(tty);
2036
2037 if (port->board->chip_flag != MOXA_OTHER_UART) {
2038
2039 if (*status & UART_LSR_SPECIAL)
2040 goto intr_old;
2041 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2042 (*status & MOXA_MUST_LSR_RERR))
2043 goto intr_old;
2044 if (*status & MOXA_MUST_LSR_RERR)
2045 goto intr_old;
2046
2047 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2048
2049 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2050 gdl &= MOXA_MUST_GDL_MASK;
2051 if (gdl >= recv_room) {
2052 if (!port->ldisc_stop_rx)
2053 mxser_stoprx(tty);
2054 }
2055 while (gdl--) {
2056 ch = inb(port->ioaddr + UART_RX);
2057 tty_insert_flip_char(tty, ch, 0);
2058 cnt++;
2059 }
2060 goto end_intr;
2061 }
2062 intr_old:
2063
2064 do {
2065 if (max-- < 0)
2066 break;
2067
2068 ch = inb(port->ioaddr + UART_RX);
2069 if (port->board->chip_flag && (*status & UART_LSR_OE))
2070 outb(0x23, port->ioaddr + UART_FCR);
2071 *status &= port->read_status_mask;
2072 if (*status & port->ignore_status_mask) {
2073 if (++ignored > 100)
2074 break;
2075 } else {
2076 char flag = 0;
2077 if (*status & UART_LSR_SPECIAL) {
2078 if (*status & UART_LSR_BI) {
2079 flag = TTY_BREAK;
2080 port->icount.brk++;
2081
2082 if (port->flags & ASYNC_SAK)
2083 do_SAK(tty);
2084 } else if (*status & UART_LSR_PE) {
2085 flag = TTY_PARITY;
2086 port->icount.parity++;
2087 } else if (*status & UART_LSR_FE) {
2088 flag = TTY_FRAME;
2089 port->icount.frame++;
2090 } else if (*status & UART_LSR_OE) {
2091 flag = TTY_OVERRUN;
2092 port->icount.overrun++;
2093 } else
2094 flag = TTY_BREAK;
2095 }
2096 tty_insert_flip_char(tty, ch, flag);
2097 cnt++;
2098 if (cnt >= recv_room) {
2099 if (!port->ldisc_stop_rx)
2100 mxser_stoprx(tty);
2101 break;
2102 }
2103
2104 }
2105
2106 if (port->board->chip_flag)
2107 break;
2108
2109 *status = inb(port->ioaddr + UART_LSR);
2110 } while (*status & UART_LSR_DR);
2111
2112 end_intr:
2113 mxvar_log.rxcnt[port->tty->index] += cnt;
2114 port->mon_data.rxcnt += cnt;
2115 port->mon_data.up_rxcnt += cnt;
2116
2117 /*
2118 * We are called from an interrupt context with &port->slock
2119 * being held. Drop it temporarily in order to prevent
2120 * recursive locking.
2121 */
2122 spin_unlock(&port->slock);
2123 tty_flip_buffer_push(tty);
2124 spin_lock(&port->slock);
2125 }
2126
2127 static void mxser_transmit_chars(struct mxser_port *port)
2128 {
2129 int count, cnt;
2130
2131 if (port->x_char) {
2132 outb(port->x_char, port->ioaddr + UART_TX);
2133 port->x_char = 0;
2134 mxvar_log.txcnt[port->tty->index]++;
2135 port->mon_data.txcnt++;
2136 port->mon_data.up_txcnt++;
2137 port->icount.tx++;
2138 return;
2139 }
2140
2141 if (port->xmit_buf == NULL)
2142 return;
2143
2144 if ((port->xmit_cnt <= 0) || port->tty->stopped ||
2145 (port->tty->hw_stopped &&
2146 (port->type != PORT_16550A) &&
2147 (!port->board->chip_flag))) {
2148 port->IER &= ~UART_IER_THRI;
2149 outb(port->IER, port->ioaddr + UART_IER);
2150 return;
2151 }
2152
2153 cnt = port->xmit_cnt;
2154 count = port->xmit_fifo_size;
2155 do {
2156 outb(port->xmit_buf[port->xmit_tail++],
2157 port->ioaddr + UART_TX);
2158 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2159 if (--port->xmit_cnt <= 0)
2160 break;
2161 } while (--count > 0);
2162 mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt);
2163
2164 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2165 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2166 port->icount.tx += (cnt - port->xmit_cnt);
2167
2168 if (port->xmit_cnt < WAKEUP_CHARS)
2169 tty_wakeup(port->tty);
2170
2171 if (port->xmit_cnt <= 0) {
2172 port->IER &= ~UART_IER_THRI;
2173 outb(port->IER, port->ioaddr + UART_IER);
2174 }
2175 }
2176
2177 /*
2178 * This is the serial driver's generic interrupt routine
2179 */
2180 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2181 {
2182 int status, iir, i;
2183 struct mxser_board *brd = NULL;
2184 struct mxser_port *port;
2185 int max, irqbits, bits, msr;
2186 unsigned int int_cnt, pass_counter = 0;
2187 int handled = IRQ_NONE;
2188
2189 for (i = 0; i < MXSER_BOARDS; i++)
2190 if (dev_id == &mxser_boards[i]) {
2191 brd = dev_id;
2192 break;
2193 }
2194
2195 if (i == MXSER_BOARDS)
2196 goto irq_stop;
2197 if (brd == NULL)
2198 goto irq_stop;
2199 max = brd->info->nports;
2200 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2201 irqbits = inb(brd->vector) & brd->vector_mask;
2202 if (irqbits == brd->vector_mask)
2203 break;
2204
2205 handled = IRQ_HANDLED;
2206 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2207 if (irqbits == brd->vector_mask)
2208 break;
2209 if (bits & irqbits)
2210 continue;
2211 port = &brd->ports[i];
2212
2213 int_cnt = 0;
2214 spin_lock(&port->slock);
2215 do {
2216 iir = inb(port->ioaddr + UART_IIR);
2217 if (iir & UART_IIR_NO_INT)
2218 break;
2219 iir &= MOXA_MUST_IIR_MASK;
2220 if (!port->tty ||
2221 (port->flags & ASYNC_CLOSING) ||
2222 !(port->flags &
2223 ASYNC_INITIALIZED)) {
2224 status = inb(port->ioaddr + UART_LSR);
2225 outb(0x27, port->ioaddr + UART_FCR);
2226 inb(port->ioaddr + UART_MSR);
2227 break;
2228 }
2229
2230 status = inb(port->ioaddr + UART_LSR);
2231
2232 if (status & UART_LSR_PE)
2233 port->err_shadow |= NPPI_NOTIFY_PARITY;
2234 if (status & UART_LSR_FE)
2235 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2236 if (status & UART_LSR_OE)
2237 port->err_shadow |=
2238 NPPI_NOTIFY_HW_OVERRUN;
2239 if (status & UART_LSR_BI)
2240 port->err_shadow |= NPPI_NOTIFY_BREAK;
2241
2242 if (port->board->chip_flag) {
2243 if (iir == MOXA_MUST_IIR_GDA ||
2244 iir == MOXA_MUST_IIR_RDA ||
2245 iir == MOXA_MUST_IIR_RTO ||
2246 iir == MOXA_MUST_IIR_LSR)
2247 mxser_receive_chars(port,
2248 &status);
2249
2250 } else {
2251 status &= port->read_status_mask;
2252 if (status & UART_LSR_DR)
2253 mxser_receive_chars(port,
2254 &status);
2255 }
2256 msr = inb(port->ioaddr + UART_MSR);
2257 if (msr & UART_MSR_ANY_DELTA)
2258 mxser_check_modem_status(port, msr);
2259
2260 if (port->board->chip_flag) {
2261 if (iir == 0x02 && (status &
2262 UART_LSR_THRE))
2263 mxser_transmit_chars(port);
2264 } else {
2265 if (status & UART_LSR_THRE)
2266 mxser_transmit_chars(port);
2267 }
2268 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2269 spin_unlock(&port->slock);
2270 }
2271 }
2272
2273 irq_stop:
2274 return handled;
2275 }
2276
2277 static const struct tty_operations mxser_ops = {
2278 .open = mxser_open,
2279 .close = mxser_close,
2280 .write = mxser_write,
2281 .put_char = mxser_put_char,
2282 .flush_chars = mxser_flush_chars,
2283 .write_room = mxser_write_room,
2284 .chars_in_buffer = mxser_chars_in_buffer,
2285 .flush_buffer = mxser_flush_buffer,
2286 .ioctl = mxser_ioctl,
2287 .throttle = mxser_throttle,
2288 .unthrottle = mxser_unthrottle,
2289 .set_termios = mxser_set_termios,
2290 .stop = mxser_stop,
2291 .start = mxser_start,
2292 .hangup = mxser_hangup,
2293 .break_ctl = mxser_rs_break,
2294 .wait_until_sent = mxser_wait_until_sent,
2295 .tiocmget = mxser_tiocmget,
2296 .tiocmset = mxser_tiocmset,
2297 };
2298
2299 /*
2300 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2301 */
2302
2303 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2304 unsigned int irq)
2305 {
2306 if (irq)
2307 free_irq(brd->irq, brd);
2308 if (pdev != NULL) { /* PCI */
2309 #ifdef CONFIG_PCI
2310 pci_release_region(pdev, 2);
2311 pci_release_region(pdev, 3);
2312 #endif
2313 } else {
2314 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2315 release_region(brd->vector, 1);
2316 }
2317 }
2318
2319 static int __devinit mxser_initbrd(struct mxser_board *brd,
2320 struct pci_dev *pdev)
2321 {
2322 struct mxser_port *info;
2323 unsigned int i;
2324 int retval;
2325
2326 printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
2327
2328 for (i = 0; i < brd->info->nports; i++) {
2329 info = &brd->ports[i];
2330 info->board = brd;
2331 info->stop_rx = 0;
2332 info->ldisc_stop_rx = 0;
2333
2334 /* Enhance mode enabled here */
2335 if (brd->chip_flag != MOXA_OTHER_UART)
2336 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->ioaddr);
2337
2338 info->flags = ASYNC_SHARE_IRQ;
2339 info->type = brd->uart_type;
2340
2341 process_txrx_fifo(info);
2342
2343 info->custom_divisor = info->baud_base * 16;
2344 info->close_delay = 5 * HZ / 10;
2345 info->closing_wait = 30 * HZ;
2346 info->normal_termios = mxvar_sdriver->init_termios;
2347 init_waitqueue_head(&info->open_wait);
2348 init_waitqueue_head(&info->delta_msr_wait);
2349 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2350 info->err_shadow = 0;
2351 spin_lock_init(&info->slock);
2352
2353 /* before set INT ISR, disable all int */
2354 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2355 info->ioaddr + UART_IER);
2356 }
2357
2358 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2359 brd);
2360 if (retval) {
2361 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2362 "conflict with another device.\n",
2363 brd->info->name, brd->irq);
2364 /* We hold resources, we need to release them. */
2365 mxser_release_res(brd, pdev, 0);
2366 }
2367 return retval;
2368 }
2369
2370 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2371 {
2372 int id, i, bits;
2373 unsigned short regs[16], irq;
2374 unsigned char scratch, scratch2;
2375
2376 brd->chip_flag = MOXA_OTHER_UART;
2377
2378 id = mxser_read_register(cap, regs);
2379 switch (id) {
2380 case C168_ASIC_ID:
2381 brd->info = &mxser_cards[0];
2382 break;
2383 case C104_ASIC_ID:
2384 brd->info = &mxser_cards[1];
2385 break;
2386 case CI104J_ASIC_ID:
2387 brd->info = &mxser_cards[2];
2388 break;
2389 case C102_ASIC_ID:
2390 brd->info = &mxser_cards[5];
2391 break;
2392 case CI132_ASIC_ID:
2393 brd->info = &mxser_cards[6];
2394 break;
2395 case CI134_ASIC_ID:
2396 brd->info = &mxser_cards[7];
2397 break;
2398 default:
2399 return 0;
2400 }
2401
2402 irq = 0;
2403 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2404 Flag-hack checks if configuration should be read as 2-port here. */
2405 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2406 irq = regs[9] & 0xF000;
2407 irq = irq | (irq >> 4);
2408 if (irq != (regs[9] & 0xFF00))
2409 return MXSER_ERR_IRQ_CONFLIT;
2410 } else if (brd->info->nports == 4) {
2411 irq = regs[9] & 0xF000;
2412 irq = irq | (irq >> 4);
2413 irq = irq | (irq >> 8);
2414 if (irq != regs[9])
2415 return MXSER_ERR_IRQ_CONFLIT;
2416 } else if (brd->info->nports == 8) {
2417 irq = regs[9] & 0xF000;
2418 irq = irq | (irq >> 4);
2419 irq = irq | (irq >> 8);
2420 if ((irq != regs[9]) || (irq != regs[10]))
2421 return MXSER_ERR_IRQ_CONFLIT;
2422 }
2423
2424 if (!irq)
2425 return MXSER_ERR_IRQ;
2426 brd->irq = ((int)(irq & 0xF000) >> 12);
2427 for (i = 0; i < 8; i++)
2428 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2429 if ((regs[12] & 0x80) == 0)
2430 return MXSER_ERR_VECTOR;
2431 brd->vector = (int)regs[11]; /* interrupt vector */
2432 if (id == 1)
2433 brd->vector_mask = 0x00FF;
2434 else
2435 brd->vector_mask = 0x000F;
2436 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2437 if (regs[12] & bits) {
2438 brd->ports[i].baud_base = 921600;
2439 brd->ports[i].max_baud = 921600;
2440 } else {
2441 brd->ports[i].baud_base = 115200;
2442 brd->ports[i].max_baud = 115200;
2443 }
2444 }
2445 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2446 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2447 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2448 outb(scratch2, cap + UART_LCR);
2449 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2450 scratch = inb(cap + UART_IIR);
2451
2452 if (scratch & 0xC0)
2453 brd->uart_type = PORT_16550A;
2454 else
2455 brd->uart_type = PORT_16450;
2456 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2457 "mxser(IO)"))
2458 return MXSER_ERR_IOADDR;
2459 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2460 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2461 return MXSER_ERR_VECTOR;
2462 }
2463 return brd->info->nports;
2464 }
2465
2466 static int __devinit mxser_probe(struct pci_dev *pdev,
2467 const struct pci_device_id *ent)
2468 {
2469 #ifdef CONFIG_PCI
2470 struct mxser_board *brd;
2471 unsigned int i, j;
2472 unsigned long ioaddress;
2473 int retval = -EINVAL;
2474
2475 for (i = 0; i < MXSER_BOARDS; i++)
2476 if (mxser_boards[i].info == NULL)
2477 break;
2478
2479 if (i >= MXSER_BOARDS) {
2480 printk(KERN_ERR "Too many Smartio/Industio family boards found "
2481 "(maximum %d), board not configured\n", MXSER_BOARDS);
2482 goto err;
2483 }
2484
2485 brd = &mxser_boards[i];
2486 brd->idx = i * MXSER_PORTS_PER_BOARD;
2487 printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2488 mxser_cards[ent->driver_data].name,
2489 pdev->bus->number, PCI_SLOT(pdev->devfn));
2490
2491 retval = pci_enable_device(pdev);
2492 if (retval) {
2493 printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
2494 goto err;
2495 }
2496
2497 /* io address */
2498 ioaddress = pci_resource_start(pdev, 2);
2499 retval = pci_request_region(pdev, 2, "mxser(IO)");
2500 if (retval)
2501 goto err;
2502
2503 brd->info = &mxser_cards[ent->driver_data];
2504 for (i = 0; i < brd->info->nports; i++)
2505 brd->ports[i].ioaddr = ioaddress + 8 * i;
2506
2507 /* vector */
2508 ioaddress = pci_resource_start(pdev, 3);
2509 retval = pci_request_region(pdev, 3, "mxser(vector)");
2510 if (retval)
2511 goto err_relio;
2512 brd->vector = ioaddress;
2513
2514 /* irq */
2515 brd->irq = pdev->irq;
2516
2517 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2518 brd->uart_type = PORT_16550A;
2519 brd->vector_mask = 0;
2520
2521 for (i = 0; i < brd->info->nports; i++) {
2522 for (j = 0; j < UART_INFO_NUM; j++) {
2523 if (Gpci_uart_info[j].type == brd->chip_flag) {
2524 brd->ports[i].max_baud =
2525 Gpci_uart_info[j].max_baud;
2526
2527 /* exception....CP-102 */
2528 if (brd->info->flags & MXSER_HIGHBAUD)
2529 brd->ports[i].max_baud = 921600;
2530 break;
2531 }
2532 }
2533 }
2534
2535 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2536 for (i = 0; i < brd->info->nports; i++) {
2537 if (i < 4)
2538 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2539 else
2540 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2541 }
2542 outb(0, ioaddress + 4); /* default set to RS232 mode */
2543 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2544 }
2545
2546 for (i = 0; i < brd->info->nports; i++) {
2547 brd->vector_mask |= (1 << i);
2548 brd->ports[i].baud_base = 921600;
2549 }
2550
2551 /* mxser_initbrd will hook ISR. */
2552 retval = mxser_initbrd(brd, pdev);
2553 if (retval)
2554 goto err_null;
2555
2556 for (i = 0; i < brd->info->nports; i++)
2557 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2558
2559 pci_set_drvdata(pdev, brd);
2560
2561 return 0;
2562 err_relio:
2563 pci_release_region(pdev, 2);
2564 err_null:
2565 brd->info = NULL;
2566 err:
2567 return retval;
2568 #else
2569 return -ENODEV;
2570 #endif
2571 }
2572
2573 static void __devexit mxser_remove(struct pci_dev *pdev)
2574 {
2575 struct mxser_board *brd = pci_get_drvdata(pdev);
2576 unsigned int i;
2577
2578 for (i = 0; i < brd->info->nports; i++)
2579 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2580
2581 mxser_release_res(brd, pdev, 1);
2582 brd->info = NULL;
2583 }
2584
2585 static struct pci_driver mxser_driver = {
2586 .name = "mxser",
2587 .id_table = mxser_pcibrds,
2588 .probe = mxser_probe,
2589 .remove = __devexit_p(mxser_remove)
2590 };
2591
2592 static int __init mxser_module_init(void)
2593 {
2594 struct mxser_board *brd;
2595 unsigned long cap;
2596 unsigned int i, m, isaloop;
2597 int retval, b;
2598
2599 pr_debug("Loading module mxser ...\n");
2600
2601 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2602 if (!mxvar_sdriver)
2603 return -ENOMEM;
2604
2605 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2606 MXSER_VERSION);
2607
2608 /* Initialize the tty_driver structure */
2609 mxvar_sdriver->owner = THIS_MODULE;
2610 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2611 mxvar_sdriver->name = "ttyMI";
2612 mxvar_sdriver->major = ttymajor;
2613 mxvar_sdriver->minor_start = 0;
2614 mxvar_sdriver->num = MXSER_PORTS + 1;
2615 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2616 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2617 mxvar_sdriver->init_termios = tty_std_termios;
2618 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2619 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2620 tty_set_operations(mxvar_sdriver, &mxser_ops);
2621
2622 retval = tty_register_driver(mxvar_sdriver);
2623 if (retval) {
2624 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2625 "tty driver !\n");
2626 goto err_put;
2627 }
2628
2629 mxvar_diagflag = 0;
2630
2631 m = 0;
2632 /* Start finding ISA boards here */
2633 for (isaloop = 0; isaloop < 2; isaloop++)
2634 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2635 if (!isaloop)
2636 cap = mxserBoardCAP[b]; /* predefined */
2637 else
2638 cap = ioaddr[b]; /* module param */
2639
2640 if (!cap)
2641 continue;
2642
2643 brd = &mxser_boards[m];
2644 retval = mxser_get_ISA_conf(cap, brd);
2645
2646 if (retval != 0)
2647 printk(KERN_INFO "Found MOXA %s board "
2648 "(CAP=0x%x)\n",
2649 brd->info->name, ioaddr[b]);
2650
2651 if (retval <= 0) {
2652 if (retval == MXSER_ERR_IRQ)
2653 printk(KERN_ERR "Invalid interrupt "
2654 "number, board not "
2655 "configured\n");
2656 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2657 printk(KERN_ERR "Invalid interrupt "
2658 "number, board not "
2659 "configured\n");
2660 else if (retval == MXSER_ERR_VECTOR)
2661 printk(KERN_ERR "Invalid interrupt "
2662 "vector, board not "
2663 "configured\n");
2664 else if (retval == MXSER_ERR_IOADDR)
2665 printk(KERN_ERR "Invalid I/O address, "
2666 "board not configured\n");
2667
2668 brd->info = NULL;
2669 continue;
2670 }
2671
2672 /* mxser_initbrd will hook ISR. */
2673 if (mxser_initbrd(brd, NULL) < 0) {
2674 brd->info = NULL;
2675 continue;
2676 }
2677
2678 brd->idx = m * MXSER_PORTS_PER_BOARD;
2679 for (i = 0; i < brd->info->nports; i++)
2680 tty_register_device(mxvar_sdriver, brd->idx + i,
2681 NULL);
2682
2683 m++;
2684 }
2685
2686 retval = pci_register_driver(&mxser_driver);
2687 if (retval) {
2688 printk(KERN_ERR "Can't register pci driver\n");
2689 if (!m) {
2690 retval = -ENODEV;
2691 goto err_unr;
2692 } /* else: we have some ISA cards under control */
2693 }
2694
2695 pr_debug("Done.\n");
2696
2697 return 0;
2698 err_unr:
2699 tty_unregister_driver(mxvar_sdriver);
2700 err_put:
2701 put_tty_driver(mxvar_sdriver);
2702 return retval;
2703 }
2704
2705 static void __exit mxser_module_exit(void)
2706 {
2707 unsigned int i, j;
2708
2709 pr_debug("Unloading module mxser ...\n");
2710
2711 pci_unregister_driver(&mxser_driver);
2712
2713 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2714 if (mxser_boards[i].info != NULL)
2715 for (j = 0; j < mxser_boards[i].info->nports; j++)
2716 tty_unregister_device(mxvar_sdriver,
2717 mxser_boards[i].idx + j);
2718 tty_unregister_driver(mxvar_sdriver);
2719 put_tty_driver(mxvar_sdriver);
2720
2721 for (i = 0; i < MXSER_BOARDS; i++)
2722 if (mxser_boards[i].info != NULL)
2723 mxser_release_res(&mxser_boards[i], NULL, 1);
2724
2725 pr_debug("Done.\n");
2726 }
2727
2728 module_init(mxser_module_init);
2729 module_exit(mxser_module_exit);
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