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[mirror_ubuntu-eoan-kernel.git] / drivers / char / mxser.c
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
39 #include <linux/module.h>
40 #include <linux/errno.h>
41 #include <linux/signal.h>
42 #include <linux/sched.h>
43 #include <linux/timer.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/serial_reg.h>
49 #include <linux/major.h>
50 #include <linux/string.h>
51 #include <linux/fcntl.h>
52 #include <linux/ptrace.h>
53 #include <linux/gfp.h>
54 #include <linux/ioport.h>
55 #include <linux/mm.h>
56 #include <linux/delay.h>
57 #include <linux/pci.h>
58 #include <linux/bitops.h>
59
60 #include <asm/system.h>
61 #include <asm/io.h>
62 #include <asm/irq.h>
63 #include <asm/uaccess.h>
64
65 #include "mxser.h"
66
67 #define MXSER_VERSION "1.8"
68 #define MXSERMAJOR 174
69 #define MXSERCUMAJOR 175
70
71 #define MXSER_EVENT_TXLOW 1
72 #define MXSER_EVENT_HANGUP 2
73
74 #define MXSER_BOARDS 4 /* Max. boards */
75 #define MXSER_PORTS 32 /* Max. ports */
76 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
77 #define MXSER_ISR_PASS_LIMIT 256
78
79 #define MXSER_ERR_IOADDR -1
80 #define MXSER_ERR_IRQ -2
81 #define MXSER_ERR_IRQ_CONFLIT -3
82 #define MXSER_ERR_VECTOR -4
83
84 #define SERIAL_TYPE_NORMAL 1
85 #define SERIAL_TYPE_CALLOUT 2
86
87 #define WAKEUP_CHARS 256
88
89 #define UART_MCR_AFE 0x20
90 #define UART_LSR_SPECIAL 0x1E
91
92
93 #define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
94
95 #define C168_ASIC_ID 1
96 #define C104_ASIC_ID 2
97 #define C102_ASIC_ID 0xB
98 #define CI132_ASIC_ID 4
99 #define CI134_ASIC_ID 3
100 #define CI104J_ASIC_ID 5
101
102 enum {
103 MXSER_BOARD_C168_ISA = 1,
104 MXSER_BOARD_C104_ISA,
105 MXSER_BOARD_CI104J,
106 MXSER_BOARD_C168_PCI,
107 MXSER_BOARD_C104_PCI,
108 MXSER_BOARD_C102_ISA,
109 MXSER_BOARD_CI132,
110 MXSER_BOARD_CI134,
111 MXSER_BOARD_CP132,
112 MXSER_BOARD_CP114,
113 MXSER_BOARD_CT114,
114 MXSER_BOARD_CP102,
115 MXSER_BOARD_CP104U,
116 MXSER_BOARD_CP168U,
117 MXSER_BOARD_CP132U,
118 MXSER_BOARD_CP134U,
119 MXSER_BOARD_CP104JU,
120 MXSER_BOARD_RC7000,
121 MXSER_BOARD_CP118U,
122 MXSER_BOARD_CP102UL,
123 MXSER_BOARD_CP102U,
124 };
125
126 static char *mxser_brdname[] = {
127 "C168 series",
128 "C104 series",
129 "CI-104J series",
130 "C168H/PCI series",
131 "C104H/PCI series",
132 "C102 series",
133 "CI-132 series",
134 "CI-134 series",
135 "CP-132 series",
136 "CP-114 series",
137 "CT-114 series",
138 "CP-102 series",
139 "CP-104U series",
140 "CP-168U series",
141 "CP-132U series",
142 "CP-134U series",
143 "CP-104JU series",
144 "Moxa UC7000 Serial",
145 "CP-118U series",
146 "CP-102UL series",
147 "CP-102U series",
148 };
149
150 static int mxser_numports[] = {
151 8, /* C168-ISA */
152 4, /* C104-ISA */
153 4, /* CI104J */
154 8, /* C168-PCI */
155 4, /* C104-PCI */
156 2, /* C102-ISA */
157 2, /* CI132 */
158 4, /* CI134 */
159 2, /* CP132 */
160 4, /* CP114 */
161 4, /* CT114 */
162 2, /* CP102 */
163 4, /* CP104U */
164 8, /* CP168U */
165 2, /* CP132U */
166 4, /* CP134U */
167 4, /* CP104JU */
168 8, /* RC7000 */
169 8, /* CP118U */
170 2, /* CP102UL */
171 2, /* CP102U */
172 };
173
174 #define UART_TYPE_NUM 2
175
176 static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
177 MOXA_MUST_MU150_HWID,
178 MOXA_MUST_MU860_HWID
179 };
180
181 /* This is only for PCI */
182 #define UART_INFO_NUM 3
183 struct mxpciuart_info {
184 int type;
185 int tx_fifo;
186 int rx_fifo;
187 int xmit_fifo_size;
188 int rx_high_water;
189 int rx_trigger;
190 int rx_low_water;
191 long max_baud;
192 };
193
194 static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
195 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
196 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
197 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
198 };
199
200
201 #ifdef CONFIG_PCI
202
203 static struct pci_device_id mxser_pcibrds[] = {
204 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
205 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
206 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
207 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
208 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
216 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
217 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
218 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
219 {0}
220 };
221
222 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
223
224
225 #endif
226
227 typedef struct _moxa_pci_info {
228 unsigned short busNum;
229 unsigned short devNum;
230 struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
231 } moxa_pci_info;
232
233 static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
234 static int ttymajor = MXSERMAJOR;
235 static int calloutmajor = MXSERCUMAJOR;
236 static int verbose = 0;
237
238 /* Variables for insmod */
239
240 MODULE_AUTHOR("Casper Yang");
241 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
242 module_param_array(ioaddr, int, NULL, 0);
243 module_param(ttymajor, int, 0);
244 module_param(calloutmajor, int, 0);
245 module_param(verbose, bool, 0);
246 MODULE_LICENSE("GPL");
247
248 struct mxser_log {
249 int tick;
250 unsigned long rxcnt[MXSER_PORTS];
251 unsigned long txcnt[MXSER_PORTS];
252 };
253
254
255 struct mxser_mon {
256 unsigned long rxcnt;
257 unsigned long txcnt;
258 unsigned long up_rxcnt;
259 unsigned long up_txcnt;
260 int modem_status;
261 unsigned char hold_reason;
262 };
263
264 struct mxser_mon_ext {
265 unsigned long rx_cnt[32];
266 unsigned long tx_cnt[32];
267 unsigned long up_rxcnt[32];
268 unsigned long up_txcnt[32];
269 int modem_status[32];
270
271 long baudrate[32];
272 int databits[32];
273 int stopbits[32];
274 int parity[32];
275 int flowctrl[32];
276 int fifo[32];
277 int iftype[32];
278 };
279
280 struct mxser_hwconf {
281 int board_type;
282 int ports;
283 int irq;
284 int vector;
285 int vector_mask;
286 int uart_type;
287 int ioaddr[MXSER_PORTS_PER_BOARD];
288 int baud_base[MXSER_PORTS_PER_BOARD];
289 moxa_pci_info pciInfo;
290 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
291 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
292 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
293 };
294
295 struct mxser_struct {
296 int port;
297 int base; /* port base address */
298 int irq; /* port using irq no. */
299 int vector; /* port irq vector */
300 int vectormask; /* port vector mask */
301 int rx_high_water;
302 int rx_trigger; /* Rx fifo trigger level */
303 int rx_low_water;
304 int baud_base; /* max. speed */
305 int flags; /* defined in tty.h */
306 int type; /* UART type */
307 struct tty_struct *tty;
308 int read_status_mask;
309 int ignore_status_mask;
310 int xmit_fifo_size;
311 int custom_divisor;
312 int x_char; /* xon/xoff character */
313 int close_delay;
314 unsigned short closing_wait;
315 int IER; /* Interrupt Enable Register */
316 int MCR; /* Modem control register */
317 unsigned long event;
318 int count; /* # of fd on device */
319 int blocked_open; /* # of blocked opens */
320 unsigned char *xmit_buf;
321 int xmit_head;
322 int xmit_tail;
323 int xmit_cnt;
324 struct work_struct tqueue;
325 struct ktermios normal_termios;
326 struct ktermios callout_termios;
327 wait_queue_head_t open_wait;
328 wait_queue_head_t close_wait;
329 wait_queue_head_t delta_msr_wait;
330 struct async_icount icount; /* kernel counters for the 4 input interrupts */
331 int timeout;
332 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
333 int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
334 int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
335 unsigned char stop_rx;
336 unsigned char ldisc_stop_rx;
337 long realbaud;
338 struct mxser_mon mon_data;
339 unsigned char err_shadow;
340 spinlock_t slock;
341 };
342
343 struct mxser_mstatus {
344 tcflag_t cflag;
345 int cts;
346 int dsr;
347 int ri;
348 int dcd;
349 };
350
351 static struct mxser_mstatus GMStatus[MXSER_PORTS];
352
353 static int mxserBoardCAP[MXSER_BOARDS] = {
354 0, 0, 0, 0
355 /* 0x180, 0x280, 0x200, 0x320 */
356 };
357
358 static struct tty_driver *mxvar_sdriver;
359 static struct mxser_struct mxvar_table[MXSER_PORTS];
360 static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
361 static struct ktermios *mxvar_termios[MXSER_PORTS + 1];
362 static struct ktermios *mxvar_termios_locked[MXSER_PORTS + 1];
363 static struct mxser_log mxvar_log;
364 static int mxvar_diagflag;
365 static unsigned char mxser_msr[MXSER_PORTS + 1];
366 static struct mxser_mon_ext mon_data_ext;
367 static int mxser_set_baud_method[MXSER_PORTS + 1];
368 static spinlock_t gm_lock;
369
370 /*
371 * This is used to figure out the divisor speeds and the timeouts
372 */
373
374 static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
375
376 /*
377 * static functions:
378 */
379
380 static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
381 static int mxser_init(void);
382
383 /* static void mxser_poll(unsigned long); */
384 static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
385 static void mxser_do_softint(struct work_struct *);
386 static int mxser_open(struct tty_struct *, struct file *);
387 static void mxser_close(struct tty_struct *, struct file *);
388 static int mxser_write(struct tty_struct *, const unsigned char *, int);
389 static int mxser_write_room(struct tty_struct *);
390 static void mxser_flush_buffer(struct tty_struct *);
391 static int mxser_chars_in_buffer(struct tty_struct *);
392 static void mxser_flush_chars(struct tty_struct *);
393 static void mxser_put_char(struct tty_struct *, unsigned char);
394 static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
395 static int mxser_ioctl_special(unsigned int, void __user *);
396 static void mxser_throttle(struct tty_struct *);
397 static void mxser_unthrottle(struct tty_struct *);
398 static void mxser_set_termios(struct tty_struct *, struct ktermios *);
399 static void mxser_stop(struct tty_struct *);
400 static void mxser_start(struct tty_struct *);
401 static void mxser_hangup(struct tty_struct *);
402 static void mxser_rs_break(struct tty_struct *, int);
403 static irqreturn_t mxser_interrupt(int, void *);
404 static void mxser_receive_chars(struct mxser_struct *, int *);
405 static void mxser_transmit_chars(struct mxser_struct *);
406 static void mxser_check_modem_status(struct mxser_struct *, int);
407 static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
408 static int mxser_startup(struct mxser_struct *);
409 static void mxser_shutdown(struct mxser_struct *);
410 static int mxser_change_speed(struct mxser_struct *, struct ktermios *old_termios);
411 static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
412 static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
413 static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
414 static void mxser_send_break(struct mxser_struct *, int);
415 static int mxser_tiocmget(struct tty_struct *, struct file *);
416 static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
417 static int mxser_set_baud(struct mxser_struct *info, long newspd);
418 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
419
420 static void mxser_startrx(struct tty_struct *tty);
421 static void mxser_stoprx(struct tty_struct *tty);
422
423 #ifdef CONFIG_PCI
424 static int CheckIsMoxaMust(int io)
425 {
426 u8 oldmcr, hwid;
427 int i;
428
429 outb(0, io + UART_LCR);
430 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
431 oldmcr = inb(io + UART_MCR);
432 outb(0, io + UART_MCR);
433 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
434 if ((hwid = inb(io + UART_MCR)) != 0) {
435 outb(oldmcr, io + UART_MCR);
436 return MOXA_OTHER_UART;
437 }
438
439 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
440 for (i = 0; i < UART_TYPE_NUM; i++) {
441 if (hwid == Gmoxa_uart_id[i])
442 return (int)hwid;
443 }
444 return MOXA_OTHER_UART;
445 }
446 #endif
447
448 /* above is modified by Victor Yu. 08-15-2002 */
449
450 static const struct tty_operations mxser_ops = {
451 .open = mxser_open,
452 .close = mxser_close,
453 .write = mxser_write,
454 .put_char = mxser_put_char,
455 .flush_chars = mxser_flush_chars,
456 .write_room = mxser_write_room,
457 .chars_in_buffer = mxser_chars_in_buffer,
458 .flush_buffer = mxser_flush_buffer,
459 .ioctl = mxser_ioctl,
460 .throttle = mxser_throttle,
461 .unthrottle = mxser_unthrottle,
462 .set_termios = mxser_set_termios,
463 .stop = mxser_stop,
464 .start = mxser_start,
465 .hangup = mxser_hangup,
466 .break_ctl = mxser_rs_break,
467 .wait_until_sent = mxser_wait_until_sent,
468 .tiocmget = mxser_tiocmget,
469 .tiocmset = mxser_tiocmset,
470 };
471
472 /*
473 * The MOXA Smartio/Industio serial driver boot-time initialization code!
474 */
475
476 static int __init mxser_module_init(void)
477 {
478 int ret;
479
480 if (verbose)
481 printk(KERN_DEBUG "Loading module mxser ...\n");
482 ret = mxser_init();
483 if (verbose)
484 printk(KERN_DEBUG "Done.\n");
485 return ret;
486 }
487
488 static void __exit mxser_module_exit(void)
489 {
490 int i, err;
491
492 if (verbose)
493 printk(KERN_DEBUG "Unloading module mxser ...\n");
494
495 err = tty_unregister_driver(mxvar_sdriver);
496 if (!err)
497 put_tty_driver(mxvar_sdriver);
498 else
499 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
500
501 for (i = 0; i < MXSER_BOARDS; i++) {
502 struct pci_dev *pdev;
503
504 if (mxsercfg[i].board_type == -1)
505 continue;
506 else {
507 pdev = mxsercfg[i].pciInfo.pdev;
508 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
509 if (pdev != NULL) { /* PCI */
510 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
511 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
512 pci_dev_put(pdev);
513 } else {
514 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
515 release_region(mxsercfg[i].vector, 1);
516 }
517 }
518 }
519 if (verbose)
520 printk(KERN_DEBUG "Done.\n");
521 }
522
523 static void process_txrx_fifo(struct mxser_struct *info)
524 {
525 int i;
526
527 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
528 info->rx_trigger = 1;
529 info->rx_high_water = 1;
530 info->rx_low_water = 1;
531 info->xmit_fifo_size = 1;
532 } else {
533 for (i = 0; i < UART_INFO_NUM; i++) {
534 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
535 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
536 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
537 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
538 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
539 break;
540 }
541 }
542 }
543 }
544
545 static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
546 {
547 struct mxser_struct *info;
548 int retval;
549 int i, n;
550
551 n = board * MXSER_PORTS_PER_BOARD;
552 info = &mxvar_table[n];
553 /*if (verbose) */ {
554 printk(KERN_DEBUG " ttyMI%d - ttyMI%d ",
555 n, n + hwconf->ports - 1);
556 printk(" max. baud rate = %d bps.\n",
557 hwconf->MaxCanSetBaudRate[0]);
558 }
559
560 for (i = 0; i < hwconf->ports; i++, n++, info++) {
561 info->port = n;
562 info->base = hwconf->ioaddr[i];
563 info->irq = hwconf->irq;
564 info->vector = hwconf->vector;
565 info->vectormask = hwconf->vector_mask;
566 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
567 info->stop_rx = 0;
568 info->ldisc_stop_rx = 0;
569
570 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
571 /* Enhance mode enabled here */
572 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
573 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
574 }
575
576 info->flags = ASYNC_SHARE_IRQ;
577 info->type = hwconf->uart_type;
578 info->baud_base = hwconf->baud_base[i];
579
580 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
581
582 process_txrx_fifo(info);
583
584
585 info->custom_divisor = hwconf->baud_base[i] * 16;
586 info->close_delay = 5 * HZ / 10;
587 info->closing_wait = 30 * HZ;
588 INIT_WORK(&info->tqueue, mxser_do_softint);
589 info->normal_termios = mxvar_sdriver->init_termios;
590 init_waitqueue_head(&info->open_wait);
591 init_waitqueue_head(&info->close_wait);
592 init_waitqueue_head(&info->delta_msr_wait);
593 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
594 info->err_shadow = 0;
595 spin_lock_init(&info->slock);
596 }
597 /*
598 * Allocate the IRQ if necessary
599 */
600
601
602 /* before set INT ISR, disable all int */
603 for (i = 0; i < hwconf->ports; i++) {
604 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
605 hwconf->ioaddr[i] + UART_IER);
606 }
607
608 n = board * MXSER_PORTS_PER_BOARD;
609 info = &mxvar_table[n];
610
611 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
612 "mxser", info);
613 if (retval) {
614 printk(KERN_ERR "Board %d: %s",
615 board, mxser_brdname[hwconf->board_type - 1]);
616 printk(" Request irq failed, IRQ (%d) may conflict with"
617 " another device.\n", info->irq);
618 return retval;
619 }
620 return 0;
621 }
622
623 static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
624 {
625 mxsercfg[board] = *hwconf;
626 }
627
628 #ifdef CONFIG_PCI
629 static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
630 {
631 int i, j;
632 /* unsigned int val; */
633 unsigned int ioaddress;
634 struct pci_dev *pdev = hwconf->pciInfo.pdev;
635
636 /* io address */
637 hwconf->board_type = board_type;
638 hwconf->ports = mxser_numports[board_type - 1];
639 ioaddress = pci_resource_start(pdev, 2);
640 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
641 "mxser(IO)");
642
643 for (i = 0; i < hwconf->ports; i++)
644 hwconf->ioaddr[i] = ioaddress + 8 * i;
645
646 /* vector */
647 ioaddress = pci_resource_start(pdev, 3);
648 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
649 "mxser(vector)");
650 hwconf->vector = ioaddress;
651
652 /* irq */
653 hwconf->irq = hwconf->pciInfo.pdev->irq;
654
655 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
656 hwconf->uart_type = PORT_16550A;
657 hwconf->vector_mask = 0;
658
659
660 for (i = 0; i < hwconf->ports; i++) {
661 for (j = 0; j < UART_INFO_NUM; j++) {
662 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
663 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
664
665 /* exception....CP-102 */
666 if (board_type == MXSER_BOARD_CP102)
667 hwconf->MaxCanSetBaudRate[i] = 921600;
668 break;
669 }
670 }
671 }
672
673 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
674 for (i = 0; i < hwconf->ports; i++) {
675 if (i < 4)
676 hwconf->opmode_ioaddr[i] = ioaddress + 4;
677 else
678 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
679 }
680 outb(0, ioaddress + 4); /* default set to RS232 mode */
681 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
682 }
683
684 for (i = 0; i < hwconf->ports; i++) {
685 hwconf->vector_mask |= (1 << i);
686 hwconf->baud_base[i] = 921600;
687 }
688 return 0;
689 }
690 #endif
691
692 static int mxser_init(void)
693 {
694 int i, m, retval, b, n;
695 struct pci_dev *pdev = NULL;
696 int index;
697 unsigned char busnum, devnum;
698 struct mxser_hwconf hwconf;
699
700 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
701 if (!mxvar_sdriver)
702 return -ENOMEM;
703 spin_lock_init(&gm_lock);
704
705 for (i = 0; i < MXSER_BOARDS; i++) {
706 mxsercfg[i].board_type = -1;
707 }
708
709 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
710 MXSER_VERSION);
711
712 /* Initialize the tty_driver structure */
713 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
714 mxvar_sdriver->owner = THIS_MODULE;
715 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
716 mxvar_sdriver->name = "ttyMI";
717 mxvar_sdriver->major = ttymajor;
718 mxvar_sdriver->minor_start = 0;
719 mxvar_sdriver->num = MXSER_PORTS + 1;
720 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
721 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
722 mxvar_sdriver->init_termios = tty_std_termios;
723 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
724 mxvar_sdriver->init_termios.c_ispeed = 9600;
725 mxvar_sdriver->init_termios.c_ospeed = 9600;
726 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
727 tty_set_operations(mxvar_sdriver, &mxser_ops);
728 mxvar_sdriver->ttys = mxvar_tty;
729 mxvar_sdriver->termios = mxvar_termios;
730 mxvar_sdriver->termios_locked = mxvar_termios_locked;
731
732 mxvar_diagflag = 0;
733 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
734 memset(&mxvar_log, 0, sizeof(struct mxser_log));
735
736 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
737 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
738 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
739 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
740
741 m = 0;
742 /* Start finding ISA boards here */
743 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
744 int cap;
745
746 if (!(cap = mxserBoardCAP[b]))
747 continue;
748
749 retval = mxser_get_ISA_conf(cap, &hwconf);
750
751 if (retval != 0)
752 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
753 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
754
755 if (retval <= 0) {
756 if (retval == MXSER_ERR_IRQ)
757 printk(KERN_ERR "Invalid interrupt number, "
758 "board not configured\n");
759 else if (retval == MXSER_ERR_IRQ_CONFLIT)
760 printk(KERN_ERR "Invalid interrupt number, "
761 "board not configured\n");
762 else if (retval == MXSER_ERR_VECTOR)
763 printk(KERN_ERR "Invalid interrupt vector, "
764 "board not configured\n");
765 else if (retval == MXSER_ERR_IOADDR)
766 printk(KERN_ERR "Invalid I/O address, "
767 "board not configured\n");
768
769 continue;
770 }
771
772 hwconf.pciInfo.busNum = 0;
773 hwconf.pciInfo.devNum = 0;
774 hwconf.pciInfo.pdev = NULL;
775
776 mxser_getcfg(m, &hwconf);
777 /*
778 * init mxsercfg first,
779 * or mxsercfg data is not correct on ISR.
780 */
781 /* mxser_initbrd will hook ISR. */
782 if (mxser_initbrd(m, &hwconf) < 0)
783 continue;
784
785 m++;
786 }
787
788 /* Start finding ISA boards from module arg */
789 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
790 int cap;
791
792 if (!(cap = ioaddr[b]))
793 continue;
794
795 retval = mxser_get_ISA_conf(cap, &hwconf);
796
797 if (retval != 0)
798 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
799 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
800
801 if (retval <= 0) {
802 if (retval == MXSER_ERR_IRQ)
803 printk(KERN_ERR "Invalid interrupt number, "
804 "board not configured\n");
805 else if (retval == MXSER_ERR_IRQ_CONFLIT)
806 printk(KERN_ERR "Invalid interrupt number, "
807 "board not configured\n");
808 else if (retval == MXSER_ERR_VECTOR)
809 printk(KERN_ERR "Invalid interrupt vector, "
810 "board not configured\n");
811 else if (retval == MXSER_ERR_IOADDR)
812 printk(KERN_ERR "Invalid I/O address, "
813 "board not configured\n");
814
815 continue;
816 }
817
818 hwconf.pciInfo.busNum = 0;
819 hwconf.pciInfo.devNum = 0;
820 hwconf.pciInfo.pdev = NULL;
821
822 mxser_getcfg(m, &hwconf);
823 /*
824 * init mxsercfg first,
825 * or mxsercfg data is not correct on ISR.
826 */
827 /* mxser_initbrd will hook ISR. */
828 if (mxser_initbrd(m, &hwconf) < 0)
829 continue;
830
831 m++;
832 }
833
834 /* start finding PCI board here */
835 #ifdef CONFIG_PCI
836 n = ARRAY_SIZE(mxser_pcibrds) - 1;
837 index = 0;
838 b = 0;
839 while (b < n) {
840 pdev = pci_get_device(mxser_pcibrds[b].vendor,
841 mxser_pcibrds[b].device, pdev);
842 if (pdev == NULL) {
843 b++;
844 continue;
845 }
846 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
847 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
848 hwconf.pciInfo.pdev = pdev;
849 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
850 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
851 busnum, devnum >> 3);
852 index++;
853 if (m >= MXSER_BOARDS)
854 printk(KERN_ERR
855 "Too many Smartio/Industio family boards find "
856 "(maximum %d), board not configured\n",
857 MXSER_BOARDS);
858 else {
859 if (pci_enable_device(pdev)) {
860 printk(KERN_ERR "Moxa SmartI/O PCI enable "
861 "fail !\n");
862 continue;
863 }
864 retval = mxser_get_PCI_conf(busnum, devnum,
865 (int)mxser_pcibrds[b].driver_data,
866 &hwconf);
867 if (retval < 0) {
868 if (retval == MXSER_ERR_IRQ)
869 printk(KERN_ERR
870 "Invalid interrupt number, "
871 "board not configured\n");
872 else if (retval == MXSER_ERR_IRQ_CONFLIT)
873 printk(KERN_ERR
874 "Invalid interrupt number, "
875 "board not configured\n");
876 else if (retval == MXSER_ERR_VECTOR)
877 printk(KERN_ERR
878 "Invalid interrupt vector, "
879 "board not configured\n");
880 else if (retval == MXSER_ERR_IOADDR)
881 printk(KERN_ERR
882 "Invalid I/O address, "
883 "board not configured\n");
884 continue;
885 }
886 mxser_getcfg(m, &hwconf);
887 /* init mxsercfg first,
888 * or mxsercfg data is not correct on ISR.
889 */
890 /* mxser_initbrd will hook ISR. */
891 if (mxser_initbrd(m, &hwconf) < 0)
892 continue;
893 m++;
894 /* Keep an extra reference if we succeeded. It will
895 be returned at unload time */
896 pci_dev_get(pdev);
897 }
898 }
899 #endif
900
901 retval = tty_register_driver(mxvar_sdriver);
902 if (retval) {
903 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
904 " driver !\n");
905 put_tty_driver(mxvar_sdriver);
906
907 for (i = 0; i < MXSER_BOARDS; i++) {
908 if (mxsercfg[i].board_type == -1)
909 continue;
910 else {
911 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
912 /* todo: release io, vector */
913 }
914 }
915 return retval;
916 }
917
918 return 0;
919 }
920
921 static void mxser_do_softint(struct work_struct *work)
922 {
923 struct mxser_struct *info =
924 container_of(work, struct mxser_struct, tqueue);
925 struct tty_struct *tty;
926
927 tty = info->tty;
928
929 if (tty) {
930 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
931 tty_wakeup(tty);
932 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
933 tty_hangup(tty);
934 }
935 }
936
937 static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
938 {
939 unsigned char status = 0;
940
941 status = inb(baseaddr + UART_MSR);
942
943 mxser_msr[port] &= 0x0F;
944 mxser_msr[port] |= status;
945 status = mxser_msr[port];
946 if (mode)
947 mxser_msr[port] = 0;
948
949 return status;
950 }
951
952 /*
953 * This routine is called whenever a serial port is opened. It
954 * enables interrupts for a serial port, linking in its async structure into
955 * the IRQ chain. It also performs the serial-specific
956 * initialization for the tty structure.
957 */
958 static int mxser_open(struct tty_struct *tty, struct file *filp)
959 {
960 struct mxser_struct *info;
961 int retval, line;
962
963 /* initialize driver_data in case something fails */
964 tty->driver_data = NULL;
965
966 line = tty->index;
967 if (line == MXSER_PORTS)
968 return 0;
969 if (line < 0 || line > MXSER_PORTS)
970 return -ENODEV;
971 info = mxvar_table + line;
972 if (!info->base)
973 return -ENODEV;
974
975 tty->driver_data = info;
976 info->tty = tty;
977 /*
978 * Start up serial port
979 */
980 retval = mxser_startup(info);
981 if (retval)
982 return retval;
983
984 retval = mxser_block_til_ready(tty, filp, info);
985 if (retval)
986 return retval;
987
988 info->count++;
989
990 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
991 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
992 *tty->termios = info->normal_termios;
993 else
994 *tty->termios = info->callout_termios;
995 mxser_change_speed(info, NULL);
996 }
997
998 /*
999 status = mxser_get_msr(info->base, 0, info->port);
1000 mxser_check_modem_status(info, status);
1001 */
1002
1003 /* unmark here for very high baud rate (ex. 921600 bps) used */
1004 tty->low_latency = 1;
1005 return 0;
1006 }
1007
1008 /*
1009 * This routine is called when the serial port gets closed. First, we
1010 * wait for the last remaining data to be sent. Then, we unlink its
1011 * async structure from the interrupt chain if necessary, and we free
1012 * that IRQ if nothing is left in the chain.
1013 */
1014 static void mxser_close(struct tty_struct *tty, struct file *filp)
1015 {
1016 struct mxser_struct *info = tty->driver_data;
1017
1018 unsigned long timeout;
1019 unsigned long flags;
1020 struct tty_ldisc *ld;
1021
1022 if (tty->index == MXSER_PORTS)
1023 return;
1024 if (!info)
1025 return;
1026
1027 spin_lock_irqsave(&info->slock, flags);
1028
1029 if (tty_hung_up_p(filp)) {
1030 spin_unlock_irqrestore(&info->slock, flags);
1031 return;
1032 }
1033 if ((tty->count == 1) && (info->count != 1)) {
1034 /*
1035 * Uh, oh. tty->count is 1, which means that the tty
1036 * structure will be freed. Info->count should always
1037 * be one in these conditions. If it's greater than
1038 * one, we've got real problems, since it means the
1039 * serial port won't be shutdown.
1040 */
1041 printk(KERN_ERR "mxser_close: bad serial port count; "
1042 "tty->count is 1, info->count is %d\n", info->count);
1043 info->count = 1;
1044 }
1045 if (--info->count < 0) {
1046 printk(KERN_ERR "mxser_close: bad serial port count for "
1047 "ttys%d: %d\n", info->port, info->count);
1048 info->count = 0;
1049 }
1050 if (info->count) {
1051 spin_unlock_irqrestore(&info->slock, flags);
1052 return;
1053 }
1054 info->flags |= ASYNC_CLOSING;
1055 spin_unlock_irqrestore(&info->slock, flags);
1056 /*
1057 * Save the termios structure, since this port may have
1058 * separate termios for callout and dialin.
1059 */
1060 if (info->flags & ASYNC_NORMAL_ACTIVE)
1061 info->normal_termios = *tty->termios;
1062 /*
1063 * Now we wait for the transmit buffer to clear; and we notify
1064 * the line discipline to only process XON/XOFF characters.
1065 */
1066 tty->closing = 1;
1067 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1068 tty_wait_until_sent(tty, info->closing_wait);
1069 /*
1070 * At this point we stop accepting input. To do this, we
1071 * disable the receive line status interrupts, and tell the
1072 * interrupt driver to stop checking the data ready bit in the
1073 * line status register.
1074 */
1075 info->IER &= ~UART_IER_RLSI;
1076 if (info->IsMoxaMustChipFlag)
1077 info->IER &= ~MOXA_MUST_RECV_ISR;
1078 /* by William
1079 info->read_status_mask &= ~UART_LSR_DR;
1080 */
1081 if (info->flags & ASYNC_INITIALIZED) {
1082 outb(info->IER, info->base + UART_IER);
1083 /*
1084 * Before we drop DTR, make sure the UART transmitter
1085 * has completely drained; this is especially
1086 * important if there is a transmit FIFO!
1087 */
1088 timeout = jiffies + HZ;
1089 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
1090 schedule_timeout_interruptible(5);
1091 if (time_after(jiffies, timeout))
1092 break;
1093 }
1094 }
1095 mxser_shutdown(info);
1096
1097 if (tty->driver->flush_buffer)
1098 tty->driver->flush_buffer(tty);
1099
1100 ld = tty_ldisc_ref(tty);
1101 if (ld) {
1102 if (ld->flush_buffer)
1103 ld->flush_buffer(tty);
1104 tty_ldisc_deref(ld);
1105 }
1106
1107 tty->closing = 0;
1108 info->event = 0;
1109 info->tty = NULL;
1110 if (info->blocked_open) {
1111 if (info->close_delay)
1112 schedule_timeout_interruptible(info->close_delay);
1113 wake_up_interruptible(&info->open_wait);
1114 }
1115
1116 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1117 wake_up_interruptible(&info->close_wait);
1118
1119 }
1120
1121 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1122 {
1123 int c, total = 0;
1124 struct mxser_struct *info = tty->driver_data;
1125 unsigned long flags;
1126
1127 if (!info->xmit_buf)
1128 return 0;
1129
1130 while (1) {
1131 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1132 SERIAL_XMIT_SIZE - info->xmit_head));
1133 if (c <= 0)
1134 break;
1135
1136 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1137 spin_lock_irqsave(&info->slock, flags);
1138 info->xmit_head = (info->xmit_head + c) &
1139 (SERIAL_XMIT_SIZE - 1);
1140 info->xmit_cnt += c;
1141 spin_unlock_irqrestore(&info->slock, flags);
1142
1143 buf += c;
1144 count -= c;
1145 total += c;
1146 }
1147
1148 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
1149 if (!tty->hw_stopped ||
1150 (info->type == PORT_16550A) ||
1151 (info->IsMoxaMustChipFlag)) {
1152 spin_lock_irqsave(&info->slock, flags);
1153 info->IER |= UART_IER_THRI;
1154 outb(info->IER, info->base + UART_IER);
1155 spin_unlock_irqrestore(&info->slock, flags);
1156 }
1157 }
1158 return total;
1159 }
1160
1161 static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1162 {
1163 struct mxser_struct *info = tty->driver_data;
1164 unsigned long flags;
1165
1166 if (!info->xmit_buf)
1167 return;
1168
1169 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1170 return;
1171
1172 spin_lock_irqsave(&info->slock, flags);
1173 info->xmit_buf[info->xmit_head++] = ch;
1174 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1175 info->xmit_cnt++;
1176 spin_unlock_irqrestore(&info->slock, flags);
1177 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
1178 if (!tty->hw_stopped ||
1179 (info->type == PORT_16550A) ||
1180 info->IsMoxaMustChipFlag) {
1181 spin_lock_irqsave(&info->slock, flags);
1182 info->IER |= UART_IER_THRI;
1183 outb(info->IER, info->base + UART_IER);
1184 spin_unlock_irqrestore(&info->slock, flags);
1185 }
1186 }
1187 }
1188
1189
1190 static void mxser_flush_chars(struct tty_struct *tty)
1191 {
1192 struct mxser_struct *info = tty->driver_data;
1193 unsigned long flags;
1194
1195 if (info->xmit_cnt <= 0 ||
1196 tty->stopped ||
1197 !info->xmit_buf ||
1198 (tty->hw_stopped &&
1199 (info->type != PORT_16550A) &&
1200 (!info->IsMoxaMustChipFlag)
1201 ))
1202 return;
1203
1204 spin_lock_irqsave(&info->slock, flags);
1205
1206 info->IER |= UART_IER_THRI;
1207 outb(info->IER, info->base + UART_IER);
1208
1209 spin_unlock_irqrestore(&info->slock, flags);
1210 }
1211
1212 static int mxser_write_room(struct tty_struct *tty)
1213 {
1214 struct mxser_struct *info = tty->driver_data;
1215 int ret;
1216
1217 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1218 if (ret < 0)
1219 ret = 0;
1220 return ret;
1221 }
1222
1223 static int mxser_chars_in_buffer(struct tty_struct *tty)
1224 {
1225 struct mxser_struct *info = tty->driver_data;
1226 return info->xmit_cnt;
1227 }
1228
1229 static void mxser_flush_buffer(struct tty_struct *tty)
1230 {
1231 struct mxser_struct *info = tty->driver_data;
1232 char fcr;
1233 unsigned long flags;
1234
1235
1236 spin_lock_irqsave(&info->slock, flags);
1237 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1238
1239 /* below added by shinhay */
1240 fcr = inb(info->base + UART_FCR);
1241 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1242 info->base + UART_FCR);
1243 outb(fcr, info->base + UART_FCR);
1244
1245 spin_unlock_irqrestore(&info->slock, flags);
1246 /* above added by shinhay */
1247
1248 tty_wakeup(tty);
1249 }
1250
1251 static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1252 {
1253 struct mxser_struct *info = tty->driver_data;
1254 int retval;
1255 struct async_icount cprev, cnow; /* kernel counter temps */
1256 struct serial_icounter_struct __user *p_cuser;
1257 unsigned long templ;
1258 unsigned long flags;
1259 void __user *argp = (void __user *)arg;
1260
1261 if (tty->index == MXSER_PORTS)
1262 return mxser_ioctl_special(cmd, argp);
1263
1264 /* following add by Victor Yu. 01-05-2004 */
1265 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1266 int opmode, p;
1267 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1268 int shiftbit;
1269 unsigned char val, mask;
1270
1271 p = info->port % 4;
1272 if (cmd == MOXA_SET_OP_MODE) {
1273 if (get_user(opmode, (int __user *) argp))
1274 return -EFAULT;
1275 if (opmode != RS232_MODE &&
1276 opmode != RS485_2WIRE_MODE &&
1277 opmode != RS422_MODE &&
1278 opmode != RS485_4WIRE_MODE)
1279 return -EFAULT;
1280 mask = ModeMask[p];
1281 shiftbit = p * 2;
1282 val = inb(info->opmode_ioaddr);
1283 val &= mask;
1284 val |= (opmode << shiftbit);
1285 outb(val, info->opmode_ioaddr);
1286 } else {
1287 shiftbit = p * 2;
1288 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1289 opmode &= OP_MODE_MASK;
1290 if (copy_to_user(argp, &opmode, sizeof(int)))
1291 return -EFAULT;
1292 }
1293 return 0;
1294 }
1295 /* above add by Victor Yu. 01-05-2004 */
1296
1297 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1298 if (tty->flags & (1 << TTY_IO_ERROR))
1299 return -EIO;
1300 }
1301 switch (cmd) {
1302 case TCSBRK: /* SVID version: non-zero arg --> no break */
1303 retval = tty_check_change(tty);
1304 if (retval)
1305 return retval;
1306 tty_wait_until_sent(tty, 0);
1307 if (!arg)
1308 mxser_send_break(info, HZ / 4); /* 1/4 second */
1309 return 0;
1310 case TCSBRKP: /* support for POSIX tcsendbreak() */
1311 retval = tty_check_change(tty);
1312 if (retval)
1313 return retval;
1314 tty_wait_until_sent(tty, 0);
1315 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1316 return 0;
1317 case TIOCGSOFTCAR:
1318 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1319 case TIOCSSOFTCAR:
1320 if (get_user(templ, (unsigned long __user *) argp))
1321 return -EFAULT;
1322 arg = templ;
1323 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
1324 return 0;
1325 case TIOCGSERIAL:
1326 return mxser_get_serial_info(info, argp);
1327 case TIOCSSERIAL:
1328 return mxser_set_serial_info(info, argp);
1329 case TIOCSERGETLSR: /* Get line status register */
1330 return mxser_get_lsr_info(info, argp);
1331 /*
1332 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1333 * - mask passed in arg for lines of interest
1334 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1335 * Caller should use TIOCGICOUNT to see which one it was
1336 */
1337 case TIOCMIWAIT:
1338 spin_lock_irqsave(&info->slock, flags);
1339 cnow = info->icount; /* note the counters on entry */
1340 spin_unlock_irqrestore(&info->slock, flags);
1341
1342 wait_event_interruptible(info->delta_msr_wait, ({
1343 cprev = cnow;
1344 spin_lock_irqsave(&info->slock, flags);
1345 cnow = info->icount; /* atomic copy */
1346 spin_unlock_irqrestore(&info->slock, flags);
1347
1348 ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1349 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1350 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1351 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts));
1352 }));
1353 break;
1354 /*
1355 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1356 * Return: write counters to the user passed counter struct
1357 * NB: both 1->0 and 0->1 transitions are counted except for
1358 * RI where only 0->1 is counted.
1359 */
1360 case TIOCGICOUNT:
1361 spin_lock_irqsave(&info->slock, flags);
1362 cnow = info->icount;
1363 spin_unlock_irqrestore(&info->slock, flags);
1364 p_cuser = argp;
1365 /* modified by casper 1/11/2000 */
1366 if (put_user(cnow.frame, &p_cuser->frame))
1367 return -EFAULT;
1368 if (put_user(cnow.brk, &p_cuser->brk))
1369 return -EFAULT;
1370 if (put_user(cnow.overrun, &p_cuser->overrun))
1371 return -EFAULT;
1372 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1373 return -EFAULT;
1374 if (put_user(cnow.parity, &p_cuser->parity))
1375 return -EFAULT;
1376 if (put_user(cnow.rx, &p_cuser->rx))
1377 return -EFAULT;
1378 if (put_user(cnow.tx, &p_cuser->tx))
1379 return -EFAULT;
1380 put_user(cnow.cts, &p_cuser->cts);
1381 put_user(cnow.dsr, &p_cuser->dsr);
1382 put_user(cnow.rng, &p_cuser->rng);
1383 put_user(cnow.dcd, &p_cuser->dcd);
1384 return 0;
1385 case MOXA_HighSpeedOn:
1386 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1387 case MOXA_SDS_RSTICOUNTER: {
1388 info->mon_data.rxcnt = 0;
1389 info->mon_data.txcnt = 0;
1390 return 0;
1391 }
1392 /* (above) added by James. */
1393 case MOXA_ASPP_SETBAUD:{
1394 long baud;
1395 if (get_user(baud, (long __user *)argp))
1396 return -EFAULT;
1397 mxser_set_baud(info, baud);
1398 return 0;
1399 }
1400 case MOXA_ASPP_GETBAUD:
1401 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1402 return -EFAULT;
1403
1404 return 0;
1405
1406 case MOXA_ASPP_OQUEUE:{
1407 int len, lsr;
1408
1409 len = mxser_chars_in_buffer(tty);
1410
1411 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1412
1413 len += (lsr ? 0 : 1);
1414
1415 if (copy_to_user(argp, &len, sizeof(int)))
1416 return -EFAULT;
1417
1418 return 0;
1419 }
1420 case MOXA_ASPP_MON: {
1421 int mcr, status;
1422
1423 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1424
1425 status = mxser_get_msr(info->base, 1, info->port, info);
1426 mxser_check_modem_status(info, status);
1427
1428 mcr = inb(info->base + UART_MCR);
1429 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1430 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1431 else
1432 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1433
1434 if (mcr & MOXA_MUST_MCR_TX_XON)
1435 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1436 else
1437 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1438
1439 if (info->tty->hw_stopped)
1440 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1441 else
1442 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1443
1444 if (copy_to_user(argp, &info->mon_data,
1445 sizeof(struct mxser_mon)))
1446 return -EFAULT;
1447
1448 return 0;
1449 }
1450
1451 case MOXA_ASPP_LSTATUS: {
1452 if (copy_to_user(argp, &info->err_shadow,
1453 sizeof(unsigned char)))
1454 return -EFAULT;
1455
1456 info->err_shadow = 0;
1457 return 0;
1458 }
1459 case MOXA_SET_BAUD_METHOD: {
1460 int method;
1461
1462 if (get_user(method, (int __user *)argp))
1463 return -EFAULT;
1464 mxser_set_baud_method[info->port] = method;
1465 if (copy_to_user(argp, &method, sizeof(int)))
1466 return -EFAULT;
1467
1468 return 0;
1469 }
1470 default:
1471 return -ENOIOCTLCMD;
1472 }
1473 return 0;
1474 }
1475
1476 #ifndef CMSPAR
1477 #define CMSPAR 010000000000
1478 #endif
1479
1480 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1481 {
1482 int i, result, status;
1483
1484 switch (cmd) {
1485 case MOXA_GET_CONF:
1486 if (copy_to_user(argp, mxsercfg,
1487 sizeof(struct mxser_hwconf) * 4))
1488 return -EFAULT;
1489 return 0;
1490 case MOXA_GET_MAJOR:
1491 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1492 return -EFAULT;
1493 return 0;
1494
1495 case MOXA_GET_CUMAJOR:
1496 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1497 return -EFAULT;
1498 return 0;
1499
1500 case MOXA_CHKPORTENABLE:
1501 result = 0;
1502 for (i = 0; i < MXSER_PORTS; i++) {
1503 if (mxvar_table[i].base)
1504 result |= (1 << i);
1505 }
1506 return put_user(result, (unsigned long __user *)argp);
1507 case MOXA_GETDATACOUNT:
1508 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1509 return -EFAULT;
1510 return 0;
1511 case MOXA_GETMSTATUS:
1512 for (i = 0; i < MXSER_PORTS; i++) {
1513 GMStatus[i].ri = 0;
1514 if (!mxvar_table[i].base) {
1515 GMStatus[i].dcd = 0;
1516 GMStatus[i].dsr = 0;
1517 GMStatus[i].cts = 0;
1518 continue;
1519 }
1520
1521 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1522 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1523 else
1524 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1525
1526 status = inb(mxvar_table[i].base + UART_MSR);
1527 if (status & 0x80 /*UART_MSR_DCD */ )
1528 GMStatus[i].dcd = 1;
1529 else
1530 GMStatus[i].dcd = 0;
1531
1532 if (status & 0x20 /*UART_MSR_DSR */ )
1533 GMStatus[i].dsr = 1;
1534 else
1535 GMStatus[i].dsr = 0;
1536
1537
1538 if (status & 0x10 /*UART_MSR_CTS */ )
1539 GMStatus[i].cts = 1;
1540 else
1541 GMStatus[i].cts = 0;
1542 }
1543 if (copy_to_user(argp, GMStatus,
1544 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1545 return -EFAULT;
1546 return 0;
1547 case MOXA_ASPP_MON_EXT: {
1548 int status;
1549 int opmode, p;
1550 int shiftbit;
1551 unsigned cflag, iflag;
1552
1553 for (i = 0; i < MXSER_PORTS; i++) {
1554 if (!mxvar_table[i].base)
1555 continue;
1556
1557 status = mxser_get_msr(mxvar_table[i].base, 0,
1558 i, &(mxvar_table[i]));
1559 /*
1560 mxser_check_modem_status(&mxvar_table[i],
1561 status);
1562 */
1563 if (status & UART_MSR_TERI)
1564 mxvar_table[i].icount.rng++;
1565 if (status & UART_MSR_DDSR)
1566 mxvar_table[i].icount.dsr++;
1567 if (status & UART_MSR_DDCD)
1568 mxvar_table[i].icount.dcd++;
1569 if (status & UART_MSR_DCTS)
1570 mxvar_table[i].icount.cts++;
1571
1572 mxvar_table[i].mon_data.modem_status = status;
1573 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1574 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1575 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1576 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1577 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1578 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1579
1580 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1581 cflag = mxvar_table[i].normal_termios.c_cflag;
1582 iflag = mxvar_table[i].normal_termios.c_iflag;
1583 } else {
1584 cflag = mxvar_table[i].tty->termios->c_cflag;
1585 iflag = mxvar_table[i].tty->termios->c_iflag;
1586 }
1587
1588 mon_data_ext.databits[i] = cflag & CSIZE;
1589
1590 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1591
1592 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1593
1594 mon_data_ext.flowctrl[i] = 0x00;
1595
1596 if (cflag & CRTSCTS)
1597 mon_data_ext.flowctrl[i] |= 0x03;
1598
1599 if (iflag & (IXON | IXOFF))
1600 mon_data_ext.flowctrl[i] |= 0x0C;
1601
1602 if (mxvar_table[i].type == PORT_16550A)
1603 mon_data_ext.fifo[i] = 1;
1604 else
1605 mon_data_ext.fifo[i] = 0;
1606
1607 p = i % 4;
1608 shiftbit = p * 2;
1609 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1610 opmode &= OP_MODE_MASK;
1611
1612 mon_data_ext.iftype[i] = opmode;
1613
1614 }
1615 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1616 return -EFAULT;
1617
1618 return 0;
1619
1620 }
1621 default:
1622 return -ENOIOCTLCMD;
1623 }
1624 return 0;
1625 }
1626
1627 static void mxser_stoprx(struct tty_struct *tty)
1628 {
1629 struct mxser_struct *info = tty->driver_data;
1630 /* unsigned long flags; */
1631
1632 info->ldisc_stop_rx = 1;
1633 if (I_IXOFF(tty)) {
1634 /* MX_LOCK(&info->slock); */
1635 /* following add by Victor Yu. 09-02-2002 */
1636 if (info->IsMoxaMustChipFlag) {
1637 info->IER &= ~MOXA_MUST_RECV_ISR;
1638 outb(info->IER, info->base + UART_IER);
1639 } else {
1640 /* above add by Victor Yu. 09-02-2002 */
1641 info->x_char = STOP_CHAR(tty);
1642 /* mask by Victor Yu. 09-02-2002 */
1643 /* outb(info->IER, 0); */
1644 outb(0, info->base + UART_IER);
1645 info->IER |= UART_IER_THRI;
1646 /* force Tx interrupt */
1647 outb(info->IER, info->base + UART_IER);
1648 } /* add by Victor Yu. 09-02-2002 */
1649 /* MX_UNLOCK(&info->slock); */
1650 }
1651
1652 if (info->tty->termios->c_cflag & CRTSCTS) {
1653 /* MX_LOCK(&info->slock); */
1654 info->MCR &= ~UART_MCR_RTS;
1655 outb(info->MCR, info->base + UART_MCR);
1656 /* MX_UNLOCK(&info->slock); */
1657 }
1658 }
1659
1660 static void mxser_startrx(struct tty_struct *tty)
1661 {
1662 struct mxser_struct *info = tty->driver_data;
1663 /* unsigned long flags; */
1664
1665 info->ldisc_stop_rx = 0;
1666 if (I_IXOFF(tty)) {
1667 if (info->x_char)
1668 info->x_char = 0;
1669 else {
1670 /* MX_LOCK(&info->slock); */
1671
1672 /* following add by Victor Yu. 09-02-2002 */
1673 if (info->IsMoxaMustChipFlag) {
1674 info->IER |= MOXA_MUST_RECV_ISR;
1675 outb(info->IER, info->base + UART_IER);
1676 } else {
1677 /* above add by Victor Yu. 09-02-2002 */
1678
1679 info->x_char = START_CHAR(tty);
1680 /* mask by Victor Yu. 09-02-2002 */
1681 /* outb(info->IER, 0); */
1682 /* add by Victor Yu. 09-02-2002 */
1683 outb(0, info->base + UART_IER);
1684 /* force Tx interrupt */
1685 info->IER |= UART_IER_THRI;
1686 outb(info->IER, info->base + UART_IER);
1687 } /* add by Victor Yu. 09-02-2002 */
1688 /* MX_UNLOCK(&info->slock); */
1689 }
1690 }
1691
1692 if (info->tty->termios->c_cflag & CRTSCTS) {
1693 /* MX_LOCK(&info->slock); */
1694 info->MCR |= UART_MCR_RTS;
1695 outb(info->MCR, info->base + UART_MCR);
1696 /* MX_UNLOCK(&info->slock); */
1697 }
1698 }
1699
1700 /*
1701 * This routine is called by the upper-layer tty layer to signal that
1702 * incoming characters should be throttled.
1703 */
1704 static void mxser_throttle(struct tty_struct *tty)
1705 {
1706 /* struct mxser_struct *info = tty->driver_data; */
1707 /* unsigned long flags; */
1708
1709 /* MX_LOCK(&info->slock); */
1710 mxser_stoprx(tty);
1711 /* MX_UNLOCK(&info->slock); */
1712 }
1713
1714 static void mxser_unthrottle(struct tty_struct *tty)
1715 {
1716 /* struct mxser_struct *info = tty->driver_data; */
1717 /* unsigned long flags; */
1718
1719 /* MX_LOCK(&info->slock); */
1720 mxser_startrx(tty);
1721 /* MX_UNLOCK(&info->slock); */
1722 }
1723
1724 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1725 {
1726 struct mxser_struct *info = tty->driver_data;
1727 unsigned long flags;
1728
1729 mxser_change_speed(info, old_termios);
1730
1731 if ((old_termios->c_cflag & CRTSCTS) &&
1732 !(tty->termios->c_cflag & CRTSCTS)) {
1733 tty->hw_stopped = 0;
1734 mxser_start(tty);
1735 }
1736
1737 /* Handle sw stopped */
1738 if ((old_termios->c_iflag & IXON) &&
1739 !(tty->termios->c_iflag & IXON)) {
1740 tty->stopped = 0;
1741
1742 /* following add by Victor Yu. 09-02-2002 */
1743 if (info->IsMoxaMustChipFlag) {
1744 spin_lock_irqsave(&info->slock, flags);
1745 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1746 spin_unlock_irqrestore(&info->slock, flags);
1747 }
1748 /* above add by Victor Yu. 09-02-2002 */
1749
1750 mxser_start(tty);
1751 }
1752 }
1753
1754 /*
1755 * mxser_stop() and mxser_start()
1756 *
1757 * This routines are called before setting or resetting tty->stopped.
1758 * They enable or disable transmitter interrupts, as necessary.
1759 */
1760 static void mxser_stop(struct tty_struct *tty)
1761 {
1762 struct mxser_struct *info = tty->driver_data;
1763 unsigned long flags;
1764
1765 spin_lock_irqsave(&info->slock, flags);
1766 if (info->IER & UART_IER_THRI) {
1767 info->IER &= ~UART_IER_THRI;
1768 outb(info->IER, info->base + UART_IER);
1769 }
1770 spin_unlock_irqrestore(&info->slock, flags);
1771 }
1772
1773 static void mxser_start(struct tty_struct *tty)
1774 {
1775 struct mxser_struct *info = tty->driver_data;
1776 unsigned long flags;
1777
1778 spin_lock_irqsave(&info->slock, flags);
1779 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1780 info->IER |= UART_IER_THRI;
1781 outb(info->IER, info->base + UART_IER);
1782 }
1783 spin_unlock_irqrestore(&info->slock, flags);
1784 }
1785
1786 /*
1787 * mxser_wait_until_sent() --- wait until the transmitter is empty
1788 */
1789 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1790 {
1791 struct mxser_struct *info = tty->driver_data;
1792 unsigned long orig_jiffies, char_time;
1793 int lsr;
1794
1795 if (info->type == PORT_UNKNOWN)
1796 return;
1797
1798 if (info->xmit_fifo_size == 0)
1799 return; /* Just in case.... */
1800
1801 orig_jiffies = jiffies;
1802 /*
1803 * Set the check interval to be 1/5 of the estimated time to
1804 * send a single character, and make it at least 1. The check
1805 * interval should also be less than the timeout.
1806 *
1807 * Note: we have to use pretty tight timings here to satisfy
1808 * the NIST-PCTS.
1809 */
1810 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1811 char_time = char_time / 5;
1812 if (char_time == 0)
1813 char_time = 1;
1814 if (timeout && timeout < char_time)
1815 char_time = timeout;
1816 /*
1817 * If the transmitter hasn't cleared in twice the approximate
1818 * amount of time to send the entire FIFO, it probably won't
1819 * ever clear. This assumes the UART isn't doing flow
1820 * control, which is currently the case. Hence, if it ever
1821 * takes longer than info->timeout, this is probably due to a
1822 * UART bug of some kind. So, we clamp the timeout parameter at
1823 * 2*info->timeout.
1824 */
1825 if (!timeout || timeout > 2 * info->timeout)
1826 timeout = 2 * info->timeout;
1827 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1828 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1829 timeout, char_time);
1830 printk("jiff=%lu...", jiffies);
1831 #endif
1832 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1833 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1834 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1835 #endif
1836 schedule_timeout_interruptible(char_time);
1837 if (signal_pending(current))
1838 break;
1839 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1840 break;
1841 }
1842 set_current_state(TASK_RUNNING);
1843
1844 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1845 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1846 #endif
1847 }
1848
1849
1850 /*
1851 * This routine is called by tty_hangup() when a hangup is signaled.
1852 */
1853 void mxser_hangup(struct tty_struct *tty)
1854 {
1855 struct mxser_struct *info = tty->driver_data;
1856
1857 mxser_flush_buffer(tty);
1858 mxser_shutdown(info);
1859 info->event = 0;
1860 info->count = 0;
1861 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1862 info->tty = NULL;
1863 wake_up_interruptible(&info->open_wait);
1864 }
1865
1866
1867 /* added by James 03-12-2004. */
1868 /*
1869 * mxser_rs_break() --- routine which turns the break handling on or off
1870 */
1871 static void mxser_rs_break(struct tty_struct *tty, int break_state)
1872 {
1873 struct mxser_struct *info = tty->driver_data;
1874 unsigned long flags;
1875
1876 spin_lock_irqsave(&info->slock, flags);
1877 if (break_state == -1)
1878 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
1879 info->base + UART_LCR);
1880 else
1881 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
1882 info->base + UART_LCR);
1883 spin_unlock_irqrestore(&info->slock, flags);
1884 }
1885
1886 /* (above) added by James. */
1887
1888
1889 /*
1890 * This is the serial driver's generic interrupt routine
1891 */
1892 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1893 {
1894 int status, iir, i;
1895 struct mxser_struct *info;
1896 struct mxser_struct *port;
1897 int max, irqbits, bits, msr;
1898 int pass_counter = 0;
1899 int handled = IRQ_NONE;
1900
1901 port = NULL;
1902 /* spin_lock(&gm_lock); */
1903
1904 for (i = 0; i < MXSER_BOARDS; i++) {
1905 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1906 port = dev_id;
1907 break;
1908 }
1909 }
1910
1911 if (i == MXSER_BOARDS)
1912 goto irq_stop;
1913 if (port == 0)
1914 goto irq_stop;
1915 max = mxser_numports[mxsercfg[i].board_type - 1];
1916 while (1) {
1917 irqbits = inb(port->vector) & port->vectormask;
1918 if (irqbits == port->vectormask)
1919 break;
1920
1921 handled = IRQ_HANDLED;
1922 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
1923 if (irqbits == port->vectormask)
1924 break;
1925 if (bits & irqbits)
1926 continue;
1927 info = port + i;
1928
1929 /* following add by Victor Yu. 09-13-2002 */
1930 iir = inb(info->base + UART_IIR);
1931 if (iir & UART_IIR_NO_INT)
1932 continue;
1933 iir &= MOXA_MUST_IIR_MASK;
1934 if (!info->tty) {
1935 status = inb(info->base + UART_LSR);
1936 outb(0x27, info->base + UART_FCR);
1937 inb(info->base + UART_MSR);
1938 continue;
1939 }
1940
1941 /* mask by Victor Yu. 09-13-2002
1942 if ( !info->tty ||
1943 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1944 continue;
1945 */
1946 /* mask by Victor Yu. 09-02-2002
1947 status = inb(info->base + UART_LSR) & info->read_status_mask;
1948 */
1949
1950 /* following add by Victor Yu. 09-02-2002 */
1951 status = inb(info->base + UART_LSR);
1952
1953 if (status & UART_LSR_PE)
1954 info->err_shadow |= NPPI_NOTIFY_PARITY;
1955 if (status & UART_LSR_FE)
1956 info->err_shadow |= NPPI_NOTIFY_FRAMING;
1957 if (status & UART_LSR_OE)
1958 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1959 if (status & UART_LSR_BI)
1960 info->err_shadow |= NPPI_NOTIFY_BREAK;
1961
1962 if (info->IsMoxaMustChipFlag) {
1963 /*
1964 if ( (status & 0x02) && !(status & 0x01) ) {
1965 outb(info->base+UART_FCR, 0x23);
1966 continue;
1967 }
1968 */
1969 if (iir == MOXA_MUST_IIR_GDA ||
1970 iir == MOXA_MUST_IIR_RDA ||
1971 iir == MOXA_MUST_IIR_RTO ||
1972 iir == MOXA_MUST_IIR_LSR)
1973 mxser_receive_chars(info, &status);
1974
1975 } else {
1976 /* above add by Victor Yu. 09-02-2002 */
1977
1978 status &= info->read_status_mask;
1979 if (status & UART_LSR_DR)
1980 mxser_receive_chars(info, &status);
1981 }
1982 msr = inb(info->base + UART_MSR);
1983 if (msr & UART_MSR_ANY_DELTA) {
1984 mxser_check_modem_status(info, msr);
1985 }
1986 /* following add by Victor Yu. 09-13-2002 */
1987 if (info->IsMoxaMustChipFlag) {
1988 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
1989 mxser_transmit_chars(info);
1990 }
1991 } else {
1992 /* above add by Victor Yu. 09-13-2002 */
1993
1994 if (status & UART_LSR_THRE) {
1995 /* 8-2-99 by William
1996 if ( info->x_char || (info->xmit_cnt > 0) )
1997 */
1998 mxser_transmit_chars(info);
1999 }
2000 }
2001 }
2002 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
2003 break; /* Prevent infinite loops */
2004 }
2005 }
2006
2007 irq_stop:
2008 /* spin_unlock(&gm_lock); */
2009 return handled;
2010 }
2011
2012 static void mxser_receive_chars(struct mxser_struct *info, int *status)
2013 {
2014 struct tty_struct *tty = info->tty;
2015 unsigned char ch, gdl;
2016 int ignored = 0;
2017 int cnt = 0;
2018 int recv_room;
2019 int max = 256;
2020 unsigned long flags;
2021
2022 spin_lock_irqsave(&info->slock, flags);
2023
2024 recv_room = tty->receive_room;
2025 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
2026 /* mxser_throttle(tty); */
2027 mxser_stoprx(tty);
2028 /* return; */
2029 }
2030
2031 /* following add by Victor Yu. 09-02-2002 */
2032 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
2033
2034 if (*status & UART_LSR_SPECIAL) {
2035 goto intr_old;
2036 }
2037 /* following add by Victor Yu. 02-11-2004 */
2038 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
2039 (*status & MOXA_MUST_LSR_RERR))
2040 goto intr_old;
2041 /* above add by Victor Yu. 02-14-2004 */
2042 if (*status & MOXA_MUST_LSR_RERR)
2043 goto intr_old;
2044
2045 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2046
2047 /* add by Victor Yu. 02-11-2004 */
2048 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
2049 gdl &= MOXA_MUST_GDL_MASK;
2050 if (gdl >= recv_room) {
2051 if (!info->ldisc_stop_rx) {
2052 /* mxser_throttle(tty); */
2053 mxser_stoprx(tty);
2054 }
2055 /* return; */
2056 }
2057 while (gdl--) {
2058 ch = inb(info->base + UART_RX);
2059 tty_insert_flip_char(tty, ch, 0);
2060 cnt++;
2061 /*
2062 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
2063 mxser_stoprx(tty);
2064 info->stop_rx = 1;
2065 break;
2066 } */
2067 }
2068 goto end_intr;
2069 }
2070 intr_old:
2071 /* above add by Victor Yu. 09-02-2002 */
2072
2073 do {
2074 if (max-- < 0)
2075 break;
2076 /*
2077 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
2078 mxser_stoprx(tty);
2079 info->stop_rx=1;
2080 break;
2081 }
2082 */
2083
2084 ch = inb(info->base + UART_RX);
2085 /* following add by Victor Yu. 09-02-2002 */
2086 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2087 outb(0x23, info->base + UART_FCR);
2088 *status &= info->read_status_mask;
2089 /* above add by Victor Yu. 09-02-2002 */
2090 if (*status & info->ignore_status_mask) {
2091 if (++ignored > 100)
2092 break;
2093 } else {
2094 char flag = 0;
2095 if (*status & UART_LSR_SPECIAL) {
2096 if (*status & UART_LSR_BI) {
2097 flag = TTY_BREAK;
2098 /* added by casper 1/11/2000 */
2099 info->icount.brk++;
2100 /* */
2101 if (info->flags & ASYNC_SAK)
2102 do_SAK(tty);
2103 } else if (*status & UART_LSR_PE) {
2104 flag = TTY_PARITY;
2105 /* added by casper 1/11/2000 */
2106 info->icount.parity++;
2107 /* */
2108 } else if (*status & UART_LSR_FE) {
2109 flag = TTY_FRAME;
2110 /* added by casper 1/11/2000 */
2111 info->icount.frame++;
2112 /* */
2113 } else if (*status & UART_LSR_OE) {
2114 flag = TTY_OVERRUN;
2115 /* added by casper 1/11/2000 */
2116 info->icount.overrun++;
2117 /* */
2118 }
2119 }
2120 tty_insert_flip_char(tty, ch, flag);
2121 cnt++;
2122 if (cnt >= recv_room) {
2123 if (!info->ldisc_stop_rx) {
2124 /* mxser_throttle(tty); */
2125 mxser_stoprx(tty);
2126 }
2127 break;
2128 }
2129
2130 }
2131
2132 /* following add by Victor Yu. 09-02-2002 */
2133 if (info->IsMoxaMustChipFlag)
2134 break;
2135 /* above add by Victor Yu. 09-02-2002 */
2136
2137 /* mask by Victor Yu. 09-02-2002
2138 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2139 */
2140 /* following add by Victor Yu. 09-02-2002 */
2141 *status = inb(info->base + UART_LSR);
2142 /* above add by Victor Yu. 09-02-2002 */
2143 } while (*status & UART_LSR_DR);
2144
2145 end_intr: /* add by Victor Yu. 09-02-2002 */
2146 mxvar_log.rxcnt[info->port] += cnt;
2147 info->mon_data.rxcnt += cnt;
2148 info->mon_data.up_rxcnt += cnt;
2149 spin_unlock_irqrestore(&info->slock, flags);
2150
2151 tty_flip_buffer_push(tty);
2152 }
2153
2154 static void mxser_transmit_chars(struct mxser_struct *info)
2155 {
2156 int count, cnt;
2157 unsigned long flags;
2158
2159 spin_lock_irqsave(&info->slock, flags);
2160
2161 if (info->x_char) {
2162 outb(info->x_char, info->base + UART_TX);
2163 info->x_char = 0;
2164 mxvar_log.txcnt[info->port]++;
2165 info->mon_data.txcnt++;
2166 info->mon_data.up_txcnt++;
2167
2168 /* added by casper 1/11/2000 */
2169 info->icount.tx++;
2170 /* */
2171 spin_unlock_irqrestore(&info->slock, flags);
2172 return;
2173 }
2174
2175 if (info->xmit_buf == 0) {
2176 spin_unlock_irqrestore(&info->slock, flags);
2177 return;
2178 }
2179
2180 if ((info->xmit_cnt <= 0) || info->tty->stopped ||
2181 (info->tty->hw_stopped &&
2182 (info->type != PORT_16550A) &&
2183 (!info->IsMoxaMustChipFlag))) {
2184 info->IER &= ~UART_IER_THRI;
2185 outb(info->IER, info->base + UART_IER);
2186 spin_unlock_irqrestore(&info->slock, flags);
2187 return;
2188 }
2189
2190 cnt = info->xmit_cnt;
2191 count = info->xmit_fifo_size;
2192 do {
2193 outb(info->xmit_buf[info->xmit_tail++],
2194 info->base + UART_TX);
2195 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2196 if (--info->xmit_cnt <= 0)
2197 break;
2198 } while (--count > 0);
2199 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2200
2201 /* added by James 03-12-2004. */
2202 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2203 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
2204 /* (above) added by James. */
2205
2206 /* added by casper 1/11/2000 */
2207 info->icount.tx += (cnt - info->xmit_cnt);
2208 /* */
2209
2210 if (info->xmit_cnt < WAKEUP_CHARS) {
2211 set_bit(MXSER_EVENT_TXLOW, &info->event);
2212 schedule_work(&info->tqueue);
2213 }
2214 if (info->xmit_cnt <= 0) {
2215 info->IER &= ~UART_IER_THRI;
2216 outb(info->IER, info->base + UART_IER);
2217 }
2218 spin_unlock_irqrestore(&info->slock, flags);
2219 }
2220
2221 static void mxser_check_modem_status(struct mxser_struct *info, int status)
2222 {
2223 /* update input line counters */
2224 if (status & UART_MSR_TERI)
2225 info->icount.rng++;
2226 if (status & UART_MSR_DDSR)
2227 info->icount.dsr++;
2228 if (status & UART_MSR_DDCD)
2229 info->icount.dcd++;
2230 if (status & UART_MSR_DCTS)
2231 info->icount.cts++;
2232 info->mon_data.modem_status = status;
2233 wake_up_interruptible(&info->delta_msr_wait);
2234
2235 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2236 if (status & UART_MSR_DCD)
2237 wake_up_interruptible(&info->open_wait);
2238 schedule_work(&info->tqueue);
2239 }
2240
2241 if (info->flags & ASYNC_CTS_FLOW) {
2242 if (info->tty->hw_stopped) {
2243 if (status & UART_MSR_CTS) {
2244 info->tty->hw_stopped = 0;
2245
2246 if ((info->type != PORT_16550A) &&
2247 (!info->IsMoxaMustChipFlag)) {
2248 info->IER |= UART_IER_THRI;
2249 outb(info->IER, info->base + UART_IER);
2250 }
2251 set_bit(MXSER_EVENT_TXLOW, &info->event);
2252 schedule_work(&info->tqueue); }
2253 } else {
2254 if (!(status & UART_MSR_CTS)) {
2255 info->tty->hw_stopped = 1;
2256 if ((info->type != PORT_16550A) &&
2257 (!info->IsMoxaMustChipFlag)) {
2258 info->IER &= ~UART_IER_THRI;
2259 outb(info->IER, info->base + UART_IER);
2260 }
2261 }
2262 }
2263 }
2264 }
2265
2266 static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2267 {
2268 DECLARE_WAITQUEUE(wait, current);
2269 int retval;
2270 int do_clocal = 0;
2271 unsigned long flags;
2272
2273 /*
2274 * If non-blocking mode is set, or the port is not enabled,
2275 * then make the check up front and then exit.
2276 */
2277 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2278 info->flags |= ASYNC_NORMAL_ACTIVE;
2279 return 0;
2280 }
2281
2282 if (tty->termios->c_cflag & CLOCAL)
2283 do_clocal = 1;
2284
2285 /*
2286 * Block waiting for the carrier detect and the line to become
2287 * free (i.e., not in use by the callout). While we are in
2288 * this loop, info->count is dropped by one, so that
2289 * mxser_close() knows when to free things. We restore it upon
2290 * exit, either normal or abnormal.
2291 */
2292 retval = 0;
2293 add_wait_queue(&info->open_wait, &wait);
2294
2295 spin_lock_irqsave(&info->slock, flags);
2296 if (!tty_hung_up_p(filp))
2297 info->count--;
2298 spin_unlock_irqrestore(&info->slock, flags);
2299 info->blocked_open++;
2300 while (1) {
2301 spin_lock_irqsave(&info->slock, flags);
2302 outb(inb(info->base + UART_MCR) |
2303 UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
2304 spin_unlock_irqrestore(&info->slock, flags);
2305 set_current_state(TASK_INTERRUPTIBLE);
2306 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2307 if (info->flags & ASYNC_HUP_NOTIFY)
2308 retval = -EAGAIN;
2309 else
2310 retval = -ERESTARTSYS;
2311 break;
2312 }
2313 if (!(info->flags & ASYNC_CLOSING) &&
2314 (do_clocal ||
2315 (inb(info->base + UART_MSR) & UART_MSR_DCD)))
2316 break;
2317 if (signal_pending(current)) {
2318 retval = -ERESTARTSYS;
2319 break;
2320 }
2321 schedule();
2322 }
2323 set_current_state(TASK_RUNNING);
2324 remove_wait_queue(&info->open_wait, &wait);
2325 if (!tty_hung_up_p(filp))
2326 info->count++;
2327 info->blocked_open--;
2328 if (retval)
2329 return retval;
2330 info->flags |= ASYNC_NORMAL_ACTIVE;
2331 return 0;
2332 }
2333
2334 static int mxser_startup(struct mxser_struct *info)
2335 {
2336 unsigned long page;
2337 unsigned long flags;
2338
2339 page = __get_free_page(GFP_KERNEL);
2340 if (!page)
2341 return -ENOMEM;
2342
2343 spin_lock_irqsave(&info->slock, flags);
2344
2345 if (info->flags & ASYNC_INITIALIZED) {
2346 free_page(page);
2347 spin_unlock_irqrestore(&info->slock, flags);
2348 return 0;
2349 }
2350
2351 if (!info->base || !info->type) {
2352 if (info->tty)
2353 set_bit(TTY_IO_ERROR, &info->tty->flags);
2354 free_page(page);
2355 spin_unlock_irqrestore(&info->slock, flags);
2356 return 0;
2357 }
2358 if (info->xmit_buf)
2359 free_page(page);
2360 else
2361 info->xmit_buf = (unsigned char *) page;
2362
2363 /*
2364 * Clear the FIFO buffers and disable them
2365 * (they will be reenabled in mxser_change_speed())
2366 */
2367 if (info->IsMoxaMustChipFlag)
2368 outb((UART_FCR_CLEAR_RCVR |
2369 UART_FCR_CLEAR_XMIT |
2370 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
2371 else
2372 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2373 info->base + UART_FCR);
2374
2375 /*
2376 * At this point there's no way the LSR could still be 0xFF;
2377 * if it is, then bail out, because there's likely no UART
2378 * here.
2379 */
2380 if (inb(info->base + UART_LSR) == 0xff) {
2381 spin_unlock_irqrestore(&info->slock, flags);
2382 if (capable(CAP_SYS_ADMIN)) {
2383 if (info->tty)
2384 set_bit(TTY_IO_ERROR, &info->tty->flags);
2385 return 0;
2386 } else
2387 return -ENODEV;
2388 }
2389
2390 /*
2391 * Clear the interrupt registers.
2392 */
2393 (void) inb(info->base + UART_LSR);
2394 (void) inb(info->base + UART_RX);
2395 (void) inb(info->base + UART_IIR);
2396 (void) inb(info->base + UART_MSR);
2397
2398 /*
2399 * Now, initialize the UART
2400 */
2401 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2402 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2403 outb(info->MCR, info->base + UART_MCR);
2404
2405 /*
2406 * Finally, enable interrupts
2407 */
2408 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
2409 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
2410
2411 /* following add by Victor Yu. 08-30-2002 */
2412 if (info->IsMoxaMustChipFlag)
2413 info->IER |= MOXA_MUST_IER_EGDAI;
2414 /* above add by Victor Yu. 08-30-2002 */
2415 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2416
2417 /*
2418 * And clear the interrupt registers again for luck.
2419 */
2420 (void) inb(info->base + UART_LSR);
2421 (void) inb(info->base + UART_RX);
2422 (void) inb(info->base + UART_IIR);
2423 (void) inb(info->base + UART_MSR);
2424
2425 if (info->tty)
2426 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2427 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2428
2429 /*
2430 * and set the speed of the serial port
2431 */
2432 spin_unlock_irqrestore(&info->slock, flags);
2433 mxser_change_speed(info, NULL);
2434
2435 info->flags |= ASYNC_INITIALIZED;
2436 return 0;
2437 }
2438
2439 /*
2440 * This routine will shutdown a serial port; interrupts maybe disabled, and
2441 * DTR is dropped if the hangup on close termio flag is on.
2442 */
2443 static void mxser_shutdown(struct mxser_struct *info)
2444 {
2445 unsigned long flags;
2446
2447 if (!(info->flags & ASYNC_INITIALIZED))
2448 return;
2449
2450 spin_lock_irqsave(&info->slock, flags);
2451
2452 /*
2453 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2454 * here so the queue might never be waken up
2455 */
2456 wake_up_interruptible(&info->delta_msr_wait);
2457
2458 /*
2459 * Free the IRQ, if necessary
2460 */
2461 if (info->xmit_buf) {
2462 free_page((unsigned long) info->xmit_buf);
2463 info->xmit_buf = NULL;
2464 }
2465
2466 info->IER = 0;
2467 outb(0x00, info->base + UART_IER);
2468
2469 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2470 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2471 outb(info->MCR, info->base + UART_MCR);
2472
2473 /* clear Rx/Tx FIFO's */
2474 /* following add by Victor Yu. 08-30-2002 */
2475 if (info->IsMoxaMustChipFlag)
2476 outb((UART_FCR_CLEAR_RCVR |
2477 UART_FCR_CLEAR_XMIT |
2478 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
2479 else
2480 /* above add by Victor Yu. 08-30-2002 */
2481 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2482 info->base + UART_FCR);
2483
2484 /* read data port to reset things */
2485 (void) inb(info->base + UART_RX);
2486
2487 if (info->tty)
2488 set_bit(TTY_IO_ERROR, &info->tty->flags);
2489
2490 info->flags &= ~ASYNC_INITIALIZED;
2491
2492 /* following add by Victor Yu. 09-23-2002 */
2493 if (info->IsMoxaMustChipFlag)
2494 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
2495 /* above add by Victor Yu. 09-23-2002 */
2496
2497 spin_unlock_irqrestore(&info->slock, flags);
2498 }
2499
2500 /*
2501 * This routine is called to set the UART divisor registers to match
2502 * the specified baud rate for a serial port.
2503 */
2504 static int mxser_change_speed(struct mxser_struct *info, struct ktermios *old_termios)
2505 {
2506 unsigned cflag, cval, fcr;
2507 int ret = 0;
2508 unsigned char status;
2509 long baud;
2510 unsigned long flags;
2511
2512 if (!info->tty || !info->tty->termios)
2513 return ret;
2514 cflag = info->tty->termios->c_cflag;
2515 if (!(info->base))
2516 return ret;
2517
2518 #ifndef B921600
2519 #define B921600 (B460800 +1)
2520 #endif
2521 if (mxser_set_baud_method[info->port] == 0) {
2522 baud = tty_get_baud_rate(info->tty);
2523 mxser_set_baud(info, baud);
2524 }
2525
2526 /* byte size and parity */
2527 switch (cflag & CSIZE) {
2528 case CS5:
2529 cval = 0x00;
2530 break;
2531 case CS6:
2532 cval = 0x01;
2533 break;
2534 case CS7:
2535 cval = 0x02;
2536 break;
2537 case CS8:
2538 cval = 0x03;
2539 break;
2540 default:
2541 cval = 0x00;
2542 break; /* too keep GCC shut... */
2543 }
2544 if (cflag & CSTOPB)
2545 cval |= 0x04;
2546 if (cflag & PARENB)
2547 cval |= UART_LCR_PARITY;
2548 if (!(cflag & PARODD))
2549 cval |= UART_LCR_EPAR;
2550 if (cflag & CMSPAR)
2551 cval |= UART_LCR_SPAR;
2552
2553 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2554 if (info->IsMoxaMustChipFlag) {
2555 fcr = UART_FCR_ENABLE_FIFO;
2556 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2557 SET_MOXA_MUST_FIFO_VALUE(info);
2558 } else
2559 fcr = 0;
2560 } else {
2561 fcr = UART_FCR_ENABLE_FIFO;
2562 /* following add by Victor Yu. 08-30-2002 */
2563 if (info->IsMoxaMustChipFlag) {
2564 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2565 SET_MOXA_MUST_FIFO_VALUE(info);
2566 } else {
2567 /* above add by Victor Yu. 08-30-2002 */
2568 switch (info->rx_trigger) {
2569 case 1:
2570 fcr |= UART_FCR_TRIGGER_1;
2571 break;
2572 case 4:
2573 fcr |= UART_FCR_TRIGGER_4;
2574 break;
2575 case 8:
2576 fcr |= UART_FCR_TRIGGER_8;
2577 break;
2578 default:
2579 fcr |= UART_FCR_TRIGGER_14;
2580 break;
2581 }
2582 }
2583 }
2584
2585 /* CTS flow control flag and modem status interrupts */
2586 info->IER &= ~UART_IER_MSI;
2587 info->MCR &= ~UART_MCR_AFE;
2588 if (cflag & CRTSCTS) {
2589 info->flags |= ASYNC_CTS_FLOW;
2590 info->IER |= UART_IER_MSI;
2591 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2592 info->MCR |= UART_MCR_AFE;
2593 } else {
2594 status = inb(info->base + UART_MSR);
2595 if (info->tty->hw_stopped) {
2596 if (status & UART_MSR_CTS) {
2597 info->tty->hw_stopped = 0;
2598 if ((info->type != PORT_16550A) &&
2599 (!info->IsMoxaMustChipFlag)) {
2600 info->IER |= UART_IER_THRI;
2601 outb(info->IER, info->base + UART_IER);
2602 }
2603 set_bit(MXSER_EVENT_TXLOW, &info->event);
2604 schedule_work(&info->tqueue); }
2605 } else {
2606 if (!(status & UART_MSR_CTS)) {
2607 info->tty->hw_stopped = 1;
2608 if ((info->type != PORT_16550A) &&
2609 (!info->IsMoxaMustChipFlag)) {
2610 info->IER &= ~UART_IER_THRI;
2611 outb(info->IER, info->base + UART_IER);
2612 }
2613 }
2614 }
2615 }
2616 } else {
2617 info->flags &= ~ASYNC_CTS_FLOW;
2618 }
2619 outb(info->MCR, info->base + UART_MCR);
2620 if (cflag & CLOCAL) {
2621 info->flags &= ~ASYNC_CHECK_CD;
2622 } else {
2623 info->flags |= ASYNC_CHECK_CD;
2624 info->IER |= UART_IER_MSI;
2625 }
2626 outb(info->IER, info->base + UART_IER);
2627
2628 /*
2629 * Set up parity check flag
2630 */
2631 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2632 if (I_INPCK(info->tty))
2633 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2634 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2635 info->read_status_mask |= UART_LSR_BI;
2636
2637 info->ignore_status_mask = 0;
2638
2639 if (I_IGNBRK(info->tty)) {
2640 info->ignore_status_mask |= UART_LSR_BI;
2641 info->read_status_mask |= UART_LSR_BI;
2642 /*
2643 * If we're ignore parity and break indicators, ignore
2644 * overruns too. (For real raw support).
2645 */
2646 if (I_IGNPAR(info->tty)) {
2647 info->ignore_status_mask |=
2648 UART_LSR_OE |
2649 UART_LSR_PE |
2650 UART_LSR_FE;
2651 info->read_status_mask |=
2652 UART_LSR_OE |
2653 UART_LSR_PE |
2654 UART_LSR_FE;
2655 }
2656 }
2657 /* following add by Victor Yu. 09-02-2002 */
2658 if (info->IsMoxaMustChipFlag) {
2659 spin_lock_irqsave(&info->slock, flags);
2660 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2661 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2662 if (I_IXON(info->tty)) {
2663 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2664 } else {
2665 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2666 }
2667 if (I_IXOFF(info->tty)) {
2668 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2669 } else {
2670 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2671 }
2672 /*
2673 if ( I_IXANY(info->tty) ) {
2674 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2675 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2676 } else {
2677 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2678 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2679 }
2680 */
2681 spin_unlock_irqrestore(&info->slock, flags);
2682 }
2683 /* above add by Victor Yu. 09-02-2002 */
2684
2685
2686 outb(fcr, info->base + UART_FCR); /* set fcr */
2687 outb(cval, info->base + UART_LCR);
2688
2689 return ret;
2690 }
2691
2692
2693 static int mxser_set_baud(struct mxser_struct *info, long newspd)
2694 {
2695 int quot = 0;
2696 unsigned char cval;
2697 int ret = 0;
2698 unsigned long flags;
2699
2700 if (!info->tty || !info->tty->termios)
2701 return ret;
2702
2703 if (!(info->base))
2704 return ret;
2705
2706 if (newspd > info->MaxCanSetBaudRate)
2707 return 0;
2708
2709 info->realbaud = newspd;
2710 if (newspd == 134) {
2711 quot = (2 * info->baud_base / 269);
2712 } else if (newspd) {
2713 quot = info->baud_base / newspd;
2714 if (quot == 0)
2715 quot = 1;
2716 } else {
2717 quot = 0;
2718 }
2719
2720 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2721 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2722
2723 if (quot) {
2724 spin_lock_irqsave(&info->slock, flags);
2725 info->MCR |= UART_MCR_DTR;
2726 outb(info->MCR, info->base + UART_MCR);
2727 spin_unlock_irqrestore(&info->slock, flags);
2728 } else {
2729 spin_lock_irqsave(&info->slock, flags);
2730 info->MCR &= ~UART_MCR_DTR;
2731 outb(info->MCR, info->base + UART_MCR);
2732 spin_unlock_irqrestore(&info->slock, flags);
2733 return ret;
2734 }
2735
2736 cval = inb(info->base + UART_LCR);
2737
2738 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2739
2740 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2741 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2742 outb(cval, info->base + UART_LCR); /* reset DLAB */
2743
2744
2745 return ret;
2746 }
2747
2748 /*
2749 * ------------------------------------------------------------
2750 * friends of mxser_ioctl()
2751 * ------------------------------------------------------------
2752 */
2753 static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2754 {
2755 struct serial_struct tmp;
2756
2757 if (!retinfo)
2758 return -EFAULT;
2759 memset(&tmp, 0, sizeof(tmp));
2760 tmp.type = info->type;
2761 tmp.line = info->port;
2762 tmp.port = info->base;
2763 tmp.irq = info->irq;
2764 tmp.flags = info->flags;
2765 tmp.baud_base = info->baud_base;
2766 tmp.close_delay = info->close_delay;
2767 tmp.closing_wait = info->closing_wait;
2768 tmp.custom_divisor = info->custom_divisor;
2769 tmp.hub6 = 0;
2770 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2771 return -EFAULT;
2772 return 0;
2773 }
2774
2775 static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2776 {
2777 struct serial_struct new_serial;
2778 unsigned int flags;
2779 int retval = 0;
2780
2781 if (!new_info || !info->base)
2782 return -EFAULT;
2783 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2784 return -EFAULT;
2785
2786 if ((new_serial.irq != info->irq) ||
2787 (new_serial.port != info->base) ||
2788 (new_serial.custom_divisor != info->custom_divisor) ||
2789 (new_serial.baud_base != info->baud_base))
2790 return -EPERM;
2791
2792 flags = info->flags & ASYNC_SPD_MASK;
2793
2794 if (!capable(CAP_SYS_ADMIN)) {
2795 if ((new_serial.baud_base != info->baud_base) ||
2796 (new_serial.close_delay != info->close_delay) ||
2797 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2798 return -EPERM;
2799 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
2800 (new_serial.flags & ASYNC_USR_MASK));
2801 } else {
2802 /*
2803 * OK, past this point, all the error checking has been done.
2804 * At this point, we start making changes.....
2805 */
2806 info->flags = ((info->flags & ~ASYNC_FLAGS) |
2807 (new_serial.flags & ASYNC_FLAGS));
2808 info->close_delay = new_serial.close_delay * HZ / 100;
2809 info->closing_wait = new_serial.closing_wait * HZ / 100;
2810 info->tty->low_latency =
2811 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2812 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
2813 }
2814
2815 /* added by casper, 3/17/2000, for mouse */
2816 info->type = new_serial.type;
2817
2818 process_txrx_fifo(info);
2819
2820 if (info->flags & ASYNC_INITIALIZED) {
2821 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2822 mxser_change_speed(info, NULL);
2823 }
2824 } else {
2825 retval = mxser_startup(info);
2826 }
2827 return retval;
2828 }
2829
2830 /*
2831 * mxser_get_lsr_info - get line status register info
2832 *
2833 * Purpose: Let user call ioctl() to get info when the UART physically
2834 * is emptied. On bus types like RS485, the transmitter must
2835 * release the bus after transmitting. This must be done when
2836 * the transmit shift register is empty, not be done when the
2837 * transmit holding register is empty. This functionality
2838 * allows an RS485 driver to be written in user space.
2839 */
2840 static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2841 {
2842 unsigned char status;
2843 unsigned int result;
2844 unsigned long flags;
2845
2846 spin_lock_irqsave(&info->slock, flags);
2847 status = inb(info->base + UART_LSR);
2848 spin_unlock_irqrestore(&info->slock, flags);
2849 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2850 return put_user(result, value);
2851 }
2852
2853 /*
2854 * This routine sends a break character out the serial port.
2855 */
2856 static void mxser_send_break(struct mxser_struct *info, int duration)
2857 {
2858 unsigned long flags;
2859
2860 if (!info->base)
2861 return;
2862 set_current_state(TASK_INTERRUPTIBLE);
2863 spin_lock_irqsave(&info->slock, flags);
2864 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
2865 info->base + UART_LCR);
2866 spin_unlock_irqrestore(&info->slock, flags);
2867 schedule_timeout(duration);
2868 spin_lock_irqsave(&info->slock, flags);
2869 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
2870 info->base + UART_LCR);
2871 spin_unlock_irqrestore(&info->slock, flags);
2872 }
2873
2874 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2875 {
2876 struct mxser_struct *info = tty->driver_data;
2877 unsigned char control, status;
2878 unsigned long flags;
2879
2880
2881 if (tty->index == MXSER_PORTS)
2882 return -ENOIOCTLCMD;
2883 if (tty->flags & (1 << TTY_IO_ERROR))
2884 return -EIO;
2885
2886 control = info->MCR;
2887
2888 spin_lock_irqsave(&info->slock, flags);
2889 status = inb(info->base + UART_MSR);
2890 if (status & UART_MSR_ANY_DELTA)
2891 mxser_check_modem_status(info, status);
2892 spin_unlock_irqrestore(&info->slock, flags);
2893 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
2894 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
2895 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
2896 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
2897 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
2898 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
2899 }
2900
2901 static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
2902 {
2903 struct mxser_struct *info = tty->driver_data;
2904 unsigned long flags;
2905
2906
2907 if (tty->index == MXSER_PORTS)
2908 return -ENOIOCTLCMD;
2909 if (tty->flags & (1 << TTY_IO_ERROR))
2910 return -EIO;
2911
2912 spin_lock_irqsave(&info->slock, flags);
2913
2914 if (set & TIOCM_RTS)
2915 info->MCR |= UART_MCR_RTS;
2916 if (set & TIOCM_DTR)
2917 info->MCR |= UART_MCR_DTR;
2918
2919 if (clear & TIOCM_RTS)
2920 info->MCR &= ~UART_MCR_RTS;
2921 if (clear & TIOCM_DTR)
2922 info->MCR &= ~UART_MCR_DTR;
2923
2924 outb(info->MCR, info->base + UART_MCR);
2925 spin_unlock_irqrestore(&info->slock, flags);
2926 return 0;
2927 }
2928
2929
2930 static int mxser_read_register(int, unsigned short *);
2931 static int mxser_program_mode(int);
2932 static void mxser_normal_mode(int);
2933
2934 static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
2935 {
2936 int id, i, bits;
2937 unsigned short regs[16], irq;
2938 unsigned char scratch, scratch2;
2939
2940 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
2941
2942 id = mxser_read_register(cap, regs);
2943 if (id == C168_ASIC_ID) {
2944 hwconf->board_type = MXSER_BOARD_C168_ISA;
2945 hwconf->ports = 8;
2946 } else if (id == C104_ASIC_ID) {
2947 hwconf->board_type = MXSER_BOARD_C104_ISA;
2948 hwconf->ports = 4;
2949 } else if (id == C102_ASIC_ID) {
2950 hwconf->board_type = MXSER_BOARD_C102_ISA;
2951 hwconf->ports = 2;
2952 } else if (id == CI132_ASIC_ID) {
2953 hwconf->board_type = MXSER_BOARD_CI132;
2954 hwconf->ports = 2;
2955 } else if (id == CI134_ASIC_ID) {
2956 hwconf->board_type = MXSER_BOARD_CI134;
2957 hwconf->ports = 4;
2958 } else if (id == CI104J_ASIC_ID) {
2959 hwconf->board_type = MXSER_BOARD_CI104J;
2960 hwconf->ports = 4;
2961 } else
2962 return 0;
2963
2964 irq = 0;
2965 if (hwconf->ports == 2) {
2966 irq = regs[9] & 0xF000;
2967 irq = irq | (irq >> 4);
2968 if (irq != (regs[9] & 0xFF00))
2969 return MXSER_ERR_IRQ_CONFLIT;
2970 } else if (hwconf->ports == 4) {
2971 irq = regs[9] & 0xF000;
2972 irq = irq | (irq >> 4);
2973 irq = irq | (irq >> 8);
2974 if (irq != regs[9])
2975 return MXSER_ERR_IRQ_CONFLIT;
2976 } else if (hwconf->ports == 8) {
2977 irq = regs[9] & 0xF000;
2978 irq = irq | (irq >> 4);
2979 irq = irq | (irq >> 8);
2980 if ((irq != regs[9]) || (irq != regs[10]))
2981 return MXSER_ERR_IRQ_CONFLIT;
2982 }
2983
2984 if (!irq)
2985 return MXSER_ERR_IRQ;
2986 hwconf->irq = ((int)(irq & 0xF000) >> 12);
2987 for (i = 0; i < 8; i++)
2988 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
2989 if ((regs[12] & 0x80) == 0)
2990 return MXSER_ERR_VECTOR;
2991 hwconf->vector = (int)regs[11]; /* interrupt vector */
2992 if (id == 1)
2993 hwconf->vector_mask = 0x00FF;
2994 else
2995 hwconf->vector_mask = 0x000F;
2996 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2997 if (regs[12] & bits) {
2998 hwconf->baud_base[i] = 921600;
2999 hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
3000 } else {
3001 hwconf->baud_base[i] = 115200;
3002 hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
3003 }
3004 }
3005 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3006 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3007 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3008 outb(scratch2, cap + UART_LCR);
3009 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3010 scratch = inb(cap + UART_IIR);
3011
3012 if (scratch & 0xC0)
3013 hwconf->uart_type = PORT_16550A;
3014 else
3015 hwconf->uart_type = PORT_16450;
3016 if (id == 1)
3017 hwconf->ports = 8;
3018 else
3019 hwconf->ports = 4;
3020 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3021 request_region(hwconf->vector, 1, "mxser(vector)");
3022 return hwconf->ports;
3023 }
3024
3025 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3026 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3027 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3028 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3029 #define EN_CCMD 0x000 /* Chip's command register */
3030 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3031 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3032 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3033 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3034 #define EN0_DCFG 0x00E /* Data configuration reg WR */
3035 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3036 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3037 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3038 static int mxser_read_register(int port, unsigned short *regs)
3039 {
3040 int i, k, value, id;
3041 unsigned int j;
3042
3043 id = mxser_program_mode(port);
3044 if (id < 0)
3045 return id;
3046 for (i = 0; i < 14; i++) {
3047 k = (i & 0x3F) | 0x180;
3048 for (j = 0x100; j > 0; j >>= 1) {
3049 outb(CHIP_CS, port);
3050 if (k & j) {
3051 outb(CHIP_CS | CHIP_DO, port);
3052 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3053 } else {
3054 outb(CHIP_CS, port);
3055 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3056 }
3057 }
3058 (void)inb(port);
3059 value = 0;
3060 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3061 outb(CHIP_CS, port);
3062 outb(CHIP_CS | CHIP_SK, port);
3063 if (inb(port) & CHIP_DI)
3064 value |= j;
3065 }
3066 regs[i] = value;
3067 outb(0, port);
3068 }
3069 mxser_normal_mode(port);
3070 return id;
3071 }
3072
3073 static int mxser_program_mode(int port)
3074 {
3075 int id, i, j, n;
3076 /* unsigned long flags; */
3077
3078 spin_lock(&gm_lock);
3079 outb(0, port);
3080 outb(0, port);
3081 outb(0, port);
3082 (void)inb(port);
3083 (void)inb(port);
3084 outb(0, port);
3085 (void)inb(port);
3086 /* restore_flags(flags); */
3087 spin_unlock(&gm_lock);
3088
3089 id = inb(port + 1) & 0x1F;
3090 if ((id != C168_ASIC_ID) &&
3091 (id != C104_ASIC_ID) &&
3092 (id != C102_ASIC_ID) &&
3093 (id != CI132_ASIC_ID) &&
3094 (id != CI134_ASIC_ID) &&
3095 (id != CI104J_ASIC_ID))
3096 return -1;
3097 for (i = 0, j = 0; i < 4; i++) {
3098 n = inb(port + 2);
3099 if (n == 'M') {
3100 j = 1;
3101 } else if ((j == 1) && (n == 1)) {
3102 j = 2;
3103 break;
3104 } else
3105 j = 0;
3106 }
3107 if (j != 2)
3108 id = -2;
3109 return id;
3110 }
3111
3112 static void mxser_normal_mode(int port)
3113 {
3114 int i, n;
3115
3116 outb(0xA5, port + 1);
3117 outb(0x80, port + 3);
3118 outb(12, port + 0); /* 9600 bps */
3119 outb(0, port + 1);
3120 outb(0x03, port + 3); /* 8 data bits */
3121 outb(0x13, port + 4); /* loop back mode */
3122 for (i = 0; i < 16; i++) {
3123 n = inb(port + 5);
3124 if ((n & 0x61) == 0x60)
3125 break;
3126 if ((n & 1) == 1)
3127 (void)inb(port);
3128 }
3129 outb(0x00, port + 4);
3130 }
3131
3132 module_init(mxser_module_init);
3133 module_exit(mxser_module_exit);
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