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Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git
[mirror_ubuntu-artful-kernel.git] / drivers / char / mxser.c
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
39 #include <linux/config.h>
40 #include <linux/module.h>
41 #include <linux/autoconf.h>
42 #include <linux/errno.h>
43 #include <linux/signal.h>
44 #include <linux/sched.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/tty.h>
48 #include <linux/tty_flip.h>
49 #include <linux/serial.h>
50 #include <linux/serial_reg.h>
51 #include <linux/major.h>
52 #include <linux/string.h>
53 #include <linux/fcntl.h>
54 #include <linux/ptrace.h>
55 #include <linux/gfp.h>
56 #include <linux/ioport.h>
57 #include <linux/mm.h>
58 #include <linux/smp_lock.h>
59 #include <linux/delay.h>
60 #include <linux/pci.h>
61
62 #include <asm/system.h>
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/bitops.h>
66 #include <asm/uaccess.h>
67
68 #include "mxser.h"
69
70 #define MXSER_VERSION "1.8"
71 #define MXSERMAJOR 174
72 #define MXSERCUMAJOR 175
73
74 #define MXSER_EVENT_TXLOW 1
75 #define MXSER_EVENT_HANGUP 2
76
77 #define MXSER_BOARDS 4 /* Max. boards */
78 #define MXSER_PORTS 32 /* Max. ports */
79 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
80 #define MXSER_ISR_PASS_LIMIT 256
81
82 #define MXSER_ERR_IOADDR -1
83 #define MXSER_ERR_IRQ -2
84 #define MXSER_ERR_IRQ_CONFLIT -3
85 #define MXSER_ERR_VECTOR -4
86
87 #define SERIAL_TYPE_NORMAL 1
88 #define SERIAL_TYPE_CALLOUT 2
89
90 #define WAKEUP_CHARS 256
91
92 #define UART_MCR_AFE 0x20
93 #define UART_LSR_SPECIAL 0x1E
94
95 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|IXON|IXOFF))
96
97 #define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? SA_SHIRQ : SA_INTERRUPT)
98
99 #define C168_ASIC_ID 1
100 #define C104_ASIC_ID 2
101 #define C102_ASIC_ID 0xB
102 #define CI132_ASIC_ID 4
103 #define CI134_ASIC_ID 3
104 #define CI104J_ASIC_ID 5
105
106 enum {
107 MXSER_BOARD_C168_ISA = 1,
108 MXSER_BOARD_C104_ISA,
109 MXSER_BOARD_CI104J,
110 MXSER_BOARD_C168_PCI,
111 MXSER_BOARD_C104_PCI,
112 MXSER_BOARD_C102_ISA,
113 MXSER_BOARD_CI132,
114 MXSER_BOARD_CI134,
115 MXSER_BOARD_CP132,
116 MXSER_BOARD_CP114,
117 MXSER_BOARD_CT114,
118 MXSER_BOARD_CP102,
119 MXSER_BOARD_CP104U,
120 MXSER_BOARD_CP168U,
121 MXSER_BOARD_CP132U,
122 MXSER_BOARD_CP134U,
123 MXSER_BOARD_CP104JU,
124 MXSER_BOARD_RC7000,
125 MXSER_BOARD_CP118U,
126 MXSER_BOARD_CP102UL,
127 MXSER_BOARD_CP102U,
128 };
129
130 static char *mxser_brdname[] = {
131 "C168 series",
132 "C104 series",
133 "CI-104J series",
134 "C168H/PCI series",
135 "C104H/PCI series",
136 "C102 series",
137 "CI-132 series",
138 "CI-134 series",
139 "CP-132 series",
140 "CP-114 series",
141 "CT-114 series",
142 "CP-102 series",
143 "CP-104U series",
144 "CP-168U series",
145 "CP-132U series",
146 "CP-134U series",
147 "CP-104JU series",
148 "Moxa UC7000 Serial",
149 "CP-118U series",
150 "CP-102UL series",
151 "CP-102U series",
152 };
153
154 static int mxser_numports[] = {
155 8, // C168-ISA
156 4, // C104-ISA
157 4, // CI104J
158 8, // C168-PCI
159 4, // C104-PCI
160 2, // C102-ISA
161 2, // CI132
162 4, // CI134
163 2, // CP132
164 4, // CP114
165 4, // CT114
166 2, // CP102
167 4, // CP104U
168 8, // CP168U
169 2, // CP132U
170 4, // CP134U
171 4, // CP104JU
172 8, // RC7000
173 8, // CP118U
174 2, // CP102UL
175 2, // CP102U
176 };
177
178 #define UART_TYPE_NUM 2
179
180 static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
181 MOXA_MUST_MU150_HWID,
182 MOXA_MUST_MU860_HWID
183 };
184
185 // This is only for PCI
186 #define UART_INFO_NUM 3
187 struct mxpciuart_info {
188 int type;
189 int tx_fifo;
190 int rx_fifo;
191 int xmit_fifo_size;
192 int rx_high_water;
193 int rx_trigger;
194 int rx_low_water;
195 long max_baud;
196 };
197
198 static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
199 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
200 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
201 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
202 };
203
204
205 #ifdef CONFIG_PCI
206
207 static struct pci_device_id mxser_pcibrds[] = {
208 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
216 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
217 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
218 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
219 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
220 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
221 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
222 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
223 {0}
224 };
225
226 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
227
228
229 #endif
230
231 typedef struct _moxa_pci_info {
232 unsigned short busNum;
233 unsigned short devNum;
234 struct pci_dev *pdev; // add by Victor Yu. 06-23-2003
235 } moxa_pci_info;
236
237 static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
238 static int ttymajor = MXSERMAJOR;
239 static int calloutmajor = MXSERCUMAJOR;
240 static int verbose = 0;
241
242 /* Variables for insmod */
243
244 MODULE_AUTHOR("Casper Yang");
245 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
246 module_param_array(ioaddr, int, NULL, 0);
247 module_param(ttymajor, int, 0);
248 module_param(calloutmajor, int, 0);
249 module_param(verbose, bool, 0);
250 MODULE_LICENSE("GPL");
251
252 struct mxser_log {
253 int tick;
254 unsigned long rxcnt[MXSER_PORTS];
255 unsigned long txcnt[MXSER_PORTS];
256 };
257
258
259 struct mxser_mon {
260 unsigned long rxcnt;
261 unsigned long txcnt;
262 unsigned long up_rxcnt;
263 unsigned long up_txcnt;
264 int modem_status;
265 unsigned char hold_reason;
266 };
267
268 struct mxser_mon_ext {
269 unsigned long rx_cnt[32];
270 unsigned long tx_cnt[32];
271 unsigned long up_rxcnt[32];
272 unsigned long up_txcnt[32];
273 int modem_status[32];
274
275 long baudrate[32];
276 int databits[32];
277 int stopbits[32];
278 int parity[32];
279 int flowctrl[32];
280 int fifo[32];
281 int iftype[32];
282 };
283 struct mxser_hwconf {
284 int board_type;
285 int ports;
286 int irq;
287 int vector;
288 int vector_mask;
289 int uart_type;
290 int ioaddr[MXSER_PORTS_PER_BOARD];
291 int baud_base[MXSER_PORTS_PER_BOARD];
292 moxa_pci_info pciInfo;
293 int IsMoxaMustChipFlag; // add by Victor Yu. 08-30-2002
294 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; // add by Victor Yu. 09-04-2002
295 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; // add by Victor Yu. 01-05-2004
296 };
297
298 struct mxser_struct {
299 int port;
300 int base; /* port base address */
301 int irq; /* port using irq no. */
302 int vector; /* port irq vector */
303 int vectormask; /* port vector mask */
304 int rx_high_water;
305 int rx_trigger; /* Rx fifo trigger level */
306 int rx_low_water;
307 int baud_base; /* max. speed */
308 int flags; /* defined in tty.h */
309 int type; /* UART type */
310 struct tty_struct *tty;
311 int read_status_mask;
312 int ignore_status_mask;
313 int xmit_fifo_size;
314 int custom_divisor;
315 int x_char; /* xon/xoff character */
316 int close_delay;
317 unsigned short closing_wait;
318 int IER; /* Interrupt Enable Register */
319 int MCR; /* Modem control register */
320 unsigned long event;
321 int count; /* # of fd on device */
322 int blocked_open; /* # of blocked opens */
323 long session; /* Session of opening process */
324 long pgrp; /* pgrp of opening process */
325 unsigned char *xmit_buf;
326 int xmit_head;
327 int xmit_tail;
328 int xmit_cnt;
329 struct work_struct tqueue;
330 struct termios normal_termios;
331 struct termios callout_termios;
332 wait_queue_head_t open_wait;
333 wait_queue_head_t close_wait;
334 wait_queue_head_t delta_msr_wait;
335 struct async_icount icount; /* kernel counters for the 4 input interrupts */
336 int timeout;
337 int IsMoxaMustChipFlag; // add by Victor Yu. 08-30-2002
338 int MaxCanSetBaudRate; // add by Victor Yu. 09-04-2002
339 int opmode_ioaddr; // add by Victor Yu. 01-05-2004
340 unsigned char stop_rx;
341 unsigned char ldisc_stop_rx;
342 long realbaud;
343 struct mxser_mon mon_data;
344 unsigned char err_shadow;
345 spinlock_t slock;
346 };
347
348
349 struct mxser_mstatus {
350 tcflag_t cflag;
351 int cts;
352 int dsr;
353 int ri;
354 int dcd;
355 };
356
357 static struct mxser_mstatus GMStatus[MXSER_PORTS];
358
359 static int mxserBoardCAP[MXSER_BOARDS] = {
360 0, 0, 0, 0
361 /* 0x180, 0x280, 0x200, 0x320 */
362 };
363
364 static struct tty_driver *mxvar_sdriver;
365 static struct mxser_struct mxvar_table[MXSER_PORTS];
366 static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
367 static struct termios *mxvar_termios[MXSER_PORTS + 1];
368 static struct termios *mxvar_termios_locked[MXSER_PORTS + 1];
369 static struct mxser_log mxvar_log;
370 static int mxvar_diagflag;
371 static unsigned char mxser_msr[MXSER_PORTS + 1];
372 static struct mxser_mon_ext mon_data_ext;
373 static int mxser_set_baud_method[MXSER_PORTS + 1];
374 static spinlock_t gm_lock;
375
376 /*
377 * This is used to figure out the divisor speeds and the timeouts
378 */
379
380 static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
381
382 /*
383 * static functions:
384 */
385
386 static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
387 static int mxser_init(void);
388
389 //static void mxser_poll(unsigned long);
390 static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
391 static int mxser_get_PCI_conf(int, int, int, struct mxser_hwconf *);
392 static void mxser_do_softint(void *);
393 static int mxser_open(struct tty_struct *, struct file *);
394 static void mxser_close(struct tty_struct *, struct file *);
395 static int mxser_write(struct tty_struct *, const unsigned char *, int);
396 static int mxser_write_room(struct tty_struct *);
397 static void mxser_flush_buffer(struct tty_struct *);
398 static int mxser_chars_in_buffer(struct tty_struct *);
399 static void mxser_flush_chars(struct tty_struct *);
400 static void mxser_put_char(struct tty_struct *, unsigned char);
401 static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
402 static int mxser_ioctl_special(unsigned int, void __user *);
403 static void mxser_throttle(struct tty_struct *);
404 static void mxser_unthrottle(struct tty_struct *);
405 static void mxser_set_termios(struct tty_struct *, struct termios *);
406 static void mxser_stop(struct tty_struct *);
407 static void mxser_start(struct tty_struct *);
408 static void mxser_hangup(struct tty_struct *);
409 static void mxser_rs_break(struct tty_struct *, int);
410 static irqreturn_t mxser_interrupt(int, void *, struct pt_regs *);
411 static void mxser_receive_chars(struct mxser_struct *, int *);
412 static void mxser_transmit_chars(struct mxser_struct *);
413 static void mxser_check_modem_status(struct mxser_struct *, int);
414 static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
415 static int mxser_startup(struct mxser_struct *);
416 static void mxser_shutdown(struct mxser_struct *);
417 static int mxser_change_speed(struct mxser_struct *, struct termios *old_termios);
418 static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
419 static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
420 static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
421 static void mxser_send_break(struct mxser_struct *, int);
422 static int mxser_tiocmget(struct tty_struct *, struct file *);
423 static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
424 static int mxser_set_baud(struct mxser_struct *info, long newspd);
425 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
426
427 static void mxser_startrx(struct tty_struct *tty);
428 static void mxser_stoprx(struct tty_struct *tty);
429
430
431 static int CheckIsMoxaMust(int io)
432 {
433 u8 oldmcr, hwid;
434 int i;
435
436 outb(0, io + UART_LCR);
437 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
438 oldmcr = inb(io + UART_MCR);
439 outb(0, io + UART_MCR);
440 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
441 if ((hwid = inb(io + UART_MCR)) != 0) {
442 outb(oldmcr, io + UART_MCR);
443 return (MOXA_OTHER_UART);
444 }
445
446 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
447 for (i = 0; i < UART_TYPE_NUM; i++) {
448 if (hwid == Gmoxa_uart_id[i])
449 return (int) hwid;
450 }
451 return MOXA_OTHER_UART;
452 }
453
454 // above is modified by Victor Yu. 08-15-2002
455
456 static struct tty_operations mxser_ops = {
457 .open = mxser_open,
458 .close = mxser_close,
459 .write = mxser_write,
460 .put_char = mxser_put_char,
461 .flush_chars = mxser_flush_chars,
462 .write_room = mxser_write_room,
463 .chars_in_buffer = mxser_chars_in_buffer,
464 .flush_buffer = mxser_flush_buffer,
465 .ioctl = mxser_ioctl,
466 .throttle = mxser_throttle,
467 .unthrottle = mxser_unthrottle,
468 .set_termios = mxser_set_termios,
469 .stop = mxser_stop,
470 .start = mxser_start,
471 .hangup = mxser_hangup,
472 .break_ctl = mxser_rs_break,
473 .wait_until_sent = mxser_wait_until_sent,
474 .tiocmget = mxser_tiocmget,
475 .tiocmset = mxser_tiocmset,
476 };
477
478 /*
479 * The MOXA Smartio/Industio serial driver boot-time initialization code!
480 */
481
482 static int __init mxser_module_init(void)
483 {
484 int ret;
485
486 if (verbose)
487 printk(KERN_DEBUG "Loading module mxser ...\n");
488 ret = mxser_init();
489 if (verbose)
490 printk(KERN_DEBUG "Done.\n");
491 return ret;
492 }
493
494 static void __exit mxser_module_exit(void)
495 {
496 int i, err;
497
498 if (verbose)
499 printk(KERN_DEBUG "Unloading module mxser ...\n");
500
501 err = tty_unregister_driver(mxvar_sdriver);
502 if (!err)
503 put_tty_driver(mxvar_sdriver);
504 else
505 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
506
507
508 for (i = 0; i < MXSER_BOARDS; i++) {
509 struct pci_dev *pdev;
510
511 if (mxsercfg[i].board_type == -1)
512 continue;
513 else {
514 pdev = mxsercfg[i].pciInfo.pdev;
515 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
516 if (pdev != NULL) { //PCI
517 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
518 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
519 } else {
520 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
521 release_region(mxsercfg[i].vector, 1);
522 }
523 }
524 }
525 if (verbose)
526 printk(KERN_DEBUG "Done.\n");
527
528 }
529
530 static void process_txrx_fifo(struct mxser_struct *info)
531 {
532 int i;
533
534 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
535 info->rx_trigger = 1;
536 info->rx_high_water = 1;
537 info->rx_low_water = 1;
538 info->xmit_fifo_size = 1;
539 } else {
540 for (i = 0; i < UART_INFO_NUM; i++) {
541 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
542 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
543 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
544 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
545 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
546 break;
547 }
548 }
549 }
550 }
551
552 static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
553 {
554 struct mxser_struct *info;
555 int retval;
556 int i, n;
557
558 n = board * MXSER_PORTS_PER_BOARD;
559 info = &mxvar_table[n];
560 /*if (verbose) */ {
561 printk(KERN_DEBUG " ttyM%d - ttyM%d ", n, n + hwconf->ports - 1);
562 printk(" max. baud rate = %d bps.\n", hwconf->MaxCanSetBaudRate[0]);
563 }
564
565 for (i = 0; i < hwconf->ports; i++, n++, info++) {
566 info->port = n;
567 info->base = hwconf->ioaddr[i];
568 info->irq = hwconf->irq;
569 info->vector = hwconf->vector;
570 info->vectormask = hwconf->vector_mask;
571 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; // add by Victor Yu. 01-05-2004
572 info->stop_rx = 0;
573 info->ldisc_stop_rx = 0;
574
575 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
576 //Enhance mode enabled here
577 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
578 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
579 }
580
581 info->flags = ASYNC_SHARE_IRQ;
582 info->type = hwconf->uart_type;
583 info->baud_base = hwconf->baud_base[i];
584
585 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
586
587 process_txrx_fifo(info);
588
589
590 info->custom_divisor = hwconf->baud_base[i] * 16;
591 info->close_delay = 5 * HZ / 10;
592 info->closing_wait = 30 * HZ;
593 INIT_WORK(&info->tqueue, mxser_do_softint, info);
594 info->normal_termios = mxvar_sdriver->init_termios;
595 init_waitqueue_head(&info->open_wait);
596 init_waitqueue_head(&info->close_wait);
597 init_waitqueue_head(&info->delta_msr_wait);
598 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
599 info->err_shadow = 0;
600 spin_lock_init(&info->slock);
601 }
602 /*
603 * Allocate the IRQ if necessary
604 */
605
606
607 /* before set INT ISR, disable all int */
608 for (i = 0; i < hwconf->ports; i++) {
609 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0, hwconf->ioaddr[i] + UART_IER);
610 }
611
612 n = board * MXSER_PORTS_PER_BOARD;
613 info = &mxvar_table[n];
614
615 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info), "mxser", info);
616 if (retval) {
617 printk(KERN_ERR "Board %d: %s", board, mxser_brdname[hwconf->board_type - 1]);
618 printk(" Request irq fail,IRQ (%d) may be conflit with another device.\n", info->irq);
619 return retval;
620 }
621 return 0;
622 }
623
624
625 static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
626 {
627 mxsercfg[board] = *hwconf;
628 }
629
630 #ifdef CONFIG_PCI
631 static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
632 {
633 int i, j;
634 // unsigned int val;
635 unsigned int ioaddress;
636 struct pci_dev *pdev = hwconf->pciInfo.pdev;
637
638 //io address
639 hwconf->board_type = board_type;
640 hwconf->ports = mxser_numports[board_type - 1];
641 ioaddress = pci_resource_start(pdev, 2);
642 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2), "mxser(IO)");
643
644 for (i = 0; i < hwconf->ports; i++) {
645 hwconf->ioaddr[i] = ioaddress + 8 * i;
646 }
647
648 //vector
649 ioaddress = pci_resource_start(pdev, 3);
650 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3), "mxser(vector)");
651 hwconf->vector = ioaddress;
652
653 //irq
654 hwconf->irq = hwconf->pciInfo.pdev->irq;
655
656 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
657 hwconf->uart_type = PORT_16550A;
658 hwconf->vector_mask = 0;
659
660
661 for (i = 0; i < hwconf->ports; i++) {
662 for (j = 0; j < UART_INFO_NUM; j++) {
663 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
664 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
665
666 //exception....CP-102
667 if (board_type == MXSER_BOARD_CP102)
668 hwconf->MaxCanSetBaudRate[i] = 921600;
669 break;
670 }
671 }
672 }
673
674 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
675 for (i = 0; i < hwconf->ports; i++) {
676 if (i < 4)
677 hwconf->opmode_ioaddr[i] = ioaddress + 4;
678 else
679 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
680 }
681 outb(0, ioaddress + 4); // default set to RS232 mode
682 outb(0, ioaddress + 0x0c); //default set to RS232 mode
683 }
684
685 for (i = 0; i < hwconf->ports; i++) {
686 hwconf->vector_mask |= (1 << i);
687 hwconf->baud_base[i] = 921600;
688 }
689 return (0);
690 }
691 #endif
692
693 static int mxser_init(void)
694 {
695 int i, m, retval, b, n;
696 struct pci_dev *pdev = NULL;
697 int index;
698 unsigned char busnum, devnum;
699 struct mxser_hwconf hwconf;
700
701 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
702 if (!mxvar_sdriver)
703 return -ENOMEM;
704 spin_lock_init(&gm_lock);
705
706 for (i = 0; i < MXSER_BOARDS; i++) {
707 mxsercfg[i].board_type = -1;
708 }
709
710 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", MXSER_VERSION);
711
712 /* Initialize the tty_driver structure */
713 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
714 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
715 mxvar_sdriver->name = "ttyM";
716 mxvar_sdriver->major = ttymajor;
717 mxvar_sdriver->minor_start = 0;
718 mxvar_sdriver->num = MXSER_PORTS + 1;
719 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
720 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
721 mxvar_sdriver->init_termios = tty_std_termios;
722 mxvar_sdriver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
723 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
724 tty_set_operations(mxvar_sdriver, &mxser_ops);
725 mxvar_sdriver->ttys = mxvar_tty;
726 mxvar_sdriver->termios = mxvar_termios;
727 mxvar_sdriver->termios_locked = mxvar_termios_locked;
728
729 mxvar_diagflag = 0;
730 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
731 memset(&mxvar_log, 0, sizeof(struct mxser_log));
732
733 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
734 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
735 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
736 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
737
738 m = 0;
739 /* Start finding ISA boards here */
740 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
741 int cap;
742 if (!(cap = mxserBoardCAP[b]))
743 continue;
744
745 retval = mxser_get_ISA_conf(cap, &hwconf);
746
747 if (retval != 0)
748 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n", mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
749
750 if (retval <= 0) {
751 if (retval == MXSER_ERR_IRQ)
752 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
753 else if (retval == MXSER_ERR_IRQ_CONFLIT)
754 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
755 else if (retval == MXSER_ERR_VECTOR)
756 printk(KERN_ERR "Invalid interrupt vector,board not configured\n");
757 else if (retval == MXSER_ERR_IOADDR)
758 printk(KERN_ERR "Invalid I/O address,board not configured\n");
759
760 continue;
761 }
762
763 hwconf.pciInfo.busNum = 0;
764 hwconf.pciInfo.devNum = 0;
765 hwconf.pciInfo.pdev = NULL;
766
767 mxser_getcfg(m, &hwconf);
768 //init mxsercfg first, or mxsercfg data is not correct on ISR.
769 //mxser_initbrd will hook ISR.
770 if (mxser_initbrd(m, &hwconf) < 0)
771 continue;
772
773
774 m++;
775 }
776
777 /* Start finding ISA boards from module arg */
778 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
779 int cap;
780 if (!(cap = ioaddr[b]))
781 continue;
782
783 retval = mxser_get_ISA_conf(cap, &hwconf);
784
785 if (retval != 0)
786 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n", mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
787
788 if (retval <= 0) {
789 if (retval == MXSER_ERR_IRQ)
790 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
791 else if (retval == MXSER_ERR_IRQ_CONFLIT)
792 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
793 else if (retval == MXSER_ERR_VECTOR)
794 printk(KERN_ERR "Invalid interrupt vector,board not configured\n");
795 else if (retval == MXSER_ERR_IOADDR)
796 printk(KERN_ERR "Invalid I/O address,board not configured\n");
797
798 continue;
799 }
800
801 hwconf.pciInfo.busNum = 0;
802 hwconf.pciInfo.devNum = 0;
803 hwconf.pciInfo.pdev = NULL;
804
805 mxser_getcfg(m, &hwconf);
806 //init mxsercfg first, or mxsercfg data is not correct on ISR.
807 //mxser_initbrd will hook ISR.
808 if (mxser_initbrd(m, &hwconf) < 0)
809 continue;
810
811 m++;
812 }
813
814 /* start finding PCI board here */
815 #ifdef CONFIG_PCI
816 n = ARRAY_SIZE(mxser_pcibrds) - 1;
817 index = 0;
818 b = 0;
819 while (b < n) {
820 pdev = pci_find_device(mxser_pcibrds[b].vendor, mxser_pcibrds[b].device, pdev);
821 if (pdev == NULL) {
822 b++;
823 continue;
824 }
825 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
826 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
827 hwconf.pciInfo.pdev = pdev;
828 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n", mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1], busnum, devnum >> 3);
829 index++;
830 if (m >= MXSER_BOARDS) {
831 printk(KERN_ERR "Too many Smartio/Industio family boards find (maximum %d),board not configured\n", MXSER_BOARDS);
832 } else {
833 if (pci_enable_device(pdev)) {
834 printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
835 continue;
836 }
837 retval = mxser_get_PCI_conf(busnum, devnum, (int) mxser_pcibrds[b].driver_data, &hwconf);
838 if (retval < 0) {
839 if (retval == MXSER_ERR_IRQ)
840 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
841 else if (retval == MXSER_ERR_IRQ_CONFLIT)
842 printk(KERN_ERR "Invalid interrupt number,board not configured\n");
843 else if (retval == MXSER_ERR_VECTOR)
844 printk(KERN_ERR "Invalid interrupt vector,board not configured\n");
845 else if (retval == MXSER_ERR_IOADDR)
846 printk(KERN_ERR "Invalid I/O address,board not configured\n");
847 continue;
848 }
849 mxser_getcfg(m, &hwconf);
850 //init mxsercfg first, or mxsercfg data is not correct on ISR.
851 //mxser_initbrd will hook ISR.
852 if (mxser_initbrd(m, &hwconf) < 0)
853 continue;
854 m++;
855 }
856 }
857 #endif
858
859 retval = tty_register_driver(mxvar_sdriver);
860 if (retval) {
861 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family driver !\n");
862 put_tty_driver(mxvar_sdriver);
863
864 for (i = 0; i < MXSER_BOARDS; i++) {
865 if (mxsercfg[i].board_type == -1)
866 continue;
867 else {
868 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
869 //todo: release io, vector
870 }
871 }
872 return retval;
873 }
874
875 return 0;
876 }
877
878 static void mxser_do_softint(void *private_)
879 {
880 struct mxser_struct *info = (struct mxser_struct *) private_;
881 struct tty_struct *tty;
882
883 tty = info->tty;
884
885 if (tty) {
886 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
887 tty_wakeup(tty);
888 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
889 tty_hangup(tty);
890 }
891 }
892
893 static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
894 {
895 unsigned char status = 0;
896
897 status = inb(baseaddr + UART_MSR);
898
899 mxser_msr[port] &= 0x0F;
900 mxser_msr[port] |= status;
901 status = mxser_msr[port];
902 if (mode)
903 mxser_msr[port] = 0;
904
905 return status;
906 }
907
908 /*
909 * This routine is called whenever a serial port is opened. It
910 * enables interrupts for a serial port, linking in its async structure into
911 * the IRQ chain. It also performs the serial-specific
912 * initialization for the tty structure.
913 */
914 static int mxser_open(struct tty_struct *tty, struct file *filp)
915 {
916 struct mxser_struct *info;
917 int retval, line;
918
919 /* initialize driver_data in case something fails */
920 tty->driver_data = NULL;
921
922 line = tty->index;
923 if (line == MXSER_PORTS)
924 return 0;
925 if (line < 0 || line > MXSER_PORTS)
926 return -ENODEV;
927 info = mxvar_table + line;
928 if (!info->base)
929 return (-ENODEV);
930
931 tty->driver_data = info;
932 info->tty = tty;
933 /*
934 * Start up serial port
935 */
936 retval = mxser_startup(info);
937 if (retval)
938 return (retval);
939
940 retval = mxser_block_til_ready(tty, filp, info);
941 if (retval)
942 return (retval);
943
944 info->count++;
945
946 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
947 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
948 *tty->termios = info->normal_termios;
949 else
950 *tty->termios = info->callout_termios;
951 mxser_change_speed(info, NULL);
952 }
953
954 info->session = current->signal->session;
955 info->pgrp = process_group(current);
956 clear_bit(TTY_DONT_FLIP, &tty->flags);
957
958 //status = mxser_get_msr(info->base, 0, info->port);
959 //mxser_check_modem_status(info, status);
960
961 /* unmark here for very high baud rate (ex. 921600 bps) used
962 */
963 tty->low_latency = 1;
964 return 0;
965 }
966
967 /*
968 * This routine is called when the serial port gets closed. First, we
969 * wait for the last remaining data to be sent. Then, we unlink its
970 * async structure from the interrupt chain if necessary, and we free
971 * that IRQ if nothing is left in the chain.
972 */
973 static void mxser_close(struct tty_struct *tty, struct file *filp)
974 {
975 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
976
977 unsigned long timeout;
978 unsigned long flags;
979 struct tty_ldisc *ld;
980
981 if (tty->index == MXSER_PORTS)
982 return;
983 if (!info)
984 return;
985
986 spin_lock_irqsave(&info->slock, flags);
987
988 if (tty_hung_up_p(filp)) {
989 spin_unlock_irqrestore(&info->slock, flags);
990 return;
991 }
992 if ((tty->count == 1) && (info->count != 1)) {
993 /*
994 * Uh, oh. tty->count is 1, which means that the tty
995 * structure will be freed. Info->count should always
996 * be one in these conditions. If it's greater than
997 * one, we've got real problems, since it means the
998 * serial port won't be shutdown.
999 */
1000 printk(KERN_ERR "mxser_close: bad serial port count; tty->count is 1, " "info->count is %d\n", info->count);
1001 info->count = 1;
1002 }
1003 if (--info->count < 0) {
1004 printk(KERN_ERR "mxser_close: bad serial port count for ttys%d: %d\n", info->port, info->count);
1005 info->count = 0;
1006 }
1007 if (info->count) {
1008 spin_unlock_irqrestore(&info->slock, flags);
1009 return;
1010 }
1011 info->flags |= ASYNC_CLOSING;
1012 spin_unlock_irqrestore(&info->slock, flags);
1013 /*
1014 * Save the termios structure, since this port may have
1015 * separate termios for callout and dialin.
1016 */
1017 if (info->flags & ASYNC_NORMAL_ACTIVE)
1018 info->normal_termios = *tty->termios;
1019 /*
1020 * Now we wait for the transmit buffer to clear; and we notify
1021 * the line discipline to only process XON/XOFF characters.
1022 */
1023 tty->closing = 1;
1024 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1025 tty_wait_until_sent(tty, info->closing_wait);
1026 /*
1027 * At this point we stop accepting input. To do this, we
1028 * disable the receive line status interrupts, and tell the
1029 * interrupt driver to stop checking the data ready bit in the
1030 * line status register.
1031 */
1032 info->IER &= ~UART_IER_RLSI;
1033 if (info->IsMoxaMustChipFlag)
1034 info->IER &= ~MOXA_MUST_RECV_ISR;
1035 /* by William
1036 info->read_status_mask &= ~UART_LSR_DR;
1037 */
1038 if (info->flags & ASYNC_INITIALIZED) {
1039 outb(info->IER, info->base + UART_IER);
1040 /*
1041 * Before we drop DTR, make sure the UART transmitter
1042 * has completely drained; this is especially
1043 * important if there is a transmit FIFO!
1044 */
1045 timeout = jiffies + HZ;
1046 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
1047 schedule_timeout_interruptible(5);
1048 if (time_after(jiffies, timeout))
1049 break;
1050 }
1051 }
1052 mxser_shutdown(info);
1053
1054 if (tty->driver->flush_buffer)
1055 tty->driver->flush_buffer(tty);
1056
1057 ld = tty_ldisc_ref(tty);
1058 if (ld) {
1059 if(ld->flush_buffer)
1060 ld->flush_buffer(tty);
1061 tty_ldisc_deref(ld);
1062 }
1063
1064 tty->closing = 0;
1065 info->event = 0;
1066 info->tty = NULL;
1067 if (info->blocked_open) {
1068 if (info->close_delay)
1069 schedule_timeout_interruptible(info->close_delay);
1070 wake_up_interruptible(&info->open_wait);
1071 }
1072
1073 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1074 wake_up_interruptible(&info->close_wait);
1075
1076 }
1077
1078 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1079 {
1080 int c, total = 0;
1081 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1082 unsigned long flags;
1083
1084 if (!tty || !info->xmit_buf)
1085 return (0);
1086
1087 while (1) {
1088 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, SERIAL_XMIT_SIZE - info->xmit_head));
1089 if (c <= 0)
1090 break;
1091
1092 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1093 spin_lock_irqsave(&info->slock, flags);
1094 info->xmit_head = (info->xmit_head + c) & (SERIAL_XMIT_SIZE - 1);
1095 info->xmit_cnt += c;
1096 spin_unlock_irqrestore(&info->slock, flags);
1097
1098 buf += c;
1099 count -= c;
1100 total += c;
1101
1102 }
1103
1104 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
1105 if (!tty->hw_stopped || (info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
1106 spin_lock_irqsave(&info->slock, flags);
1107 info->IER |= UART_IER_THRI;
1108 outb(info->IER, info->base + UART_IER);
1109 spin_unlock_irqrestore(&info->slock, flags);
1110 }
1111 }
1112 return total;
1113 }
1114
1115 static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1116 {
1117 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1118 unsigned long flags;
1119
1120 if (!tty || !info->xmit_buf)
1121 return;
1122
1123 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1124 return;
1125
1126 spin_lock_irqsave(&info->slock, flags);
1127 info->xmit_buf[info->xmit_head++] = ch;
1128 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1129 info->xmit_cnt++;
1130 spin_unlock_irqrestore(&info->slock, flags);
1131 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
1132 if (!tty->hw_stopped || (info->type == PORT_16550A) || info->IsMoxaMustChipFlag) {
1133 spin_lock_irqsave(&info->slock, flags);
1134 info->IER |= UART_IER_THRI;
1135 outb(info->IER, info->base + UART_IER);
1136 spin_unlock_irqrestore(&info->slock, flags);
1137 }
1138 }
1139 }
1140
1141
1142 static void mxser_flush_chars(struct tty_struct *tty)
1143 {
1144 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1145 unsigned long flags;
1146
1147 if (info->xmit_cnt <= 0 || tty->stopped || !info->xmit_buf || (tty->hw_stopped && (info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)))
1148 return;
1149
1150 spin_lock_irqsave(&info->slock, flags);
1151
1152 info->IER |= UART_IER_THRI;
1153 outb(info->IER, info->base + UART_IER);
1154
1155 spin_unlock_irqrestore(&info->slock, flags);
1156 }
1157
1158 static int mxser_write_room(struct tty_struct *tty)
1159 {
1160 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1161 int ret;
1162
1163 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1164 if (ret < 0)
1165 ret = 0;
1166 return (ret);
1167 }
1168
1169 static int mxser_chars_in_buffer(struct tty_struct *tty)
1170 {
1171 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1172 return info->xmit_cnt;
1173 }
1174
1175 static void mxser_flush_buffer(struct tty_struct *tty)
1176 {
1177 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1178 char fcr;
1179 unsigned long flags;
1180
1181
1182 spin_lock_irqsave(&info->slock, flags);
1183 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1184
1185 /* below added by shinhay */
1186 fcr = inb(info->base + UART_FCR);
1187 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), info->base + UART_FCR);
1188 outb(fcr, info->base + UART_FCR);
1189
1190 spin_unlock_irqrestore(&info->slock, flags);
1191 /* above added by shinhay */
1192
1193 wake_up_interruptible(&tty->write_wait);
1194 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
1195 (tty->ldisc.write_wakeup) (tty);
1196 }
1197
1198 static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1199 {
1200 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1201 int retval;
1202 struct async_icount cprev, cnow; /* kernel counter temps */
1203 struct serial_icounter_struct __user *p_cuser;
1204 unsigned long templ;
1205 unsigned long flags;
1206 void __user *argp = (void __user *)arg;
1207
1208 if (tty->index == MXSER_PORTS)
1209 return (mxser_ioctl_special(cmd, argp));
1210
1211 // following add by Victor Yu. 01-05-2004
1212 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1213 int opmode, p;
1214 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1215 int shiftbit;
1216 unsigned char val, mask;
1217
1218 p = info->port % 4;
1219 if (cmd == MOXA_SET_OP_MODE) {
1220 if (get_user(opmode, (int __user *) argp))
1221 return -EFAULT;
1222 if (opmode != RS232_MODE && opmode != RS485_2WIRE_MODE && opmode != RS422_MODE && opmode != RS485_4WIRE_MODE)
1223 return -EFAULT;
1224 mask = ModeMask[p];
1225 shiftbit = p * 2;
1226 val = inb(info->opmode_ioaddr);
1227 val &= mask;
1228 val |= (opmode << shiftbit);
1229 outb(val, info->opmode_ioaddr);
1230 } else {
1231 shiftbit = p * 2;
1232 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1233 opmode &= OP_MODE_MASK;
1234 if (copy_to_user(argp, &opmode, sizeof(int)))
1235 return -EFAULT;
1236 }
1237 return 0;
1238 }
1239 // above add by Victor Yu. 01-05-2004
1240
1241 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1242 if (tty->flags & (1 << TTY_IO_ERROR))
1243 return (-EIO);
1244 }
1245 switch (cmd) {
1246 case TCSBRK: /* SVID version: non-zero arg --> no break */
1247 retval = tty_check_change(tty);
1248 if (retval)
1249 return (retval);
1250 tty_wait_until_sent(tty, 0);
1251 if (!arg)
1252 mxser_send_break(info, HZ / 4); /* 1/4 second */
1253 return (0);
1254 case TCSBRKP: /* support for POSIX tcsendbreak() */
1255 retval = tty_check_change(tty);
1256 if (retval)
1257 return (retval);
1258 tty_wait_until_sent(tty, 0);
1259 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1260 return (0);
1261 case TIOCGSOFTCAR:
1262 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *) argp);
1263 case TIOCSSOFTCAR:
1264 if (get_user(templ, (unsigned long __user *) argp))
1265 return -EFAULT;
1266 arg = templ;
1267 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
1268 return (0);
1269 case TIOCGSERIAL:
1270 return mxser_get_serial_info(info, argp);
1271 case TIOCSSERIAL:
1272 return mxser_set_serial_info(info, argp);
1273 case TIOCSERGETLSR: /* Get line status register */
1274 return mxser_get_lsr_info(info, argp);
1275 /*
1276 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1277 * - mask passed in arg for lines of interest
1278 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1279 * Caller should use TIOCGICOUNT to see which one it was
1280 */
1281 case TIOCMIWAIT:{
1282 DECLARE_WAITQUEUE(wait, current);
1283 int ret;
1284 spin_lock_irqsave(&info->slock, flags);
1285 cprev = info->icount; /* note the counters on entry */
1286 spin_unlock_irqrestore(&info->slock, flags);
1287
1288 add_wait_queue(&info->delta_msr_wait, &wait);
1289 while (1) {
1290 spin_lock_irqsave(&info->slock, flags);
1291 cnow = info->icount; /* atomic copy */
1292 spin_unlock_irqrestore(&info->slock, flags);
1293
1294 set_current_state(TASK_INTERRUPTIBLE);
1295 if (((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts))) {
1296 ret = 0;
1297 break;
1298 }
1299 /* see if a signal did it */
1300 if (signal_pending(current)) {
1301 ret = -ERESTARTSYS;
1302 break;
1303 }
1304 cprev = cnow;
1305 }
1306 current->state = TASK_RUNNING;
1307 remove_wait_queue(&info->delta_msr_wait, &wait);
1308 break;
1309 }
1310 /* NOTREACHED */
1311 /*
1312 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1313 * Return: write counters to the user passed counter struct
1314 * NB: both 1->0 and 0->1 transitions are counted except for
1315 * RI where only 0->1 is counted.
1316 */
1317 case TIOCGICOUNT:
1318 spin_lock_irqsave(&info->slock, flags);
1319 cnow = info->icount;
1320 spin_unlock_irqrestore(&info->slock, flags);
1321 p_cuser = argp;
1322 /* modified by casper 1/11/2000 */
1323 if (put_user(cnow.frame, &p_cuser->frame))
1324 return -EFAULT;
1325 if (put_user(cnow.brk, &p_cuser->brk))
1326 return -EFAULT;
1327 if (put_user(cnow.overrun, &p_cuser->overrun))
1328 return -EFAULT;
1329 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1330 return -EFAULT;
1331 if (put_user(cnow.parity, &p_cuser->parity))
1332 return -EFAULT;
1333 if (put_user(cnow.rx, &p_cuser->rx))
1334 return -EFAULT;
1335 if (put_user(cnow.tx, &p_cuser->tx))
1336 return -EFAULT;
1337 put_user(cnow.cts, &p_cuser->cts);
1338 put_user(cnow.dsr, &p_cuser->dsr);
1339 put_user(cnow.rng, &p_cuser->rng);
1340 put_user(cnow.dcd, &p_cuser->dcd);
1341
1342 /* */
1343 return 0;
1344 case MOXA_HighSpeedOn:
1345 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *) argp);
1346
1347 case MOXA_SDS_RSTICOUNTER:{
1348 info->mon_data.rxcnt = 0;
1349 info->mon_data.txcnt = 0;
1350 return 0;
1351 }
1352 // (above) added by James.
1353 case MOXA_ASPP_SETBAUD:{
1354 long baud;
1355 if (get_user(baud, (long __user *) argp))
1356 return -EFAULT;
1357 mxser_set_baud(info, baud);
1358 return 0;
1359 }
1360 case MOXA_ASPP_GETBAUD:
1361 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1362 return -EFAULT;
1363
1364 return 0;
1365
1366 case MOXA_ASPP_OQUEUE:{
1367 int len, lsr;
1368
1369 len = mxser_chars_in_buffer(tty);
1370
1371 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1372
1373 len += (lsr ? 0 : 1);
1374
1375 if (copy_to_user(argp, &len, sizeof(int)))
1376 return -EFAULT;
1377
1378 return 0;
1379 }
1380 case MOXA_ASPP_MON:{
1381 int mcr, status;
1382 // info->mon_data.ser_param = tty->termios->c_cflag;
1383
1384 status = mxser_get_msr(info->base, 1, info->port, info);
1385 mxser_check_modem_status(info, status);
1386
1387 mcr = inb(info->base + UART_MCR);
1388 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1389 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1390 else
1391 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1392
1393 if (mcr & MOXA_MUST_MCR_TX_XON)
1394 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1395 else
1396 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1397
1398 if (info->tty->hw_stopped)
1399 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1400 else
1401 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1402
1403
1404 if (copy_to_user(argp, &info->mon_data, sizeof(struct mxser_mon)))
1405 return -EFAULT;
1406
1407 return 0;
1408
1409 }
1410
1411 case MOXA_ASPP_LSTATUS:{
1412 if (copy_to_user(argp, &info->err_shadow, sizeof(unsigned char)))
1413 return -EFAULT;
1414
1415 info->err_shadow = 0;
1416 return 0;
1417
1418 }
1419 case MOXA_SET_BAUD_METHOD:{
1420 int method;
1421 if (get_user(method, (int __user *) argp))
1422 return -EFAULT;
1423 mxser_set_baud_method[info->port] = method;
1424 if (copy_to_user(argp, &method, sizeof(int)))
1425 return -EFAULT;
1426
1427 return 0;
1428 }
1429 default:
1430 return -ENOIOCTLCMD;
1431 }
1432 return 0;
1433 }
1434
1435 #ifndef CMSPAR
1436 #define CMSPAR 010000000000
1437 #endif
1438
1439 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1440 {
1441 int i, result, status;
1442
1443 switch (cmd) {
1444 case MOXA_GET_CONF:
1445 if (copy_to_user(argp, mxsercfg, sizeof(struct mxser_hwconf) * 4))
1446 return -EFAULT;
1447 return 0;
1448 case MOXA_GET_MAJOR:
1449 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1450 return -EFAULT;
1451 return 0;
1452
1453 case MOXA_GET_CUMAJOR:
1454 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1455 return -EFAULT;
1456 return 0;
1457
1458 case MOXA_CHKPORTENABLE:
1459 result = 0;
1460 for (i = 0; i < MXSER_PORTS; i++) {
1461 if (mxvar_table[i].base)
1462 result |= (1 << i);
1463 }
1464 return put_user(result, (unsigned long __user *) argp);
1465 case MOXA_GETDATACOUNT:
1466 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1467 return -EFAULT;
1468 return (0);
1469 case MOXA_GETMSTATUS:
1470 for (i = 0; i < MXSER_PORTS; i++) {
1471 GMStatus[i].ri = 0;
1472 if (!mxvar_table[i].base) {
1473 GMStatus[i].dcd = 0;
1474 GMStatus[i].dsr = 0;
1475 GMStatus[i].cts = 0;
1476 continue;
1477 }
1478
1479 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1480 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1481 else
1482 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1483
1484 status = inb(mxvar_table[i].base + UART_MSR);
1485 if (status & 0x80 /*UART_MSR_DCD */ )
1486 GMStatus[i].dcd = 1;
1487 else
1488 GMStatus[i].dcd = 0;
1489
1490 if (status & 0x20 /*UART_MSR_DSR */ )
1491 GMStatus[i].dsr = 1;
1492 else
1493 GMStatus[i].dsr = 0;
1494
1495
1496 if (status & 0x10 /*UART_MSR_CTS */ )
1497 GMStatus[i].cts = 1;
1498 else
1499 GMStatus[i].cts = 0;
1500 }
1501 if (copy_to_user(argp, GMStatus, sizeof(struct mxser_mstatus) * MXSER_PORTS))
1502 return -EFAULT;
1503 return 0;
1504 case MOXA_ASPP_MON_EXT:{
1505 int status;
1506 int opmode, p;
1507 int shiftbit;
1508 unsigned cflag, iflag;
1509
1510 for (i = 0; i < MXSER_PORTS; i++) {
1511
1512 if (!mxvar_table[i].base)
1513 continue;
1514
1515 status = mxser_get_msr(mxvar_table[i].base, 0, i, &(mxvar_table[i]));
1516 // mxser_check_modem_status(&mxvar_table[i], status);
1517 if (status & UART_MSR_TERI)
1518 mxvar_table[i].icount.rng++;
1519 if (status & UART_MSR_DDSR)
1520 mxvar_table[i].icount.dsr++;
1521 if (status & UART_MSR_DDCD)
1522 mxvar_table[i].icount.dcd++;
1523 if (status & UART_MSR_DCTS)
1524 mxvar_table[i].icount.cts++;
1525
1526 mxvar_table[i].mon_data.modem_status = status;
1527 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1528 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1529 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1530 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1531 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1532 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1533
1534 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1535 cflag = mxvar_table[i].normal_termios.c_cflag;
1536 iflag = mxvar_table[i].normal_termios.c_iflag;
1537 } else {
1538 cflag = mxvar_table[i].tty->termios->c_cflag;
1539 iflag = mxvar_table[i].tty->termios->c_iflag;
1540 }
1541
1542 mon_data_ext.databits[i] = cflag & CSIZE;
1543
1544 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1545
1546 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1547
1548 mon_data_ext.flowctrl[i] = 0x00;
1549
1550 if (cflag & CRTSCTS)
1551 mon_data_ext.flowctrl[i] |= 0x03;
1552
1553 if (iflag & (IXON | IXOFF))
1554 mon_data_ext.flowctrl[i] |= 0x0C;
1555
1556 if (mxvar_table[i].type == PORT_16550A)
1557 mon_data_ext.fifo[i] = 1;
1558 else
1559 mon_data_ext.fifo[i] = 0;
1560
1561 p = i % 4;
1562 shiftbit = p * 2;
1563 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1564 opmode &= OP_MODE_MASK;
1565
1566 mon_data_ext.iftype[i] = opmode;
1567
1568 }
1569 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1570 return -EFAULT;
1571
1572 return 0;
1573
1574 }
1575 default:
1576 return -ENOIOCTLCMD;
1577 }
1578 return 0;
1579 }
1580
1581
1582 static void mxser_stoprx(struct tty_struct *tty)
1583 {
1584 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1585 //unsigned long flags;
1586
1587
1588 info->ldisc_stop_rx = 1;
1589 if (I_IXOFF(tty)) {
1590
1591 //MX_LOCK(&info->slock);
1592 // following add by Victor Yu. 09-02-2002
1593 if (info->IsMoxaMustChipFlag) {
1594 info->IER &= ~MOXA_MUST_RECV_ISR;
1595 outb(info->IER, info->base + UART_IER);
1596 } else {
1597 // above add by Victor Yu. 09-02-2002
1598
1599 info->x_char = STOP_CHAR(tty);
1600 // outb(info->IER, 0); // mask by Victor Yu. 09-02-2002
1601 outb(0, info->base + UART_IER);
1602 info->IER |= UART_IER_THRI;
1603 outb(info->IER, info->base + UART_IER); /* force Tx interrupt */
1604 } // add by Victor Yu. 09-02-2002
1605 //MX_UNLOCK(&info->slock);
1606 }
1607
1608 if (info->tty->termios->c_cflag & CRTSCTS) {
1609 //MX_LOCK(&info->slock);
1610 info->MCR &= ~UART_MCR_RTS;
1611 outb(info->MCR, info->base + UART_MCR);
1612 //MX_UNLOCK(&info->slock);
1613 }
1614 }
1615
1616 static void mxser_startrx(struct tty_struct *tty)
1617 {
1618 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1619 //unsigned long flags;
1620
1621 info->ldisc_stop_rx = 0;
1622 if (I_IXOFF(tty)) {
1623 if (info->x_char)
1624 info->x_char = 0;
1625 else {
1626 //MX_LOCK(&info->slock);
1627
1628 // following add by Victor Yu. 09-02-2002
1629 if (info->IsMoxaMustChipFlag) {
1630 info->IER |= MOXA_MUST_RECV_ISR;
1631 outb(info->IER, info->base + UART_IER);
1632 } else {
1633 // above add by Victor Yu. 09-02-2002
1634
1635 info->x_char = START_CHAR(tty);
1636 // outb(info->IER, 0); // mask by Victor Yu. 09-02-2002
1637 outb(0, info->base + UART_IER); // add by Victor Yu. 09-02-2002
1638 info->IER |= UART_IER_THRI; /* force Tx interrupt */
1639 outb(info->IER, info->base + UART_IER);
1640 } // add by Victor Yu. 09-02-2002
1641 //MX_UNLOCK(&info->slock);
1642 }
1643 }
1644
1645 if (info->tty->termios->c_cflag & CRTSCTS) {
1646 //MX_LOCK(&info->slock);
1647 info->MCR |= UART_MCR_RTS;
1648 outb(info->MCR, info->base + UART_MCR);
1649 //MX_UNLOCK(&info->slock);
1650 }
1651 }
1652
1653 /*
1654 * This routine is called by the upper-layer tty layer to signal that
1655 * incoming characters should be throttled.
1656 */
1657 static void mxser_throttle(struct tty_struct *tty)
1658 {
1659 //struct mxser_struct *info = (struct mxser_struct *)tty->driver_data;
1660 //unsigned long flags;
1661 //MX_LOCK(&info->slock);
1662 mxser_stoprx(tty);
1663 //MX_UNLOCK(&info->slock);
1664 }
1665
1666 static void mxser_unthrottle(struct tty_struct *tty)
1667 {
1668 //struct mxser_struct *info = (struct mxser_struct *)tty->driver_data;
1669 //unsigned long flags;
1670 //MX_LOCK(&info->slock);
1671 mxser_startrx(tty);
1672 //MX_UNLOCK(&info->slock);
1673 }
1674
1675 static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios)
1676 {
1677 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1678 unsigned long flags;
1679
1680 if ((tty->termios->c_cflag != old_termios->c_cflag) || (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
1681
1682 mxser_change_speed(info, old_termios);
1683
1684 if ((old_termios->c_cflag & CRTSCTS) && !(tty->termios->c_cflag & CRTSCTS)) {
1685 tty->hw_stopped = 0;
1686 mxser_start(tty);
1687 }
1688 }
1689
1690 /* Handle sw stopped */
1691 if ((old_termios->c_iflag & IXON) && !(tty->termios->c_iflag & IXON)) {
1692 tty->stopped = 0;
1693
1694 // following add by Victor Yu. 09-02-2002
1695 if (info->IsMoxaMustChipFlag) {
1696 spin_lock_irqsave(&info->slock, flags);
1697 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1698 spin_unlock_irqrestore(&info->slock, flags);
1699 }
1700 // above add by Victor Yu. 09-02-2002
1701
1702 mxser_start(tty);
1703 }
1704 }
1705
1706 /*
1707 * mxser_stop() and mxser_start()
1708 *
1709 * This routines are called before setting or resetting tty->stopped.
1710 * They enable or disable transmitter interrupts, as necessary.
1711 */
1712 static void mxser_stop(struct tty_struct *tty)
1713 {
1714 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1715 unsigned long flags;
1716
1717 spin_lock_irqsave(&info->slock, flags);
1718 if (info->IER & UART_IER_THRI) {
1719 info->IER &= ~UART_IER_THRI;
1720 outb(info->IER, info->base + UART_IER);
1721 }
1722 spin_unlock_irqrestore(&info->slock, flags);
1723 }
1724
1725 static void mxser_start(struct tty_struct *tty)
1726 {
1727 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1728 unsigned long flags;
1729
1730 spin_lock_irqsave(&info->slock, flags);
1731 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1732 info->IER |= UART_IER_THRI;
1733 outb(info->IER, info->base + UART_IER);
1734 }
1735 spin_unlock_irqrestore(&info->slock, flags);
1736 }
1737
1738 /*
1739 * mxser_wait_until_sent() --- wait until the transmitter is empty
1740 */
1741 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1742 {
1743 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1744 unsigned long orig_jiffies, char_time;
1745 int lsr;
1746
1747 if (info->type == PORT_UNKNOWN)
1748 return;
1749
1750 if (info->xmit_fifo_size == 0)
1751 return; /* Just in case.... */
1752
1753 orig_jiffies = jiffies;
1754 /*
1755 * Set the check interval to be 1/5 of the estimated time to
1756 * send a single character, and make it at least 1. The check
1757 * interval should also be less than the timeout.
1758 *
1759 * Note: we have to use pretty tight timings here to satisfy
1760 * the NIST-PCTS.
1761 */
1762 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1763 char_time = char_time / 5;
1764 if (char_time == 0)
1765 char_time = 1;
1766 if (timeout && timeout < char_time)
1767 char_time = timeout;
1768 /*
1769 * If the transmitter hasn't cleared in twice the approximate
1770 * amount of time to send the entire FIFO, it probably won't
1771 * ever clear. This assumes the UART isn't doing flow
1772 * control, which is currently the case. Hence, if it ever
1773 * takes longer than info->timeout, this is probably due to a
1774 * UART bug of some kind. So, we clamp the timeout parameter at
1775 * 2*info->timeout.
1776 */
1777 if (!timeout || timeout > 2 * info->timeout)
1778 timeout = 2 * info->timeout;
1779 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1780 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1781 printk("jiff=%lu...", jiffies);
1782 #endif
1783 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1784 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1785 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1786 #endif
1787 schedule_timeout_interruptible(char_time);
1788 if (signal_pending(current))
1789 break;
1790 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1791 break;
1792 }
1793 set_current_state(TASK_RUNNING);
1794
1795 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1796 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1797 #endif
1798 }
1799
1800
1801 /*
1802 * This routine is called by tty_hangup() when a hangup is signaled.
1803 */
1804 void mxser_hangup(struct tty_struct *tty)
1805 {
1806 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1807
1808 mxser_flush_buffer(tty);
1809 mxser_shutdown(info);
1810 info->event = 0;
1811 info->count = 0;
1812 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1813 info->tty = NULL;
1814 wake_up_interruptible(&info->open_wait);
1815 }
1816
1817
1818 // added by James 03-12-2004.
1819 /*
1820 * mxser_rs_break() --- routine which turns the break handling on or off
1821 */
1822 static void mxser_rs_break(struct tty_struct *tty, int break_state)
1823 {
1824 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
1825 unsigned long flags;
1826
1827 spin_lock_irqsave(&info->slock, flags);
1828 if (break_state == -1)
1829 outb(inb(info->base + UART_LCR) | UART_LCR_SBC, info->base + UART_LCR);
1830 else
1831 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC, info->base + UART_LCR);
1832 spin_unlock_irqrestore(&info->slock, flags);
1833 }
1834
1835 // (above) added by James.
1836
1837
1838 /*
1839 * This is the serial driver's generic interrupt routine
1840 */
1841 static irqreturn_t mxser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1842 {
1843 int status, iir, i;
1844 struct mxser_struct *info;
1845 struct mxser_struct *port;
1846 int max, irqbits, bits, msr;
1847 int pass_counter = 0;
1848 int handled = IRQ_NONE;
1849
1850 port = NULL;
1851 //spin_lock(&gm_lock);
1852
1853 for (i = 0; i < MXSER_BOARDS; i++) {
1854 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1855 port = dev_id;
1856 break;
1857 }
1858 }
1859
1860 if (i == MXSER_BOARDS) {
1861 goto irq_stop;
1862 }
1863 if (port == 0) {
1864 goto irq_stop;
1865 }
1866 max = mxser_numports[mxsercfg[i].board_type - 1];
1867 while (1) {
1868 irqbits = inb(port->vector) & port->vectormask;
1869 if (irqbits == port->vectormask) {
1870 break;
1871 }
1872
1873 handled = IRQ_HANDLED;
1874 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
1875 if (irqbits == port->vectormask) {
1876 break;
1877 }
1878 if (bits & irqbits)
1879 continue;
1880 info = port + i;
1881
1882 // following add by Victor Yu. 09-13-2002
1883 iir = inb(info->base + UART_IIR);
1884 if (iir & UART_IIR_NO_INT)
1885 continue;
1886 iir &= MOXA_MUST_IIR_MASK;
1887 if (!info->tty) {
1888 status = inb(info->base + UART_LSR);
1889 outb(0x27, info->base + UART_FCR);
1890 inb(info->base + UART_MSR);
1891 continue;
1892 }
1893 // above add by Victor Yu. 09-13-2002
1894 /*
1895 if ( info->tty->flip.count < TTY_FLIPBUF_SIZE/4 ){
1896 info->IER |= MOXA_MUST_RECV_ISR;
1897 outb(info->IER, info->base + UART_IER);
1898 }
1899 */
1900
1901
1902 /* mask by Victor Yu. 09-13-2002
1903 if ( !info->tty ||
1904 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1905 continue;
1906 */
1907 /* mask by Victor Yu. 09-02-2002
1908 status = inb(info->base + UART_LSR) & info->read_status_mask;
1909 */
1910
1911 // following add by Victor Yu. 09-02-2002
1912 status = inb(info->base + UART_LSR);
1913
1914 if (status & UART_LSR_PE) {
1915 info->err_shadow |= NPPI_NOTIFY_PARITY;
1916 }
1917 if (status & UART_LSR_FE) {
1918 info->err_shadow |= NPPI_NOTIFY_FRAMING;
1919 }
1920 if (status & UART_LSR_OE) {
1921 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1922 }
1923 if (status & UART_LSR_BI)
1924 info->err_shadow |= NPPI_NOTIFY_BREAK;
1925
1926 if (info->IsMoxaMustChipFlag) {
1927 /*
1928 if ( (status & 0x02) && !(status & 0x01) ) {
1929 outb(info->base+UART_FCR, 0x23);
1930 continue;
1931 }
1932 */
1933 if (iir == MOXA_MUST_IIR_GDA || iir == MOXA_MUST_IIR_RDA || iir == MOXA_MUST_IIR_RTO || iir == MOXA_MUST_IIR_LSR)
1934 mxser_receive_chars(info, &status);
1935
1936 } else {
1937 // above add by Victor Yu. 09-02-2002
1938
1939 status &= info->read_status_mask;
1940 if (status & UART_LSR_DR)
1941 mxser_receive_chars(info, &status);
1942 }
1943 msr = inb(info->base + UART_MSR);
1944 if (msr & UART_MSR_ANY_DELTA) {
1945 mxser_check_modem_status(info, msr);
1946 }
1947 // following add by Victor Yu. 09-13-2002
1948 if (info->IsMoxaMustChipFlag) {
1949 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
1950 mxser_transmit_chars(info);
1951 }
1952 } else {
1953 // above add by Victor Yu. 09-13-2002
1954
1955 if (status & UART_LSR_THRE) {
1956 /* 8-2-99 by William
1957 if ( info->x_char || (info->xmit_cnt > 0) )
1958 */
1959 mxser_transmit_chars(info);
1960 }
1961 }
1962 }
1963 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
1964 break; /* Prevent infinite loops */
1965 }
1966 }
1967
1968 irq_stop:
1969 //spin_unlock(&gm_lock);
1970 return handled;
1971 }
1972
1973 static void mxser_receive_chars(struct mxser_struct *info, int *status)
1974 {
1975 struct tty_struct *tty = info->tty;
1976 unsigned char ch, gdl;
1977 int ignored = 0;
1978 int cnt = 0;
1979 int recv_room;
1980 int max = 256;
1981 unsigned long flags;
1982
1983 spin_lock_irqsave(&info->slock, flags);
1984
1985 recv_room = tty->receive_room;
1986 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
1987 //mxser_throttle(tty);
1988 mxser_stoprx(tty);
1989 //return;
1990 }
1991
1992 // following add by Victor Yu. 09-02-2002
1993 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
1994
1995 if (*status & UART_LSR_SPECIAL) {
1996 goto intr_old;
1997 }
1998 // following add by Victor Yu. 02-11-2004
1999 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID && (*status & MOXA_MUST_LSR_RERR))
2000 goto intr_old;
2001 // above add by Victor Yu. 02-14-2004
2002 if (*status & MOXA_MUST_LSR_RERR)
2003 goto intr_old;
2004
2005 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2006
2007 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID) // add by Victor Yu. 02-11-2004
2008 gdl &= MOXA_MUST_GDL_MASK;
2009 if (gdl >= recv_room) {
2010 if (!info->ldisc_stop_rx) {
2011 //mxser_throttle(tty);
2012 mxser_stoprx(tty);
2013 }
2014 //return;
2015 }
2016 while (gdl--) {
2017 ch = inb(info->base + UART_RX);
2018 tty_insert_flip_char(tty, ch, 0);
2019 cnt++;
2020 /*
2021 if((cnt>=HI_WATER) && (info->stop_rx==0)){
2022 mxser_stoprx(tty);
2023 info->stop_rx=1;
2024 break;
2025 } */
2026 }
2027 goto end_intr;
2028 }
2029 intr_old:
2030 // above add by Victor Yu. 09-02-2002
2031
2032 do {
2033 if (max-- < 0)
2034 break;
2035 /*
2036 if((cnt>=HI_WATER) && (info->stop_rx==0)){
2037 mxser_stoprx(tty);
2038 info->stop_rx=1;
2039 break;
2040 }
2041 */
2042
2043 ch = inb(info->base + UART_RX);
2044 // following add by Victor Yu. 09-02-2002
2045 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2046 outb(0x23, info->base + UART_FCR);
2047 *status &= info->read_status_mask;
2048 // above add by Victor Yu. 09-02-2002
2049 if (*status & info->ignore_status_mask) {
2050 if (++ignored > 100)
2051 break;
2052 } else {
2053 char flag = 0;
2054 if (*status & UART_LSR_SPECIAL) {
2055 if (*status & UART_LSR_BI) {
2056 flag = TTY_BREAK;
2057 /* added by casper 1/11/2000 */
2058 info->icount.brk++;
2059 /* */
2060 if (info->flags & ASYNC_SAK)
2061 do_SAK(tty);
2062 } else if (*status & UART_LSR_PE) {
2063 flag = TTY_PARITY;
2064 /* added by casper 1/11/2000 */
2065 info->icount.parity++;
2066 /* */
2067 } else if (*status & UART_LSR_FE) {
2068 flag = TTY_FRAME;
2069 /* added by casper 1/11/2000 */
2070 info->icount.frame++;
2071 /* */
2072 } else if (*status & UART_LSR_OE) {
2073 flag = TTY_OVERRUN;
2074 /* added by casper 1/11/2000 */
2075 info->icount.overrun++;
2076 /* */
2077 }
2078 }
2079 tty_insert_flip_char(tty, ch, flag);
2080 cnt++;
2081 if (cnt >= recv_room) {
2082 if (!info->ldisc_stop_rx) {
2083 //mxser_throttle(tty);
2084 mxser_stoprx(tty);
2085 }
2086 break;
2087 }
2088
2089 }
2090
2091 // following add by Victor Yu. 09-02-2002
2092 if (info->IsMoxaMustChipFlag)
2093 break;
2094 // above add by Victor Yu. 09-02-2002
2095
2096 /* mask by Victor Yu. 09-02-2002
2097 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2098 */
2099 // following add by Victor Yu. 09-02-2002
2100 *status = inb(info->base + UART_LSR);
2101 // above add by Victor Yu. 09-02-2002
2102 } while (*status & UART_LSR_DR);
2103
2104 end_intr: // add by Victor Yu. 09-02-2002
2105
2106 mxvar_log.rxcnt[info->port] += cnt;
2107 info->mon_data.rxcnt += cnt;
2108 info->mon_data.up_rxcnt += cnt;
2109 spin_unlock_irqrestore(&info->slock, flags);
2110
2111 tty_flip_buffer_push(tty);
2112 }
2113
2114 static void mxser_transmit_chars(struct mxser_struct *info)
2115 {
2116 int count, cnt;
2117 unsigned long flags;
2118
2119 spin_lock_irqsave(&info->slock, flags);
2120
2121 if (info->x_char) {
2122 outb(info->x_char, info->base + UART_TX);
2123 info->x_char = 0;
2124 mxvar_log.txcnt[info->port]++;
2125 info->mon_data.txcnt++;
2126 info->mon_data.up_txcnt++;
2127
2128 /* added by casper 1/11/2000 */
2129 info->icount.tx++;
2130 /* */
2131 spin_unlock_irqrestore(&info->slock, flags);
2132 return;
2133 }
2134
2135 if (info->xmit_buf == 0) {
2136 spin_unlock_irqrestore(&info->slock, flags);
2137 return;
2138 }
2139
2140 if ((info->xmit_cnt <= 0) || info->tty->stopped || (info->tty->hw_stopped && (info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag))) {
2141 info->IER &= ~UART_IER_THRI;
2142 outb(info->IER, info->base + UART_IER);
2143 spin_unlock_irqrestore(&info->slock, flags);
2144 return;
2145 }
2146
2147 cnt = info->xmit_cnt;
2148 count = info->xmit_fifo_size;
2149 do {
2150 outb(info->xmit_buf[info->xmit_tail++], info->base + UART_TX);
2151 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2152 if (--info->xmit_cnt <= 0)
2153 break;
2154 } while (--count > 0);
2155 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2156
2157 // added by James 03-12-2004.
2158 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2159 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
2160 // (above) added by James.
2161
2162 /* added by casper 1/11/2000 */
2163 info->icount.tx += (cnt - info->xmit_cnt);
2164 /* */
2165
2166 if (info->xmit_cnt < WAKEUP_CHARS) {
2167 set_bit(MXSER_EVENT_TXLOW, &info->event);
2168 schedule_work(&info->tqueue);
2169 }
2170 if (info->xmit_cnt <= 0) {
2171 info->IER &= ~UART_IER_THRI;
2172 outb(info->IER, info->base + UART_IER);
2173 }
2174 spin_unlock_irqrestore(&info->slock, flags);
2175 }
2176
2177 static void mxser_check_modem_status(struct mxser_struct *info, int status)
2178 {
2179 /* update input line counters */
2180 if (status & UART_MSR_TERI)
2181 info->icount.rng++;
2182 if (status & UART_MSR_DDSR)
2183 info->icount.dsr++;
2184 if (status & UART_MSR_DDCD)
2185 info->icount.dcd++;
2186 if (status & UART_MSR_DCTS)
2187 info->icount.cts++;
2188 info->mon_data.modem_status = status;
2189 wake_up_interruptible(&info->delta_msr_wait);
2190
2191
2192 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2193 if (status & UART_MSR_DCD)
2194 wake_up_interruptible(&info->open_wait);
2195 schedule_work(&info->tqueue);
2196 }
2197
2198 if (info->flags & ASYNC_CTS_FLOW) {
2199 if (info->tty->hw_stopped) {
2200 if (status & UART_MSR_CTS) {
2201 info->tty->hw_stopped = 0;
2202
2203 if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
2204 info->IER |= UART_IER_THRI;
2205 outb(info->IER, info->base + UART_IER);
2206 }
2207 set_bit(MXSER_EVENT_TXLOW, &info->event);
2208 schedule_work(&info->tqueue); }
2209 } else {
2210 if (!(status & UART_MSR_CTS)) {
2211 info->tty->hw_stopped = 1;
2212 if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
2213 info->IER &= ~UART_IER_THRI;
2214 outb(info->IER, info->base + UART_IER);
2215 }
2216 }
2217 }
2218 }
2219 }
2220
2221 static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2222 {
2223 DECLARE_WAITQUEUE(wait, current);
2224 int retval;
2225 int do_clocal = 0;
2226 unsigned long flags;
2227
2228 /*
2229 * If non-blocking mode is set, or the port is not enabled,
2230 * then make the check up front and then exit.
2231 */
2232 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2233 info->flags |= ASYNC_NORMAL_ACTIVE;
2234 return (0);
2235 }
2236
2237 if (tty->termios->c_cflag & CLOCAL)
2238 do_clocal = 1;
2239
2240 /*
2241 * Block waiting for the carrier detect and the line to become
2242 * free (i.e., not in use by the callout). While we are in
2243 * this loop, info->count is dropped by one, so that
2244 * mxser_close() knows when to free things. We restore it upon
2245 * exit, either normal or abnormal.
2246 */
2247 retval = 0;
2248 add_wait_queue(&info->open_wait, &wait);
2249
2250 spin_lock_irqsave(&info->slock, flags);
2251 if (!tty_hung_up_p(filp))
2252 info->count--;
2253 spin_unlock_irqrestore(&info->slock, flags);
2254 info->blocked_open++;
2255 while (1) {
2256 spin_lock_irqsave(&info->slock, flags);
2257 outb(inb(info->base + UART_MCR) | UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
2258 spin_unlock_irqrestore(&info->slock, flags);
2259 set_current_state(TASK_INTERRUPTIBLE);
2260 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2261 if (info->flags & ASYNC_HUP_NOTIFY)
2262 retval = -EAGAIN;
2263 else
2264 retval = -ERESTARTSYS;
2265 break;
2266 }
2267 if (!(info->flags & ASYNC_CLOSING) && (do_clocal || (inb(info->base + UART_MSR) & UART_MSR_DCD)))
2268 break;
2269 if (signal_pending(current)) {
2270 retval = -ERESTARTSYS;
2271 break;
2272 }
2273 schedule();
2274 }
2275 set_current_state(TASK_RUNNING);
2276 remove_wait_queue(&info->open_wait, &wait);
2277 if (!tty_hung_up_p(filp))
2278 info->count++;
2279 info->blocked_open--;
2280 if (retval)
2281 return (retval);
2282 info->flags |= ASYNC_NORMAL_ACTIVE;
2283 return (0);
2284 }
2285
2286 static int mxser_startup(struct mxser_struct *info)
2287 {
2288
2289 unsigned long page;
2290 unsigned long flags;
2291
2292 page = __get_free_page(GFP_KERNEL);
2293 if (!page)
2294 return (-ENOMEM);
2295
2296 spin_lock_irqsave(&info->slock, flags);
2297
2298 if (info->flags & ASYNC_INITIALIZED) {
2299 free_page(page);
2300 spin_unlock_irqrestore(&info->slock, flags);
2301 return (0);
2302 }
2303
2304 if (!info->base || !info->type) {
2305 if (info->tty)
2306 set_bit(TTY_IO_ERROR, &info->tty->flags);
2307 free_page(page);
2308 spin_unlock_irqrestore(&info->slock, flags);
2309 return (0);
2310 }
2311 if (info->xmit_buf)
2312 free_page(page);
2313 else
2314 info->xmit_buf = (unsigned char *) page;
2315
2316 /*
2317 * Clear the FIFO buffers and disable them
2318 * (they will be reenabled in mxser_change_speed())
2319 */
2320 if (info->IsMoxaMustChipFlag)
2321 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
2322 else
2323 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), info->base + UART_FCR);
2324
2325 /*
2326 * At this point there's no way the LSR could still be 0xFF;
2327 * if it is, then bail out, because there's likely no UART
2328 * here.
2329 */
2330 if (inb(info->base + UART_LSR) == 0xff) {
2331 spin_unlock_irqrestore(&info->slock, flags);
2332 if (capable(CAP_SYS_ADMIN)) {
2333 if (info->tty)
2334 set_bit(TTY_IO_ERROR, &info->tty->flags);
2335 return (0);
2336 } else
2337 return (-ENODEV);
2338 }
2339
2340 /*
2341 * Clear the interrupt registers.
2342 */
2343 (void) inb(info->base + UART_LSR);
2344 (void) inb(info->base + UART_RX);
2345 (void) inb(info->base + UART_IIR);
2346 (void) inb(info->base + UART_MSR);
2347
2348 /*
2349 * Now, initialize the UART
2350 */
2351 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2352 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2353 outb(info->MCR, info->base + UART_MCR);
2354
2355 /*
2356 * Finally, enable interrupts
2357 */
2358 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
2359 // info->IER = UART_IER_RLSI | UART_IER_RDI;
2360
2361 // following add by Victor Yu. 08-30-2002
2362 if (info->IsMoxaMustChipFlag)
2363 info->IER |= MOXA_MUST_IER_EGDAI;
2364 // above add by Victor Yu. 08-30-2002
2365 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2366
2367 /*
2368 * And clear the interrupt registers again for luck.
2369 */
2370 (void) inb(info->base + UART_LSR);
2371 (void) inb(info->base + UART_RX);
2372 (void) inb(info->base + UART_IIR);
2373 (void) inb(info->base + UART_MSR);
2374
2375 if (info->tty)
2376 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2377 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2378
2379 /*
2380 * and set the speed of the serial port
2381 */
2382 spin_unlock_irqrestore(&info->slock, flags);
2383 mxser_change_speed(info, NULL);
2384
2385 info->flags |= ASYNC_INITIALIZED;
2386 return (0);
2387 }
2388
2389 /*
2390 * This routine will shutdown a serial port; interrupts maybe disabled, and
2391 * DTR is dropped if the hangup on close termio flag is on.
2392 */
2393 static void mxser_shutdown(struct mxser_struct *info)
2394 {
2395 unsigned long flags;
2396
2397 if (!(info->flags & ASYNC_INITIALIZED))
2398 return;
2399
2400 spin_lock_irqsave(&info->slock, flags);
2401
2402 /*
2403 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2404 * here so the queue might never be waken up
2405 */
2406 wake_up_interruptible(&info->delta_msr_wait);
2407
2408 /*
2409 * Free the IRQ, if necessary
2410 */
2411 if (info->xmit_buf) {
2412 free_page((unsigned long) info->xmit_buf);
2413 info->xmit_buf = NULL;
2414 }
2415
2416 info->IER = 0;
2417 outb(0x00, info->base + UART_IER);
2418
2419 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2420 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2421 outb(info->MCR, info->base + UART_MCR);
2422
2423 /* clear Rx/Tx FIFO's */
2424 // following add by Victor Yu. 08-30-2002
2425 if (info->IsMoxaMustChipFlag)
2426 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
2427 else
2428 // above add by Victor Yu. 08-30-2002
2429 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), info->base + UART_FCR);
2430
2431 /* read data port to reset things */
2432 (void) inb(info->base + UART_RX);
2433
2434 if (info->tty)
2435 set_bit(TTY_IO_ERROR, &info->tty->flags);
2436
2437 info->flags &= ~ASYNC_INITIALIZED;
2438
2439 // following add by Victor Yu. 09-23-2002
2440 if (info->IsMoxaMustChipFlag) {
2441 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
2442 }
2443 // above add by Victor Yu. 09-23-2002
2444
2445 spin_unlock_irqrestore(&info->slock, flags);
2446 }
2447
2448 /*
2449 * This routine is called to set the UART divisor registers to match
2450 * the specified baud rate for a serial port.
2451 */
2452 static int mxser_change_speed(struct mxser_struct *info, struct termios *old_termios)
2453 {
2454 unsigned cflag, cval, fcr;
2455 int ret = 0;
2456 unsigned char status;
2457 long baud;
2458 unsigned long flags;
2459
2460
2461 if (!info->tty || !info->tty->termios)
2462 return ret;
2463 cflag = info->tty->termios->c_cflag;
2464 if (!(info->base))
2465 return ret;
2466
2467
2468 #ifndef B921600
2469 #define B921600 (B460800 +1)
2470 #endif
2471 if (mxser_set_baud_method[info->port] == 0) {
2472 switch (cflag & (CBAUD | CBAUDEX)) {
2473 case B921600:
2474 baud = 921600;
2475 break;
2476 case B460800:
2477 baud = 460800;
2478 break;
2479 case B230400:
2480 baud = 230400;
2481 break;
2482 case B115200:
2483 baud = 115200;
2484 break;
2485 case B57600:
2486 baud = 57600;
2487 break;
2488 case B38400:
2489 baud = 38400;
2490 break;
2491 case B19200:
2492 baud = 19200;
2493 break;
2494 case B9600:
2495 baud = 9600;
2496 break;
2497 case B4800:
2498 baud = 4800;
2499 break;
2500 case B2400:
2501 baud = 2400;
2502 break;
2503 case B1800:
2504 baud = 1800;
2505 break;
2506 case B1200:
2507 baud = 1200;
2508 break;
2509 case B600:
2510 baud = 600;
2511 break;
2512 case B300:
2513 baud = 300;
2514 break;
2515 case B200:
2516 baud = 200;
2517 break;
2518 case B150:
2519 baud = 150;
2520 break;
2521 case B134:
2522 baud = 134;
2523 break;
2524 case B110:
2525 baud = 110;
2526 break;
2527 case B75:
2528 baud = 75;
2529 break;
2530 case B50:
2531 baud = 50;
2532 break;
2533 default:
2534 baud = 0;
2535 break;
2536 }
2537 mxser_set_baud(info, baud);
2538 }
2539
2540 /* byte size and parity */
2541 switch (cflag & CSIZE) {
2542 case CS5:
2543 cval = 0x00;
2544 break;
2545 case CS6:
2546 cval = 0x01;
2547 break;
2548 case CS7:
2549 cval = 0x02;
2550 break;
2551 case CS8:
2552 cval = 0x03;
2553 break;
2554 default:
2555 cval = 0x00;
2556 break; /* too keep GCC shut... */
2557 }
2558 if (cflag & CSTOPB)
2559 cval |= 0x04;
2560 if (cflag & PARENB)
2561 cval |= UART_LCR_PARITY;
2562 if (!(cflag & PARODD)) {
2563 cval |= UART_LCR_EPAR;
2564 }
2565 if (cflag & CMSPAR)
2566 cval |= UART_LCR_SPAR;
2567
2568 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2569 if (info->IsMoxaMustChipFlag) {
2570 fcr = UART_FCR_ENABLE_FIFO;
2571 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2572 SET_MOXA_MUST_FIFO_VALUE(info);
2573 } else
2574 fcr = 0;
2575 } else {
2576 fcr = UART_FCR_ENABLE_FIFO;
2577 // following add by Victor Yu. 08-30-2002
2578 if (info->IsMoxaMustChipFlag) {
2579 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2580 SET_MOXA_MUST_FIFO_VALUE(info);
2581 } else {
2582 // above add by Victor Yu. 08-30-2002
2583
2584 switch (info->rx_trigger) {
2585 case 1:
2586 fcr |= UART_FCR_TRIGGER_1;
2587 break;
2588 case 4:
2589 fcr |= UART_FCR_TRIGGER_4;
2590 break;
2591 case 8:
2592 fcr |= UART_FCR_TRIGGER_8;
2593 break;
2594 default:
2595 fcr |= UART_FCR_TRIGGER_14;
2596 break;
2597 }
2598 }
2599 }
2600
2601 /* CTS flow control flag and modem status interrupts */
2602 info->IER &= ~UART_IER_MSI;
2603 info->MCR &= ~UART_MCR_AFE;
2604 if (cflag & CRTSCTS) {
2605 info->flags |= ASYNC_CTS_FLOW;
2606 info->IER |= UART_IER_MSI;
2607 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2608 info->MCR |= UART_MCR_AFE;
2609 //status = mxser_get_msr(info->base, 0, info->port);
2610 /* save_flags(flags);
2611 cli();
2612 status = inb(baseaddr + UART_MSR);
2613 restore_flags(flags);*/
2614 //mxser_check_modem_status(info, status);
2615 } else {
2616 //status = mxser_get_msr(info->base, 0, info->port);
2617
2618 //MX_LOCK(&info->slock);
2619 status = inb(info->base + UART_MSR);
2620 //MX_UNLOCK(&info->slock);
2621 if (info->tty->hw_stopped) {
2622 if (status & UART_MSR_CTS) {
2623 info->tty->hw_stopped = 0;
2624 if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
2625 info->IER |= UART_IER_THRI;
2626 outb(info->IER, info->base + UART_IER);
2627 }
2628 set_bit(MXSER_EVENT_TXLOW, &info->event);
2629 schedule_work(&info->tqueue); }
2630 } else {
2631 if (!(status & UART_MSR_CTS)) {
2632 info->tty->hw_stopped = 1;
2633 if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
2634 info->IER &= ~UART_IER_THRI;
2635 outb(info->IER, info->base + UART_IER);
2636 }
2637 }
2638 }
2639 }
2640 } else {
2641 info->flags &= ~ASYNC_CTS_FLOW;
2642 }
2643 outb(info->MCR, info->base + UART_MCR);
2644 if (cflag & CLOCAL) {
2645 info->flags &= ~ASYNC_CHECK_CD;
2646 } else {
2647 info->flags |= ASYNC_CHECK_CD;
2648 info->IER |= UART_IER_MSI;
2649 }
2650 outb(info->IER, info->base + UART_IER);
2651
2652 /*
2653 * Set up parity check flag
2654 */
2655 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2656 if (I_INPCK(info->tty))
2657 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2658 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2659 info->read_status_mask |= UART_LSR_BI;
2660
2661 info->ignore_status_mask = 0;
2662
2663 if (I_IGNBRK(info->tty)) {
2664 info->ignore_status_mask |= UART_LSR_BI;
2665 info->read_status_mask |= UART_LSR_BI;
2666 /*
2667 * If we're ignore parity and break indicators, ignore
2668 * overruns too. (For real raw support).
2669 */
2670 if (I_IGNPAR(info->tty)) {
2671 info->ignore_status_mask |= UART_LSR_OE | UART_LSR_PE | UART_LSR_FE;
2672 info->read_status_mask |= UART_LSR_OE | UART_LSR_PE | UART_LSR_FE;
2673 }
2674 }
2675 // following add by Victor Yu. 09-02-2002
2676 if (info->IsMoxaMustChipFlag) {
2677 spin_lock_irqsave(&info->slock, flags);
2678 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2679 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2680 if (I_IXON(info->tty)) {
2681 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2682 } else {
2683 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2684 }
2685 if (I_IXOFF(info->tty)) {
2686 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2687 } else {
2688 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2689 }
2690 /*
2691 if ( I_IXANY(info->tty) ) {
2692 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2693 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2694 } else {
2695 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2696 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2697 }
2698 */
2699 spin_unlock_irqrestore(&info->slock, flags);
2700 }
2701 // above add by Victor Yu. 09-02-2002
2702
2703
2704 outb(fcr, info->base + UART_FCR); /* set fcr */
2705 outb(cval, info->base + UART_LCR);
2706
2707 return ret;
2708 }
2709
2710
2711 static int mxser_set_baud(struct mxser_struct *info, long newspd)
2712 {
2713 int quot = 0;
2714 unsigned char cval;
2715 int ret = 0;
2716 unsigned long flags;
2717
2718 if (!info->tty || !info->tty->termios)
2719 return ret;
2720
2721 if (!(info->base))
2722 return ret;
2723
2724 if (newspd > info->MaxCanSetBaudRate)
2725 return 0;
2726
2727 info->realbaud = newspd;
2728 if (newspd == 134) {
2729 quot = (2 * info->baud_base / 269);
2730 } else if (newspd) {
2731 quot = info->baud_base / newspd;
2732
2733 if (quot == 0)
2734 quot = 1;
2735
2736 } else {
2737 quot = 0;
2738 }
2739
2740 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2741 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2742
2743 if (quot) {
2744 spin_lock_irqsave(&info->slock, flags);
2745 info->MCR |= UART_MCR_DTR;
2746 outb(info->MCR, info->base + UART_MCR);
2747 spin_unlock_irqrestore(&info->slock, flags);
2748 } else {
2749 spin_lock_irqsave(&info->slock, flags);
2750 info->MCR &= ~UART_MCR_DTR;
2751 outb(info->MCR, info->base + UART_MCR);
2752 spin_unlock_irqrestore(&info->slock, flags);
2753 return ret;
2754 }
2755
2756 cval = inb(info->base + UART_LCR);
2757
2758 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2759
2760 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2761 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2762 outb(cval, info->base + UART_LCR); /* reset DLAB */
2763
2764
2765 return ret;
2766 }
2767
2768
2769
2770 /*
2771 * ------------------------------------------------------------
2772 * friends of mxser_ioctl()
2773 * ------------------------------------------------------------
2774 */
2775 static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2776 {
2777 struct serial_struct tmp;
2778
2779 if (!retinfo)
2780 return (-EFAULT);
2781 memset(&tmp, 0, sizeof(tmp));
2782 tmp.type = info->type;
2783 tmp.line = info->port;
2784 tmp.port = info->base;
2785 tmp.irq = info->irq;
2786 tmp.flags = info->flags;
2787 tmp.baud_base = info->baud_base;
2788 tmp.close_delay = info->close_delay;
2789 tmp.closing_wait = info->closing_wait;
2790 tmp.custom_divisor = info->custom_divisor;
2791 tmp.hub6 = 0;
2792 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2793 return -EFAULT;
2794 return (0);
2795 }
2796
2797 static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2798 {
2799 struct serial_struct new_serial;
2800 unsigned int flags;
2801 int retval = 0;
2802
2803 if (!new_info || !info->base)
2804 return (-EFAULT);
2805 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2806 return -EFAULT;
2807
2808 if ((new_serial.irq != info->irq) || (new_serial.port != info->base) || (new_serial.custom_divisor != info->custom_divisor) || (new_serial.baud_base != info->baud_base))
2809 return (-EPERM);
2810
2811 flags = info->flags & ASYNC_SPD_MASK;
2812
2813 if (!capable(CAP_SYS_ADMIN)) {
2814 if ((new_serial.baud_base != info->baud_base) || (new_serial.close_delay != info->close_delay) || ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2815 return (-EPERM);
2816 info->flags = ((info->flags & ~ASYNC_USR_MASK) | (new_serial.flags & ASYNC_USR_MASK));
2817 } else {
2818 /*
2819 * OK, past this point, all the error checking has been done.
2820 * At this point, we start making changes.....
2821 */
2822 info->flags = ((info->flags & ~ASYNC_FLAGS) | (new_serial.flags & ASYNC_FLAGS));
2823 info->close_delay = new_serial.close_delay * HZ / 100;
2824 info->closing_wait = new_serial.closing_wait * HZ / 100;
2825 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2826 info->tty->low_latency = 0; //(info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2827 }
2828
2829 /* added by casper, 3/17/2000, for mouse */
2830 info->type = new_serial.type;
2831
2832 process_txrx_fifo(info);
2833
2834 /* */
2835 if (info->flags & ASYNC_INITIALIZED) {
2836 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2837 mxser_change_speed(info, NULL);
2838 }
2839 } else {
2840 retval = mxser_startup(info);
2841 }
2842 return (retval);
2843 }
2844
2845 /*
2846 * mxser_get_lsr_info - get line status register info
2847 *
2848 * Purpose: Let user call ioctl() to get info when the UART physically
2849 * is emptied. On bus types like RS485, the transmitter must
2850 * release the bus after transmitting. This must be done when
2851 * the transmit shift register is empty, not be done when the
2852 * transmit holding register is empty. This functionality
2853 * allows an RS485 driver to be written in user space.
2854 */
2855 static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2856 {
2857 unsigned char status;
2858 unsigned int result;
2859 unsigned long flags;
2860
2861 spin_lock_irqsave(&info->slock, flags);
2862 status = inb(info->base + UART_LSR);
2863 spin_unlock_irqrestore(&info->slock, flags);
2864 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2865 return put_user(result, value);
2866 }
2867
2868 /*
2869 * This routine sends a break character out the serial port.
2870 */
2871 static void mxser_send_break(struct mxser_struct *info, int duration)
2872 {
2873 unsigned long flags;
2874
2875 if (!info->base)
2876 return;
2877 set_current_state(TASK_INTERRUPTIBLE);
2878 spin_lock_irqsave(&info->slock, flags);
2879 outb(inb(info->base + UART_LCR) | UART_LCR_SBC, info->base + UART_LCR);
2880 spin_unlock_irqrestore(&info->slock, flags);
2881 schedule_timeout(duration);
2882 spin_lock_irqsave(&info->slock, flags);
2883 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC, info->base + UART_LCR);
2884 spin_unlock_irqrestore(&info->slock, flags);
2885 }
2886
2887 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2888 {
2889 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
2890 unsigned char control, status;
2891 unsigned long flags;
2892
2893
2894 if (tty->index == MXSER_PORTS)
2895 return (-ENOIOCTLCMD);
2896 if (tty->flags & (1 << TTY_IO_ERROR))
2897 return (-EIO);
2898
2899 control = info->MCR;
2900
2901 spin_lock_irqsave(&info->slock, flags);
2902 status = inb(info->base + UART_MSR);
2903 if (status & UART_MSR_ANY_DELTA)
2904 mxser_check_modem_status(info, status);
2905 spin_unlock_irqrestore(&info->slock, flags);
2906 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
2907 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
2908 }
2909
2910 static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
2911 {
2912 struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
2913 unsigned long flags;
2914
2915
2916 if (tty->index == MXSER_PORTS)
2917 return -ENOIOCTLCMD;
2918 if (tty->flags & (1 << TTY_IO_ERROR))
2919 return -EIO;
2920
2921 spin_lock_irqsave(&info->slock, flags);
2922
2923 if (set & TIOCM_RTS)
2924 info->MCR |= UART_MCR_RTS;
2925 if (set & TIOCM_DTR)
2926 info->MCR |= UART_MCR_DTR;
2927
2928 if (clear & TIOCM_RTS)
2929 info->MCR &= ~UART_MCR_RTS;
2930 if (clear & TIOCM_DTR)
2931 info->MCR &= ~UART_MCR_DTR;
2932
2933 outb(info->MCR, info->base + UART_MCR);
2934 spin_unlock_irqrestore(&info->slock, flags);
2935 return 0;
2936 }
2937
2938
2939 static int mxser_read_register(int, unsigned short *);
2940 static int mxser_program_mode(int);
2941 static void mxser_normal_mode(int);
2942
2943 static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
2944 {
2945 int id, i, bits;
2946 unsigned short regs[16], irq;
2947 unsigned char scratch, scratch2;
2948
2949 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
2950
2951 id = mxser_read_register(cap, regs);
2952 if (id == C168_ASIC_ID) {
2953 hwconf->board_type = MXSER_BOARD_C168_ISA;
2954 hwconf->ports = 8;
2955 } else if (id == C104_ASIC_ID) {
2956 hwconf->board_type = MXSER_BOARD_C104_ISA;
2957 hwconf->ports = 4;
2958 } else if (id == C102_ASIC_ID) {
2959 hwconf->board_type = MXSER_BOARD_C102_ISA;
2960 hwconf->ports = 2;
2961 } else if (id == CI132_ASIC_ID) {
2962 hwconf->board_type = MXSER_BOARD_CI132;
2963 hwconf->ports = 2;
2964 } else if (id == CI134_ASIC_ID) {
2965 hwconf->board_type = MXSER_BOARD_CI134;
2966 hwconf->ports = 4;
2967 } else if (id == CI104J_ASIC_ID) {
2968 hwconf->board_type = MXSER_BOARD_CI104J;
2969 hwconf->ports = 4;
2970 } else
2971 return (0);
2972
2973 irq = 0;
2974 if (hwconf->ports == 2) {
2975 irq = regs[9] & 0xF000;
2976 irq = irq | (irq >> 4);
2977 if (irq != (regs[9] & 0xFF00))
2978 return (MXSER_ERR_IRQ_CONFLIT);
2979 } else if (hwconf->ports == 4) {
2980 irq = regs[9] & 0xF000;
2981 irq = irq | (irq >> 4);
2982 irq = irq | (irq >> 8);
2983 if (irq != regs[9])
2984 return (MXSER_ERR_IRQ_CONFLIT);
2985 } else if (hwconf->ports == 8) {
2986 irq = regs[9] & 0xF000;
2987 irq = irq | (irq >> 4);
2988 irq = irq | (irq >> 8);
2989 if ((irq != regs[9]) || (irq != regs[10]))
2990 return (MXSER_ERR_IRQ_CONFLIT);
2991 }
2992
2993 if (!irq) {
2994 return (MXSER_ERR_IRQ);
2995 }
2996 hwconf->irq = ((int) (irq & 0xF000) >> 12);
2997 for (i = 0; i < 8; i++)
2998 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
2999 if ((regs[12] & 0x80) == 0) {
3000 return (MXSER_ERR_VECTOR);
3001 }
3002 hwconf->vector = (int) regs[11]; /* interrupt vector */
3003 if (id == 1)
3004 hwconf->vector_mask = 0x00FF;
3005 else
3006 hwconf->vector_mask = 0x000F;
3007 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
3008 if (regs[12] & bits) {
3009 hwconf->baud_base[i] = 921600;
3010 hwconf->MaxCanSetBaudRate[i] = 921600; // add by Victor Yu. 09-04-2002
3011 } else {
3012 hwconf->baud_base[i] = 115200;
3013 hwconf->MaxCanSetBaudRate[i] = 115200; // add by Victor Yu. 09-04-2002
3014 }
3015 }
3016 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3017 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3018 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3019 outb(scratch2, cap + UART_LCR);
3020 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3021 scratch = inb(cap + UART_IIR);
3022
3023 if (scratch & 0xC0)
3024 hwconf->uart_type = PORT_16550A;
3025 else
3026 hwconf->uart_type = PORT_16450;
3027 if (id == 1)
3028 hwconf->ports = 8;
3029 else
3030 hwconf->ports = 4;
3031 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3032 request_region(hwconf->vector, 1, "mxser(vector)");
3033 return (hwconf->ports);
3034 }
3035
3036 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3037 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3038 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3039 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3040 #define EN_CCMD 0x000 /* Chip's command register */
3041 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3042 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3043 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3044 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3045 #define EN0_DCFG 0x00E /* Data configuration reg WR */
3046 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3047 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3048 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3049 static int mxser_read_register(int port, unsigned short *regs)
3050 {
3051 int i, k, value, id;
3052 unsigned int j;
3053
3054 id = mxser_program_mode(port);
3055 if (id < 0)
3056 return (id);
3057 for (i = 0; i < 14; i++) {
3058 k = (i & 0x3F) | 0x180;
3059 for (j = 0x100; j > 0; j >>= 1) {
3060 outb(CHIP_CS, port);
3061 if (k & j) {
3062 outb(CHIP_CS | CHIP_DO, port);
3063 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3064 } else {
3065 outb(CHIP_CS, port);
3066 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3067 }
3068 }
3069 (void) inb(port);
3070 value = 0;
3071 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3072 outb(CHIP_CS, port);
3073 outb(CHIP_CS | CHIP_SK, port);
3074 if (inb(port) & CHIP_DI)
3075 value |= j;
3076 }
3077 regs[i] = value;
3078 outb(0, port);
3079 }
3080 mxser_normal_mode(port);
3081 return (id);
3082 }
3083
3084 static int mxser_program_mode(int port)
3085 {
3086 int id, i, j, n;
3087 //unsigned long flags;
3088
3089 spin_lock(&gm_lock);
3090 outb(0, port);
3091 outb(0, port);
3092 outb(0, port);
3093 (void) inb(port);
3094 (void) inb(port);
3095 outb(0, port);
3096 (void) inb(port);
3097 //restore_flags(flags);
3098 spin_unlock(&gm_lock);
3099
3100 id = inb(port + 1) & 0x1F;
3101 if ((id != C168_ASIC_ID) && (id != C104_ASIC_ID) && (id != C102_ASIC_ID) && (id != CI132_ASIC_ID) && (id != CI134_ASIC_ID) && (id != CI104J_ASIC_ID))
3102 return (-1);
3103 for (i = 0, j = 0; i < 4; i++) {
3104 n = inb(port + 2);
3105 if (n == 'M') {
3106 j = 1;
3107 } else if ((j == 1) && (n == 1)) {
3108 j = 2;
3109 break;
3110 } else
3111 j = 0;
3112 }
3113 if (j != 2)
3114 id = -2;
3115 return (id);
3116 }
3117
3118 static void mxser_normal_mode(int port)
3119 {
3120 int i, n;
3121
3122 outb(0xA5, port + 1);
3123 outb(0x80, port + 3);
3124 outb(12, port + 0); /* 9600 bps */
3125 outb(0, port + 1);
3126 outb(0x03, port + 3); /* 8 data bits */
3127 outb(0x13, port + 4); /* loop back mode */
3128 for (i = 0; i < 16; i++) {
3129 n = inb(port + 5);
3130 if ((n & 0x61) == 0x60)
3131 break;
3132 if ((n & 1) == 1)
3133 (void) inb(port);
3134 }
3135 outb(0x00, port + 4);
3136 }
3137
3138 module_init(mxser_module_init);
3139 module_exit(mxser_module_exit);
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