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IRQ: Typedef the IRQ handler function type
[mirror_ubuntu-jammy-kernel.git] / drivers / char / pcmcia / synclink_cs.c
1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/pci.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48 #include <linux/serial.h>
49 #include <linux/major.h>
50 #include <linux/string.h>
51 #include <linux/fcntl.h>
52 #include <linux/ptrace.h>
53 #include <linux/ioport.h>
54 #include <linux/mm.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61
62 #include <asm/system.h>
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cs_types.h>
73 #include <pcmcia/cs.h>
74 #include <pcmcia/cistpl.h>
75 #include <pcmcia/cisreg.h>
76 #include <pcmcia/ds.h>
77
78 #ifdef CONFIG_HDLC_MODULE
79 #define CONFIG_HDLC 1
80 #endif
81
82 #define GET_USER(error,value,addr) error = get_user(value,addr)
83 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
84 #define PUT_USER(error,value,addr) error = put_user(value,addr)
85 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
86
87 #include <asm/uaccess.h>
88
89 #include "linux/synclink.h"
90
91 static MGSL_PARAMS default_params = {
92 MGSL_MODE_HDLC, /* unsigned long mode */
93 0, /* unsigned char loopback; */
94 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
95 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
96 0, /* unsigned long clock_speed; */
97 0xff, /* unsigned char addr_filter; */
98 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
99 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
100 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
101 9600, /* unsigned long data_rate; */
102 8, /* unsigned char data_bits; */
103 1, /* unsigned char stop_bits; */
104 ASYNC_PARITY_NONE /* unsigned char parity; */
105 };
106
107 typedef struct
108 {
109 int count;
110 unsigned char status;
111 char data[1];
112 } RXBUF;
113
114 /* The queue of BH actions to be performed */
115
116 #define BH_RECEIVE 1
117 #define BH_TRANSMIT 2
118 #define BH_STATUS 4
119
120 #define IO_PIN_SHUTDOWN_LIMIT 100
121
122 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
123
124 struct _input_signal_events {
125 int ri_up;
126 int ri_down;
127 int dsr_up;
128 int dsr_down;
129 int dcd_up;
130 int dcd_down;
131 int cts_up;
132 int cts_down;
133 };
134
135
136 /*
137 * Device instance data structure
138 */
139
140 typedef struct _mgslpc_info {
141 void *if_ptr; /* General purpose pointer (used by SPPP) */
142 int magic;
143 int flags;
144 int count; /* count of opens */
145 int line;
146 unsigned short close_delay;
147 unsigned short closing_wait; /* time to wait before closing */
148
149 struct mgsl_icount icount;
150
151 struct tty_struct *tty;
152 int timeout;
153 int x_char; /* xon/xoff character */
154 int blocked_open; /* # of blocked opens */
155 unsigned char read_status_mask;
156 unsigned char ignore_status_mask;
157
158 unsigned char *tx_buf;
159 int tx_put;
160 int tx_get;
161 int tx_count;
162
163 /* circular list of fixed length rx buffers */
164
165 unsigned char *rx_buf; /* memory allocated for all rx buffers */
166 int rx_buf_total_size; /* size of memory allocated for rx buffers */
167 int rx_put; /* index of next empty rx buffer */
168 int rx_get; /* index of next full rx buffer */
169 int rx_buf_size; /* size in bytes of single rx buffer */
170 int rx_buf_count; /* total number of rx buffers */
171 int rx_frame_count; /* number of full rx buffers */
172
173 wait_queue_head_t open_wait;
174 wait_queue_head_t close_wait;
175
176 wait_queue_head_t status_event_wait_q;
177 wait_queue_head_t event_wait_q;
178 struct timer_list tx_timer; /* HDLC transmit timeout timer */
179 struct _mgslpc_info *next_device; /* device list link */
180
181 unsigned short imra_value;
182 unsigned short imrb_value;
183 unsigned char pim_value;
184
185 spinlock_t lock;
186 struct work_struct task; /* task structure for scheduling bh */
187
188 u32 max_frame_size;
189
190 u32 pending_bh;
191
192 int bh_running;
193 int bh_requested;
194
195 int dcd_chkcount; /* check counts to prevent */
196 int cts_chkcount; /* too many IRQs if a signal */
197 int dsr_chkcount; /* is floating */
198 int ri_chkcount;
199
200 int rx_enabled;
201 int rx_overflow;
202
203 int tx_enabled;
204 int tx_active;
205 int tx_aborting;
206 u32 idle_mode;
207
208 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
209
210 char device_name[25]; /* device instance name */
211
212 unsigned int io_base; /* base I/O address of adapter */
213 unsigned int irq_level;
214
215 MGSL_PARAMS params; /* communications parameters */
216
217 unsigned char serial_signals; /* current serial signal states */
218
219 char irq_occurred; /* for diagnostics use */
220 char testing_irq;
221 unsigned int init_error; /* startup error (DIAGS) */
222
223 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
224 BOOLEAN drop_rts_on_tx_done;
225
226 struct _input_signal_events input_signal_events;
227
228 /* PCMCIA support */
229 struct pcmcia_device *p_dev;
230 dev_node_t node;
231 int stop;
232
233 /* SPPP/Cisco HDLC device parts */
234 int netcount;
235 int dosyncppp;
236 spinlock_t netlock;
237
238 #ifdef CONFIG_HDLC
239 struct net_device *netdev;
240 #endif
241
242 } MGSLPC_INFO;
243
244 #define MGSLPC_MAGIC 0x5402
245
246 /*
247 * The size of the serial xmit buffer is 1 page, or 4096 bytes
248 */
249 #define TXBUFSIZE 4096
250
251
252 #define CHA 0x00 /* channel A offset */
253 #define CHB 0x40 /* channel B offset */
254
255 /*
256 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
257 */
258 #undef PVR
259
260 #define RXFIFO 0
261 #define TXFIFO 0
262 #define STAR 0x20
263 #define CMDR 0x20
264 #define RSTA 0x21
265 #define PRE 0x21
266 #define MODE 0x22
267 #define TIMR 0x23
268 #define XAD1 0x24
269 #define XAD2 0x25
270 #define RAH1 0x26
271 #define RAH2 0x27
272 #define DAFO 0x27
273 #define RAL1 0x28
274 #define RFC 0x28
275 #define RHCR 0x29
276 #define RAL2 0x29
277 #define RBCL 0x2a
278 #define XBCL 0x2a
279 #define RBCH 0x2b
280 #define XBCH 0x2b
281 #define CCR0 0x2c
282 #define CCR1 0x2d
283 #define CCR2 0x2e
284 #define CCR3 0x2f
285 #define VSTR 0x34
286 #define BGR 0x34
287 #define RLCR 0x35
288 #define AML 0x36
289 #define AMH 0x37
290 #define GIS 0x38
291 #define IVA 0x38
292 #define IPC 0x39
293 #define ISR 0x3a
294 #define IMR 0x3a
295 #define PVR 0x3c
296 #define PIS 0x3d
297 #define PIM 0x3d
298 #define PCR 0x3e
299 #define CCR4 0x3f
300
301 // IMR/ISR
302
303 #define IRQ_BREAK_ON BIT15 // rx break detected
304 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
305 #define IRQ_ALLSENT BIT13 // all sent
306 #define IRQ_UNDERRUN BIT12 // transmit data underrun
307 #define IRQ_TIMER BIT11 // timer interrupt
308 #define IRQ_CTS BIT10 // CTS status change
309 #define IRQ_TXREPEAT BIT9 // tx message repeat
310 #define IRQ_TXFIFO BIT8 // transmit pool ready
311 #define IRQ_RXEOM BIT7 // receive message end
312 #define IRQ_EXITHUNT BIT6 // receive frame start
313 #define IRQ_RXTIME BIT6 // rx char timeout
314 #define IRQ_DCD BIT2 // carrier detect status change
315 #define IRQ_OVERRUN BIT1 // receive frame overflow
316 #define IRQ_RXFIFO BIT0 // receive pool full
317
318 // STAR
319
320 #define XFW BIT6 // transmit FIFO write enable
321 #define CEC BIT2 // command executing
322 #define CTS BIT1 // CTS state
323
324 #define PVR_DTR BIT0
325 #define PVR_DSR BIT1
326 #define PVR_RI BIT2
327 #define PVR_AUTOCTS BIT3
328 #define PVR_RS232 0x20 /* 0010b */
329 #define PVR_V35 0xe0 /* 1110b */
330 #define PVR_RS422 0x40 /* 0100b */
331
332 /* Register access functions */
333
334 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
335 #define read_reg(info, reg) inb((info)->io_base + (reg))
336
337 #define read_reg16(info, reg) inw((info)->io_base + (reg))
338 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
339
340 #define set_reg_bits(info, reg, mask) \
341 write_reg(info, (reg), \
342 (unsigned char) (read_reg(info, (reg)) | (mask)))
343 #define clear_reg_bits(info, reg, mask) \
344 write_reg(info, (reg), \
345 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
346 /*
347 * interrupt enable/disable routines
348 */
349 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
350 {
351 if (channel == CHA) {
352 info->imra_value |= mask;
353 write_reg16(info, CHA + IMR, info->imra_value);
354 } else {
355 info->imrb_value |= mask;
356 write_reg16(info, CHB + IMR, info->imrb_value);
357 }
358 }
359 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
360 {
361 if (channel == CHA) {
362 info->imra_value &= ~mask;
363 write_reg16(info, CHA + IMR, info->imra_value);
364 } else {
365 info->imrb_value &= ~mask;
366 write_reg16(info, CHB + IMR, info->imrb_value);
367 }
368 }
369
370 #define port_irq_disable(info, mask) \
371 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
372
373 #define port_irq_enable(info, mask) \
374 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
375
376 static void rx_start(MGSLPC_INFO *info);
377 static void rx_stop(MGSLPC_INFO *info);
378
379 static void tx_start(MGSLPC_INFO *info);
380 static void tx_stop(MGSLPC_INFO *info);
381 static void tx_set_idle(MGSLPC_INFO *info);
382
383 static void get_signals(MGSLPC_INFO *info);
384 static void set_signals(MGSLPC_INFO *info);
385
386 static void reset_device(MGSLPC_INFO *info);
387
388 static void hdlc_mode(MGSLPC_INFO *info);
389 static void async_mode(MGSLPC_INFO *info);
390
391 static void tx_timeout(unsigned long context);
392
393 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
394
395 #ifdef CONFIG_HDLC
396 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
397 static void hdlcdev_tx_done(MGSLPC_INFO *info);
398 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
399 static int hdlcdev_init(MGSLPC_INFO *info);
400 static void hdlcdev_exit(MGSLPC_INFO *info);
401 #endif
402
403 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
404
405 static BOOLEAN register_test(MGSLPC_INFO *info);
406 static BOOLEAN irq_test(MGSLPC_INFO *info);
407 static int adapter_test(MGSLPC_INFO *info);
408
409 static int claim_resources(MGSLPC_INFO *info);
410 static void release_resources(MGSLPC_INFO *info);
411 static void mgslpc_add_device(MGSLPC_INFO *info);
412 static void mgslpc_remove_device(MGSLPC_INFO *info);
413
414 static int rx_get_frame(MGSLPC_INFO *info);
415 static void rx_reset_buffers(MGSLPC_INFO *info);
416 static int rx_alloc_buffers(MGSLPC_INFO *info);
417 static void rx_free_buffers(MGSLPC_INFO *info);
418
419 static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
420
421 /*
422 * Bottom half interrupt handlers
423 */
424 static void bh_handler(void* Context);
425 static void bh_transmit(MGSLPC_INFO *info);
426 static void bh_status(MGSLPC_INFO *info);
427
428 /*
429 * ioctl handlers
430 */
431 static int tiocmget(struct tty_struct *tty, struct file *file);
432 static int tiocmset(struct tty_struct *tty, struct file *file,
433 unsigned int set, unsigned int clear);
434 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
435 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
436 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
437 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
438 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
439 static int set_txenable(MGSLPC_INFO *info, int enable);
440 static int tx_abort(MGSLPC_INFO *info);
441 static int set_rxenable(MGSLPC_INFO *info, int enable);
442 static int wait_events(MGSLPC_INFO *info, int __user *mask);
443
444 static MGSLPC_INFO *mgslpc_device_list = NULL;
445 static int mgslpc_device_count = 0;
446
447 /*
448 * Set this param to non-zero to load eax with the
449 * .text section address and breakpoint on module load.
450 * This is useful for use with gdb and add-symbol-file command.
451 */
452 static int break_on_load=0;
453
454 /*
455 * Driver major number, defaults to zero to get auto
456 * assigned major number. May be forced as module parameter.
457 */
458 static int ttymajor=0;
459
460 static int debug_level = 0;
461 static int maxframe[MAX_DEVICE_COUNT] = {0,};
462 static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
463
464 module_param(break_on_load, bool, 0);
465 module_param(ttymajor, int, 0);
466 module_param(debug_level, int, 0);
467 module_param_array(maxframe, int, NULL, 0);
468 module_param_array(dosyncppp, int, NULL, 0);
469
470 MODULE_LICENSE("GPL");
471
472 static char *driver_name = "SyncLink PC Card driver";
473 static char *driver_version = "$Revision: 4.34 $";
474
475 static struct tty_driver *serial_driver;
476
477 /* number of characters left in xmit buffer before we ask for more */
478 #define WAKEUP_CHARS 256
479
480 static void mgslpc_change_params(MGSLPC_INFO *info);
481 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
482
483 /* PCMCIA prototypes */
484
485 static int mgslpc_config(struct pcmcia_device *link);
486 static void mgslpc_release(u_long arg);
487 static void mgslpc_detach(struct pcmcia_device *p_dev);
488
489 /*
490 * 1st function defined in .text section. Calling this function in
491 * init_module() followed by a breakpoint allows a remote debugger
492 * (gdb) to get the .text address for the add-symbol-file command.
493 * This allows remote debugging of dynamically loadable modules.
494 */
495 static void* mgslpc_get_text_ptr(void)
496 {
497 return mgslpc_get_text_ptr;
498 }
499
500 /**
501 * line discipline callback wrappers
502 *
503 * The wrappers maintain line discipline references
504 * while calling into the line discipline.
505 *
506 * ldisc_flush_buffer - flush line discipline receive buffers
507 * ldisc_receive_buf - pass receive data to line discipline
508 */
509
510 static void ldisc_flush_buffer(struct tty_struct *tty)
511 {
512 struct tty_ldisc *ld = tty_ldisc_ref(tty);
513 if (ld) {
514 if (ld->flush_buffer)
515 ld->flush_buffer(tty);
516 tty_ldisc_deref(ld);
517 }
518 }
519
520 static void ldisc_receive_buf(struct tty_struct *tty,
521 const __u8 *data, char *flags, int count)
522 {
523 struct tty_ldisc *ld;
524 if (!tty)
525 return;
526 ld = tty_ldisc_ref(tty);
527 if (ld) {
528 if (ld->receive_buf)
529 ld->receive_buf(tty, data, flags, count);
530 tty_ldisc_deref(ld);
531 }
532 }
533
534 static int mgslpc_probe(struct pcmcia_device *link)
535 {
536 MGSLPC_INFO *info;
537 int ret;
538
539 if (debug_level >= DEBUG_LEVEL_INFO)
540 printk("mgslpc_attach\n");
541
542 info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
543 if (!info) {
544 printk("Error can't allocate device instance data\n");
545 return -ENOMEM;
546 }
547
548 memset(info, 0, sizeof(MGSLPC_INFO));
549 info->magic = MGSLPC_MAGIC;
550 INIT_WORK(&info->task, bh_handler, info);
551 info->max_frame_size = 4096;
552 info->close_delay = 5*HZ/10;
553 info->closing_wait = 30*HZ;
554 init_waitqueue_head(&info->open_wait);
555 init_waitqueue_head(&info->close_wait);
556 init_waitqueue_head(&info->status_event_wait_q);
557 init_waitqueue_head(&info->event_wait_q);
558 spin_lock_init(&info->lock);
559 spin_lock_init(&info->netlock);
560 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
561 info->idle_mode = HDLC_TXIDLE_FLAGS;
562 info->imra_value = 0xffff;
563 info->imrb_value = 0xffff;
564 info->pim_value = 0xff;
565
566 info->p_dev = link;
567 link->priv = info;
568
569 /* Initialize the struct pcmcia_device structure */
570
571 /* Interrupt setup */
572 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
573 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
574 link->irq.Handler = NULL;
575
576 link->conf.Attributes = 0;
577 link->conf.IntType = INT_MEMORY_AND_IO;
578
579 ret = mgslpc_config(link);
580 if (ret)
581 return ret;
582
583 mgslpc_add_device(info);
584
585 return 0;
586 }
587
588 /* Card has been inserted.
589 */
590
591 #define CS_CHECK(fn, ret) \
592 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
593
594 static int mgslpc_config(struct pcmcia_device *link)
595 {
596 MGSLPC_INFO *info = link->priv;
597 tuple_t tuple;
598 cisparse_t parse;
599 int last_fn, last_ret;
600 u_char buf[64];
601 cistpl_cftable_entry_t dflt = { 0 };
602 cistpl_cftable_entry_t *cfg;
603
604 if (debug_level >= DEBUG_LEVEL_INFO)
605 printk("mgslpc_config(0x%p)\n", link);
606
607 /* read CONFIG tuple to find its configuration registers */
608 tuple.DesiredTuple = CISTPL_CONFIG;
609 tuple.Attributes = 0;
610 tuple.TupleData = buf;
611 tuple.TupleDataMax = sizeof(buf);
612 tuple.TupleOffset = 0;
613 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
614 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
615 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
616 link->conf.ConfigBase = parse.config.base;
617 link->conf.Present = parse.config.rmask[0];
618
619 /* get CIS configuration entry */
620
621 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
622 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
623
624 cfg = &(parse.cftable_entry);
625 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
626 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
627
628 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
629 if (cfg->index == 0)
630 goto cs_failed;
631
632 link->conf.ConfigIndex = cfg->index;
633 link->conf.Attributes |= CONF_ENABLE_IRQ;
634
635 /* IO window settings */
636 link->io.NumPorts1 = 0;
637 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
638 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
639 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
640 if (!(io->flags & CISTPL_IO_8BIT))
641 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
642 if (!(io->flags & CISTPL_IO_16BIT))
643 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
644 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
645 link->io.BasePort1 = io->win[0].base;
646 link->io.NumPorts1 = io->win[0].len;
647 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
648 }
649
650 link->conf.Attributes = CONF_ENABLE_IRQ;
651 link->conf.IntType = INT_MEMORY_AND_IO;
652 link->conf.ConfigIndex = 8;
653 link->conf.Present = PRESENT_OPTION;
654
655 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
656 link->irq.Handler = mgslpc_isr;
657 link->irq.Instance = info;
658 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
659
660 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
661
662 info->io_base = link->io.BasePort1;
663 info->irq_level = link->irq.AssignedIRQ;
664
665 /* add to linked list of devices */
666 sprintf(info->node.dev_name, "mgslpc0");
667 info->node.major = info->node.minor = 0;
668 link->dev_node = &info->node;
669
670 printk(KERN_INFO "%s: index 0x%02x:",
671 info->node.dev_name, link->conf.ConfigIndex);
672 if (link->conf.Attributes & CONF_ENABLE_IRQ)
673 printk(", irq %d", link->irq.AssignedIRQ);
674 if (link->io.NumPorts1)
675 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
676 link->io.BasePort1+link->io.NumPorts1-1);
677 printk("\n");
678 return 0;
679
680 cs_failed:
681 cs_error(link, last_fn, last_ret);
682 mgslpc_release((u_long)link);
683 return -ENODEV;
684 }
685
686 /* Card has been removed.
687 * Unregister device and release PCMCIA configuration.
688 * If device is open, postpone until it is closed.
689 */
690 static void mgslpc_release(u_long arg)
691 {
692 struct pcmcia_device *link = (struct pcmcia_device *)arg;
693
694 if (debug_level >= DEBUG_LEVEL_INFO)
695 printk("mgslpc_release(0x%p)\n", link);
696
697 pcmcia_disable_device(link);
698 }
699
700 static void mgslpc_detach(struct pcmcia_device *link)
701 {
702 if (debug_level >= DEBUG_LEVEL_INFO)
703 printk("mgslpc_detach(0x%p)\n", link);
704
705 ((MGSLPC_INFO *)link->priv)->stop = 1;
706 mgslpc_release((u_long)link);
707
708 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
709 }
710
711 static int mgslpc_suspend(struct pcmcia_device *link)
712 {
713 MGSLPC_INFO *info = link->priv;
714
715 info->stop = 1;
716
717 return 0;
718 }
719
720 static int mgslpc_resume(struct pcmcia_device *link)
721 {
722 MGSLPC_INFO *info = link->priv;
723
724 info->stop = 0;
725
726 return 0;
727 }
728
729
730 static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
731 char *name, const char *routine)
732 {
733 #ifdef MGSLPC_PARANOIA_CHECK
734 static const char *badmagic =
735 "Warning: bad magic number for mgsl struct (%s) in %s\n";
736 static const char *badinfo =
737 "Warning: null mgslpc_info for (%s) in %s\n";
738
739 if (!info) {
740 printk(badinfo, name, routine);
741 return 1;
742 }
743 if (info->magic != MGSLPC_MAGIC) {
744 printk(badmagic, name, routine);
745 return 1;
746 }
747 #else
748 if (!info)
749 return 1;
750 #endif
751 return 0;
752 }
753
754
755 #define CMD_RXFIFO BIT7 // release current rx FIFO
756 #define CMD_RXRESET BIT6 // receiver reset
757 #define CMD_RXFIFO_READ BIT5
758 #define CMD_START_TIMER BIT4
759 #define CMD_TXFIFO BIT3 // release current tx FIFO
760 #define CMD_TXEOM BIT1 // transmit end message
761 #define CMD_TXRESET BIT0 // transmit reset
762
763 static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
764 {
765 int i = 0;
766 /* wait for command completion */
767 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
768 udelay(1);
769 if (i++ == 1000)
770 return FALSE;
771 }
772 return TRUE;
773 }
774
775 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
776 {
777 wait_command_complete(info, channel);
778 write_reg(info, (unsigned char) (channel + CMDR), cmd);
779 }
780
781 static void tx_pause(struct tty_struct *tty)
782 {
783 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
784 unsigned long flags;
785
786 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
787 return;
788 if (debug_level >= DEBUG_LEVEL_INFO)
789 printk("tx_pause(%s)\n",info->device_name);
790
791 spin_lock_irqsave(&info->lock,flags);
792 if (info->tx_enabled)
793 tx_stop(info);
794 spin_unlock_irqrestore(&info->lock,flags);
795 }
796
797 static void tx_release(struct tty_struct *tty)
798 {
799 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
800 unsigned long flags;
801
802 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
803 return;
804 if (debug_level >= DEBUG_LEVEL_INFO)
805 printk("tx_release(%s)\n",info->device_name);
806
807 spin_lock_irqsave(&info->lock,flags);
808 if (!info->tx_enabled)
809 tx_start(info);
810 spin_unlock_irqrestore(&info->lock,flags);
811 }
812
813 /* Return next bottom half action to perform.
814 * or 0 if nothing to do.
815 */
816 static int bh_action(MGSLPC_INFO *info)
817 {
818 unsigned long flags;
819 int rc = 0;
820
821 spin_lock_irqsave(&info->lock,flags);
822
823 if (info->pending_bh & BH_RECEIVE) {
824 info->pending_bh &= ~BH_RECEIVE;
825 rc = BH_RECEIVE;
826 } else if (info->pending_bh & BH_TRANSMIT) {
827 info->pending_bh &= ~BH_TRANSMIT;
828 rc = BH_TRANSMIT;
829 } else if (info->pending_bh & BH_STATUS) {
830 info->pending_bh &= ~BH_STATUS;
831 rc = BH_STATUS;
832 }
833
834 if (!rc) {
835 /* Mark BH routine as complete */
836 info->bh_running = 0;
837 info->bh_requested = 0;
838 }
839
840 spin_unlock_irqrestore(&info->lock,flags);
841
842 return rc;
843 }
844
845 static void bh_handler(void* Context)
846 {
847 MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
848 int action;
849
850 if (!info)
851 return;
852
853 if (debug_level >= DEBUG_LEVEL_BH)
854 printk( "%s(%d):bh_handler(%s) entry\n",
855 __FILE__,__LINE__,info->device_name);
856
857 info->bh_running = 1;
858
859 while((action = bh_action(info)) != 0) {
860
861 /* Process work item */
862 if ( debug_level >= DEBUG_LEVEL_BH )
863 printk( "%s(%d):bh_handler() work item action=%d\n",
864 __FILE__,__LINE__,action);
865
866 switch (action) {
867
868 case BH_RECEIVE:
869 while(rx_get_frame(info));
870 break;
871 case BH_TRANSMIT:
872 bh_transmit(info);
873 break;
874 case BH_STATUS:
875 bh_status(info);
876 break;
877 default:
878 /* unknown work item ID */
879 printk("Unknown work item ID=%08X!\n", action);
880 break;
881 }
882 }
883
884 if (debug_level >= DEBUG_LEVEL_BH)
885 printk( "%s(%d):bh_handler(%s) exit\n",
886 __FILE__,__LINE__,info->device_name);
887 }
888
889 static void bh_transmit(MGSLPC_INFO *info)
890 {
891 struct tty_struct *tty = info->tty;
892 if (debug_level >= DEBUG_LEVEL_BH)
893 printk("bh_transmit() entry on %s\n", info->device_name);
894
895 if (tty) {
896 tty_wakeup(tty);
897 wake_up_interruptible(&tty->write_wait);
898 }
899 }
900
901 static void bh_status(MGSLPC_INFO *info)
902 {
903 info->ri_chkcount = 0;
904 info->dsr_chkcount = 0;
905 info->dcd_chkcount = 0;
906 info->cts_chkcount = 0;
907 }
908
909 /* eom: non-zero = end of frame */
910 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
911 {
912 unsigned char data[2];
913 unsigned char fifo_count, read_count, i;
914 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
915
916 if (debug_level >= DEBUG_LEVEL_ISR)
917 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
918
919 if (!info->rx_enabled)
920 return;
921
922 if (info->rx_frame_count >= info->rx_buf_count) {
923 /* no more free buffers */
924 issue_command(info, CHA, CMD_RXRESET);
925 info->pending_bh |= BH_RECEIVE;
926 info->rx_overflow = 1;
927 info->icount.buf_overrun++;
928 return;
929 }
930
931 if (eom) {
932 /* end of frame, get FIFO count from RBCL register */
933 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
934 fifo_count = 32;
935 } else
936 fifo_count = 32;
937
938 do {
939 if (fifo_count == 1) {
940 read_count = 1;
941 data[0] = read_reg(info, CHA + RXFIFO);
942 } else {
943 read_count = 2;
944 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
945 }
946 fifo_count -= read_count;
947 if (!fifo_count && eom)
948 buf->status = data[--read_count];
949
950 for (i = 0; i < read_count; i++) {
951 if (buf->count >= info->max_frame_size) {
952 /* frame too large, reset receiver and reset current buffer */
953 issue_command(info, CHA, CMD_RXRESET);
954 buf->count = 0;
955 return;
956 }
957 *(buf->data + buf->count) = data[i];
958 buf->count++;
959 }
960 } while (fifo_count);
961
962 if (eom) {
963 info->pending_bh |= BH_RECEIVE;
964 info->rx_frame_count++;
965 info->rx_put++;
966 if (info->rx_put >= info->rx_buf_count)
967 info->rx_put = 0;
968 }
969 issue_command(info, CHA, CMD_RXFIFO);
970 }
971
972 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
973 {
974 unsigned char data, status, flag;
975 int fifo_count;
976 int work = 0;
977 struct tty_struct *tty = info->tty;
978 struct mgsl_icount *icount = &info->icount;
979
980 if (tcd) {
981 /* early termination, get FIFO count from RBCL register */
982 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
983
984 /* Zero fifo count could mean 0 or 32 bytes available.
985 * If BIT5 of STAR is set then at least 1 byte is available.
986 */
987 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
988 fifo_count = 32;
989 } else
990 fifo_count = 32;
991
992 tty_buffer_request_room(tty, fifo_count);
993 /* Flush received async data to receive data buffer. */
994 while (fifo_count) {
995 data = read_reg(info, CHA + RXFIFO);
996 status = read_reg(info, CHA + RXFIFO);
997 fifo_count -= 2;
998
999 icount->rx++;
1000 flag = TTY_NORMAL;
1001
1002 // if no frameing/crc error then save data
1003 // BIT7:parity error
1004 // BIT6:framing error
1005
1006 if (status & (BIT7 + BIT6)) {
1007 if (status & BIT7)
1008 icount->parity++;
1009 else
1010 icount->frame++;
1011
1012 /* discard char if tty control flags say so */
1013 if (status & info->ignore_status_mask)
1014 continue;
1015
1016 status &= info->read_status_mask;
1017
1018 if (status & BIT7)
1019 flag = TTY_PARITY;
1020 else if (status & BIT6)
1021 flag = TTY_FRAME;
1022 }
1023 work += tty_insert_flip_char(tty, data, flag);
1024 }
1025 issue_command(info, CHA, CMD_RXFIFO);
1026
1027 if (debug_level >= DEBUG_LEVEL_ISR) {
1028 printk("%s(%d):rx_ready_async",
1029 __FILE__,__LINE__);
1030 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1031 __FILE__,__LINE__,icount->rx,icount->brk,
1032 icount->parity,icount->frame,icount->overrun);
1033 }
1034
1035 if (work)
1036 tty_flip_buffer_push(tty);
1037 }
1038
1039
1040 static void tx_done(MGSLPC_INFO *info)
1041 {
1042 if (!info->tx_active)
1043 return;
1044
1045 info->tx_active = 0;
1046 info->tx_aborting = 0;
1047
1048 if (info->params.mode == MGSL_MODE_ASYNC)
1049 return;
1050
1051 info->tx_count = info->tx_put = info->tx_get = 0;
1052 del_timer(&info->tx_timer);
1053
1054 if (info->drop_rts_on_tx_done) {
1055 get_signals(info);
1056 if (info->serial_signals & SerialSignal_RTS) {
1057 info->serial_signals &= ~SerialSignal_RTS;
1058 set_signals(info);
1059 }
1060 info->drop_rts_on_tx_done = 0;
1061 }
1062
1063 #ifdef CONFIG_HDLC
1064 if (info->netcount)
1065 hdlcdev_tx_done(info);
1066 else
1067 #endif
1068 {
1069 if (info->tty->stopped || info->tty->hw_stopped) {
1070 tx_stop(info);
1071 return;
1072 }
1073 info->pending_bh |= BH_TRANSMIT;
1074 }
1075 }
1076
1077 static void tx_ready(MGSLPC_INFO *info)
1078 {
1079 unsigned char fifo_count = 32;
1080 int c;
1081
1082 if (debug_level >= DEBUG_LEVEL_ISR)
1083 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1084
1085 if (info->params.mode == MGSL_MODE_HDLC) {
1086 if (!info->tx_active)
1087 return;
1088 } else {
1089 if (info->tty->stopped || info->tty->hw_stopped) {
1090 tx_stop(info);
1091 return;
1092 }
1093 if (!info->tx_count)
1094 info->tx_active = 0;
1095 }
1096
1097 if (!info->tx_count)
1098 return;
1099
1100 while (info->tx_count && fifo_count) {
1101 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1102
1103 if (c == 1) {
1104 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1105 } else {
1106 write_reg16(info, CHA + TXFIFO,
1107 *((unsigned short*)(info->tx_buf + info->tx_get)));
1108 }
1109 info->tx_count -= c;
1110 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1111 fifo_count -= c;
1112 }
1113
1114 if (info->params.mode == MGSL_MODE_ASYNC) {
1115 if (info->tx_count < WAKEUP_CHARS)
1116 info->pending_bh |= BH_TRANSMIT;
1117 issue_command(info, CHA, CMD_TXFIFO);
1118 } else {
1119 if (info->tx_count)
1120 issue_command(info, CHA, CMD_TXFIFO);
1121 else
1122 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1123 }
1124 }
1125
1126 static void cts_change(MGSLPC_INFO *info)
1127 {
1128 get_signals(info);
1129 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1130 irq_disable(info, CHB, IRQ_CTS);
1131 info->icount.cts++;
1132 if (info->serial_signals & SerialSignal_CTS)
1133 info->input_signal_events.cts_up++;
1134 else
1135 info->input_signal_events.cts_down++;
1136 wake_up_interruptible(&info->status_event_wait_q);
1137 wake_up_interruptible(&info->event_wait_q);
1138
1139 if (info->flags & ASYNC_CTS_FLOW) {
1140 if (info->tty->hw_stopped) {
1141 if (info->serial_signals & SerialSignal_CTS) {
1142 if (debug_level >= DEBUG_LEVEL_ISR)
1143 printk("CTS tx start...");
1144 if (info->tty)
1145 info->tty->hw_stopped = 0;
1146 tx_start(info);
1147 info->pending_bh |= BH_TRANSMIT;
1148 return;
1149 }
1150 } else {
1151 if (!(info->serial_signals & SerialSignal_CTS)) {
1152 if (debug_level >= DEBUG_LEVEL_ISR)
1153 printk("CTS tx stop...");
1154 if (info->tty)
1155 info->tty->hw_stopped = 1;
1156 tx_stop(info);
1157 }
1158 }
1159 }
1160 info->pending_bh |= BH_STATUS;
1161 }
1162
1163 static void dcd_change(MGSLPC_INFO *info)
1164 {
1165 get_signals(info);
1166 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1167 irq_disable(info, CHB, IRQ_DCD);
1168 info->icount.dcd++;
1169 if (info->serial_signals & SerialSignal_DCD) {
1170 info->input_signal_events.dcd_up++;
1171 }
1172 else
1173 info->input_signal_events.dcd_down++;
1174 #ifdef CONFIG_HDLC
1175 if (info->netcount) {
1176 if (info->serial_signals & SerialSignal_DCD)
1177 netif_carrier_on(info->netdev);
1178 else
1179 netif_carrier_off(info->netdev);
1180 }
1181 #endif
1182 wake_up_interruptible(&info->status_event_wait_q);
1183 wake_up_interruptible(&info->event_wait_q);
1184
1185 if (info->flags & ASYNC_CHECK_CD) {
1186 if (debug_level >= DEBUG_LEVEL_ISR)
1187 printk("%s CD now %s...", info->device_name,
1188 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1189 if (info->serial_signals & SerialSignal_DCD)
1190 wake_up_interruptible(&info->open_wait);
1191 else {
1192 if (debug_level >= DEBUG_LEVEL_ISR)
1193 printk("doing serial hangup...");
1194 if (info->tty)
1195 tty_hangup(info->tty);
1196 }
1197 }
1198 info->pending_bh |= BH_STATUS;
1199 }
1200
1201 static void dsr_change(MGSLPC_INFO *info)
1202 {
1203 get_signals(info);
1204 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1205 port_irq_disable(info, PVR_DSR);
1206 info->icount.dsr++;
1207 if (info->serial_signals & SerialSignal_DSR)
1208 info->input_signal_events.dsr_up++;
1209 else
1210 info->input_signal_events.dsr_down++;
1211 wake_up_interruptible(&info->status_event_wait_q);
1212 wake_up_interruptible(&info->event_wait_q);
1213 info->pending_bh |= BH_STATUS;
1214 }
1215
1216 static void ri_change(MGSLPC_INFO *info)
1217 {
1218 get_signals(info);
1219 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1220 port_irq_disable(info, PVR_RI);
1221 info->icount.rng++;
1222 if (info->serial_signals & SerialSignal_RI)
1223 info->input_signal_events.ri_up++;
1224 else
1225 info->input_signal_events.ri_down++;
1226 wake_up_interruptible(&info->status_event_wait_q);
1227 wake_up_interruptible(&info->event_wait_q);
1228 info->pending_bh |= BH_STATUS;
1229 }
1230
1231 /* Interrupt service routine entry point.
1232 *
1233 * Arguments:
1234 *
1235 * irq interrupt number that caused interrupt
1236 * dev_id device ID supplied during interrupt registration
1237 * regs interrupted processor context
1238 */
1239 static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
1240 {
1241 MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1242 unsigned short isr;
1243 unsigned char gis, pis;
1244 int count=0;
1245
1246 if (debug_level >= DEBUG_LEVEL_ISR)
1247 printk("mgslpc_isr(%d) entry.\n", irq);
1248 if (!info)
1249 return IRQ_NONE;
1250
1251 if (!(info->p_dev->_locked))
1252 return IRQ_HANDLED;
1253
1254 spin_lock(&info->lock);
1255
1256 while ((gis = read_reg(info, CHA + GIS))) {
1257 if (debug_level >= DEBUG_LEVEL_ISR)
1258 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1259
1260 if ((gis & 0x70) || count > 1000) {
1261 printk("synclink_cs:hardware failed or ejected\n");
1262 break;
1263 }
1264 count++;
1265
1266 if (gis & (BIT1 + BIT0)) {
1267 isr = read_reg16(info, CHB + ISR);
1268 if (isr & IRQ_DCD)
1269 dcd_change(info);
1270 if (isr & IRQ_CTS)
1271 cts_change(info);
1272 }
1273 if (gis & (BIT3 + BIT2))
1274 {
1275 isr = read_reg16(info, CHA + ISR);
1276 if (isr & IRQ_TIMER) {
1277 info->irq_occurred = 1;
1278 irq_disable(info, CHA, IRQ_TIMER);
1279 }
1280
1281 /* receive IRQs */
1282 if (isr & IRQ_EXITHUNT) {
1283 info->icount.exithunt++;
1284 wake_up_interruptible(&info->event_wait_q);
1285 }
1286 if (isr & IRQ_BREAK_ON) {
1287 info->icount.brk++;
1288 if (info->flags & ASYNC_SAK)
1289 do_SAK(info->tty);
1290 }
1291 if (isr & IRQ_RXTIME) {
1292 issue_command(info, CHA, CMD_RXFIFO_READ);
1293 }
1294 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1295 if (info->params.mode == MGSL_MODE_HDLC)
1296 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1297 else
1298 rx_ready_async(info, isr & IRQ_RXEOM);
1299 }
1300
1301 /* transmit IRQs */
1302 if (isr & IRQ_UNDERRUN) {
1303 if (info->tx_aborting)
1304 info->icount.txabort++;
1305 else
1306 info->icount.txunder++;
1307 tx_done(info);
1308 }
1309 else if (isr & IRQ_ALLSENT) {
1310 info->icount.txok++;
1311 tx_done(info);
1312 }
1313 else if (isr & IRQ_TXFIFO)
1314 tx_ready(info);
1315 }
1316 if (gis & BIT7) {
1317 pis = read_reg(info, CHA + PIS);
1318 if (pis & BIT1)
1319 dsr_change(info);
1320 if (pis & BIT2)
1321 ri_change(info);
1322 }
1323 }
1324
1325 /* Request bottom half processing if there's something
1326 * for it to do and the bh is not already running
1327 */
1328
1329 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1330 if ( debug_level >= DEBUG_LEVEL_ISR )
1331 printk("%s(%d):%s queueing bh task.\n",
1332 __FILE__,__LINE__,info->device_name);
1333 schedule_work(&info->task);
1334 info->bh_requested = 1;
1335 }
1336
1337 spin_unlock(&info->lock);
1338
1339 if (debug_level >= DEBUG_LEVEL_ISR)
1340 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1341 __FILE__,__LINE__,irq);
1342
1343 return IRQ_HANDLED;
1344 }
1345
1346 /* Initialize and start device.
1347 */
1348 static int startup(MGSLPC_INFO * info)
1349 {
1350 int retval = 0;
1351
1352 if (debug_level >= DEBUG_LEVEL_INFO)
1353 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1354
1355 if (info->flags & ASYNC_INITIALIZED)
1356 return 0;
1357
1358 if (!info->tx_buf) {
1359 /* allocate a page of memory for a transmit buffer */
1360 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1361 if (!info->tx_buf) {
1362 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1363 __FILE__,__LINE__,info->device_name);
1364 return -ENOMEM;
1365 }
1366 }
1367
1368 info->pending_bh = 0;
1369
1370 memset(&info->icount, 0, sizeof(info->icount));
1371
1372 init_timer(&info->tx_timer);
1373 info->tx_timer.data = (unsigned long)info;
1374 info->tx_timer.function = tx_timeout;
1375
1376 /* Allocate and claim adapter resources */
1377 retval = claim_resources(info);
1378
1379 /* perform existance check and diagnostics */
1380 if ( !retval )
1381 retval = adapter_test(info);
1382
1383 if ( retval ) {
1384 if (capable(CAP_SYS_ADMIN) && info->tty)
1385 set_bit(TTY_IO_ERROR, &info->tty->flags);
1386 release_resources(info);
1387 return retval;
1388 }
1389
1390 /* program hardware for current parameters */
1391 mgslpc_change_params(info);
1392
1393 if (info->tty)
1394 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1395
1396 info->flags |= ASYNC_INITIALIZED;
1397
1398 return 0;
1399 }
1400
1401 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1402 */
1403 static void shutdown(MGSLPC_INFO * info)
1404 {
1405 unsigned long flags;
1406
1407 if (!(info->flags & ASYNC_INITIALIZED))
1408 return;
1409
1410 if (debug_level >= DEBUG_LEVEL_INFO)
1411 printk("%s(%d):mgslpc_shutdown(%s)\n",
1412 __FILE__,__LINE__, info->device_name );
1413
1414 /* clear status wait queue because status changes */
1415 /* can't happen after shutting down the hardware */
1416 wake_up_interruptible(&info->status_event_wait_q);
1417 wake_up_interruptible(&info->event_wait_q);
1418
1419 del_timer(&info->tx_timer);
1420
1421 if (info->tx_buf) {
1422 free_page((unsigned long) info->tx_buf);
1423 info->tx_buf = NULL;
1424 }
1425
1426 spin_lock_irqsave(&info->lock,flags);
1427
1428 rx_stop(info);
1429 tx_stop(info);
1430
1431 /* TODO:disable interrupts instead of reset to preserve signal states */
1432 reset_device(info);
1433
1434 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1435 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1436 set_signals(info);
1437 }
1438
1439 spin_unlock_irqrestore(&info->lock,flags);
1440
1441 release_resources(info);
1442
1443 if (info->tty)
1444 set_bit(TTY_IO_ERROR, &info->tty->flags);
1445
1446 info->flags &= ~ASYNC_INITIALIZED;
1447 }
1448
1449 static void mgslpc_program_hw(MGSLPC_INFO *info)
1450 {
1451 unsigned long flags;
1452
1453 spin_lock_irqsave(&info->lock,flags);
1454
1455 rx_stop(info);
1456 tx_stop(info);
1457 info->tx_count = info->tx_put = info->tx_get = 0;
1458
1459 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1460 hdlc_mode(info);
1461 else
1462 async_mode(info);
1463
1464 set_signals(info);
1465
1466 info->dcd_chkcount = 0;
1467 info->cts_chkcount = 0;
1468 info->ri_chkcount = 0;
1469 info->dsr_chkcount = 0;
1470
1471 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1472 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1473 get_signals(info);
1474
1475 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1476 rx_start(info);
1477
1478 spin_unlock_irqrestore(&info->lock,flags);
1479 }
1480
1481 /* Reconfigure adapter based on new parameters
1482 */
1483 static void mgslpc_change_params(MGSLPC_INFO *info)
1484 {
1485 unsigned cflag;
1486 int bits_per_char;
1487
1488 if (!info->tty || !info->tty->termios)
1489 return;
1490
1491 if (debug_level >= DEBUG_LEVEL_INFO)
1492 printk("%s(%d):mgslpc_change_params(%s)\n",
1493 __FILE__,__LINE__, info->device_name );
1494
1495 cflag = info->tty->termios->c_cflag;
1496
1497 /* if B0 rate (hangup) specified then negate DTR and RTS */
1498 /* otherwise assert DTR and RTS */
1499 if (cflag & CBAUD)
1500 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1501 else
1502 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1503
1504 /* byte size and parity */
1505
1506 switch (cflag & CSIZE) {
1507 case CS5: info->params.data_bits = 5; break;
1508 case CS6: info->params.data_bits = 6; break;
1509 case CS7: info->params.data_bits = 7; break;
1510 case CS8: info->params.data_bits = 8; break;
1511 default: info->params.data_bits = 7; break;
1512 }
1513
1514 if (cflag & CSTOPB)
1515 info->params.stop_bits = 2;
1516 else
1517 info->params.stop_bits = 1;
1518
1519 info->params.parity = ASYNC_PARITY_NONE;
1520 if (cflag & PARENB) {
1521 if (cflag & PARODD)
1522 info->params.parity = ASYNC_PARITY_ODD;
1523 else
1524 info->params.parity = ASYNC_PARITY_EVEN;
1525 #ifdef CMSPAR
1526 if (cflag & CMSPAR)
1527 info->params.parity = ASYNC_PARITY_SPACE;
1528 #endif
1529 }
1530
1531 /* calculate number of jiffies to transmit a full
1532 * FIFO (32 bytes) at specified data rate
1533 */
1534 bits_per_char = info->params.data_bits +
1535 info->params.stop_bits + 1;
1536
1537 /* if port data rate is set to 460800 or less then
1538 * allow tty settings to override, otherwise keep the
1539 * current data rate.
1540 */
1541 if (info->params.data_rate <= 460800) {
1542 info->params.data_rate = tty_get_baud_rate(info->tty);
1543 }
1544
1545 if ( info->params.data_rate ) {
1546 info->timeout = (32*HZ*bits_per_char) /
1547 info->params.data_rate;
1548 }
1549 info->timeout += HZ/50; /* Add .02 seconds of slop */
1550
1551 if (cflag & CRTSCTS)
1552 info->flags |= ASYNC_CTS_FLOW;
1553 else
1554 info->flags &= ~ASYNC_CTS_FLOW;
1555
1556 if (cflag & CLOCAL)
1557 info->flags &= ~ASYNC_CHECK_CD;
1558 else
1559 info->flags |= ASYNC_CHECK_CD;
1560
1561 /* process tty input control flags */
1562
1563 info->read_status_mask = 0;
1564 if (I_INPCK(info->tty))
1565 info->read_status_mask |= BIT7 | BIT6;
1566 if (I_IGNPAR(info->tty))
1567 info->ignore_status_mask |= BIT7 | BIT6;
1568
1569 mgslpc_program_hw(info);
1570 }
1571
1572 /* Add a character to the transmit buffer
1573 */
1574 static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1575 {
1576 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1577 unsigned long flags;
1578
1579 if (debug_level >= DEBUG_LEVEL_INFO) {
1580 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1581 __FILE__,__LINE__,ch,info->device_name);
1582 }
1583
1584 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1585 return;
1586
1587 if (!info->tx_buf)
1588 return;
1589
1590 spin_lock_irqsave(&info->lock,flags);
1591
1592 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1593 if (info->tx_count < TXBUFSIZE - 1) {
1594 info->tx_buf[info->tx_put++] = ch;
1595 info->tx_put &= TXBUFSIZE-1;
1596 info->tx_count++;
1597 }
1598 }
1599
1600 spin_unlock_irqrestore(&info->lock,flags);
1601 }
1602
1603 /* Enable transmitter so remaining characters in the
1604 * transmit buffer are sent.
1605 */
1606 static void mgslpc_flush_chars(struct tty_struct *tty)
1607 {
1608 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1609 unsigned long flags;
1610
1611 if (debug_level >= DEBUG_LEVEL_INFO)
1612 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1613 __FILE__,__LINE__,info->device_name,info->tx_count);
1614
1615 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1616 return;
1617
1618 if (info->tx_count <= 0 || tty->stopped ||
1619 tty->hw_stopped || !info->tx_buf)
1620 return;
1621
1622 if (debug_level >= DEBUG_LEVEL_INFO)
1623 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1624 __FILE__,__LINE__,info->device_name);
1625
1626 spin_lock_irqsave(&info->lock,flags);
1627 if (!info->tx_active)
1628 tx_start(info);
1629 spin_unlock_irqrestore(&info->lock,flags);
1630 }
1631
1632 /* Send a block of data
1633 *
1634 * Arguments:
1635 *
1636 * tty pointer to tty information structure
1637 * buf pointer to buffer containing send data
1638 * count size of send data in bytes
1639 *
1640 * Returns: number of characters written
1641 */
1642 static int mgslpc_write(struct tty_struct * tty,
1643 const unsigned char *buf, int count)
1644 {
1645 int c, ret = 0;
1646 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1647 unsigned long flags;
1648
1649 if (debug_level >= DEBUG_LEVEL_INFO)
1650 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1651 __FILE__,__LINE__,info->device_name,count);
1652
1653 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1654 !info->tx_buf)
1655 goto cleanup;
1656
1657 if (info->params.mode == MGSL_MODE_HDLC) {
1658 if (count > TXBUFSIZE) {
1659 ret = -EIO;
1660 goto cleanup;
1661 }
1662 if (info->tx_active)
1663 goto cleanup;
1664 else if (info->tx_count)
1665 goto start;
1666 }
1667
1668 for (;;) {
1669 c = min(count,
1670 min(TXBUFSIZE - info->tx_count - 1,
1671 TXBUFSIZE - info->tx_put));
1672 if (c <= 0)
1673 break;
1674
1675 memcpy(info->tx_buf + info->tx_put, buf, c);
1676
1677 spin_lock_irqsave(&info->lock,flags);
1678 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1679 info->tx_count += c;
1680 spin_unlock_irqrestore(&info->lock,flags);
1681
1682 buf += c;
1683 count -= c;
1684 ret += c;
1685 }
1686 start:
1687 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1688 spin_lock_irqsave(&info->lock,flags);
1689 if (!info->tx_active)
1690 tx_start(info);
1691 spin_unlock_irqrestore(&info->lock,flags);
1692 }
1693 cleanup:
1694 if (debug_level >= DEBUG_LEVEL_INFO)
1695 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1696 __FILE__,__LINE__,info->device_name,ret);
1697 return ret;
1698 }
1699
1700 /* Return the count of free bytes in transmit buffer
1701 */
1702 static int mgslpc_write_room(struct tty_struct *tty)
1703 {
1704 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1705 int ret;
1706
1707 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1708 return 0;
1709
1710 if (info->params.mode == MGSL_MODE_HDLC) {
1711 /* HDLC (frame oriented) mode */
1712 if (info->tx_active)
1713 return 0;
1714 else
1715 return HDLC_MAX_FRAME_SIZE;
1716 } else {
1717 ret = TXBUFSIZE - info->tx_count - 1;
1718 if (ret < 0)
1719 ret = 0;
1720 }
1721
1722 if (debug_level >= DEBUG_LEVEL_INFO)
1723 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1724 __FILE__,__LINE__, info->device_name, ret);
1725 return ret;
1726 }
1727
1728 /* Return the count of bytes in transmit buffer
1729 */
1730 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1731 {
1732 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1733 int rc;
1734
1735 if (debug_level >= DEBUG_LEVEL_INFO)
1736 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1737 __FILE__,__LINE__, info->device_name );
1738
1739 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1740 return 0;
1741
1742 if (info->params.mode == MGSL_MODE_HDLC)
1743 rc = info->tx_active ? info->max_frame_size : 0;
1744 else
1745 rc = info->tx_count;
1746
1747 if (debug_level >= DEBUG_LEVEL_INFO)
1748 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1749 __FILE__,__LINE__, info->device_name, rc);
1750
1751 return rc;
1752 }
1753
1754 /* Discard all data in the send buffer
1755 */
1756 static void mgslpc_flush_buffer(struct tty_struct *tty)
1757 {
1758 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1759 unsigned long flags;
1760
1761 if (debug_level >= DEBUG_LEVEL_INFO)
1762 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1763 __FILE__,__LINE__, info->device_name );
1764
1765 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1766 return;
1767
1768 spin_lock_irqsave(&info->lock,flags);
1769 info->tx_count = info->tx_put = info->tx_get = 0;
1770 del_timer(&info->tx_timer);
1771 spin_unlock_irqrestore(&info->lock,flags);
1772
1773 wake_up_interruptible(&tty->write_wait);
1774 tty_wakeup(tty);
1775 }
1776
1777 /* Send a high-priority XON/XOFF character
1778 */
1779 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1780 {
1781 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1782 unsigned long flags;
1783
1784 if (debug_level >= DEBUG_LEVEL_INFO)
1785 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1786 __FILE__,__LINE__, info->device_name, ch );
1787
1788 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1789 return;
1790
1791 info->x_char = ch;
1792 if (ch) {
1793 spin_lock_irqsave(&info->lock,flags);
1794 if (!info->tx_enabled)
1795 tx_start(info);
1796 spin_unlock_irqrestore(&info->lock,flags);
1797 }
1798 }
1799
1800 /* Signal remote device to throttle send data (our receive data)
1801 */
1802 static void mgslpc_throttle(struct tty_struct * tty)
1803 {
1804 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1805 unsigned long flags;
1806
1807 if (debug_level >= DEBUG_LEVEL_INFO)
1808 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1809 __FILE__,__LINE__, info->device_name );
1810
1811 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1812 return;
1813
1814 if (I_IXOFF(tty))
1815 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1816
1817 if (tty->termios->c_cflag & CRTSCTS) {
1818 spin_lock_irqsave(&info->lock,flags);
1819 info->serial_signals &= ~SerialSignal_RTS;
1820 set_signals(info);
1821 spin_unlock_irqrestore(&info->lock,flags);
1822 }
1823 }
1824
1825 /* Signal remote device to stop throttling send data (our receive data)
1826 */
1827 static void mgslpc_unthrottle(struct tty_struct * tty)
1828 {
1829 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1830 unsigned long flags;
1831
1832 if (debug_level >= DEBUG_LEVEL_INFO)
1833 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1834 __FILE__,__LINE__, info->device_name );
1835
1836 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1837 return;
1838
1839 if (I_IXOFF(tty)) {
1840 if (info->x_char)
1841 info->x_char = 0;
1842 else
1843 mgslpc_send_xchar(tty, START_CHAR(tty));
1844 }
1845
1846 if (tty->termios->c_cflag & CRTSCTS) {
1847 spin_lock_irqsave(&info->lock,flags);
1848 info->serial_signals |= SerialSignal_RTS;
1849 set_signals(info);
1850 spin_unlock_irqrestore(&info->lock,flags);
1851 }
1852 }
1853
1854 /* get the current serial statistics
1855 */
1856 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1857 {
1858 int err;
1859 if (debug_level >= DEBUG_LEVEL_INFO)
1860 printk("get_params(%s)\n", info->device_name);
1861 if (!user_icount) {
1862 memset(&info->icount, 0, sizeof(info->icount));
1863 } else {
1864 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1865 if (err)
1866 return -EFAULT;
1867 }
1868 return 0;
1869 }
1870
1871 /* get the current serial parameters
1872 */
1873 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1874 {
1875 int err;
1876 if (debug_level >= DEBUG_LEVEL_INFO)
1877 printk("get_params(%s)\n", info->device_name);
1878 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1879 if (err)
1880 return -EFAULT;
1881 return 0;
1882 }
1883
1884 /* set the serial parameters
1885 *
1886 * Arguments:
1887 *
1888 * info pointer to device instance data
1889 * new_params user buffer containing new serial params
1890 *
1891 * Returns: 0 if success, otherwise error code
1892 */
1893 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1894 {
1895 unsigned long flags;
1896 MGSL_PARAMS tmp_params;
1897 int err;
1898
1899 if (debug_level >= DEBUG_LEVEL_INFO)
1900 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1901 info->device_name );
1902 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1903 if (err) {
1904 if ( debug_level >= DEBUG_LEVEL_INFO )
1905 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1906 __FILE__,__LINE__,info->device_name);
1907 return -EFAULT;
1908 }
1909
1910 spin_lock_irqsave(&info->lock,flags);
1911 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1912 spin_unlock_irqrestore(&info->lock,flags);
1913
1914 mgslpc_change_params(info);
1915
1916 return 0;
1917 }
1918
1919 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1920 {
1921 int err;
1922 if (debug_level >= DEBUG_LEVEL_INFO)
1923 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1924 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1925 if (err)
1926 return -EFAULT;
1927 return 0;
1928 }
1929
1930 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1931 {
1932 unsigned long flags;
1933 if (debug_level >= DEBUG_LEVEL_INFO)
1934 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1935 spin_lock_irqsave(&info->lock,flags);
1936 info->idle_mode = idle_mode;
1937 tx_set_idle(info);
1938 spin_unlock_irqrestore(&info->lock,flags);
1939 return 0;
1940 }
1941
1942 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1943 {
1944 int err;
1945 if (debug_level >= DEBUG_LEVEL_INFO)
1946 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1947 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1948 if (err)
1949 return -EFAULT;
1950 return 0;
1951 }
1952
1953 static int set_interface(MGSLPC_INFO * info, int if_mode)
1954 {
1955 unsigned long flags;
1956 unsigned char val;
1957 if (debug_level >= DEBUG_LEVEL_INFO)
1958 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1959 spin_lock_irqsave(&info->lock,flags);
1960 info->if_mode = if_mode;
1961
1962 val = read_reg(info, PVR) & 0x0f;
1963 switch (info->if_mode)
1964 {
1965 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1966 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1967 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1968 }
1969 write_reg(info, PVR, val);
1970
1971 spin_unlock_irqrestore(&info->lock,flags);
1972 return 0;
1973 }
1974
1975 static int set_txenable(MGSLPC_INFO * info, int enable)
1976 {
1977 unsigned long flags;
1978
1979 if (debug_level >= DEBUG_LEVEL_INFO)
1980 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1981
1982 spin_lock_irqsave(&info->lock,flags);
1983 if (enable) {
1984 if (!info->tx_enabled)
1985 tx_start(info);
1986 } else {
1987 if (info->tx_enabled)
1988 tx_stop(info);
1989 }
1990 spin_unlock_irqrestore(&info->lock,flags);
1991 return 0;
1992 }
1993
1994 static int tx_abort(MGSLPC_INFO * info)
1995 {
1996 unsigned long flags;
1997
1998 if (debug_level >= DEBUG_LEVEL_INFO)
1999 printk("tx_abort(%s)\n", info->device_name);
2000
2001 spin_lock_irqsave(&info->lock,flags);
2002 if (info->tx_active && info->tx_count &&
2003 info->params.mode == MGSL_MODE_HDLC) {
2004 /* clear data count so FIFO is not filled on next IRQ.
2005 * This results in underrun and abort transmission.
2006 */
2007 info->tx_count = info->tx_put = info->tx_get = 0;
2008 info->tx_aborting = TRUE;
2009 }
2010 spin_unlock_irqrestore(&info->lock,flags);
2011 return 0;
2012 }
2013
2014 static int set_rxenable(MGSLPC_INFO * info, int enable)
2015 {
2016 unsigned long flags;
2017
2018 if (debug_level >= DEBUG_LEVEL_INFO)
2019 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2020
2021 spin_lock_irqsave(&info->lock,flags);
2022 if (enable) {
2023 if (!info->rx_enabled)
2024 rx_start(info);
2025 } else {
2026 if (info->rx_enabled)
2027 rx_stop(info);
2028 }
2029 spin_unlock_irqrestore(&info->lock,flags);
2030 return 0;
2031 }
2032
2033 /* wait for specified event to occur
2034 *
2035 * Arguments: info pointer to device instance data
2036 * mask pointer to bitmask of events to wait for
2037 * Return Value: 0 if successful and bit mask updated with
2038 * of events triggerred,
2039 * otherwise error code
2040 */
2041 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2042 {
2043 unsigned long flags;
2044 int s;
2045 int rc=0;
2046 struct mgsl_icount cprev, cnow;
2047 int events;
2048 int mask;
2049 struct _input_signal_events oldsigs, newsigs;
2050 DECLARE_WAITQUEUE(wait, current);
2051
2052 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2053 if (rc)
2054 return -EFAULT;
2055
2056 if (debug_level >= DEBUG_LEVEL_INFO)
2057 printk("wait_events(%s,%d)\n", info->device_name, mask);
2058
2059 spin_lock_irqsave(&info->lock,flags);
2060
2061 /* return immediately if state matches requested events */
2062 get_signals(info);
2063 s = info->serial_signals;
2064 events = mask &
2065 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2066 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2067 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2068 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2069 if (events) {
2070 spin_unlock_irqrestore(&info->lock,flags);
2071 goto exit;
2072 }
2073
2074 /* save current irq counts */
2075 cprev = info->icount;
2076 oldsigs = info->input_signal_events;
2077
2078 if ((info->params.mode == MGSL_MODE_HDLC) &&
2079 (mask & MgslEvent_ExitHuntMode))
2080 irq_enable(info, CHA, IRQ_EXITHUNT);
2081
2082 set_current_state(TASK_INTERRUPTIBLE);
2083 add_wait_queue(&info->event_wait_q, &wait);
2084
2085 spin_unlock_irqrestore(&info->lock,flags);
2086
2087
2088 for(;;) {
2089 schedule();
2090 if (signal_pending(current)) {
2091 rc = -ERESTARTSYS;
2092 break;
2093 }
2094
2095 /* get current irq counts */
2096 spin_lock_irqsave(&info->lock,flags);
2097 cnow = info->icount;
2098 newsigs = info->input_signal_events;
2099 set_current_state(TASK_INTERRUPTIBLE);
2100 spin_unlock_irqrestore(&info->lock,flags);
2101
2102 /* if no change, wait aborted for some reason */
2103 if (newsigs.dsr_up == oldsigs.dsr_up &&
2104 newsigs.dsr_down == oldsigs.dsr_down &&
2105 newsigs.dcd_up == oldsigs.dcd_up &&
2106 newsigs.dcd_down == oldsigs.dcd_down &&
2107 newsigs.cts_up == oldsigs.cts_up &&
2108 newsigs.cts_down == oldsigs.cts_down &&
2109 newsigs.ri_up == oldsigs.ri_up &&
2110 newsigs.ri_down == oldsigs.ri_down &&
2111 cnow.exithunt == cprev.exithunt &&
2112 cnow.rxidle == cprev.rxidle) {
2113 rc = -EIO;
2114 break;
2115 }
2116
2117 events = mask &
2118 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2119 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2120 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2121 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2122 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2123 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2124 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2125 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2126 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2127 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2128 if (events)
2129 break;
2130
2131 cprev = cnow;
2132 oldsigs = newsigs;
2133 }
2134
2135 remove_wait_queue(&info->event_wait_q, &wait);
2136 set_current_state(TASK_RUNNING);
2137
2138 if (mask & MgslEvent_ExitHuntMode) {
2139 spin_lock_irqsave(&info->lock,flags);
2140 if (!waitqueue_active(&info->event_wait_q))
2141 irq_disable(info, CHA, IRQ_EXITHUNT);
2142 spin_unlock_irqrestore(&info->lock,flags);
2143 }
2144 exit:
2145 if (rc == 0)
2146 PUT_USER(rc, events, mask_ptr);
2147 return rc;
2148 }
2149
2150 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2151 {
2152 unsigned long flags;
2153 int rc;
2154 struct mgsl_icount cprev, cnow;
2155 DECLARE_WAITQUEUE(wait, current);
2156
2157 /* save current irq counts */
2158 spin_lock_irqsave(&info->lock,flags);
2159 cprev = info->icount;
2160 add_wait_queue(&info->status_event_wait_q, &wait);
2161 set_current_state(TASK_INTERRUPTIBLE);
2162 spin_unlock_irqrestore(&info->lock,flags);
2163
2164 for(;;) {
2165 schedule();
2166 if (signal_pending(current)) {
2167 rc = -ERESTARTSYS;
2168 break;
2169 }
2170
2171 /* get new irq counts */
2172 spin_lock_irqsave(&info->lock,flags);
2173 cnow = info->icount;
2174 set_current_state(TASK_INTERRUPTIBLE);
2175 spin_unlock_irqrestore(&info->lock,flags);
2176
2177 /* if no change, wait aborted for some reason */
2178 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2179 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2180 rc = -EIO;
2181 break;
2182 }
2183
2184 /* check for change in caller specified modem input */
2185 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2186 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2187 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2188 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2189 rc = 0;
2190 break;
2191 }
2192
2193 cprev = cnow;
2194 }
2195 remove_wait_queue(&info->status_event_wait_q, &wait);
2196 set_current_state(TASK_RUNNING);
2197 return rc;
2198 }
2199
2200 /* return the state of the serial control and status signals
2201 */
2202 static int tiocmget(struct tty_struct *tty, struct file *file)
2203 {
2204 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2205 unsigned int result;
2206 unsigned long flags;
2207
2208 spin_lock_irqsave(&info->lock,flags);
2209 get_signals(info);
2210 spin_unlock_irqrestore(&info->lock,flags);
2211
2212 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2213 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2214 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2215 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2216 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2217 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2218
2219 if (debug_level >= DEBUG_LEVEL_INFO)
2220 printk("%s(%d):%s tiocmget() value=%08X\n",
2221 __FILE__,__LINE__, info->device_name, result );
2222 return result;
2223 }
2224
2225 /* set modem control signals (DTR/RTS)
2226 */
2227 static int tiocmset(struct tty_struct *tty, struct file *file,
2228 unsigned int set, unsigned int clear)
2229 {
2230 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2231 unsigned long flags;
2232
2233 if (debug_level >= DEBUG_LEVEL_INFO)
2234 printk("%s(%d):%s tiocmset(%x,%x)\n",
2235 __FILE__,__LINE__,info->device_name, set, clear);
2236
2237 if (set & TIOCM_RTS)
2238 info->serial_signals |= SerialSignal_RTS;
2239 if (set & TIOCM_DTR)
2240 info->serial_signals |= SerialSignal_DTR;
2241 if (clear & TIOCM_RTS)
2242 info->serial_signals &= ~SerialSignal_RTS;
2243 if (clear & TIOCM_DTR)
2244 info->serial_signals &= ~SerialSignal_DTR;
2245
2246 spin_lock_irqsave(&info->lock,flags);
2247 set_signals(info);
2248 spin_unlock_irqrestore(&info->lock,flags);
2249
2250 return 0;
2251 }
2252
2253 /* Set or clear transmit break condition
2254 *
2255 * Arguments: tty pointer to tty instance data
2256 * break_state -1=set break condition, 0=clear
2257 */
2258 static void mgslpc_break(struct tty_struct *tty, int break_state)
2259 {
2260 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2261 unsigned long flags;
2262
2263 if (debug_level >= DEBUG_LEVEL_INFO)
2264 printk("%s(%d):mgslpc_break(%s,%d)\n",
2265 __FILE__,__LINE__, info->device_name, break_state);
2266
2267 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2268 return;
2269
2270 spin_lock_irqsave(&info->lock,flags);
2271 if (break_state == -1)
2272 set_reg_bits(info, CHA+DAFO, BIT6);
2273 else
2274 clear_reg_bits(info, CHA+DAFO, BIT6);
2275 spin_unlock_irqrestore(&info->lock,flags);
2276 }
2277
2278 /* Service an IOCTL request
2279 *
2280 * Arguments:
2281 *
2282 * tty pointer to tty instance data
2283 * file pointer to associated file object for device
2284 * cmd IOCTL command code
2285 * arg command argument/context
2286 *
2287 * Return Value: 0 if success, otherwise error code
2288 */
2289 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2290 unsigned int cmd, unsigned long arg)
2291 {
2292 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2293
2294 if (debug_level >= DEBUG_LEVEL_INFO)
2295 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2296 info->device_name, cmd );
2297
2298 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2299 return -ENODEV;
2300
2301 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2302 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2303 if (tty->flags & (1 << TTY_IO_ERROR))
2304 return -EIO;
2305 }
2306
2307 return ioctl_common(info, cmd, arg);
2308 }
2309
2310 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2311 {
2312 int error;
2313 struct mgsl_icount cnow; /* kernel counter temps */
2314 struct serial_icounter_struct __user *p_cuser; /* user space */
2315 void __user *argp = (void __user *)arg;
2316 unsigned long flags;
2317
2318 switch (cmd) {
2319 case MGSL_IOCGPARAMS:
2320 return get_params(info, argp);
2321 case MGSL_IOCSPARAMS:
2322 return set_params(info, argp);
2323 case MGSL_IOCGTXIDLE:
2324 return get_txidle(info, argp);
2325 case MGSL_IOCSTXIDLE:
2326 return set_txidle(info, (int)arg);
2327 case MGSL_IOCGIF:
2328 return get_interface(info, argp);
2329 case MGSL_IOCSIF:
2330 return set_interface(info,(int)arg);
2331 case MGSL_IOCTXENABLE:
2332 return set_txenable(info,(int)arg);
2333 case MGSL_IOCRXENABLE:
2334 return set_rxenable(info,(int)arg);
2335 case MGSL_IOCTXABORT:
2336 return tx_abort(info);
2337 case MGSL_IOCGSTATS:
2338 return get_stats(info, argp);
2339 case MGSL_IOCWAITEVENT:
2340 return wait_events(info, argp);
2341 case TIOCMIWAIT:
2342 return modem_input_wait(info,(int)arg);
2343 case TIOCGICOUNT:
2344 spin_lock_irqsave(&info->lock,flags);
2345 cnow = info->icount;
2346 spin_unlock_irqrestore(&info->lock,flags);
2347 p_cuser = argp;
2348 PUT_USER(error,cnow.cts, &p_cuser->cts);
2349 if (error) return error;
2350 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2351 if (error) return error;
2352 PUT_USER(error,cnow.rng, &p_cuser->rng);
2353 if (error) return error;
2354 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2355 if (error) return error;
2356 PUT_USER(error,cnow.rx, &p_cuser->rx);
2357 if (error) return error;
2358 PUT_USER(error,cnow.tx, &p_cuser->tx);
2359 if (error) return error;
2360 PUT_USER(error,cnow.frame, &p_cuser->frame);
2361 if (error) return error;
2362 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2363 if (error) return error;
2364 PUT_USER(error,cnow.parity, &p_cuser->parity);
2365 if (error) return error;
2366 PUT_USER(error,cnow.brk, &p_cuser->brk);
2367 if (error) return error;
2368 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2369 if (error) return error;
2370 return 0;
2371 default:
2372 return -ENOIOCTLCMD;
2373 }
2374 return 0;
2375 }
2376
2377 /* Set new termios settings
2378 *
2379 * Arguments:
2380 *
2381 * tty pointer to tty structure
2382 * termios pointer to buffer to hold returned old termios
2383 */
2384 static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
2385 {
2386 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2387 unsigned long flags;
2388
2389 if (debug_level >= DEBUG_LEVEL_INFO)
2390 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2391 tty->driver->name );
2392
2393 /* just return if nothing has changed */
2394 if ((tty->termios->c_cflag == old_termios->c_cflag)
2395 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2396 == RELEVANT_IFLAG(old_termios->c_iflag)))
2397 return;
2398
2399 mgslpc_change_params(info);
2400
2401 /* Handle transition to B0 status */
2402 if (old_termios->c_cflag & CBAUD &&
2403 !(tty->termios->c_cflag & CBAUD)) {
2404 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2405 spin_lock_irqsave(&info->lock,flags);
2406 set_signals(info);
2407 spin_unlock_irqrestore(&info->lock,flags);
2408 }
2409
2410 /* Handle transition away from B0 status */
2411 if (!(old_termios->c_cflag & CBAUD) &&
2412 tty->termios->c_cflag & CBAUD) {
2413 info->serial_signals |= SerialSignal_DTR;
2414 if (!(tty->termios->c_cflag & CRTSCTS) ||
2415 !test_bit(TTY_THROTTLED, &tty->flags)) {
2416 info->serial_signals |= SerialSignal_RTS;
2417 }
2418 spin_lock_irqsave(&info->lock,flags);
2419 set_signals(info);
2420 spin_unlock_irqrestore(&info->lock,flags);
2421 }
2422
2423 /* Handle turning off CRTSCTS */
2424 if (old_termios->c_cflag & CRTSCTS &&
2425 !(tty->termios->c_cflag & CRTSCTS)) {
2426 tty->hw_stopped = 0;
2427 tx_release(tty);
2428 }
2429 }
2430
2431 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2432 {
2433 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2434
2435 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2436 return;
2437
2438 if (debug_level >= DEBUG_LEVEL_INFO)
2439 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2440 __FILE__,__LINE__, info->device_name, info->count);
2441
2442 if (!info->count)
2443 return;
2444
2445 if (tty_hung_up_p(filp))
2446 goto cleanup;
2447
2448 if ((tty->count == 1) && (info->count != 1)) {
2449 /*
2450 * tty->count is 1 and the tty structure will be freed.
2451 * info->count should be one in this case.
2452 * if it's not, correct it so that the port is shutdown.
2453 */
2454 printk("mgslpc_close: bad refcount; tty->count is 1, "
2455 "info->count is %d\n", info->count);
2456 info->count = 1;
2457 }
2458
2459 info->count--;
2460
2461 /* if at least one open remaining, leave hardware active */
2462 if (info->count)
2463 goto cleanup;
2464
2465 info->flags |= ASYNC_CLOSING;
2466
2467 /* set tty->closing to notify line discipline to
2468 * only process XON/XOFF characters. Only the N_TTY
2469 * discipline appears to use this (ppp does not).
2470 */
2471 tty->closing = 1;
2472
2473 /* wait for transmit data to clear all layers */
2474
2475 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2476 if (debug_level >= DEBUG_LEVEL_INFO)
2477 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2478 __FILE__,__LINE__, info->device_name );
2479 tty_wait_until_sent(tty, info->closing_wait);
2480 }
2481
2482 if (info->flags & ASYNC_INITIALIZED)
2483 mgslpc_wait_until_sent(tty, info->timeout);
2484
2485 if (tty->driver->flush_buffer)
2486 tty->driver->flush_buffer(tty);
2487
2488 ldisc_flush_buffer(tty);
2489
2490 shutdown(info);
2491
2492 tty->closing = 0;
2493 info->tty = NULL;
2494
2495 if (info->blocked_open) {
2496 if (info->close_delay) {
2497 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2498 }
2499 wake_up_interruptible(&info->open_wait);
2500 }
2501
2502 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2503
2504 wake_up_interruptible(&info->close_wait);
2505
2506 cleanup:
2507 if (debug_level >= DEBUG_LEVEL_INFO)
2508 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2509 tty->driver->name, info->count);
2510 }
2511
2512 /* Wait until the transmitter is empty.
2513 */
2514 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2515 {
2516 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2517 unsigned long orig_jiffies, char_time;
2518
2519 if (!info )
2520 return;
2521
2522 if (debug_level >= DEBUG_LEVEL_INFO)
2523 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2524 __FILE__,__LINE__, info->device_name );
2525
2526 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2527 return;
2528
2529 if (!(info->flags & ASYNC_INITIALIZED))
2530 goto exit;
2531
2532 orig_jiffies = jiffies;
2533
2534 /* Set check interval to 1/5 of estimated time to
2535 * send a character, and make it at least 1. The check
2536 * interval should also be less than the timeout.
2537 * Note: use tight timings here to satisfy the NIST-PCTS.
2538 */
2539
2540 if ( info->params.data_rate ) {
2541 char_time = info->timeout/(32 * 5);
2542 if (!char_time)
2543 char_time++;
2544 } else
2545 char_time = 1;
2546
2547 if (timeout)
2548 char_time = min_t(unsigned long, char_time, timeout);
2549
2550 if (info->params.mode == MGSL_MODE_HDLC) {
2551 while (info->tx_active) {
2552 msleep_interruptible(jiffies_to_msecs(char_time));
2553 if (signal_pending(current))
2554 break;
2555 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2556 break;
2557 }
2558 } else {
2559 while ((info->tx_count || info->tx_active) &&
2560 info->tx_enabled) {
2561 msleep_interruptible(jiffies_to_msecs(char_time));
2562 if (signal_pending(current))
2563 break;
2564 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2565 break;
2566 }
2567 }
2568
2569 exit:
2570 if (debug_level >= DEBUG_LEVEL_INFO)
2571 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2572 __FILE__,__LINE__, info->device_name );
2573 }
2574
2575 /* Called by tty_hangup() when a hangup is signaled.
2576 * This is the same as closing all open files for the port.
2577 */
2578 static void mgslpc_hangup(struct tty_struct *tty)
2579 {
2580 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2581
2582 if (debug_level >= DEBUG_LEVEL_INFO)
2583 printk("%s(%d):mgslpc_hangup(%s)\n",
2584 __FILE__,__LINE__, info->device_name );
2585
2586 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2587 return;
2588
2589 mgslpc_flush_buffer(tty);
2590 shutdown(info);
2591
2592 info->count = 0;
2593 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2594 info->tty = NULL;
2595
2596 wake_up_interruptible(&info->open_wait);
2597 }
2598
2599 /* Block the current process until the specified port
2600 * is ready to be opened.
2601 */
2602 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2603 MGSLPC_INFO *info)
2604 {
2605 DECLARE_WAITQUEUE(wait, current);
2606 int retval;
2607 int do_clocal = 0, extra_count = 0;
2608 unsigned long flags;
2609
2610 if (debug_level >= DEBUG_LEVEL_INFO)
2611 printk("%s(%d):block_til_ready on %s\n",
2612 __FILE__,__LINE__, tty->driver->name );
2613
2614 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2615 /* nonblock mode is set or port is not enabled */
2616 /* just verify that callout device is not active */
2617 info->flags |= ASYNC_NORMAL_ACTIVE;
2618 return 0;
2619 }
2620
2621 if (tty->termios->c_cflag & CLOCAL)
2622 do_clocal = 1;
2623
2624 /* Wait for carrier detect and the line to become
2625 * free (i.e., not in use by the callout). While we are in
2626 * this loop, info->count is dropped by one, so that
2627 * mgslpc_close() knows when to free things. We restore it upon
2628 * exit, either normal or abnormal.
2629 */
2630
2631 retval = 0;
2632 add_wait_queue(&info->open_wait, &wait);
2633
2634 if (debug_level >= DEBUG_LEVEL_INFO)
2635 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2636 __FILE__,__LINE__, tty->driver->name, info->count );
2637
2638 spin_lock_irqsave(&info->lock, flags);
2639 if (!tty_hung_up_p(filp)) {
2640 extra_count = 1;
2641 info->count--;
2642 }
2643 spin_unlock_irqrestore(&info->lock, flags);
2644 info->blocked_open++;
2645
2646 while (1) {
2647 if ((tty->termios->c_cflag & CBAUD)) {
2648 spin_lock_irqsave(&info->lock,flags);
2649 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2650 set_signals(info);
2651 spin_unlock_irqrestore(&info->lock,flags);
2652 }
2653
2654 set_current_state(TASK_INTERRUPTIBLE);
2655
2656 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2657 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2658 -EAGAIN : -ERESTARTSYS;
2659 break;
2660 }
2661
2662 spin_lock_irqsave(&info->lock,flags);
2663 get_signals(info);
2664 spin_unlock_irqrestore(&info->lock,flags);
2665
2666 if (!(info->flags & ASYNC_CLOSING) &&
2667 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2668 break;
2669 }
2670
2671 if (signal_pending(current)) {
2672 retval = -ERESTARTSYS;
2673 break;
2674 }
2675
2676 if (debug_level >= DEBUG_LEVEL_INFO)
2677 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2678 __FILE__,__LINE__, tty->driver->name, info->count );
2679
2680 schedule();
2681 }
2682
2683 set_current_state(TASK_RUNNING);
2684 remove_wait_queue(&info->open_wait, &wait);
2685
2686 if (extra_count)
2687 info->count++;
2688 info->blocked_open--;
2689
2690 if (debug_level >= DEBUG_LEVEL_INFO)
2691 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2692 __FILE__,__LINE__, tty->driver->name, info->count );
2693
2694 if (!retval)
2695 info->flags |= ASYNC_NORMAL_ACTIVE;
2696
2697 return retval;
2698 }
2699
2700 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2701 {
2702 MGSLPC_INFO *info;
2703 int retval, line;
2704 unsigned long flags;
2705
2706 /* verify range of specified line number */
2707 line = tty->index;
2708 if ((line < 0) || (line >= mgslpc_device_count)) {
2709 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2710 __FILE__,__LINE__,line);
2711 return -ENODEV;
2712 }
2713
2714 /* find the info structure for the specified line */
2715 info = mgslpc_device_list;
2716 while(info && info->line != line)
2717 info = info->next_device;
2718 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2719 return -ENODEV;
2720
2721 tty->driver_data = info;
2722 info->tty = tty;
2723
2724 if (debug_level >= DEBUG_LEVEL_INFO)
2725 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2726 __FILE__,__LINE__,tty->driver->name, info->count);
2727
2728 /* If port is closing, signal caller to try again */
2729 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2730 if (info->flags & ASYNC_CLOSING)
2731 interruptible_sleep_on(&info->close_wait);
2732 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2733 -EAGAIN : -ERESTARTSYS);
2734 goto cleanup;
2735 }
2736
2737 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2738
2739 spin_lock_irqsave(&info->netlock, flags);
2740 if (info->netcount) {
2741 retval = -EBUSY;
2742 spin_unlock_irqrestore(&info->netlock, flags);
2743 goto cleanup;
2744 }
2745 info->count++;
2746 spin_unlock_irqrestore(&info->netlock, flags);
2747
2748 if (info->count == 1) {
2749 /* 1st open on this device, init hardware */
2750 retval = startup(info);
2751 if (retval < 0)
2752 goto cleanup;
2753 }
2754
2755 retval = block_til_ready(tty, filp, info);
2756 if (retval) {
2757 if (debug_level >= DEBUG_LEVEL_INFO)
2758 printk("%s(%d):block_til_ready(%s) returned %d\n",
2759 __FILE__,__LINE__, info->device_name, retval);
2760 goto cleanup;
2761 }
2762
2763 if (debug_level >= DEBUG_LEVEL_INFO)
2764 printk("%s(%d):mgslpc_open(%s) success\n",
2765 __FILE__,__LINE__, info->device_name);
2766 retval = 0;
2767
2768 cleanup:
2769 if (retval) {
2770 if (tty->count == 1)
2771 info->tty = NULL; /* tty layer will release tty struct */
2772 if(info->count)
2773 info->count--;
2774 }
2775
2776 return retval;
2777 }
2778
2779 /*
2780 * /proc fs routines....
2781 */
2782
2783 static inline int line_info(char *buf, MGSLPC_INFO *info)
2784 {
2785 char stat_buf[30];
2786 int ret;
2787 unsigned long flags;
2788
2789 ret = sprintf(buf, "%s:io:%04X irq:%d",
2790 info->device_name, info->io_base, info->irq_level);
2791
2792 /* output current serial signal states */
2793 spin_lock_irqsave(&info->lock,flags);
2794 get_signals(info);
2795 spin_unlock_irqrestore(&info->lock,flags);
2796
2797 stat_buf[0] = 0;
2798 stat_buf[1] = 0;
2799 if (info->serial_signals & SerialSignal_RTS)
2800 strcat(stat_buf, "|RTS");
2801 if (info->serial_signals & SerialSignal_CTS)
2802 strcat(stat_buf, "|CTS");
2803 if (info->serial_signals & SerialSignal_DTR)
2804 strcat(stat_buf, "|DTR");
2805 if (info->serial_signals & SerialSignal_DSR)
2806 strcat(stat_buf, "|DSR");
2807 if (info->serial_signals & SerialSignal_DCD)
2808 strcat(stat_buf, "|CD");
2809 if (info->serial_signals & SerialSignal_RI)
2810 strcat(stat_buf, "|RI");
2811
2812 if (info->params.mode == MGSL_MODE_HDLC) {
2813 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2814 info->icount.txok, info->icount.rxok);
2815 if (info->icount.txunder)
2816 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2817 if (info->icount.txabort)
2818 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2819 if (info->icount.rxshort)
2820 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2821 if (info->icount.rxlong)
2822 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2823 if (info->icount.rxover)
2824 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2825 if (info->icount.rxcrc)
2826 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2827 } else {
2828 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2829 info->icount.tx, info->icount.rx);
2830 if (info->icount.frame)
2831 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2832 if (info->icount.parity)
2833 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2834 if (info->icount.brk)
2835 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2836 if (info->icount.overrun)
2837 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2838 }
2839
2840 /* Append serial signal status to end */
2841 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2842
2843 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2844 info->tx_active,info->bh_requested,info->bh_running,
2845 info->pending_bh);
2846
2847 return ret;
2848 }
2849
2850 /* Called to print information about devices
2851 */
2852 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2853 int *eof, void *data)
2854 {
2855 int len = 0, l;
2856 off_t begin = 0;
2857 MGSLPC_INFO *info;
2858
2859 len += sprintf(page, "synclink driver:%s\n", driver_version);
2860
2861 info = mgslpc_device_list;
2862 while( info ) {
2863 l = line_info(page + len, info);
2864 len += l;
2865 if (len+begin > off+count)
2866 goto done;
2867 if (len+begin < off) {
2868 begin += len;
2869 len = 0;
2870 }
2871 info = info->next_device;
2872 }
2873
2874 *eof = 1;
2875 done:
2876 if (off >= len+begin)
2877 return 0;
2878 *start = page + (off-begin);
2879 return ((count < begin+len-off) ? count : begin+len-off);
2880 }
2881
2882 static int rx_alloc_buffers(MGSLPC_INFO *info)
2883 {
2884 /* each buffer has header and data */
2885 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2886
2887 /* calculate total allocation size for 8 buffers */
2888 info->rx_buf_total_size = info->rx_buf_size * 8;
2889
2890 /* limit total allocated memory */
2891 if (info->rx_buf_total_size > 0x10000)
2892 info->rx_buf_total_size = 0x10000;
2893
2894 /* calculate number of buffers */
2895 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2896
2897 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2898 if (info->rx_buf == NULL)
2899 return -ENOMEM;
2900
2901 rx_reset_buffers(info);
2902 return 0;
2903 }
2904
2905 static void rx_free_buffers(MGSLPC_INFO *info)
2906 {
2907 kfree(info->rx_buf);
2908 info->rx_buf = NULL;
2909 }
2910
2911 static int claim_resources(MGSLPC_INFO *info)
2912 {
2913 if (rx_alloc_buffers(info) < 0 ) {
2914 printk( "Cant allocate rx buffer %s\n", info->device_name);
2915 release_resources(info);
2916 return -ENODEV;
2917 }
2918 return 0;
2919 }
2920
2921 static void release_resources(MGSLPC_INFO *info)
2922 {
2923 if (debug_level >= DEBUG_LEVEL_INFO)
2924 printk("release_resources(%s)\n", info->device_name);
2925 rx_free_buffers(info);
2926 }
2927
2928 /* Add the specified device instance data structure to the
2929 * global linked list of devices and increment the device count.
2930 *
2931 * Arguments: info pointer to device instance data
2932 */
2933 static void mgslpc_add_device(MGSLPC_INFO *info)
2934 {
2935 info->next_device = NULL;
2936 info->line = mgslpc_device_count;
2937 sprintf(info->device_name,"ttySLP%d",info->line);
2938
2939 if (info->line < MAX_DEVICE_COUNT) {
2940 if (maxframe[info->line])
2941 info->max_frame_size = maxframe[info->line];
2942 info->dosyncppp = dosyncppp[info->line];
2943 }
2944
2945 mgslpc_device_count++;
2946
2947 if (!mgslpc_device_list)
2948 mgslpc_device_list = info;
2949 else {
2950 MGSLPC_INFO *current_dev = mgslpc_device_list;
2951 while( current_dev->next_device )
2952 current_dev = current_dev->next_device;
2953 current_dev->next_device = info;
2954 }
2955
2956 if (info->max_frame_size < 4096)
2957 info->max_frame_size = 4096;
2958 else if (info->max_frame_size > 65535)
2959 info->max_frame_size = 65535;
2960
2961 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2962 info->device_name, info->io_base, info->irq_level);
2963
2964 #ifdef CONFIG_HDLC
2965 hdlcdev_init(info);
2966 #endif
2967 }
2968
2969 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2970 {
2971 MGSLPC_INFO *info = mgslpc_device_list;
2972 MGSLPC_INFO *last = NULL;
2973
2974 while(info) {
2975 if (info == remove_info) {
2976 if (last)
2977 last->next_device = info->next_device;
2978 else
2979 mgslpc_device_list = info->next_device;
2980 #ifdef CONFIG_HDLC
2981 hdlcdev_exit(info);
2982 #endif
2983 release_resources(info);
2984 kfree(info);
2985 mgslpc_device_count--;
2986 return;
2987 }
2988 last = info;
2989 info = info->next_device;
2990 }
2991 }
2992
2993 static struct pcmcia_device_id mgslpc_ids[] = {
2994 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2995 PCMCIA_DEVICE_NULL
2996 };
2997 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2998
2999 static struct pcmcia_driver mgslpc_driver = {
3000 .owner = THIS_MODULE,
3001 .drv = {
3002 .name = "synclink_cs",
3003 },
3004 .probe = mgslpc_probe,
3005 .remove = mgslpc_detach,
3006 .id_table = mgslpc_ids,
3007 .suspend = mgslpc_suspend,
3008 .resume = mgslpc_resume,
3009 };
3010
3011 static const struct tty_operations mgslpc_ops = {
3012 .open = mgslpc_open,
3013 .close = mgslpc_close,
3014 .write = mgslpc_write,
3015 .put_char = mgslpc_put_char,
3016 .flush_chars = mgslpc_flush_chars,
3017 .write_room = mgslpc_write_room,
3018 .chars_in_buffer = mgslpc_chars_in_buffer,
3019 .flush_buffer = mgslpc_flush_buffer,
3020 .ioctl = mgslpc_ioctl,
3021 .throttle = mgslpc_throttle,
3022 .unthrottle = mgslpc_unthrottle,
3023 .send_xchar = mgslpc_send_xchar,
3024 .break_ctl = mgslpc_break,
3025 .wait_until_sent = mgslpc_wait_until_sent,
3026 .read_proc = mgslpc_read_proc,
3027 .set_termios = mgslpc_set_termios,
3028 .stop = tx_pause,
3029 .start = tx_release,
3030 .hangup = mgslpc_hangup,
3031 .tiocmget = tiocmget,
3032 .tiocmset = tiocmset,
3033 };
3034
3035 static void synclink_cs_cleanup(void)
3036 {
3037 int rc;
3038
3039 printk("Unloading %s: version %s\n", driver_name, driver_version);
3040
3041 while(mgslpc_device_list)
3042 mgslpc_remove_device(mgslpc_device_list);
3043
3044 if (serial_driver) {
3045 if ((rc = tty_unregister_driver(serial_driver)))
3046 printk("%s(%d) failed to unregister tty driver err=%d\n",
3047 __FILE__,__LINE__,rc);
3048 put_tty_driver(serial_driver);
3049 }
3050
3051 pcmcia_unregister_driver(&mgslpc_driver);
3052 }
3053
3054 static int __init synclink_cs_init(void)
3055 {
3056 int rc;
3057
3058 if (break_on_load) {
3059 mgslpc_get_text_ptr();
3060 BREAKPOINT();
3061 }
3062
3063 printk("%s %s\n", driver_name, driver_version);
3064
3065 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3066 return rc;
3067
3068 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3069 if (!serial_driver) {
3070 rc = -ENOMEM;
3071 goto error;
3072 }
3073
3074 /* Initialize the tty_driver structure */
3075
3076 serial_driver->owner = THIS_MODULE;
3077 serial_driver->driver_name = "synclink_cs";
3078 serial_driver->name = "ttySLP";
3079 serial_driver->major = ttymajor;
3080 serial_driver->minor_start = 64;
3081 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3082 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3083 serial_driver->init_termios = tty_std_termios;
3084 serial_driver->init_termios.c_cflag =
3085 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3086 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3087 tty_set_operations(serial_driver, &mgslpc_ops);
3088
3089 if ((rc = tty_register_driver(serial_driver)) < 0) {
3090 printk("%s(%d):Couldn't register serial driver\n",
3091 __FILE__,__LINE__);
3092 put_tty_driver(serial_driver);
3093 serial_driver = NULL;
3094 goto error;
3095 }
3096
3097 printk("%s %s, tty major#%d\n",
3098 driver_name, driver_version,
3099 serial_driver->major);
3100
3101 return 0;
3102
3103 error:
3104 synclink_cs_cleanup();
3105 return rc;
3106 }
3107
3108 static void __exit synclink_cs_exit(void)
3109 {
3110 synclink_cs_cleanup();
3111 }
3112
3113 module_init(synclink_cs_init);
3114 module_exit(synclink_cs_exit);
3115
3116 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3117 {
3118 unsigned int M, N;
3119 unsigned char val;
3120
3121 /* note:standard BRG mode is broken in V3.2 chip
3122 * so enhanced mode is always used
3123 */
3124
3125 if (rate) {
3126 N = 3686400 / rate;
3127 if (!N)
3128 N = 1;
3129 N >>= 1;
3130 for (M = 1; N > 64 && M < 16; M++)
3131 N >>= 1;
3132 N--;
3133
3134 /* BGR[5..0] = N
3135 * BGR[9..6] = M
3136 * BGR[7..0] contained in BGR register
3137 * BGR[9..8] contained in CCR2[7..6]
3138 * divisor = (N+1)*2^M
3139 *
3140 * Note: M *must* not be zero (causes asymetric duty cycle)
3141 */
3142 write_reg(info, (unsigned char) (channel + BGR),
3143 (unsigned char) ((M << 6) + N));
3144 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3145 val |= ((M << 4) & 0xc0);
3146 write_reg(info, (unsigned char) (channel + CCR2), val);
3147 }
3148 }
3149
3150 /* Enabled the AUX clock output at the specified frequency.
3151 */
3152 static void enable_auxclk(MGSLPC_INFO *info)
3153 {
3154 unsigned char val;
3155
3156 /* MODE
3157 *
3158 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3159 * 05 ADM Address Mode, 0 = no addr recognition
3160 * 04 TMD Timer Mode, 0 = external
3161 * 03 RAC Receiver Active, 0 = inactive
3162 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3163 * 01 TRS Timer Resolution, 1=512
3164 * 00 TLP Test Loop, 0 = no loop
3165 *
3166 * 1000 0010
3167 */
3168 val = 0x82;
3169
3170 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3171 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3172 val |= BIT2;
3173 write_reg(info, CHB + MODE, val);
3174
3175 /* CCR0
3176 *
3177 * 07 PU Power Up, 1=active, 0=power down
3178 * 06 MCE Master Clock Enable, 1=enabled
3179 * 05 Reserved, 0
3180 * 04..02 SC[2..0] Encoding
3181 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3182 *
3183 * 11000000
3184 */
3185 write_reg(info, CHB + CCR0, 0xc0);
3186
3187 /* CCR1
3188 *
3189 * 07 SFLG Shared Flag, 0 = disable shared flags
3190 * 06 GALP Go Active On Loop, 0 = not used
3191 * 05 GLP Go On Loop, 0 = not used
3192 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3193 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3194 * 02..00 CM[2..0] Clock Mode
3195 *
3196 * 0001 0111
3197 */
3198 write_reg(info, CHB + CCR1, 0x17);
3199
3200 /* CCR2 (Channel B)
3201 *
3202 * 07..06 BGR[9..8] Baud rate bits 9..8
3203 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3204 * 04 SSEL Clock source select, 1=submode b
3205 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3206 * 02 RWX Read/Write Exchange 0=disabled
3207 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3208 * 00 DIV, data inversion 0=disabled, 1=enabled
3209 *
3210 * 0011 1000
3211 */
3212 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3213 write_reg(info, CHB + CCR2, 0x38);
3214 else
3215 write_reg(info, CHB + CCR2, 0x30);
3216
3217 /* CCR4
3218 *
3219 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3220 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3221 * 05 TST1 Test Pin, 0=normal operation
3222 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3223 * 03..02 Reserved, must be 0
3224 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3225 *
3226 * 0101 0000
3227 */
3228 write_reg(info, CHB + CCR4, 0x50);
3229
3230 /* if auxclk not enabled, set internal BRG so
3231 * CTS transitions can be detected (requires TxC)
3232 */
3233 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3234 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3235 else
3236 mgslpc_set_rate(info, CHB, 921600);
3237 }
3238
3239 static void loopback_enable(MGSLPC_INFO *info)
3240 {
3241 unsigned char val;
3242
3243 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3244 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3245 write_reg(info, CHA + CCR1, val);
3246
3247 /* CCR2:04 SSEL Clock source select, 1=submode b */
3248 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3249 write_reg(info, CHA + CCR2, val);
3250
3251 /* set LinkSpeed if available, otherwise default to 2Mbps */
3252 if (info->params.clock_speed)
3253 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3254 else
3255 mgslpc_set_rate(info, CHA, 1843200);
3256
3257 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3258 val = read_reg(info, CHA + MODE) | BIT0;
3259 write_reg(info, CHA + MODE, val);
3260 }
3261
3262 static void hdlc_mode(MGSLPC_INFO *info)
3263 {
3264 unsigned char val;
3265 unsigned char clkmode, clksubmode;
3266
3267 /* disable all interrupts */
3268 irq_disable(info, CHA, 0xffff);
3269 irq_disable(info, CHB, 0xffff);
3270 port_irq_disable(info, 0xff);
3271
3272 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3273 clkmode = clksubmode = 0;
3274 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3275 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3276 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3277 clkmode = 7;
3278 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3279 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3280 /* clock mode 7b, rcv = BRG, xmt = BRG */
3281 clkmode = 7;
3282 clksubmode = 1;
3283 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3284 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3285 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3286 clkmode = 6;
3287 clksubmode = 1;
3288 } else {
3289 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3290 clkmode = 6;
3291 }
3292 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3293 /* clock mode 0b, rcv = RxC, xmt = BRG */
3294 clksubmode = 1;
3295 }
3296
3297 /* MODE
3298 *
3299 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3300 * 05 ADM Address Mode, 0 = no addr recognition
3301 * 04 TMD Timer Mode, 0 = external
3302 * 03 RAC Receiver Active, 0 = inactive
3303 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3304 * 01 TRS Timer Resolution, 1=512
3305 * 00 TLP Test Loop, 0 = no loop
3306 *
3307 * 1000 0010
3308 */
3309 val = 0x82;
3310 if (info->params.loopback)
3311 val |= BIT0;
3312
3313 /* preserve RTS state */
3314 if (info->serial_signals & SerialSignal_RTS)
3315 val |= BIT2;
3316 write_reg(info, CHA + MODE, val);
3317
3318 /* CCR0
3319 *
3320 * 07 PU Power Up, 1=active, 0=power down
3321 * 06 MCE Master Clock Enable, 1=enabled
3322 * 05 Reserved, 0
3323 * 04..02 SC[2..0] Encoding
3324 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3325 *
3326 * 11000000
3327 */
3328 val = 0xc0;
3329 switch (info->params.encoding)
3330 {
3331 case HDLC_ENCODING_NRZI:
3332 val |= BIT3;
3333 break;
3334 case HDLC_ENCODING_BIPHASE_SPACE:
3335 val |= BIT4;
3336 break; // FM0
3337 case HDLC_ENCODING_BIPHASE_MARK:
3338 val |= BIT4 + BIT2;
3339 break; // FM1
3340 case HDLC_ENCODING_BIPHASE_LEVEL:
3341 val |= BIT4 + BIT3;
3342 break; // Manchester
3343 }
3344 write_reg(info, CHA + CCR0, val);
3345
3346 /* CCR1
3347 *
3348 * 07 SFLG Shared Flag, 0 = disable shared flags
3349 * 06 GALP Go Active On Loop, 0 = not used
3350 * 05 GLP Go On Loop, 0 = not used
3351 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3352 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3353 * 02..00 CM[2..0] Clock Mode
3354 *
3355 * 0001 0000
3356 */
3357 val = 0x10 + clkmode;
3358 write_reg(info, CHA + CCR1, val);
3359
3360 /* CCR2
3361 *
3362 * 07..06 BGR[9..8] Baud rate bits 9..8
3363 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3364 * 04 SSEL Clock source select, 1=submode b
3365 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3366 * 02 RWX Read/Write Exchange 0=disabled
3367 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3368 * 00 DIV, data inversion 0=disabled, 1=enabled
3369 *
3370 * 0000 0000
3371 */
3372 val = 0x00;
3373 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3374 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3375 val |= BIT5;
3376 if (clksubmode)
3377 val |= BIT4;
3378 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3379 val |= BIT1;
3380 if (info->params.encoding == HDLC_ENCODING_NRZB)
3381 val |= BIT0;
3382 write_reg(info, CHA + CCR2, val);
3383
3384 /* CCR3
3385 *
3386 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3387 * 05 EPT Enable preamble transmission, 1=enabled
3388 * 04 RADD Receive address pushed to FIFO, 0=disabled
3389 * 03 CRL CRC Reset Level, 0=FFFF
3390 * 02 RCRC Rx CRC 0=On 1=Off
3391 * 01 TCRC Tx CRC 0=On 1=Off
3392 * 00 PSD DPLL Phase Shift Disable
3393 *
3394 * 0000 0000
3395 */
3396 val = 0x00;
3397 if (info->params.crc_type == HDLC_CRC_NONE)
3398 val |= BIT2 + BIT1;
3399 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3400 val |= BIT5;
3401 switch (info->params.preamble_length)
3402 {
3403 case HDLC_PREAMBLE_LENGTH_16BITS:
3404 val |= BIT6;
3405 break;
3406 case HDLC_PREAMBLE_LENGTH_32BITS:
3407 val |= BIT6;
3408 break;
3409 case HDLC_PREAMBLE_LENGTH_64BITS:
3410 val |= BIT7 + BIT6;
3411 break;
3412 }
3413 write_reg(info, CHA + CCR3, val);
3414
3415 /* PRE - Preamble pattern */
3416 val = 0;
3417 switch (info->params.preamble)
3418 {
3419 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3420 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3421 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3422 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3423 }
3424 write_reg(info, CHA + PRE, val);
3425
3426 /* CCR4
3427 *
3428 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3429 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3430 * 05 TST1 Test Pin, 0=normal operation
3431 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3432 * 03..02 Reserved, must be 0
3433 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3434 *
3435 * 0101 0000
3436 */
3437 val = 0x50;
3438 write_reg(info, CHA + CCR4, val);
3439 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3440 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3441 else
3442 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3443
3444 /* RLCR Receive length check register
3445 *
3446 * 7 1=enable receive length check
3447 * 6..0 Max frame length = (RL + 1) * 32
3448 */
3449 write_reg(info, CHA + RLCR, 0);
3450
3451 /* XBCH Transmit Byte Count High
3452 *
3453 * 07 DMA mode, 0 = interrupt driven
3454 * 06 NRM, 0=ABM (ignored)
3455 * 05 CAS Carrier Auto Start
3456 * 04 XC Transmit Continuously (ignored)
3457 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3458 *
3459 * 0000 0000
3460 */
3461 val = 0x00;
3462 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3463 val |= BIT5;
3464 write_reg(info, CHA + XBCH, val);
3465 enable_auxclk(info);
3466 if (info->params.loopback || info->testing_irq)
3467 loopback_enable(info);
3468 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3469 {
3470 irq_enable(info, CHB, IRQ_CTS);
3471 /* PVR[3] 1=AUTO CTS active */
3472 set_reg_bits(info, CHA + PVR, BIT3);
3473 } else
3474 clear_reg_bits(info, CHA + PVR, BIT3);
3475
3476 irq_enable(info, CHA,
3477 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3478 IRQ_UNDERRUN + IRQ_TXFIFO);
3479 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3480 wait_command_complete(info, CHA);
3481 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3482
3483 /* Master clock mode enabled above to allow reset commands
3484 * to complete even if no data clocks are present.
3485 *
3486 * Disable master clock mode for normal communications because
3487 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3488 * IRQ when in master clock mode.
3489 *
3490 * Leave master clock mode enabled for IRQ test because the
3491 * timer IRQ used by the test can only happen in master clock mode.
3492 */
3493 if (!info->testing_irq)
3494 clear_reg_bits(info, CHA + CCR0, BIT6);
3495
3496 tx_set_idle(info);
3497
3498 tx_stop(info);
3499 rx_stop(info);
3500 }
3501
3502 static void rx_stop(MGSLPC_INFO *info)
3503 {
3504 if (debug_level >= DEBUG_LEVEL_ISR)
3505 printk("%s(%d):rx_stop(%s)\n",
3506 __FILE__,__LINE__, info->device_name );
3507
3508 /* MODE:03 RAC Receiver Active, 0=inactive */
3509 clear_reg_bits(info, CHA + MODE, BIT3);
3510
3511 info->rx_enabled = 0;
3512 info->rx_overflow = 0;
3513 }
3514
3515 static void rx_start(MGSLPC_INFO *info)
3516 {
3517 if (debug_level >= DEBUG_LEVEL_ISR)
3518 printk("%s(%d):rx_start(%s)\n",
3519 __FILE__,__LINE__, info->device_name );
3520
3521 rx_reset_buffers(info);
3522 info->rx_enabled = 0;
3523 info->rx_overflow = 0;
3524
3525 /* MODE:03 RAC Receiver Active, 1=active */
3526 set_reg_bits(info, CHA + MODE, BIT3);
3527
3528 info->rx_enabled = 1;
3529 }
3530
3531 static void tx_start(MGSLPC_INFO *info)
3532 {
3533 if (debug_level >= DEBUG_LEVEL_ISR)
3534 printk("%s(%d):tx_start(%s)\n",
3535 __FILE__,__LINE__, info->device_name );
3536
3537 if (info->tx_count) {
3538 /* If auto RTS enabled and RTS is inactive, then assert */
3539 /* RTS and set a flag indicating that the driver should */
3540 /* negate RTS when the transmission completes. */
3541 info->drop_rts_on_tx_done = 0;
3542
3543 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3544 get_signals(info);
3545 if (!(info->serial_signals & SerialSignal_RTS)) {
3546 info->serial_signals |= SerialSignal_RTS;
3547 set_signals(info);
3548 info->drop_rts_on_tx_done = 1;
3549 }
3550 }
3551
3552 if (info->params.mode == MGSL_MODE_ASYNC) {
3553 if (!info->tx_active) {
3554 info->tx_active = 1;
3555 tx_ready(info);
3556 }
3557 } else {
3558 info->tx_active = 1;
3559 tx_ready(info);
3560 info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
3561 add_timer(&info->tx_timer);
3562 }
3563 }
3564
3565 if (!info->tx_enabled)
3566 info->tx_enabled = 1;
3567 }
3568
3569 static void tx_stop(MGSLPC_INFO *info)
3570 {
3571 if (debug_level >= DEBUG_LEVEL_ISR)
3572 printk("%s(%d):tx_stop(%s)\n",
3573 __FILE__,__LINE__, info->device_name );
3574
3575 del_timer(&info->tx_timer);
3576
3577 info->tx_enabled = 0;
3578 info->tx_active = 0;
3579 }
3580
3581 /* Reset the adapter to a known state and prepare it for further use.
3582 */
3583 static void reset_device(MGSLPC_INFO *info)
3584 {
3585 /* power up both channels (set BIT7) */
3586 write_reg(info, CHA + CCR0, 0x80);
3587 write_reg(info, CHB + CCR0, 0x80);
3588 write_reg(info, CHA + MODE, 0);
3589 write_reg(info, CHB + MODE, 0);
3590
3591 /* disable all interrupts */
3592 irq_disable(info, CHA, 0xffff);
3593 irq_disable(info, CHB, 0xffff);
3594 port_irq_disable(info, 0xff);
3595
3596 /* PCR Port Configuration Register
3597 *
3598 * 07..04 DEC[3..0] Serial I/F select outputs
3599 * 03 output, 1=AUTO CTS control enabled
3600 * 02 RI Ring Indicator input 0=active
3601 * 01 DSR input 0=active
3602 * 00 DTR output 0=active
3603 *
3604 * 0000 0110
3605 */
3606 write_reg(info, PCR, 0x06);
3607
3608 /* PVR Port Value Register
3609 *
3610 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3611 * 03 AUTO CTS output 1=enabled
3612 * 02 RI Ring Indicator input
3613 * 01 DSR input
3614 * 00 DTR output (1=inactive)
3615 *
3616 * 0000 0001
3617 */
3618 // write_reg(info, PVR, PVR_DTR);
3619
3620 /* IPC Interrupt Port Configuration
3621 *
3622 * 07 VIS 1=Masked interrupts visible
3623 * 06..05 Reserved, 0
3624 * 04..03 SLA Slave address, 00 ignored
3625 * 02 CASM Cascading Mode, 1=daisy chain
3626 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3627 *
3628 * 0000 0101
3629 */
3630 write_reg(info, IPC, 0x05);
3631 }
3632
3633 static void async_mode(MGSLPC_INFO *info)
3634 {
3635 unsigned char val;
3636
3637 /* disable all interrupts */
3638 irq_disable(info, CHA, 0xffff);
3639 irq_disable(info, CHB, 0xffff);
3640 port_irq_disable(info, 0xff);
3641
3642 /* MODE
3643 *
3644 * 07 Reserved, 0
3645 * 06 FRTS RTS State, 0=active
3646 * 05 FCTS Flow Control on CTS
3647 * 04 FLON Flow Control Enable
3648 * 03 RAC Receiver Active, 0 = inactive
3649 * 02 RTS 0=Auto RTS, 1=manual RTS
3650 * 01 TRS Timer Resolution, 1=512
3651 * 00 TLP Test Loop, 0 = no loop
3652 *
3653 * 0000 0110
3654 */
3655 val = 0x06;
3656 if (info->params.loopback)
3657 val |= BIT0;
3658
3659 /* preserve RTS state */
3660 if (!(info->serial_signals & SerialSignal_RTS))
3661 val |= BIT6;
3662 write_reg(info, CHA + MODE, val);
3663
3664 /* CCR0
3665 *
3666 * 07 PU Power Up, 1=active, 0=power down
3667 * 06 MCE Master Clock Enable, 1=enabled
3668 * 05 Reserved, 0
3669 * 04..02 SC[2..0] Encoding, 000=NRZ
3670 * 01..00 SM[1..0] Serial Mode, 11=Async
3671 *
3672 * 1000 0011
3673 */
3674 write_reg(info, CHA + CCR0, 0x83);
3675
3676 /* CCR1
3677 *
3678 * 07..05 Reserved, 0
3679 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3680 * 03 BCR Bit Clock Rate, 1=16x
3681 * 02..00 CM[2..0] Clock Mode, 111=BRG
3682 *
3683 * 0001 1111
3684 */
3685 write_reg(info, CHA + CCR1, 0x1f);
3686
3687 /* CCR2 (channel A)
3688 *
3689 * 07..06 BGR[9..8] Baud rate bits 9..8
3690 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3691 * 04 SSEL Clock source select, 1=submode b
3692 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3693 * 02 RWX Read/Write Exchange 0=disabled
3694 * 01 Reserved, 0
3695 * 00 DIV, data inversion 0=disabled, 1=enabled
3696 *
3697 * 0001 0000
3698 */
3699 write_reg(info, CHA + CCR2, 0x10);
3700
3701 /* CCR3
3702 *
3703 * 07..01 Reserved, 0
3704 * 00 PSD DPLL Phase Shift Disable
3705 *
3706 * 0000 0000
3707 */
3708 write_reg(info, CHA + CCR3, 0);
3709
3710 /* CCR4
3711 *
3712 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3713 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3714 * 05 TST1 Test Pin, 0=normal operation
3715 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3716 * 03..00 Reserved, must be 0
3717 *
3718 * 0101 0000
3719 */
3720 write_reg(info, CHA + CCR4, 0x50);
3721 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3722
3723 /* DAFO Data Format
3724 *
3725 * 07 Reserved, 0
3726 * 06 XBRK transmit break, 0=normal operation
3727 * 05 Stop bits (0=1, 1=2)
3728 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3729 * 02 PAREN Parity Enable
3730 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3731 *
3732 */
3733 val = 0x00;
3734 if (info->params.data_bits != 8)
3735 val |= BIT0; /* 7 bits */
3736 if (info->params.stop_bits != 1)
3737 val |= BIT5;
3738 if (info->params.parity != ASYNC_PARITY_NONE)
3739 {
3740 val |= BIT2; /* Parity enable */
3741 if (info->params.parity == ASYNC_PARITY_ODD)
3742 val |= BIT3;
3743 else
3744 val |= BIT4;
3745 }
3746 write_reg(info, CHA + DAFO, val);
3747
3748 /* RFC Rx FIFO Control
3749 *
3750 * 07 Reserved, 0
3751 * 06 DPS, 1=parity bit not stored in data byte
3752 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3753 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3754 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3755 * 01 Reserved, 0
3756 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3757 *
3758 * 0101 1100
3759 */
3760 write_reg(info, CHA + RFC, 0x5c);
3761
3762 /* RLCR Receive length check register
3763 *
3764 * Max frame length = (RL + 1) * 32
3765 */
3766 write_reg(info, CHA + RLCR, 0);
3767
3768 /* XBCH Transmit Byte Count High
3769 *
3770 * 07 DMA mode, 0 = interrupt driven
3771 * 06 NRM, 0=ABM (ignored)
3772 * 05 CAS Carrier Auto Start
3773 * 04 XC Transmit Continuously (ignored)
3774 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3775 *
3776 * 0000 0000
3777 */
3778 val = 0x00;
3779 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3780 val |= BIT5;
3781 write_reg(info, CHA + XBCH, val);
3782 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3783 irq_enable(info, CHA, IRQ_CTS);
3784
3785 /* MODE:03 RAC Receiver Active, 1=active */
3786 set_reg_bits(info, CHA + MODE, BIT3);
3787 enable_auxclk(info);
3788 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3789 irq_enable(info, CHB, IRQ_CTS);
3790 /* PVR[3] 1=AUTO CTS active */
3791 set_reg_bits(info, CHA + PVR, BIT3);
3792 } else
3793 clear_reg_bits(info, CHA + PVR, BIT3);
3794 irq_enable(info, CHA,
3795 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3796 IRQ_ALLSENT + IRQ_TXFIFO);
3797 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3798 wait_command_complete(info, CHA);
3799 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3800 }
3801
3802 /* Set the HDLC idle mode for the transmitter.
3803 */
3804 static void tx_set_idle(MGSLPC_INFO *info)
3805 {
3806 /* Note: ESCC2 only supports flags and one idle modes */
3807 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3808 set_reg_bits(info, CHA + CCR1, BIT3);
3809 else
3810 clear_reg_bits(info, CHA + CCR1, BIT3);
3811 }
3812
3813 /* get state of the V24 status (input) signals.
3814 */
3815 static void get_signals(MGSLPC_INFO *info)
3816 {
3817 unsigned char status = 0;
3818
3819 /* preserve DTR and RTS */
3820 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3821
3822 if (read_reg(info, CHB + VSTR) & BIT7)
3823 info->serial_signals |= SerialSignal_DCD;
3824 if (read_reg(info, CHB + STAR) & BIT1)
3825 info->serial_signals |= SerialSignal_CTS;
3826
3827 status = read_reg(info, CHA + PVR);
3828 if (!(status & PVR_RI))
3829 info->serial_signals |= SerialSignal_RI;
3830 if (!(status & PVR_DSR))
3831 info->serial_signals |= SerialSignal_DSR;
3832 }
3833
3834 /* Set the state of DTR and RTS based on contents of
3835 * serial_signals member of device extension.
3836 */
3837 static void set_signals(MGSLPC_INFO *info)
3838 {
3839 unsigned char val;
3840
3841 val = read_reg(info, CHA + MODE);
3842 if (info->params.mode == MGSL_MODE_ASYNC) {
3843 if (info->serial_signals & SerialSignal_RTS)
3844 val &= ~BIT6;
3845 else
3846 val |= BIT6;
3847 } else {
3848 if (info->serial_signals & SerialSignal_RTS)
3849 val |= BIT2;
3850 else
3851 val &= ~BIT2;
3852 }
3853 write_reg(info, CHA + MODE, val);
3854
3855 if (info->serial_signals & SerialSignal_DTR)
3856 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3857 else
3858 set_reg_bits(info, CHA + PVR, PVR_DTR);
3859 }
3860
3861 static void rx_reset_buffers(MGSLPC_INFO *info)
3862 {
3863 RXBUF *buf;
3864 int i;
3865
3866 info->rx_put = 0;
3867 info->rx_get = 0;
3868 info->rx_frame_count = 0;
3869 for (i=0 ; i < info->rx_buf_count ; i++) {
3870 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3871 buf->status = buf->count = 0;
3872 }
3873 }
3874
3875 /* Attempt to return a received HDLC frame
3876 * Only frames received without errors are returned.
3877 *
3878 * Returns 1 if frame returned, otherwise 0
3879 */
3880 static int rx_get_frame(MGSLPC_INFO *info)
3881 {
3882 unsigned short status;
3883 RXBUF *buf;
3884 unsigned int framesize = 0;
3885 unsigned long flags;
3886 struct tty_struct *tty = info->tty;
3887 int return_frame = 0;
3888
3889 if (info->rx_frame_count == 0)
3890 return 0;
3891
3892 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3893
3894 status = buf->status;
3895
3896 /* 07 VFR 1=valid frame
3897 * 06 RDO 1=data overrun
3898 * 05 CRC 1=OK, 0=error
3899 * 04 RAB 1=frame aborted
3900 */
3901 if ((status & 0xf0) != 0xA0) {
3902 if (!(status & BIT7) || (status & BIT4))
3903 info->icount.rxabort++;
3904 else if (status & BIT6)
3905 info->icount.rxover++;
3906 else if (!(status & BIT5)) {
3907 info->icount.rxcrc++;
3908 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3909 return_frame = 1;
3910 }
3911 framesize = 0;
3912 #ifdef CONFIG_HDLC
3913 {
3914 struct net_device_stats *stats = hdlc_stats(info->netdev);
3915 stats->rx_errors++;
3916 stats->rx_frame_errors++;
3917 }
3918 #endif
3919 } else
3920 return_frame = 1;
3921
3922 if (return_frame)
3923 framesize = buf->count;
3924
3925 if (debug_level >= DEBUG_LEVEL_BH)
3926 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3927 __FILE__,__LINE__,info->device_name,status,framesize);
3928
3929 if (debug_level >= DEBUG_LEVEL_DATA)
3930 trace_block(info, buf->data, framesize, 0);
3931
3932 if (framesize) {
3933 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3934 framesize+1 > info->max_frame_size) ||
3935 framesize > info->max_frame_size)
3936 info->icount.rxlong++;
3937 else {
3938 if (status & BIT5)
3939 info->icount.rxok++;
3940
3941 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3942 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3943 ++framesize;
3944 }
3945
3946 #ifdef CONFIG_HDLC
3947 if (info->netcount)
3948 hdlcdev_rx(info, buf->data, framesize);
3949 else
3950 #endif
3951 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3952 }
3953 }
3954
3955 spin_lock_irqsave(&info->lock,flags);
3956 buf->status = buf->count = 0;
3957 info->rx_frame_count--;
3958 info->rx_get++;
3959 if (info->rx_get >= info->rx_buf_count)
3960 info->rx_get = 0;
3961 spin_unlock_irqrestore(&info->lock,flags);
3962
3963 return 1;
3964 }
3965
3966 static BOOLEAN register_test(MGSLPC_INFO *info)
3967 {
3968 static unsigned char patterns[] =
3969 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3970 static unsigned int count = ARRAY_SIZE(patterns);
3971 unsigned int i;
3972 BOOLEAN rc = TRUE;
3973 unsigned long flags;
3974
3975 spin_lock_irqsave(&info->lock,flags);
3976 reset_device(info);
3977
3978 for (i = 0; i < count; i++) {
3979 write_reg(info, XAD1, patterns[i]);
3980 write_reg(info, XAD2, patterns[(i + 1) % count]);
3981 if ((read_reg(info, XAD1) != patterns[i]) ||
3982 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3983 rc = FALSE;
3984 break;
3985 }
3986 }
3987
3988 spin_unlock_irqrestore(&info->lock,flags);
3989 return rc;
3990 }
3991
3992 static BOOLEAN irq_test(MGSLPC_INFO *info)
3993 {
3994 unsigned long end_time;
3995 unsigned long flags;
3996
3997 spin_lock_irqsave(&info->lock,flags);
3998 reset_device(info);
3999
4000 info->testing_irq = TRUE;
4001 hdlc_mode(info);
4002
4003 info->irq_occurred = FALSE;
4004
4005 /* init hdlc mode */
4006
4007 irq_enable(info, CHA, IRQ_TIMER);
4008 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
4009 issue_command(info, CHA, CMD_START_TIMER);
4010
4011 spin_unlock_irqrestore(&info->lock,flags);
4012
4013 end_time=100;
4014 while(end_time-- && !info->irq_occurred) {
4015 msleep_interruptible(10);
4016 }
4017
4018 info->testing_irq = FALSE;
4019
4020 spin_lock_irqsave(&info->lock,flags);
4021 reset_device(info);
4022 spin_unlock_irqrestore(&info->lock,flags);
4023
4024 return info->irq_occurred ? TRUE : FALSE;
4025 }
4026
4027 static int adapter_test(MGSLPC_INFO *info)
4028 {
4029 if (!register_test(info)) {
4030 info->init_error = DiagStatus_AddressFailure;
4031 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4032 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4033 return -ENODEV;
4034 }
4035
4036 if (!irq_test(info)) {
4037 info->init_error = DiagStatus_IrqFailure;
4038 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4039 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4040 return -ENODEV;
4041 }
4042
4043 if (debug_level >= DEBUG_LEVEL_INFO)
4044 printk("%s(%d):device %s passed diagnostics\n",
4045 __FILE__,__LINE__,info->device_name);
4046 return 0;
4047 }
4048
4049 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4050 {
4051 int i;
4052 int linecount;
4053 if (xmit)
4054 printk("%s tx data:\n",info->device_name);
4055 else
4056 printk("%s rx data:\n",info->device_name);
4057
4058 while(count) {
4059 if (count > 16)
4060 linecount = 16;
4061 else
4062 linecount = count;
4063
4064 for(i=0;i<linecount;i++)
4065 printk("%02X ",(unsigned char)data[i]);
4066 for(;i<17;i++)
4067 printk(" ");
4068 for(i=0;i<linecount;i++) {
4069 if (data[i]>=040 && data[i]<=0176)
4070 printk("%c",data[i]);
4071 else
4072 printk(".");
4073 }
4074 printk("\n");
4075
4076 data += linecount;
4077 count -= linecount;
4078 }
4079 }
4080
4081 /* HDLC frame time out
4082 * update stats and do tx completion processing
4083 */
4084 static void tx_timeout(unsigned long context)
4085 {
4086 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4087 unsigned long flags;
4088
4089 if ( debug_level >= DEBUG_LEVEL_INFO )
4090 printk( "%s(%d):tx_timeout(%s)\n",
4091 __FILE__,__LINE__,info->device_name);
4092 if(info->tx_active &&
4093 info->params.mode == MGSL_MODE_HDLC) {
4094 info->icount.txtimeout++;
4095 }
4096 spin_lock_irqsave(&info->lock,flags);
4097 info->tx_active = 0;
4098 info->tx_count = info->tx_put = info->tx_get = 0;
4099
4100 spin_unlock_irqrestore(&info->lock,flags);
4101
4102 #ifdef CONFIG_HDLC
4103 if (info->netcount)
4104 hdlcdev_tx_done(info);
4105 else
4106 #endif
4107 bh_transmit(info);
4108 }
4109
4110 #ifdef CONFIG_HDLC
4111
4112 /**
4113 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4114 * set encoding and frame check sequence (FCS) options
4115 *
4116 * dev pointer to network device structure
4117 * encoding serial encoding setting
4118 * parity FCS setting
4119 *
4120 * returns 0 if success, otherwise error code
4121 */
4122 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4123 unsigned short parity)
4124 {
4125 MGSLPC_INFO *info = dev_to_port(dev);
4126 unsigned char new_encoding;
4127 unsigned short new_crctype;
4128
4129 /* return error if TTY interface open */
4130 if (info->count)
4131 return -EBUSY;
4132
4133 switch (encoding)
4134 {
4135 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4136 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4137 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4138 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4139 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4140 default: return -EINVAL;
4141 }
4142
4143 switch (parity)
4144 {
4145 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4146 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4147 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4148 default: return -EINVAL;
4149 }
4150
4151 info->params.encoding = new_encoding;
4152 info->params.crc_type = new_crctype;
4153
4154 /* if network interface up, reprogram hardware */
4155 if (info->netcount)
4156 mgslpc_program_hw(info);
4157
4158 return 0;
4159 }
4160
4161 /**
4162 * called by generic HDLC layer to send frame
4163 *
4164 * skb socket buffer containing HDLC frame
4165 * dev pointer to network device structure
4166 *
4167 * returns 0 if success, otherwise error code
4168 */
4169 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4170 {
4171 MGSLPC_INFO *info = dev_to_port(dev);
4172 struct net_device_stats *stats = hdlc_stats(dev);
4173 unsigned long flags;
4174
4175 if (debug_level >= DEBUG_LEVEL_INFO)
4176 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4177
4178 /* stop sending until this frame completes */
4179 netif_stop_queue(dev);
4180
4181 /* copy data to device buffers */
4182 memcpy(info->tx_buf, skb->data, skb->len);
4183 info->tx_get = 0;
4184 info->tx_put = info->tx_count = skb->len;
4185
4186 /* update network statistics */
4187 stats->tx_packets++;
4188 stats->tx_bytes += skb->len;
4189
4190 /* done with socket buffer, so free it */
4191 dev_kfree_skb(skb);
4192
4193 /* save start time for transmit timeout detection */
4194 dev->trans_start = jiffies;
4195
4196 /* start hardware transmitter if necessary */
4197 spin_lock_irqsave(&info->lock,flags);
4198 if (!info->tx_active)
4199 tx_start(info);
4200 spin_unlock_irqrestore(&info->lock,flags);
4201
4202 return 0;
4203 }
4204
4205 /**
4206 * called by network layer when interface enabled
4207 * claim resources and initialize hardware
4208 *
4209 * dev pointer to network device structure
4210 *
4211 * returns 0 if success, otherwise error code
4212 */
4213 static int hdlcdev_open(struct net_device *dev)
4214 {
4215 MGSLPC_INFO *info = dev_to_port(dev);
4216 int rc;
4217 unsigned long flags;
4218
4219 if (debug_level >= DEBUG_LEVEL_INFO)
4220 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4221
4222 /* generic HDLC layer open processing */
4223 if ((rc = hdlc_open(dev)))
4224 return rc;
4225
4226 /* arbitrate between network and tty opens */
4227 spin_lock_irqsave(&info->netlock, flags);
4228 if (info->count != 0 || info->netcount != 0) {
4229 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4230 spin_unlock_irqrestore(&info->netlock, flags);
4231 return -EBUSY;
4232 }
4233 info->netcount=1;
4234 spin_unlock_irqrestore(&info->netlock, flags);
4235
4236 /* claim resources and init adapter */
4237 if ((rc = startup(info)) != 0) {
4238 spin_lock_irqsave(&info->netlock, flags);
4239 info->netcount=0;
4240 spin_unlock_irqrestore(&info->netlock, flags);
4241 return rc;
4242 }
4243
4244 /* assert DTR and RTS, apply hardware settings */
4245 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4246 mgslpc_program_hw(info);
4247
4248 /* enable network layer transmit */
4249 dev->trans_start = jiffies;
4250 netif_start_queue(dev);
4251
4252 /* inform generic HDLC layer of current DCD status */
4253 spin_lock_irqsave(&info->lock, flags);
4254 get_signals(info);
4255 spin_unlock_irqrestore(&info->lock, flags);
4256 if (info->serial_signals & SerialSignal_DCD)
4257 netif_carrier_on(dev);
4258 else
4259 netif_carrier_off(dev);
4260 return 0;
4261 }
4262
4263 /**
4264 * called by network layer when interface is disabled
4265 * shutdown hardware and release resources
4266 *
4267 * dev pointer to network device structure
4268 *
4269 * returns 0 if success, otherwise error code
4270 */
4271 static int hdlcdev_close(struct net_device *dev)
4272 {
4273 MGSLPC_INFO *info = dev_to_port(dev);
4274 unsigned long flags;
4275
4276 if (debug_level >= DEBUG_LEVEL_INFO)
4277 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4278
4279 netif_stop_queue(dev);
4280
4281 /* shutdown adapter and release resources */
4282 shutdown(info);
4283
4284 hdlc_close(dev);
4285
4286 spin_lock_irqsave(&info->netlock, flags);
4287 info->netcount=0;
4288 spin_unlock_irqrestore(&info->netlock, flags);
4289
4290 return 0;
4291 }
4292
4293 /**
4294 * called by network layer to process IOCTL call to network device
4295 *
4296 * dev pointer to network device structure
4297 * ifr pointer to network interface request structure
4298 * cmd IOCTL command code
4299 *
4300 * returns 0 if success, otherwise error code
4301 */
4302 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4303 {
4304 const size_t size = sizeof(sync_serial_settings);
4305 sync_serial_settings new_line;
4306 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4307 MGSLPC_INFO *info = dev_to_port(dev);
4308 unsigned int flags;
4309
4310 if (debug_level >= DEBUG_LEVEL_INFO)
4311 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4312
4313 /* return error if TTY interface open */
4314 if (info->count)
4315 return -EBUSY;
4316
4317 if (cmd != SIOCWANDEV)
4318 return hdlc_ioctl(dev, ifr, cmd);
4319
4320 switch(ifr->ifr_settings.type) {
4321 case IF_GET_IFACE: /* return current sync_serial_settings */
4322
4323 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4324 if (ifr->ifr_settings.size < size) {
4325 ifr->ifr_settings.size = size; /* data size wanted */
4326 return -ENOBUFS;
4327 }
4328
4329 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4330 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4331 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4332 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4333
4334 switch (flags){
4335 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4336 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4337 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4338 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4339 default: new_line.clock_type = CLOCK_DEFAULT;
4340 }
4341
4342 new_line.clock_rate = info->params.clock_speed;
4343 new_line.loopback = info->params.loopback ? 1:0;
4344
4345 if (copy_to_user(line, &new_line, size))
4346 return -EFAULT;
4347 return 0;
4348
4349 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4350
4351 if(!capable(CAP_NET_ADMIN))
4352 return -EPERM;
4353 if (copy_from_user(&new_line, line, size))
4354 return -EFAULT;
4355
4356 switch (new_line.clock_type)
4357 {
4358 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4359 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4360 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4361 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4362 case CLOCK_DEFAULT: flags = info->params.flags &
4363 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4364 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4365 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4366 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4367 default: return -EINVAL;
4368 }
4369
4370 if (new_line.loopback != 0 && new_line.loopback != 1)
4371 return -EINVAL;
4372
4373 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4374 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4375 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4376 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4377 info->params.flags |= flags;
4378
4379 info->params.loopback = new_line.loopback;
4380
4381 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4382 info->params.clock_speed = new_line.clock_rate;
4383 else
4384 info->params.clock_speed = 0;
4385
4386 /* if network interface up, reprogram hardware */
4387 if (info->netcount)
4388 mgslpc_program_hw(info);
4389 return 0;
4390
4391 default:
4392 return hdlc_ioctl(dev, ifr, cmd);
4393 }
4394 }
4395
4396 /**
4397 * called by network layer when transmit timeout is detected
4398 *
4399 * dev pointer to network device structure
4400 */
4401 static void hdlcdev_tx_timeout(struct net_device *dev)
4402 {
4403 MGSLPC_INFO *info = dev_to_port(dev);
4404 struct net_device_stats *stats = hdlc_stats(dev);
4405 unsigned long flags;
4406
4407 if (debug_level >= DEBUG_LEVEL_INFO)
4408 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4409
4410 stats->tx_errors++;
4411 stats->tx_aborted_errors++;
4412
4413 spin_lock_irqsave(&info->lock,flags);
4414 tx_stop(info);
4415 spin_unlock_irqrestore(&info->lock,flags);
4416
4417 netif_wake_queue(dev);
4418 }
4419
4420 /**
4421 * called by device driver when transmit completes
4422 * reenable network layer transmit if stopped
4423 *
4424 * info pointer to device instance information
4425 */
4426 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4427 {
4428 if (netif_queue_stopped(info->netdev))
4429 netif_wake_queue(info->netdev);
4430 }
4431
4432 /**
4433 * called by device driver when frame received
4434 * pass frame to network layer
4435 *
4436 * info pointer to device instance information
4437 * buf pointer to buffer contianing frame data
4438 * size count of data bytes in buf
4439 */
4440 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4441 {
4442 struct sk_buff *skb = dev_alloc_skb(size);
4443 struct net_device *dev = info->netdev;
4444 struct net_device_stats *stats = hdlc_stats(dev);
4445
4446 if (debug_level >= DEBUG_LEVEL_INFO)
4447 printk("hdlcdev_rx(%s)\n",dev->name);
4448
4449 if (skb == NULL) {
4450 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4451 stats->rx_dropped++;
4452 return;
4453 }
4454
4455 memcpy(skb_put(skb, size),buf,size);
4456
4457 skb->protocol = hdlc_type_trans(skb, info->netdev);
4458
4459 stats->rx_packets++;
4460 stats->rx_bytes += size;
4461
4462 netif_rx(skb);
4463
4464 info->netdev->last_rx = jiffies;
4465 }
4466
4467 /**
4468 * called by device driver when adding device instance
4469 * do generic HDLC initialization
4470 *
4471 * info pointer to device instance information
4472 *
4473 * returns 0 if success, otherwise error code
4474 */
4475 static int hdlcdev_init(MGSLPC_INFO *info)
4476 {
4477 int rc;
4478 struct net_device *dev;
4479 hdlc_device *hdlc;
4480
4481 /* allocate and initialize network and HDLC layer objects */
4482
4483 if (!(dev = alloc_hdlcdev(info))) {
4484 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4485 return -ENOMEM;
4486 }
4487
4488 /* for network layer reporting purposes only */
4489 dev->base_addr = info->io_base;
4490 dev->irq = info->irq_level;
4491
4492 /* network layer callbacks and settings */
4493 dev->do_ioctl = hdlcdev_ioctl;
4494 dev->open = hdlcdev_open;
4495 dev->stop = hdlcdev_close;
4496 dev->tx_timeout = hdlcdev_tx_timeout;
4497 dev->watchdog_timeo = 10*HZ;
4498 dev->tx_queue_len = 50;
4499
4500 /* generic HDLC layer callbacks and settings */
4501 hdlc = dev_to_hdlc(dev);
4502 hdlc->attach = hdlcdev_attach;
4503 hdlc->xmit = hdlcdev_xmit;
4504
4505 /* register objects with HDLC layer */
4506 if ((rc = register_hdlc_device(dev))) {
4507 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4508 free_netdev(dev);
4509 return rc;
4510 }
4511
4512 info->netdev = dev;
4513 return 0;
4514 }
4515
4516 /**
4517 * called by device driver when removing device instance
4518 * do generic HDLC cleanup
4519 *
4520 * info pointer to device instance information
4521 */
4522 static void hdlcdev_exit(MGSLPC_INFO *info)
4523 {
4524 unregister_hdlc_device(info->netdev);
4525 free_netdev(info->netdev);
4526 info->netdev = NULL;
4527 }
4528
4529 #endif /* CONFIG_HDLC */
4530
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