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Merge branch 'for-jeff' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux...
[mirror_ubuntu-artful-kernel.git] / drivers / char / pcmcia / synclink_cs.c
1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/slab.h>
55 #include <linux/netdevice.h>
56 #include <linux/vmalloc.h>
57 #include <linux/init.h>
58 #include <linux/delay.h>
59 #include <linux/ioctl.h>
60 #include <linux/synclink.h>
61
62 #include <asm/system.h>
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cs_types.h>
73 #include <pcmcia/cs.h>
74 #include <pcmcia/cistpl.h>
75 #include <pcmcia/cisreg.h>
76 #include <pcmcia/ds.h>
77
78 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
79 #define SYNCLINK_GENERIC_HDLC 1
80 #else
81 #define SYNCLINK_GENERIC_HDLC 0
82 #endif
83
84 #define GET_USER(error,value,addr) error = get_user(value,addr)
85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89 #include <asm/uaccess.h>
90
91 static MGSL_PARAMS default_params = {
92 MGSL_MODE_HDLC, /* unsigned long mode */
93 0, /* unsigned char loopback; */
94 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
95 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
96 0, /* unsigned long clock_speed; */
97 0xff, /* unsigned char addr_filter; */
98 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
99 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
100 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
101 9600, /* unsigned long data_rate; */
102 8, /* unsigned char data_bits; */
103 1, /* unsigned char stop_bits; */
104 ASYNC_PARITY_NONE /* unsigned char parity; */
105 };
106
107 typedef struct
108 {
109 int count;
110 unsigned char status;
111 char data[1];
112 } RXBUF;
113
114 /* The queue of BH actions to be performed */
115
116 #define BH_RECEIVE 1
117 #define BH_TRANSMIT 2
118 #define BH_STATUS 4
119
120 #define IO_PIN_SHUTDOWN_LIMIT 100
121
122 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
123
124 struct _input_signal_events {
125 int ri_up;
126 int ri_down;
127 int dsr_up;
128 int dsr_down;
129 int dcd_up;
130 int dcd_down;
131 int cts_up;
132 int cts_down;
133 };
134
135
136 /*
137 * Device instance data structure
138 */
139
140 typedef struct _mgslpc_info {
141 void *if_ptr; /* General purpose pointer (used by SPPP) */
142 int magic;
143 int flags;
144 int count; /* count of opens */
145 int line;
146 unsigned short close_delay;
147 unsigned short closing_wait; /* time to wait before closing */
148
149 struct mgsl_icount icount;
150
151 struct tty_struct *tty;
152 int timeout;
153 int x_char; /* xon/xoff character */
154 int blocked_open; /* # of blocked opens */
155 unsigned char read_status_mask;
156 unsigned char ignore_status_mask;
157
158 unsigned char *tx_buf;
159 int tx_put;
160 int tx_get;
161 int tx_count;
162
163 /* circular list of fixed length rx buffers */
164
165 unsigned char *rx_buf; /* memory allocated for all rx buffers */
166 int rx_buf_total_size; /* size of memory allocated for rx buffers */
167 int rx_put; /* index of next empty rx buffer */
168 int rx_get; /* index of next full rx buffer */
169 int rx_buf_size; /* size in bytes of single rx buffer */
170 int rx_buf_count; /* total number of rx buffers */
171 int rx_frame_count; /* number of full rx buffers */
172
173 wait_queue_head_t open_wait;
174 wait_queue_head_t close_wait;
175
176 wait_queue_head_t status_event_wait_q;
177 wait_queue_head_t event_wait_q;
178 struct timer_list tx_timer; /* HDLC transmit timeout timer */
179 struct _mgslpc_info *next_device; /* device list link */
180
181 unsigned short imra_value;
182 unsigned short imrb_value;
183 unsigned char pim_value;
184
185 spinlock_t lock;
186 struct work_struct task; /* task structure for scheduling bh */
187
188 u32 max_frame_size;
189
190 u32 pending_bh;
191
192 bool bh_running;
193 bool bh_requested;
194
195 int dcd_chkcount; /* check counts to prevent */
196 int cts_chkcount; /* too many IRQs if a signal */
197 int dsr_chkcount; /* is floating */
198 int ri_chkcount;
199
200 bool rx_enabled;
201 bool rx_overflow;
202
203 bool tx_enabled;
204 bool tx_active;
205 bool tx_aborting;
206 u32 idle_mode;
207
208 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
209
210 char device_name[25]; /* device instance name */
211
212 unsigned int io_base; /* base I/O address of adapter */
213 unsigned int irq_level;
214
215 MGSL_PARAMS params; /* communications parameters */
216
217 unsigned char serial_signals; /* current serial signal states */
218
219 bool irq_occurred; /* for diagnostics use */
220 char testing_irq;
221 unsigned int init_error; /* startup error (DIAGS) */
222
223 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
224 bool drop_rts_on_tx_done;
225
226 struct _input_signal_events input_signal_events;
227
228 /* PCMCIA support */
229 struct pcmcia_device *p_dev;
230 dev_node_t node;
231 int stop;
232
233 /* SPPP/Cisco HDLC device parts */
234 int netcount;
235 spinlock_t netlock;
236
237 #if SYNCLINK_GENERIC_HDLC
238 struct net_device *netdev;
239 #endif
240
241 } MGSLPC_INFO;
242
243 #define MGSLPC_MAGIC 0x5402
244
245 /*
246 * The size of the serial xmit buffer is 1 page, or 4096 bytes
247 */
248 #define TXBUFSIZE 4096
249
250
251 #define CHA 0x00 /* channel A offset */
252 #define CHB 0x40 /* channel B offset */
253
254 /*
255 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
256 */
257 #undef PVR
258
259 #define RXFIFO 0
260 #define TXFIFO 0
261 #define STAR 0x20
262 #define CMDR 0x20
263 #define RSTA 0x21
264 #define PRE 0x21
265 #define MODE 0x22
266 #define TIMR 0x23
267 #define XAD1 0x24
268 #define XAD2 0x25
269 #define RAH1 0x26
270 #define RAH2 0x27
271 #define DAFO 0x27
272 #define RAL1 0x28
273 #define RFC 0x28
274 #define RHCR 0x29
275 #define RAL2 0x29
276 #define RBCL 0x2a
277 #define XBCL 0x2a
278 #define RBCH 0x2b
279 #define XBCH 0x2b
280 #define CCR0 0x2c
281 #define CCR1 0x2d
282 #define CCR2 0x2e
283 #define CCR3 0x2f
284 #define VSTR 0x34
285 #define BGR 0x34
286 #define RLCR 0x35
287 #define AML 0x36
288 #define AMH 0x37
289 #define GIS 0x38
290 #define IVA 0x38
291 #define IPC 0x39
292 #define ISR 0x3a
293 #define IMR 0x3a
294 #define PVR 0x3c
295 #define PIS 0x3d
296 #define PIM 0x3d
297 #define PCR 0x3e
298 #define CCR4 0x3f
299
300 // IMR/ISR
301
302 #define IRQ_BREAK_ON BIT15 // rx break detected
303 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
304 #define IRQ_ALLSENT BIT13 // all sent
305 #define IRQ_UNDERRUN BIT12 // transmit data underrun
306 #define IRQ_TIMER BIT11 // timer interrupt
307 #define IRQ_CTS BIT10 // CTS status change
308 #define IRQ_TXREPEAT BIT9 // tx message repeat
309 #define IRQ_TXFIFO BIT8 // transmit pool ready
310 #define IRQ_RXEOM BIT7 // receive message end
311 #define IRQ_EXITHUNT BIT6 // receive frame start
312 #define IRQ_RXTIME BIT6 // rx char timeout
313 #define IRQ_DCD BIT2 // carrier detect status change
314 #define IRQ_OVERRUN BIT1 // receive frame overflow
315 #define IRQ_RXFIFO BIT0 // receive pool full
316
317 // STAR
318
319 #define XFW BIT6 // transmit FIFO write enable
320 #define CEC BIT2 // command executing
321 #define CTS BIT1 // CTS state
322
323 #define PVR_DTR BIT0
324 #define PVR_DSR BIT1
325 #define PVR_RI BIT2
326 #define PVR_AUTOCTS BIT3
327 #define PVR_RS232 0x20 /* 0010b */
328 #define PVR_V35 0xe0 /* 1110b */
329 #define PVR_RS422 0x40 /* 0100b */
330
331 /* Register access functions */
332
333 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
334 #define read_reg(info, reg) inb((info)->io_base + (reg))
335
336 #define read_reg16(info, reg) inw((info)->io_base + (reg))
337 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
338
339 #define set_reg_bits(info, reg, mask) \
340 write_reg(info, (reg), \
341 (unsigned char) (read_reg(info, (reg)) | (mask)))
342 #define clear_reg_bits(info, reg, mask) \
343 write_reg(info, (reg), \
344 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
345 /*
346 * interrupt enable/disable routines
347 */
348 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
349 {
350 if (channel == CHA) {
351 info->imra_value |= mask;
352 write_reg16(info, CHA + IMR, info->imra_value);
353 } else {
354 info->imrb_value |= mask;
355 write_reg16(info, CHB + IMR, info->imrb_value);
356 }
357 }
358 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
359 {
360 if (channel == CHA) {
361 info->imra_value &= ~mask;
362 write_reg16(info, CHA + IMR, info->imra_value);
363 } else {
364 info->imrb_value &= ~mask;
365 write_reg16(info, CHB + IMR, info->imrb_value);
366 }
367 }
368
369 #define port_irq_disable(info, mask) \
370 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
371
372 #define port_irq_enable(info, mask) \
373 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
374
375 static void rx_start(MGSLPC_INFO *info);
376 static void rx_stop(MGSLPC_INFO *info);
377
378 static void tx_start(MGSLPC_INFO *info);
379 static void tx_stop(MGSLPC_INFO *info);
380 static void tx_set_idle(MGSLPC_INFO *info);
381
382 static void get_signals(MGSLPC_INFO *info);
383 static void set_signals(MGSLPC_INFO *info);
384
385 static void reset_device(MGSLPC_INFO *info);
386
387 static void hdlc_mode(MGSLPC_INFO *info);
388 static void async_mode(MGSLPC_INFO *info);
389
390 static void tx_timeout(unsigned long context);
391
392 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
393
394 #if SYNCLINK_GENERIC_HDLC
395 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
396 static void hdlcdev_tx_done(MGSLPC_INFO *info);
397 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
398 static int hdlcdev_init(MGSLPC_INFO *info);
399 static void hdlcdev_exit(MGSLPC_INFO *info);
400 #endif
401
402 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
403
404 static bool register_test(MGSLPC_INFO *info);
405 static bool irq_test(MGSLPC_INFO *info);
406 static int adapter_test(MGSLPC_INFO *info);
407
408 static int claim_resources(MGSLPC_INFO *info);
409 static void release_resources(MGSLPC_INFO *info);
410 static void mgslpc_add_device(MGSLPC_INFO *info);
411 static void mgslpc_remove_device(MGSLPC_INFO *info);
412
413 static bool rx_get_frame(MGSLPC_INFO *info);
414 static void rx_reset_buffers(MGSLPC_INFO *info);
415 static int rx_alloc_buffers(MGSLPC_INFO *info);
416 static void rx_free_buffers(MGSLPC_INFO *info);
417
418 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
419
420 /*
421 * Bottom half interrupt handlers
422 */
423 static void bh_handler(struct work_struct *work);
424 static void bh_transmit(MGSLPC_INFO *info);
425 static void bh_status(MGSLPC_INFO *info);
426
427 /*
428 * ioctl handlers
429 */
430 static int tiocmget(struct tty_struct *tty, struct file *file);
431 static int tiocmset(struct tty_struct *tty, struct file *file,
432 unsigned int set, unsigned int clear);
433 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
434 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
435 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
436 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
437 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
438 static int set_txenable(MGSLPC_INFO *info, int enable);
439 static int tx_abort(MGSLPC_INFO *info);
440 static int set_rxenable(MGSLPC_INFO *info, int enable);
441 static int wait_events(MGSLPC_INFO *info, int __user *mask);
442
443 static MGSLPC_INFO *mgslpc_device_list = NULL;
444 static int mgslpc_device_count = 0;
445
446 /*
447 * Set this param to non-zero to load eax with the
448 * .text section address and breakpoint on module load.
449 * This is useful for use with gdb and add-symbol-file command.
450 */
451 static int break_on_load=0;
452
453 /*
454 * Driver major number, defaults to zero to get auto
455 * assigned major number. May be forced as module parameter.
456 */
457 static int ttymajor=0;
458
459 static int debug_level = 0;
460 static int maxframe[MAX_DEVICE_COUNT] = {0,};
461
462 module_param(break_on_load, bool, 0);
463 module_param(ttymajor, int, 0);
464 module_param(debug_level, int, 0);
465 module_param_array(maxframe, int, NULL, 0);
466
467 MODULE_LICENSE("GPL");
468
469 static char *driver_name = "SyncLink PC Card driver";
470 static char *driver_version = "$Revision: 4.34 $";
471
472 static struct tty_driver *serial_driver;
473
474 /* number of characters left in xmit buffer before we ask for more */
475 #define WAKEUP_CHARS 256
476
477 static void mgslpc_change_params(MGSLPC_INFO *info);
478 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
479
480 /* PCMCIA prototypes */
481
482 static int mgslpc_config(struct pcmcia_device *link);
483 static void mgslpc_release(u_long arg);
484 static void mgslpc_detach(struct pcmcia_device *p_dev);
485
486 /*
487 * 1st function defined in .text section. Calling this function in
488 * init_module() followed by a breakpoint allows a remote debugger
489 * (gdb) to get the .text address for the add-symbol-file command.
490 * This allows remote debugging of dynamically loadable modules.
491 */
492 static void* mgslpc_get_text_ptr(void)
493 {
494 return mgslpc_get_text_ptr;
495 }
496
497 /**
498 * line discipline callback wrappers
499 *
500 * The wrappers maintain line discipline references
501 * while calling into the line discipline.
502 *
503 * ldisc_receive_buf - pass receive data to line discipline
504 */
505
506 static void ldisc_receive_buf(struct tty_struct *tty,
507 const __u8 *data, char *flags, int count)
508 {
509 struct tty_ldisc *ld;
510 if (!tty)
511 return;
512 ld = tty_ldisc_ref(tty);
513 if (ld) {
514 if (ld->ops->receive_buf)
515 ld->ops->receive_buf(tty, data, flags, count);
516 tty_ldisc_deref(ld);
517 }
518 }
519
520 static int mgslpc_probe(struct pcmcia_device *link)
521 {
522 MGSLPC_INFO *info;
523 int ret;
524
525 if (debug_level >= DEBUG_LEVEL_INFO)
526 printk("mgslpc_attach\n");
527
528 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
529 if (!info) {
530 printk("Error can't allocate device instance data\n");
531 return -ENOMEM;
532 }
533
534 info->magic = MGSLPC_MAGIC;
535 INIT_WORK(&info->task, bh_handler);
536 info->max_frame_size = 4096;
537 info->close_delay = 5*HZ/10;
538 info->closing_wait = 30*HZ;
539 init_waitqueue_head(&info->open_wait);
540 init_waitqueue_head(&info->close_wait);
541 init_waitqueue_head(&info->status_event_wait_q);
542 init_waitqueue_head(&info->event_wait_q);
543 spin_lock_init(&info->lock);
544 spin_lock_init(&info->netlock);
545 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
546 info->idle_mode = HDLC_TXIDLE_FLAGS;
547 info->imra_value = 0xffff;
548 info->imrb_value = 0xffff;
549 info->pim_value = 0xff;
550
551 info->p_dev = link;
552 link->priv = info;
553
554 /* Initialize the struct pcmcia_device structure */
555
556 /* Interrupt setup */
557 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
558 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
559 link->irq.Handler = NULL;
560
561 link->conf.Attributes = 0;
562 link->conf.IntType = INT_MEMORY_AND_IO;
563
564 ret = mgslpc_config(link);
565 if (ret)
566 return ret;
567
568 mgslpc_add_device(info);
569
570 return 0;
571 }
572
573 /* Card has been inserted.
574 */
575
576 #define CS_CHECK(fn, ret) \
577 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
578
579 static int mgslpc_config(struct pcmcia_device *link)
580 {
581 MGSLPC_INFO *info = link->priv;
582 tuple_t tuple;
583 cisparse_t parse;
584 int last_fn, last_ret;
585 u_char buf[64];
586 cistpl_cftable_entry_t dflt = { 0 };
587 cistpl_cftable_entry_t *cfg;
588
589 if (debug_level >= DEBUG_LEVEL_INFO)
590 printk("mgslpc_config(0x%p)\n", link);
591
592 tuple.Attributes = 0;
593 tuple.TupleData = buf;
594 tuple.TupleDataMax = sizeof(buf);
595 tuple.TupleOffset = 0;
596
597 /* get CIS configuration entry */
598
599 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
600 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
601
602 cfg = &(parse.cftable_entry);
603 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
604 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
605
606 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
607 if (cfg->index == 0)
608 goto cs_failed;
609
610 link->conf.ConfigIndex = cfg->index;
611 link->conf.Attributes |= CONF_ENABLE_IRQ;
612
613 /* IO window settings */
614 link->io.NumPorts1 = 0;
615 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
616 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
617 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
618 if (!(io->flags & CISTPL_IO_8BIT))
619 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
620 if (!(io->flags & CISTPL_IO_16BIT))
621 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
622 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
623 link->io.BasePort1 = io->win[0].base;
624 link->io.NumPorts1 = io->win[0].len;
625 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
626 }
627
628 link->conf.Attributes = CONF_ENABLE_IRQ;
629 link->conf.IntType = INT_MEMORY_AND_IO;
630 link->conf.ConfigIndex = 8;
631 link->conf.Present = PRESENT_OPTION;
632
633 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
634 link->irq.Handler = mgslpc_isr;
635 link->irq.Instance = info;
636 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
637
638 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
639
640 info->io_base = link->io.BasePort1;
641 info->irq_level = link->irq.AssignedIRQ;
642
643 /* add to linked list of devices */
644 sprintf(info->node.dev_name, "mgslpc0");
645 info->node.major = info->node.minor = 0;
646 link->dev_node = &info->node;
647
648 printk(KERN_INFO "%s: index 0x%02x:",
649 info->node.dev_name, link->conf.ConfigIndex);
650 if (link->conf.Attributes & CONF_ENABLE_IRQ)
651 printk(", irq %d", link->irq.AssignedIRQ);
652 if (link->io.NumPorts1)
653 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
654 link->io.BasePort1+link->io.NumPorts1-1);
655 printk("\n");
656 return 0;
657
658 cs_failed:
659 cs_error(link, last_fn, last_ret);
660 mgslpc_release((u_long)link);
661 return -ENODEV;
662 }
663
664 /* Card has been removed.
665 * Unregister device and release PCMCIA configuration.
666 * If device is open, postpone until it is closed.
667 */
668 static void mgslpc_release(u_long arg)
669 {
670 struct pcmcia_device *link = (struct pcmcia_device *)arg;
671
672 if (debug_level >= DEBUG_LEVEL_INFO)
673 printk("mgslpc_release(0x%p)\n", link);
674
675 pcmcia_disable_device(link);
676 }
677
678 static void mgslpc_detach(struct pcmcia_device *link)
679 {
680 if (debug_level >= DEBUG_LEVEL_INFO)
681 printk("mgslpc_detach(0x%p)\n", link);
682
683 ((MGSLPC_INFO *)link->priv)->stop = 1;
684 mgslpc_release((u_long)link);
685
686 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
687 }
688
689 static int mgslpc_suspend(struct pcmcia_device *link)
690 {
691 MGSLPC_INFO *info = link->priv;
692
693 info->stop = 1;
694
695 return 0;
696 }
697
698 static int mgslpc_resume(struct pcmcia_device *link)
699 {
700 MGSLPC_INFO *info = link->priv;
701
702 info->stop = 0;
703
704 return 0;
705 }
706
707
708 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
709 char *name, const char *routine)
710 {
711 #ifdef MGSLPC_PARANOIA_CHECK
712 static const char *badmagic =
713 "Warning: bad magic number for mgsl struct (%s) in %s\n";
714 static const char *badinfo =
715 "Warning: null mgslpc_info for (%s) in %s\n";
716
717 if (!info) {
718 printk(badinfo, name, routine);
719 return true;
720 }
721 if (info->magic != MGSLPC_MAGIC) {
722 printk(badmagic, name, routine);
723 return true;
724 }
725 #else
726 if (!info)
727 return true;
728 #endif
729 return false;
730 }
731
732
733 #define CMD_RXFIFO BIT7 // release current rx FIFO
734 #define CMD_RXRESET BIT6 // receiver reset
735 #define CMD_RXFIFO_READ BIT5
736 #define CMD_START_TIMER BIT4
737 #define CMD_TXFIFO BIT3 // release current tx FIFO
738 #define CMD_TXEOM BIT1 // transmit end message
739 #define CMD_TXRESET BIT0 // transmit reset
740
741 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
742 {
743 int i = 0;
744 /* wait for command completion */
745 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
746 udelay(1);
747 if (i++ == 1000)
748 return false;
749 }
750 return true;
751 }
752
753 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
754 {
755 wait_command_complete(info, channel);
756 write_reg(info, (unsigned char) (channel + CMDR), cmd);
757 }
758
759 static void tx_pause(struct tty_struct *tty)
760 {
761 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
762 unsigned long flags;
763
764 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
765 return;
766 if (debug_level >= DEBUG_LEVEL_INFO)
767 printk("tx_pause(%s)\n",info->device_name);
768
769 spin_lock_irqsave(&info->lock,flags);
770 if (info->tx_enabled)
771 tx_stop(info);
772 spin_unlock_irqrestore(&info->lock,flags);
773 }
774
775 static void tx_release(struct tty_struct *tty)
776 {
777 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
778 unsigned long flags;
779
780 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
781 return;
782 if (debug_level >= DEBUG_LEVEL_INFO)
783 printk("tx_release(%s)\n",info->device_name);
784
785 spin_lock_irqsave(&info->lock,flags);
786 if (!info->tx_enabled)
787 tx_start(info);
788 spin_unlock_irqrestore(&info->lock,flags);
789 }
790
791 /* Return next bottom half action to perform.
792 * or 0 if nothing to do.
793 */
794 static int bh_action(MGSLPC_INFO *info)
795 {
796 unsigned long flags;
797 int rc = 0;
798
799 spin_lock_irqsave(&info->lock,flags);
800
801 if (info->pending_bh & BH_RECEIVE) {
802 info->pending_bh &= ~BH_RECEIVE;
803 rc = BH_RECEIVE;
804 } else if (info->pending_bh & BH_TRANSMIT) {
805 info->pending_bh &= ~BH_TRANSMIT;
806 rc = BH_TRANSMIT;
807 } else if (info->pending_bh & BH_STATUS) {
808 info->pending_bh &= ~BH_STATUS;
809 rc = BH_STATUS;
810 }
811
812 if (!rc) {
813 /* Mark BH routine as complete */
814 info->bh_running = false;
815 info->bh_requested = false;
816 }
817
818 spin_unlock_irqrestore(&info->lock,flags);
819
820 return rc;
821 }
822
823 static void bh_handler(struct work_struct *work)
824 {
825 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
826 int action;
827
828 if (!info)
829 return;
830
831 if (debug_level >= DEBUG_LEVEL_BH)
832 printk( "%s(%d):bh_handler(%s) entry\n",
833 __FILE__,__LINE__,info->device_name);
834
835 info->bh_running = true;
836
837 while((action = bh_action(info)) != 0) {
838
839 /* Process work item */
840 if ( debug_level >= DEBUG_LEVEL_BH )
841 printk( "%s(%d):bh_handler() work item action=%d\n",
842 __FILE__,__LINE__,action);
843
844 switch (action) {
845
846 case BH_RECEIVE:
847 while(rx_get_frame(info));
848 break;
849 case BH_TRANSMIT:
850 bh_transmit(info);
851 break;
852 case BH_STATUS:
853 bh_status(info);
854 break;
855 default:
856 /* unknown work item ID */
857 printk("Unknown work item ID=%08X!\n", action);
858 break;
859 }
860 }
861
862 if (debug_level >= DEBUG_LEVEL_BH)
863 printk( "%s(%d):bh_handler(%s) exit\n",
864 __FILE__,__LINE__,info->device_name);
865 }
866
867 static void bh_transmit(MGSLPC_INFO *info)
868 {
869 struct tty_struct *tty = info->tty;
870 if (debug_level >= DEBUG_LEVEL_BH)
871 printk("bh_transmit() entry on %s\n", info->device_name);
872
873 if (tty)
874 tty_wakeup(tty);
875 }
876
877 static void bh_status(MGSLPC_INFO *info)
878 {
879 info->ri_chkcount = 0;
880 info->dsr_chkcount = 0;
881 info->dcd_chkcount = 0;
882 info->cts_chkcount = 0;
883 }
884
885 /* eom: non-zero = end of frame */
886 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
887 {
888 unsigned char data[2];
889 unsigned char fifo_count, read_count, i;
890 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
891
892 if (debug_level >= DEBUG_LEVEL_ISR)
893 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
894
895 if (!info->rx_enabled)
896 return;
897
898 if (info->rx_frame_count >= info->rx_buf_count) {
899 /* no more free buffers */
900 issue_command(info, CHA, CMD_RXRESET);
901 info->pending_bh |= BH_RECEIVE;
902 info->rx_overflow = true;
903 info->icount.buf_overrun++;
904 return;
905 }
906
907 if (eom) {
908 /* end of frame, get FIFO count from RBCL register */
909 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
910 fifo_count = 32;
911 } else
912 fifo_count = 32;
913
914 do {
915 if (fifo_count == 1) {
916 read_count = 1;
917 data[0] = read_reg(info, CHA + RXFIFO);
918 } else {
919 read_count = 2;
920 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
921 }
922 fifo_count -= read_count;
923 if (!fifo_count && eom)
924 buf->status = data[--read_count];
925
926 for (i = 0; i < read_count; i++) {
927 if (buf->count >= info->max_frame_size) {
928 /* frame too large, reset receiver and reset current buffer */
929 issue_command(info, CHA, CMD_RXRESET);
930 buf->count = 0;
931 return;
932 }
933 *(buf->data + buf->count) = data[i];
934 buf->count++;
935 }
936 } while (fifo_count);
937
938 if (eom) {
939 info->pending_bh |= BH_RECEIVE;
940 info->rx_frame_count++;
941 info->rx_put++;
942 if (info->rx_put >= info->rx_buf_count)
943 info->rx_put = 0;
944 }
945 issue_command(info, CHA, CMD_RXFIFO);
946 }
947
948 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
949 {
950 unsigned char data, status, flag;
951 int fifo_count;
952 int work = 0;
953 struct tty_struct *tty = info->tty;
954 struct mgsl_icount *icount = &info->icount;
955
956 if (tcd) {
957 /* early termination, get FIFO count from RBCL register */
958 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
959
960 /* Zero fifo count could mean 0 or 32 bytes available.
961 * If BIT5 of STAR is set then at least 1 byte is available.
962 */
963 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
964 fifo_count = 32;
965 } else
966 fifo_count = 32;
967
968 tty_buffer_request_room(tty, fifo_count);
969 /* Flush received async data to receive data buffer. */
970 while (fifo_count) {
971 data = read_reg(info, CHA + RXFIFO);
972 status = read_reg(info, CHA + RXFIFO);
973 fifo_count -= 2;
974
975 icount->rx++;
976 flag = TTY_NORMAL;
977
978 // if no frameing/crc error then save data
979 // BIT7:parity error
980 // BIT6:framing error
981
982 if (status & (BIT7 + BIT6)) {
983 if (status & BIT7)
984 icount->parity++;
985 else
986 icount->frame++;
987
988 /* discard char if tty control flags say so */
989 if (status & info->ignore_status_mask)
990 continue;
991
992 status &= info->read_status_mask;
993
994 if (status & BIT7)
995 flag = TTY_PARITY;
996 else if (status & BIT6)
997 flag = TTY_FRAME;
998 }
999 work += tty_insert_flip_char(tty, data, flag);
1000 }
1001 issue_command(info, CHA, CMD_RXFIFO);
1002
1003 if (debug_level >= DEBUG_LEVEL_ISR) {
1004 printk("%s(%d):rx_ready_async",
1005 __FILE__,__LINE__);
1006 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1007 __FILE__,__LINE__,icount->rx,icount->brk,
1008 icount->parity,icount->frame,icount->overrun);
1009 }
1010
1011 if (work)
1012 tty_flip_buffer_push(tty);
1013 }
1014
1015
1016 static void tx_done(MGSLPC_INFO *info)
1017 {
1018 if (!info->tx_active)
1019 return;
1020
1021 info->tx_active = false;
1022 info->tx_aborting = false;
1023
1024 if (info->params.mode == MGSL_MODE_ASYNC)
1025 return;
1026
1027 info->tx_count = info->tx_put = info->tx_get = 0;
1028 del_timer(&info->tx_timer);
1029
1030 if (info->drop_rts_on_tx_done) {
1031 get_signals(info);
1032 if (info->serial_signals & SerialSignal_RTS) {
1033 info->serial_signals &= ~SerialSignal_RTS;
1034 set_signals(info);
1035 }
1036 info->drop_rts_on_tx_done = false;
1037 }
1038
1039 #if SYNCLINK_GENERIC_HDLC
1040 if (info->netcount)
1041 hdlcdev_tx_done(info);
1042 else
1043 #endif
1044 {
1045 if (info->tty->stopped || info->tty->hw_stopped) {
1046 tx_stop(info);
1047 return;
1048 }
1049 info->pending_bh |= BH_TRANSMIT;
1050 }
1051 }
1052
1053 static void tx_ready(MGSLPC_INFO *info)
1054 {
1055 unsigned char fifo_count = 32;
1056 int c;
1057
1058 if (debug_level >= DEBUG_LEVEL_ISR)
1059 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1060
1061 if (info->params.mode == MGSL_MODE_HDLC) {
1062 if (!info->tx_active)
1063 return;
1064 } else {
1065 if (info->tty->stopped || info->tty->hw_stopped) {
1066 tx_stop(info);
1067 return;
1068 }
1069 if (!info->tx_count)
1070 info->tx_active = false;
1071 }
1072
1073 if (!info->tx_count)
1074 return;
1075
1076 while (info->tx_count && fifo_count) {
1077 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1078
1079 if (c == 1) {
1080 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1081 } else {
1082 write_reg16(info, CHA + TXFIFO,
1083 *((unsigned short*)(info->tx_buf + info->tx_get)));
1084 }
1085 info->tx_count -= c;
1086 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1087 fifo_count -= c;
1088 }
1089
1090 if (info->params.mode == MGSL_MODE_ASYNC) {
1091 if (info->tx_count < WAKEUP_CHARS)
1092 info->pending_bh |= BH_TRANSMIT;
1093 issue_command(info, CHA, CMD_TXFIFO);
1094 } else {
1095 if (info->tx_count)
1096 issue_command(info, CHA, CMD_TXFIFO);
1097 else
1098 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1099 }
1100 }
1101
1102 static void cts_change(MGSLPC_INFO *info)
1103 {
1104 get_signals(info);
1105 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1106 irq_disable(info, CHB, IRQ_CTS);
1107 info->icount.cts++;
1108 if (info->serial_signals & SerialSignal_CTS)
1109 info->input_signal_events.cts_up++;
1110 else
1111 info->input_signal_events.cts_down++;
1112 wake_up_interruptible(&info->status_event_wait_q);
1113 wake_up_interruptible(&info->event_wait_q);
1114
1115 if (info->flags & ASYNC_CTS_FLOW) {
1116 if (info->tty->hw_stopped) {
1117 if (info->serial_signals & SerialSignal_CTS) {
1118 if (debug_level >= DEBUG_LEVEL_ISR)
1119 printk("CTS tx start...");
1120 if (info->tty)
1121 info->tty->hw_stopped = 0;
1122 tx_start(info);
1123 info->pending_bh |= BH_TRANSMIT;
1124 return;
1125 }
1126 } else {
1127 if (!(info->serial_signals & SerialSignal_CTS)) {
1128 if (debug_level >= DEBUG_LEVEL_ISR)
1129 printk("CTS tx stop...");
1130 if (info->tty)
1131 info->tty->hw_stopped = 1;
1132 tx_stop(info);
1133 }
1134 }
1135 }
1136 info->pending_bh |= BH_STATUS;
1137 }
1138
1139 static void dcd_change(MGSLPC_INFO *info)
1140 {
1141 get_signals(info);
1142 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1143 irq_disable(info, CHB, IRQ_DCD);
1144 info->icount.dcd++;
1145 if (info->serial_signals & SerialSignal_DCD) {
1146 info->input_signal_events.dcd_up++;
1147 }
1148 else
1149 info->input_signal_events.dcd_down++;
1150 #if SYNCLINK_GENERIC_HDLC
1151 if (info->netcount) {
1152 if (info->serial_signals & SerialSignal_DCD)
1153 netif_carrier_on(info->netdev);
1154 else
1155 netif_carrier_off(info->netdev);
1156 }
1157 #endif
1158 wake_up_interruptible(&info->status_event_wait_q);
1159 wake_up_interruptible(&info->event_wait_q);
1160
1161 if (info->flags & ASYNC_CHECK_CD) {
1162 if (debug_level >= DEBUG_LEVEL_ISR)
1163 printk("%s CD now %s...", info->device_name,
1164 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1165 if (info->serial_signals & SerialSignal_DCD)
1166 wake_up_interruptible(&info->open_wait);
1167 else {
1168 if (debug_level >= DEBUG_LEVEL_ISR)
1169 printk("doing serial hangup...");
1170 if (info->tty)
1171 tty_hangup(info->tty);
1172 }
1173 }
1174 info->pending_bh |= BH_STATUS;
1175 }
1176
1177 static void dsr_change(MGSLPC_INFO *info)
1178 {
1179 get_signals(info);
1180 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1181 port_irq_disable(info, PVR_DSR);
1182 info->icount.dsr++;
1183 if (info->serial_signals & SerialSignal_DSR)
1184 info->input_signal_events.dsr_up++;
1185 else
1186 info->input_signal_events.dsr_down++;
1187 wake_up_interruptible(&info->status_event_wait_q);
1188 wake_up_interruptible(&info->event_wait_q);
1189 info->pending_bh |= BH_STATUS;
1190 }
1191
1192 static void ri_change(MGSLPC_INFO *info)
1193 {
1194 get_signals(info);
1195 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1196 port_irq_disable(info, PVR_RI);
1197 info->icount.rng++;
1198 if (info->serial_signals & SerialSignal_RI)
1199 info->input_signal_events.ri_up++;
1200 else
1201 info->input_signal_events.ri_down++;
1202 wake_up_interruptible(&info->status_event_wait_q);
1203 wake_up_interruptible(&info->event_wait_q);
1204 info->pending_bh |= BH_STATUS;
1205 }
1206
1207 /* Interrupt service routine entry point.
1208 *
1209 * Arguments:
1210 *
1211 * irq interrupt number that caused interrupt
1212 * dev_id device ID supplied during interrupt registration
1213 */
1214 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1215 {
1216 MGSLPC_INFO *info = dev_id;
1217 unsigned short isr;
1218 unsigned char gis, pis;
1219 int count=0;
1220
1221 if (debug_level >= DEBUG_LEVEL_ISR)
1222 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1223
1224 if (!(info->p_dev->_locked))
1225 return IRQ_HANDLED;
1226
1227 spin_lock(&info->lock);
1228
1229 while ((gis = read_reg(info, CHA + GIS))) {
1230 if (debug_level >= DEBUG_LEVEL_ISR)
1231 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1232
1233 if ((gis & 0x70) || count > 1000) {
1234 printk("synclink_cs:hardware failed or ejected\n");
1235 break;
1236 }
1237 count++;
1238
1239 if (gis & (BIT1 + BIT0)) {
1240 isr = read_reg16(info, CHB + ISR);
1241 if (isr & IRQ_DCD)
1242 dcd_change(info);
1243 if (isr & IRQ_CTS)
1244 cts_change(info);
1245 }
1246 if (gis & (BIT3 + BIT2))
1247 {
1248 isr = read_reg16(info, CHA + ISR);
1249 if (isr & IRQ_TIMER) {
1250 info->irq_occurred = true;
1251 irq_disable(info, CHA, IRQ_TIMER);
1252 }
1253
1254 /* receive IRQs */
1255 if (isr & IRQ_EXITHUNT) {
1256 info->icount.exithunt++;
1257 wake_up_interruptible(&info->event_wait_q);
1258 }
1259 if (isr & IRQ_BREAK_ON) {
1260 info->icount.brk++;
1261 if (info->flags & ASYNC_SAK)
1262 do_SAK(info->tty);
1263 }
1264 if (isr & IRQ_RXTIME) {
1265 issue_command(info, CHA, CMD_RXFIFO_READ);
1266 }
1267 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1268 if (info->params.mode == MGSL_MODE_HDLC)
1269 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1270 else
1271 rx_ready_async(info, isr & IRQ_RXEOM);
1272 }
1273
1274 /* transmit IRQs */
1275 if (isr & IRQ_UNDERRUN) {
1276 if (info->tx_aborting)
1277 info->icount.txabort++;
1278 else
1279 info->icount.txunder++;
1280 tx_done(info);
1281 }
1282 else if (isr & IRQ_ALLSENT) {
1283 info->icount.txok++;
1284 tx_done(info);
1285 }
1286 else if (isr & IRQ_TXFIFO)
1287 tx_ready(info);
1288 }
1289 if (gis & BIT7) {
1290 pis = read_reg(info, CHA + PIS);
1291 if (pis & BIT1)
1292 dsr_change(info);
1293 if (pis & BIT2)
1294 ri_change(info);
1295 }
1296 }
1297
1298 /* Request bottom half processing if there's something
1299 * for it to do and the bh is not already running
1300 */
1301
1302 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1303 if ( debug_level >= DEBUG_LEVEL_ISR )
1304 printk("%s(%d):%s queueing bh task.\n",
1305 __FILE__,__LINE__,info->device_name);
1306 schedule_work(&info->task);
1307 info->bh_requested = true;
1308 }
1309
1310 spin_unlock(&info->lock);
1311
1312 if (debug_level >= DEBUG_LEVEL_ISR)
1313 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1314 __FILE__, __LINE__, info->irq_level);
1315
1316 return IRQ_HANDLED;
1317 }
1318
1319 /* Initialize and start device.
1320 */
1321 static int startup(MGSLPC_INFO * info)
1322 {
1323 int retval = 0;
1324
1325 if (debug_level >= DEBUG_LEVEL_INFO)
1326 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1327
1328 if (info->flags & ASYNC_INITIALIZED)
1329 return 0;
1330
1331 if (!info->tx_buf) {
1332 /* allocate a page of memory for a transmit buffer */
1333 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1334 if (!info->tx_buf) {
1335 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1336 __FILE__,__LINE__,info->device_name);
1337 return -ENOMEM;
1338 }
1339 }
1340
1341 info->pending_bh = 0;
1342
1343 memset(&info->icount, 0, sizeof(info->icount));
1344
1345 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1346
1347 /* Allocate and claim adapter resources */
1348 retval = claim_resources(info);
1349
1350 /* perform existance check and diagnostics */
1351 if ( !retval )
1352 retval = adapter_test(info);
1353
1354 if ( retval ) {
1355 if (capable(CAP_SYS_ADMIN) && info->tty)
1356 set_bit(TTY_IO_ERROR, &info->tty->flags);
1357 release_resources(info);
1358 return retval;
1359 }
1360
1361 /* program hardware for current parameters */
1362 mgslpc_change_params(info);
1363
1364 if (info->tty)
1365 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1366
1367 info->flags |= ASYNC_INITIALIZED;
1368
1369 return 0;
1370 }
1371
1372 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1373 */
1374 static void shutdown(MGSLPC_INFO * info)
1375 {
1376 unsigned long flags;
1377
1378 if (!(info->flags & ASYNC_INITIALIZED))
1379 return;
1380
1381 if (debug_level >= DEBUG_LEVEL_INFO)
1382 printk("%s(%d):mgslpc_shutdown(%s)\n",
1383 __FILE__,__LINE__, info->device_name );
1384
1385 /* clear status wait queue because status changes */
1386 /* can't happen after shutting down the hardware */
1387 wake_up_interruptible(&info->status_event_wait_q);
1388 wake_up_interruptible(&info->event_wait_q);
1389
1390 del_timer_sync(&info->tx_timer);
1391
1392 if (info->tx_buf) {
1393 free_page((unsigned long) info->tx_buf);
1394 info->tx_buf = NULL;
1395 }
1396
1397 spin_lock_irqsave(&info->lock,flags);
1398
1399 rx_stop(info);
1400 tx_stop(info);
1401
1402 /* TODO:disable interrupts instead of reset to preserve signal states */
1403 reset_device(info);
1404
1405 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1406 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1407 set_signals(info);
1408 }
1409
1410 spin_unlock_irqrestore(&info->lock,flags);
1411
1412 release_resources(info);
1413
1414 if (info->tty)
1415 set_bit(TTY_IO_ERROR, &info->tty->flags);
1416
1417 info->flags &= ~ASYNC_INITIALIZED;
1418 }
1419
1420 static void mgslpc_program_hw(MGSLPC_INFO *info)
1421 {
1422 unsigned long flags;
1423
1424 spin_lock_irqsave(&info->lock,flags);
1425
1426 rx_stop(info);
1427 tx_stop(info);
1428 info->tx_count = info->tx_put = info->tx_get = 0;
1429
1430 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1431 hdlc_mode(info);
1432 else
1433 async_mode(info);
1434
1435 set_signals(info);
1436
1437 info->dcd_chkcount = 0;
1438 info->cts_chkcount = 0;
1439 info->ri_chkcount = 0;
1440 info->dsr_chkcount = 0;
1441
1442 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1443 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1444 get_signals(info);
1445
1446 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1447 rx_start(info);
1448
1449 spin_unlock_irqrestore(&info->lock,flags);
1450 }
1451
1452 /* Reconfigure adapter based on new parameters
1453 */
1454 static void mgslpc_change_params(MGSLPC_INFO *info)
1455 {
1456 unsigned cflag;
1457 int bits_per_char;
1458
1459 if (!info->tty || !info->tty->termios)
1460 return;
1461
1462 if (debug_level >= DEBUG_LEVEL_INFO)
1463 printk("%s(%d):mgslpc_change_params(%s)\n",
1464 __FILE__,__LINE__, info->device_name );
1465
1466 cflag = info->tty->termios->c_cflag;
1467
1468 /* if B0 rate (hangup) specified then negate DTR and RTS */
1469 /* otherwise assert DTR and RTS */
1470 if (cflag & CBAUD)
1471 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1472 else
1473 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1474
1475 /* byte size and parity */
1476
1477 switch (cflag & CSIZE) {
1478 case CS5: info->params.data_bits = 5; break;
1479 case CS6: info->params.data_bits = 6; break;
1480 case CS7: info->params.data_bits = 7; break;
1481 case CS8: info->params.data_bits = 8; break;
1482 default: info->params.data_bits = 7; break;
1483 }
1484
1485 if (cflag & CSTOPB)
1486 info->params.stop_bits = 2;
1487 else
1488 info->params.stop_bits = 1;
1489
1490 info->params.parity = ASYNC_PARITY_NONE;
1491 if (cflag & PARENB) {
1492 if (cflag & PARODD)
1493 info->params.parity = ASYNC_PARITY_ODD;
1494 else
1495 info->params.parity = ASYNC_PARITY_EVEN;
1496 #ifdef CMSPAR
1497 if (cflag & CMSPAR)
1498 info->params.parity = ASYNC_PARITY_SPACE;
1499 #endif
1500 }
1501
1502 /* calculate number of jiffies to transmit a full
1503 * FIFO (32 bytes) at specified data rate
1504 */
1505 bits_per_char = info->params.data_bits +
1506 info->params.stop_bits + 1;
1507
1508 /* if port data rate is set to 460800 or less then
1509 * allow tty settings to override, otherwise keep the
1510 * current data rate.
1511 */
1512 if (info->params.data_rate <= 460800) {
1513 info->params.data_rate = tty_get_baud_rate(info->tty);
1514 }
1515
1516 if ( info->params.data_rate ) {
1517 info->timeout = (32*HZ*bits_per_char) /
1518 info->params.data_rate;
1519 }
1520 info->timeout += HZ/50; /* Add .02 seconds of slop */
1521
1522 if (cflag & CRTSCTS)
1523 info->flags |= ASYNC_CTS_FLOW;
1524 else
1525 info->flags &= ~ASYNC_CTS_FLOW;
1526
1527 if (cflag & CLOCAL)
1528 info->flags &= ~ASYNC_CHECK_CD;
1529 else
1530 info->flags |= ASYNC_CHECK_CD;
1531
1532 /* process tty input control flags */
1533
1534 info->read_status_mask = 0;
1535 if (I_INPCK(info->tty))
1536 info->read_status_mask |= BIT7 | BIT6;
1537 if (I_IGNPAR(info->tty))
1538 info->ignore_status_mask |= BIT7 | BIT6;
1539
1540 mgslpc_program_hw(info);
1541 }
1542
1543 /* Add a character to the transmit buffer
1544 */
1545 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1546 {
1547 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1548 unsigned long flags;
1549
1550 if (debug_level >= DEBUG_LEVEL_INFO) {
1551 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1552 __FILE__,__LINE__,ch,info->device_name);
1553 }
1554
1555 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1556 return 0;
1557
1558 if (!info->tx_buf)
1559 return 0;
1560
1561 spin_lock_irqsave(&info->lock,flags);
1562
1563 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1564 if (info->tx_count < TXBUFSIZE - 1) {
1565 info->tx_buf[info->tx_put++] = ch;
1566 info->tx_put &= TXBUFSIZE-1;
1567 info->tx_count++;
1568 }
1569 }
1570
1571 spin_unlock_irqrestore(&info->lock,flags);
1572 return 1;
1573 }
1574
1575 /* Enable transmitter so remaining characters in the
1576 * transmit buffer are sent.
1577 */
1578 static void mgslpc_flush_chars(struct tty_struct *tty)
1579 {
1580 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1581 unsigned long flags;
1582
1583 if (debug_level >= DEBUG_LEVEL_INFO)
1584 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1585 __FILE__,__LINE__,info->device_name,info->tx_count);
1586
1587 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1588 return;
1589
1590 if (info->tx_count <= 0 || tty->stopped ||
1591 tty->hw_stopped || !info->tx_buf)
1592 return;
1593
1594 if (debug_level >= DEBUG_LEVEL_INFO)
1595 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1596 __FILE__,__LINE__,info->device_name);
1597
1598 spin_lock_irqsave(&info->lock,flags);
1599 if (!info->tx_active)
1600 tx_start(info);
1601 spin_unlock_irqrestore(&info->lock,flags);
1602 }
1603
1604 /* Send a block of data
1605 *
1606 * Arguments:
1607 *
1608 * tty pointer to tty information structure
1609 * buf pointer to buffer containing send data
1610 * count size of send data in bytes
1611 *
1612 * Returns: number of characters written
1613 */
1614 static int mgslpc_write(struct tty_struct * tty,
1615 const unsigned char *buf, int count)
1616 {
1617 int c, ret = 0;
1618 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1619 unsigned long flags;
1620
1621 if (debug_level >= DEBUG_LEVEL_INFO)
1622 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1623 __FILE__,__LINE__,info->device_name,count);
1624
1625 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1626 !info->tx_buf)
1627 goto cleanup;
1628
1629 if (info->params.mode == MGSL_MODE_HDLC) {
1630 if (count > TXBUFSIZE) {
1631 ret = -EIO;
1632 goto cleanup;
1633 }
1634 if (info->tx_active)
1635 goto cleanup;
1636 else if (info->tx_count)
1637 goto start;
1638 }
1639
1640 for (;;) {
1641 c = min(count,
1642 min(TXBUFSIZE - info->tx_count - 1,
1643 TXBUFSIZE - info->tx_put));
1644 if (c <= 0)
1645 break;
1646
1647 memcpy(info->tx_buf + info->tx_put, buf, c);
1648
1649 spin_lock_irqsave(&info->lock,flags);
1650 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1651 info->tx_count += c;
1652 spin_unlock_irqrestore(&info->lock,flags);
1653
1654 buf += c;
1655 count -= c;
1656 ret += c;
1657 }
1658 start:
1659 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1660 spin_lock_irqsave(&info->lock,flags);
1661 if (!info->tx_active)
1662 tx_start(info);
1663 spin_unlock_irqrestore(&info->lock,flags);
1664 }
1665 cleanup:
1666 if (debug_level >= DEBUG_LEVEL_INFO)
1667 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1668 __FILE__,__LINE__,info->device_name,ret);
1669 return ret;
1670 }
1671
1672 /* Return the count of free bytes in transmit buffer
1673 */
1674 static int mgslpc_write_room(struct tty_struct *tty)
1675 {
1676 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1677 int ret;
1678
1679 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1680 return 0;
1681
1682 if (info->params.mode == MGSL_MODE_HDLC) {
1683 /* HDLC (frame oriented) mode */
1684 if (info->tx_active)
1685 return 0;
1686 else
1687 return HDLC_MAX_FRAME_SIZE;
1688 } else {
1689 ret = TXBUFSIZE - info->tx_count - 1;
1690 if (ret < 0)
1691 ret = 0;
1692 }
1693
1694 if (debug_level >= DEBUG_LEVEL_INFO)
1695 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1696 __FILE__,__LINE__, info->device_name, ret);
1697 return ret;
1698 }
1699
1700 /* Return the count of bytes in transmit buffer
1701 */
1702 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1703 {
1704 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1705 int rc;
1706
1707 if (debug_level >= DEBUG_LEVEL_INFO)
1708 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1709 __FILE__,__LINE__, info->device_name );
1710
1711 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1712 return 0;
1713
1714 if (info->params.mode == MGSL_MODE_HDLC)
1715 rc = info->tx_active ? info->max_frame_size : 0;
1716 else
1717 rc = info->tx_count;
1718
1719 if (debug_level >= DEBUG_LEVEL_INFO)
1720 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1721 __FILE__,__LINE__, info->device_name, rc);
1722
1723 return rc;
1724 }
1725
1726 /* Discard all data in the send buffer
1727 */
1728 static void mgslpc_flush_buffer(struct tty_struct *tty)
1729 {
1730 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1731 unsigned long flags;
1732
1733 if (debug_level >= DEBUG_LEVEL_INFO)
1734 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1735 __FILE__,__LINE__, info->device_name );
1736
1737 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1738 return;
1739
1740 spin_lock_irqsave(&info->lock,flags);
1741 info->tx_count = info->tx_put = info->tx_get = 0;
1742 del_timer(&info->tx_timer);
1743 spin_unlock_irqrestore(&info->lock,flags);
1744
1745 wake_up_interruptible(&tty->write_wait);
1746 tty_wakeup(tty);
1747 }
1748
1749 /* Send a high-priority XON/XOFF character
1750 */
1751 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1752 {
1753 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1754 unsigned long flags;
1755
1756 if (debug_level >= DEBUG_LEVEL_INFO)
1757 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1758 __FILE__,__LINE__, info->device_name, ch );
1759
1760 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1761 return;
1762
1763 info->x_char = ch;
1764 if (ch) {
1765 spin_lock_irqsave(&info->lock,flags);
1766 if (!info->tx_enabled)
1767 tx_start(info);
1768 spin_unlock_irqrestore(&info->lock,flags);
1769 }
1770 }
1771
1772 /* Signal remote device to throttle send data (our receive data)
1773 */
1774 static void mgslpc_throttle(struct tty_struct * tty)
1775 {
1776 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1777 unsigned long flags;
1778
1779 if (debug_level >= DEBUG_LEVEL_INFO)
1780 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1781 __FILE__,__LINE__, info->device_name );
1782
1783 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1784 return;
1785
1786 if (I_IXOFF(tty))
1787 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1788
1789 if (tty->termios->c_cflag & CRTSCTS) {
1790 spin_lock_irqsave(&info->lock,flags);
1791 info->serial_signals &= ~SerialSignal_RTS;
1792 set_signals(info);
1793 spin_unlock_irqrestore(&info->lock,flags);
1794 }
1795 }
1796
1797 /* Signal remote device to stop throttling send data (our receive data)
1798 */
1799 static void mgslpc_unthrottle(struct tty_struct * tty)
1800 {
1801 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1802 unsigned long flags;
1803
1804 if (debug_level >= DEBUG_LEVEL_INFO)
1805 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1806 __FILE__,__LINE__, info->device_name );
1807
1808 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1809 return;
1810
1811 if (I_IXOFF(tty)) {
1812 if (info->x_char)
1813 info->x_char = 0;
1814 else
1815 mgslpc_send_xchar(tty, START_CHAR(tty));
1816 }
1817
1818 if (tty->termios->c_cflag & CRTSCTS) {
1819 spin_lock_irqsave(&info->lock,flags);
1820 info->serial_signals |= SerialSignal_RTS;
1821 set_signals(info);
1822 spin_unlock_irqrestore(&info->lock,flags);
1823 }
1824 }
1825
1826 /* get the current serial statistics
1827 */
1828 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1829 {
1830 int err;
1831 if (debug_level >= DEBUG_LEVEL_INFO)
1832 printk("get_params(%s)\n", info->device_name);
1833 if (!user_icount) {
1834 memset(&info->icount, 0, sizeof(info->icount));
1835 } else {
1836 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1837 if (err)
1838 return -EFAULT;
1839 }
1840 return 0;
1841 }
1842
1843 /* get the current serial parameters
1844 */
1845 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1846 {
1847 int err;
1848 if (debug_level >= DEBUG_LEVEL_INFO)
1849 printk("get_params(%s)\n", info->device_name);
1850 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1851 if (err)
1852 return -EFAULT;
1853 return 0;
1854 }
1855
1856 /* set the serial parameters
1857 *
1858 * Arguments:
1859 *
1860 * info pointer to device instance data
1861 * new_params user buffer containing new serial params
1862 *
1863 * Returns: 0 if success, otherwise error code
1864 */
1865 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1866 {
1867 unsigned long flags;
1868 MGSL_PARAMS tmp_params;
1869 int err;
1870
1871 if (debug_level >= DEBUG_LEVEL_INFO)
1872 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1873 info->device_name );
1874 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1875 if (err) {
1876 if ( debug_level >= DEBUG_LEVEL_INFO )
1877 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1878 __FILE__,__LINE__,info->device_name);
1879 return -EFAULT;
1880 }
1881
1882 spin_lock_irqsave(&info->lock,flags);
1883 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1884 spin_unlock_irqrestore(&info->lock,flags);
1885
1886 mgslpc_change_params(info);
1887
1888 return 0;
1889 }
1890
1891 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1892 {
1893 int err;
1894 if (debug_level >= DEBUG_LEVEL_INFO)
1895 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1896 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1897 if (err)
1898 return -EFAULT;
1899 return 0;
1900 }
1901
1902 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1903 {
1904 unsigned long flags;
1905 if (debug_level >= DEBUG_LEVEL_INFO)
1906 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1907 spin_lock_irqsave(&info->lock,flags);
1908 info->idle_mode = idle_mode;
1909 tx_set_idle(info);
1910 spin_unlock_irqrestore(&info->lock,flags);
1911 return 0;
1912 }
1913
1914 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1915 {
1916 int err;
1917 if (debug_level >= DEBUG_LEVEL_INFO)
1918 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1919 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1920 if (err)
1921 return -EFAULT;
1922 return 0;
1923 }
1924
1925 static int set_interface(MGSLPC_INFO * info, int if_mode)
1926 {
1927 unsigned long flags;
1928 unsigned char val;
1929 if (debug_level >= DEBUG_LEVEL_INFO)
1930 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1931 spin_lock_irqsave(&info->lock,flags);
1932 info->if_mode = if_mode;
1933
1934 val = read_reg(info, PVR) & 0x0f;
1935 switch (info->if_mode)
1936 {
1937 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1938 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1939 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1940 }
1941 write_reg(info, PVR, val);
1942
1943 spin_unlock_irqrestore(&info->lock,flags);
1944 return 0;
1945 }
1946
1947 static int set_txenable(MGSLPC_INFO * info, int enable)
1948 {
1949 unsigned long flags;
1950
1951 if (debug_level >= DEBUG_LEVEL_INFO)
1952 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1953
1954 spin_lock_irqsave(&info->lock,flags);
1955 if (enable) {
1956 if (!info->tx_enabled)
1957 tx_start(info);
1958 } else {
1959 if (info->tx_enabled)
1960 tx_stop(info);
1961 }
1962 spin_unlock_irqrestore(&info->lock,flags);
1963 return 0;
1964 }
1965
1966 static int tx_abort(MGSLPC_INFO * info)
1967 {
1968 unsigned long flags;
1969
1970 if (debug_level >= DEBUG_LEVEL_INFO)
1971 printk("tx_abort(%s)\n", info->device_name);
1972
1973 spin_lock_irqsave(&info->lock,flags);
1974 if (info->tx_active && info->tx_count &&
1975 info->params.mode == MGSL_MODE_HDLC) {
1976 /* clear data count so FIFO is not filled on next IRQ.
1977 * This results in underrun and abort transmission.
1978 */
1979 info->tx_count = info->tx_put = info->tx_get = 0;
1980 info->tx_aborting = true;
1981 }
1982 spin_unlock_irqrestore(&info->lock,flags);
1983 return 0;
1984 }
1985
1986 static int set_rxenable(MGSLPC_INFO * info, int enable)
1987 {
1988 unsigned long flags;
1989
1990 if (debug_level >= DEBUG_LEVEL_INFO)
1991 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1992
1993 spin_lock_irqsave(&info->lock,flags);
1994 if (enable) {
1995 if (!info->rx_enabled)
1996 rx_start(info);
1997 } else {
1998 if (info->rx_enabled)
1999 rx_stop(info);
2000 }
2001 spin_unlock_irqrestore(&info->lock,flags);
2002 return 0;
2003 }
2004
2005 /* wait for specified event to occur
2006 *
2007 * Arguments: info pointer to device instance data
2008 * mask pointer to bitmask of events to wait for
2009 * Return Value: 0 if successful and bit mask updated with
2010 * of events triggerred,
2011 * otherwise error code
2012 */
2013 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2014 {
2015 unsigned long flags;
2016 int s;
2017 int rc=0;
2018 struct mgsl_icount cprev, cnow;
2019 int events;
2020 int mask;
2021 struct _input_signal_events oldsigs, newsigs;
2022 DECLARE_WAITQUEUE(wait, current);
2023
2024 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2025 if (rc)
2026 return -EFAULT;
2027
2028 if (debug_level >= DEBUG_LEVEL_INFO)
2029 printk("wait_events(%s,%d)\n", info->device_name, mask);
2030
2031 spin_lock_irqsave(&info->lock,flags);
2032
2033 /* return immediately if state matches requested events */
2034 get_signals(info);
2035 s = info->serial_signals;
2036 events = mask &
2037 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2038 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2039 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2040 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2041 if (events) {
2042 spin_unlock_irqrestore(&info->lock,flags);
2043 goto exit;
2044 }
2045
2046 /* save current irq counts */
2047 cprev = info->icount;
2048 oldsigs = info->input_signal_events;
2049
2050 if ((info->params.mode == MGSL_MODE_HDLC) &&
2051 (mask & MgslEvent_ExitHuntMode))
2052 irq_enable(info, CHA, IRQ_EXITHUNT);
2053
2054 set_current_state(TASK_INTERRUPTIBLE);
2055 add_wait_queue(&info->event_wait_q, &wait);
2056
2057 spin_unlock_irqrestore(&info->lock,flags);
2058
2059
2060 for(;;) {
2061 schedule();
2062 if (signal_pending(current)) {
2063 rc = -ERESTARTSYS;
2064 break;
2065 }
2066
2067 /* get current irq counts */
2068 spin_lock_irqsave(&info->lock,flags);
2069 cnow = info->icount;
2070 newsigs = info->input_signal_events;
2071 set_current_state(TASK_INTERRUPTIBLE);
2072 spin_unlock_irqrestore(&info->lock,flags);
2073
2074 /* if no change, wait aborted for some reason */
2075 if (newsigs.dsr_up == oldsigs.dsr_up &&
2076 newsigs.dsr_down == oldsigs.dsr_down &&
2077 newsigs.dcd_up == oldsigs.dcd_up &&
2078 newsigs.dcd_down == oldsigs.dcd_down &&
2079 newsigs.cts_up == oldsigs.cts_up &&
2080 newsigs.cts_down == oldsigs.cts_down &&
2081 newsigs.ri_up == oldsigs.ri_up &&
2082 newsigs.ri_down == oldsigs.ri_down &&
2083 cnow.exithunt == cprev.exithunt &&
2084 cnow.rxidle == cprev.rxidle) {
2085 rc = -EIO;
2086 break;
2087 }
2088
2089 events = mask &
2090 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2091 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2092 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2093 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2094 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2095 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2096 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2097 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2098 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2099 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2100 if (events)
2101 break;
2102
2103 cprev = cnow;
2104 oldsigs = newsigs;
2105 }
2106
2107 remove_wait_queue(&info->event_wait_q, &wait);
2108 set_current_state(TASK_RUNNING);
2109
2110 if (mask & MgslEvent_ExitHuntMode) {
2111 spin_lock_irqsave(&info->lock,flags);
2112 if (!waitqueue_active(&info->event_wait_q))
2113 irq_disable(info, CHA, IRQ_EXITHUNT);
2114 spin_unlock_irqrestore(&info->lock,flags);
2115 }
2116 exit:
2117 if (rc == 0)
2118 PUT_USER(rc, events, mask_ptr);
2119 return rc;
2120 }
2121
2122 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2123 {
2124 unsigned long flags;
2125 int rc;
2126 struct mgsl_icount cprev, cnow;
2127 DECLARE_WAITQUEUE(wait, current);
2128
2129 /* save current irq counts */
2130 spin_lock_irqsave(&info->lock,flags);
2131 cprev = info->icount;
2132 add_wait_queue(&info->status_event_wait_q, &wait);
2133 set_current_state(TASK_INTERRUPTIBLE);
2134 spin_unlock_irqrestore(&info->lock,flags);
2135
2136 for(;;) {
2137 schedule();
2138 if (signal_pending(current)) {
2139 rc = -ERESTARTSYS;
2140 break;
2141 }
2142
2143 /* get new irq counts */
2144 spin_lock_irqsave(&info->lock,flags);
2145 cnow = info->icount;
2146 set_current_state(TASK_INTERRUPTIBLE);
2147 spin_unlock_irqrestore(&info->lock,flags);
2148
2149 /* if no change, wait aborted for some reason */
2150 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2151 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2152 rc = -EIO;
2153 break;
2154 }
2155
2156 /* check for change in caller specified modem input */
2157 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2158 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2159 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2160 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2161 rc = 0;
2162 break;
2163 }
2164
2165 cprev = cnow;
2166 }
2167 remove_wait_queue(&info->status_event_wait_q, &wait);
2168 set_current_state(TASK_RUNNING);
2169 return rc;
2170 }
2171
2172 /* return the state of the serial control and status signals
2173 */
2174 static int tiocmget(struct tty_struct *tty, struct file *file)
2175 {
2176 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2177 unsigned int result;
2178 unsigned long flags;
2179
2180 spin_lock_irqsave(&info->lock,flags);
2181 get_signals(info);
2182 spin_unlock_irqrestore(&info->lock,flags);
2183
2184 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2185 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2186 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2187 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2188 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2189 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2190
2191 if (debug_level >= DEBUG_LEVEL_INFO)
2192 printk("%s(%d):%s tiocmget() value=%08X\n",
2193 __FILE__,__LINE__, info->device_name, result );
2194 return result;
2195 }
2196
2197 /* set modem control signals (DTR/RTS)
2198 */
2199 static int tiocmset(struct tty_struct *tty, struct file *file,
2200 unsigned int set, unsigned int clear)
2201 {
2202 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2203 unsigned long flags;
2204
2205 if (debug_level >= DEBUG_LEVEL_INFO)
2206 printk("%s(%d):%s tiocmset(%x,%x)\n",
2207 __FILE__,__LINE__,info->device_name, set, clear);
2208
2209 if (set & TIOCM_RTS)
2210 info->serial_signals |= SerialSignal_RTS;
2211 if (set & TIOCM_DTR)
2212 info->serial_signals |= SerialSignal_DTR;
2213 if (clear & TIOCM_RTS)
2214 info->serial_signals &= ~SerialSignal_RTS;
2215 if (clear & TIOCM_DTR)
2216 info->serial_signals &= ~SerialSignal_DTR;
2217
2218 spin_lock_irqsave(&info->lock,flags);
2219 set_signals(info);
2220 spin_unlock_irqrestore(&info->lock,flags);
2221
2222 return 0;
2223 }
2224
2225 /* Set or clear transmit break condition
2226 *
2227 * Arguments: tty pointer to tty instance data
2228 * break_state -1=set break condition, 0=clear
2229 */
2230 static int mgslpc_break(struct tty_struct *tty, int break_state)
2231 {
2232 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2233 unsigned long flags;
2234
2235 if (debug_level >= DEBUG_LEVEL_INFO)
2236 printk("%s(%d):mgslpc_break(%s,%d)\n",
2237 __FILE__,__LINE__, info->device_name, break_state);
2238
2239 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2240 return -EINVAL;
2241
2242 spin_lock_irqsave(&info->lock,flags);
2243 if (break_state == -1)
2244 set_reg_bits(info, CHA+DAFO, BIT6);
2245 else
2246 clear_reg_bits(info, CHA+DAFO, BIT6);
2247 spin_unlock_irqrestore(&info->lock,flags);
2248 return 0;
2249 }
2250
2251 /* Service an IOCTL request
2252 *
2253 * Arguments:
2254 *
2255 * tty pointer to tty instance data
2256 * file pointer to associated file object for device
2257 * cmd IOCTL command code
2258 * arg command argument/context
2259 *
2260 * Return Value: 0 if success, otherwise error code
2261 */
2262 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2263 unsigned int cmd, unsigned long arg)
2264 {
2265 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2266
2267 if (debug_level >= DEBUG_LEVEL_INFO)
2268 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2269 info->device_name, cmd );
2270
2271 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2272 return -ENODEV;
2273
2274 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2275 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2276 if (tty->flags & (1 << TTY_IO_ERROR))
2277 return -EIO;
2278 }
2279
2280 return ioctl_common(info, cmd, arg);
2281 }
2282
2283 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2284 {
2285 int error;
2286 struct mgsl_icount cnow; /* kernel counter temps */
2287 struct serial_icounter_struct __user *p_cuser; /* user space */
2288 void __user *argp = (void __user *)arg;
2289 unsigned long flags;
2290
2291 switch (cmd) {
2292 case MGSL_IOCGPARAMS:
2293 return get_params(info, argp);
2294 case MGSL_IOCSPARAMS:
2295 return set_params(info, argp);
2296 case MGSL_IOCGTXIDLE:
2297 return get_txidle(info, argp);
2298 case MGSL_IOCSTXIDLE:
2299 return set_txidle(info, (int)arg);
2300 case MGSL_IOCGIF:
2301 return get_interface(info, argp);
2302 case MGSL_IOCSIF:
2303 return set_interface(info,(int)arg);
2304 case MGSL_IOCTXENABLE:
2305 return set_txenable(info,(int)arg);
2306 case MGSL_IOCRXENABLE:
2307 return set_rxenable(info,(int)arg);
2308 case MGSL_IOCTXABORT:
2309 return tx_abort(info);
2310 case MGSL_IOCGSTATS:
2311 return get_stats(info, argp);
2312 case MGSL_IOCWAITEVENT:
2313 return wait_events(info, argp);
2314 case TIOCMIWAIT:
2315 return modem_input_wait(info,(int)arg);
2316 case TIOCGICOUNT:
2317 spin_lock_irqsave(&info->lock,flags);
2318 cnow = info->icount;
2319 spin_unlock_irqrestore(&info->lock,flags);
2320 p_cuser = argp;
2321 PUT_USER(error,cnow.cts, &p_cuser->cts);
2322 if (error) return error;
2323 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2324 if (error) return error;
2325 PUT_USER(error,cnow.rng, &p_cuser->rng);
2326 if (error) return error;
2327 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2328 if (error) return error;
2329 PUT_USER(error,cnow.rx, &p_cuser->rx);
2330 if (error) return error;
2331 PUT_USER(error,cnow.tx, &p_cuser->tx);
2332 if (error) return error;
2333 PUT_USER(error,cnow.frame, &p_cuser->frame);
2334 if (error) return error;
2335 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2336 if (error) return error;
2337 PUT_USER(error,cnow.parity, &p_cuser->parity);
2338 if (error) return error;
2339 PUT_USER(error,cnow.brk, &p_cuser->brk);
2340 if (error) return error;
2341 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2342 if (error) return error;
2343 return 0;
2344 default:
2345 return -ENOIOCTLCMD;
2346 }
2347 return 0;
2348 }
2349
2350 /* Set new termios settings
2351 *
2352 * Arguments:
2353 *
2354 * tty pointer to tty structure
2355 * termios pointer to buffer to hold returned old termios
2356 */
2357 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2358 {
2359 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2360 unsigned long flags;
2361
2362 if (debug_level >= DEBUG_LEVEL_INFO)
2363 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2364 tty->driver->name );
2365
2366 /* just return if nothing has changed */
2367 if ((tty->termios->c_cflag == old_termios->c_cflag)
2368 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2369 == RELEVANT_IFLAG(old_termios->c_iflag)))
2370 return;
2371
2372 mgslpc_change_params(info);
2373
2374 /* Handle transition to B0 status */
2375 if (old_termios->c_cflag & CBAUD &&
2376 !(tty->termios->c_cflag & CBAUD)) {
2377 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2378 spin_lock_irqsave(&info->lock,flags);
2379 set_signals(info);
2380 spin_unlock_irqrestore(&info->lock,flags);
2381 }
2382
2383 /* Handle transition away from B0 status */
2384 if (!(old_termios->c_cflag & CBAUD) &&
2385 tty->termios->c_cflag & CBAUD) {
2386 info->serial_signals |= SerialSignal_DTR;
2387 if (!(tty->termios->c_cflag & CRTSCTS) ||
2388 !test_bit(TTY_THROTTLED, &tty->flags)) {
2389 info->serial_signals |= SerialSignal_RTS;
2390 }
2391 spin_lock_irqsave(&info->lock,flags);
2392 set_signals(info);
2393 spin_unlock_irqrestore(&info->lock,flags);
2394 }
2395
2396 /* Handle turning off CRTSCTS */
2397 if (old_termios->c_cflag & CRTSCTS &&
2398 !(tty->termios->c_cflag & CRTSCTS)) {
2399 tty->hw_stopped = 0;
2400 tx_release(tty);
2401 }
2402 }
2403
2404 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2405 {
2406 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2407
2408 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2409 return;
2410
2411 if (debug_level >= DEBUG_LEVEL_INFO)
2412 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2413 __FILE__,__LINE__, info->device_name, info->count);
2414
2415 if (!info->count)
2416 return;
2417
2418 if (tty_hung_up_p(filp))
2419 goto cleanup;
2420
2421 if ((tty->count == 1) && (info->count != 1)) {
2422 /*
2423 * tty->count is 1 and the tty structure will be freed.
2424 * info->count should be one in this case.
2425 * if it's not, correct it so that the port is shutdown.
2426 */
2427 printk("mgslpc_close: bad refcount; tty->count is 1, "
2428 "info->count is %d\n", info->count);
2429 info->count = 1;
2430 }
2431
2432 info->count--;
2433
2434 /* if at least one open remaining, leave hardware active */
2435 if (info->count)
2436 goto cleanup;
2437
2438 info->flags |= ASYNC_CLOSING;
2439
2440 /* set tty->closing to notify line discipline to
2441 * only process XON/XOFF characters. Only the N_TTY
2442 * discipline appears to use this (ppp does not).
2443 */
2444 tty->closing = 1;
2445
2446 /* wait for transmit data to clear all layers */
2447
2448 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2449 if (debug_level >= DEBUG_LEVEL_INFO)
2450 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2451 __FILE__,__LINE__, info->device_name );
2452 tty_wait_until_sent(tty, info->closing_wait);
2453 }
2454
2455 if (info->flags & ASYNC_INITIALIZED)
2456 mgslpc_wait_until_sent(tty, info->timeout);
2457
2458 mgslpc_flush_buffer(tty);
2459
2460 tty_ldisc_flush(tty);
2461
2462 shutdown(info);
2463
2464 tty->closing = 0;
2465 info->tty = NULL;
2466
2467 if (info->blocked_open) {
2468 if (info->close_delay) {
2469 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2470 }
2471 wake_up_interruptible(&info->open_wait);
2472 }
2473
2474 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2475
2476 wake_up_interruptible(&info->close_wait);
2477
2478 cleanup:
2479 if (debug_level >= DEBUG_LEVEL_INFO)
2480 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2481 tty->driver->name, info->count);
2482 }
2483
2484 /* Wait until the transmitter is empty.
2485 */
2486 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2487 {
2488 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2489 unsigned long orig_jiffies, char_time;
2490
2491 if (!info )
2492 return;
2493
2494 if (debug_level >= DEBUG_LEVEL_INFO)
2495 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2496 __FILE__,__LINE__, info->device_name );
2497
2498 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2499 return;
2500
2501 if (!(info->flags & ASYNC_INITIALIZED))
2502 goto exit;
2503
2504 orig_jiffies = jiffies;
2505
2506 /* Set check interval to 1/5 of estimated time to
2507 * send a character, and make it at least 1. The check
2508 * interval should also be less than the timeout.
2509 * Note: use tight timings here to satisfy the NIST-PCTS.
2510 */
2511
2512 if ( info->params.data_rate ) {
2513 char_time = info->timeout/(32 * 5);
2514 if (!char_time)
2515 char_time++;
2516 } else
2517 char_time = 1;
2518
2519 if (timeout)
2520 char_time = min_t(unsigned long, char_time, timeout);
2521
2522 if (info->params.mode == MGSL_MODE_HDLC) {
2523 while (info->tx_active) {
2524 msleep_interruptible(jiffies_to_msecs(char_time));
2525 if (signal_pending(current))
2526 break;
2527 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2528 break;
2529 }
2530 } else {
2531 while ((info->tx_count || info->tx_active) &&
2532 info->tx_enabled) {
2533 msleep_interruptible(jiffies_to_msecs(char_time));
2534 if (signal_pending(current))
2535 break;
2536 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2537 break;
2538 }
2539 }
2540
2541 exit:
2542 if (debug_level >= DEBUG_LEVEL_INFO)
2543 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2544 __FILE__,__LINE__, info->device_name );
2545 }
2546
2547 /* Called by tty_hangup() when a hangup is signaled.
2548 * This is the same as closing all open files for the port.
2549 */
2550 static void mgslpc_hangup(struct tty_struct *tty)
2551 {
2552 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2553
2554 if (debug_level >= DEBUG_LEVEL_INFO)
2555 printk("%s(%d):mgslpc_hangup(%s)\n",
2556 __FILE__,__LINE__, info->device_name );
2557
2558 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2559 return;
2560
2561 mgslpc_flush_buffer(tty);
2562 shutdown(info);
2563
2564 info->count = 0;
2565 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2566 info->tty = NULL;
2567
2568 wake_up_interruptible(&info->open_wait);
2569 }
2570
2571 /* Block the current process until the specified port
2572 * is ready to be opened.
2573 */
2574 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2575 MGSLPC_INFO *info)
2576 {
2577 DECLARE_WAITQUEUE(wait, current);
2578 int retval;
2579 bool do_clocal = false;
2580 bool extra_count = false;
2581 unsigned long flags;
2582
2583 if (debug_level >= DEBUG_LEVEL_INFO)
2584 printk("%s(%d):block_til_ready on %s\n",
2585 __FILE__,__LINE__, tty->driver->name );
2586
2587 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2588 /* nonblock mode is set or port is not enabled */
2589 /* just verify that callout device is not active */
2590 info->flags |= ASYNC_NORMAL_ACTIVE;
2591 return 0;
2592 }
2593
2594 if (tty->termios->c_cflag & CLOCAL)
2595 do_clocal = true;
2596
2597 /* Wait for carrier detect and the line to become
2598 * free (i.e., not in use by the callout). While we are in
2599 * this loop, info->count is dropped by one, so that
2600 * mgslpc_close() knows when to free things. We restore it upon
2601 * exit, either normal or abnormal.
2602 */
2603
2604 retval = 0;
2605 add_wait_queue(&info->open_wait, &wait);
2606
2607 if (debug_level >= DEBUG_LEVEL_INFO)
2608 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2609 __FILE__,__LINE__, tty->driver->name, info->count );
2610
2611 spin_lock_irqsave(&info->lock, flags);
2612 if (!tty_hung_up_p(filp)) {
2613 extra_count = true;
2614 info->count--;
2615 }
2616 spin_unlock_irqrestore(&info->lock, flags);
2617 info->blocked_open++;
2618
2619 while (1) {
2620 if ((tty->termios->c_cflag & CBAUD)) {
2621 spin_lock_irqsave(&info->lock,flags);
2622 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2623 set_signals(info);
2624 spin_unlock_irqrestore(&info->lock,flags);
2625 }
2626
2627 set_current_state(TASK_INTERRUPTIBLE);
2628
2629 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2630 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2631 -EAGAIN : -ERESTARTSYS;
2632 break;
2633 }
2634
2635 spin_lock_irqsave(&info->lock,flags);
2636 get_signals(info);
2637 spin_unlock_irqrestore(&info->lock,flags);
2638
2639 if (!(info->flags & ASYNC_CLOSING) &&
2640 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2641 break;
2642 }
2643
2644 if (signal_pending(current)) {
2645 retval = -ERESTARTSYS;
2646 break;
2647 }
2648
2649 if (debug_level >= DEBUG_LEVEL_INFO)
2650 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2651 __FILE__,__LINE__, tty->driver->name, info->count );
2652
2653 schedule();
2654 }
2655
2656 set_current_state(TASK_RUNNING);
2657 remove_wait_queue(&info->open_wait, &wait);
2658
2659 if (extra_count)
2660 info->count++;
2661 info->blocked_open--;
2662
2663 if (debug_level >= DEBUG_LEVEL_INFO)
2664 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2665 __FILE__,__LINE__, tty->driver->name, info->count );
2666
2667 if (!retval)
2668 info->flags |= ASYNC_NORMAL_ACTIVE;
2669
2670 return retval;
2671 }
2672
2673 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2674 {
2675 MGSLPC_INFO *info;
2676 int retval, line;
2677 unsigned long flags;
2678
2679 /* verify range of specified line number */
2680 line = tty->index;
2681 if ((line < 0) || (line >= mgslpc_device_count)) {
2682 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2683 __FILE__,__LINE__,line);
2684 return -ENODEV;
2685 }
2686
2687 /* find the info structure for the specified line */
2688 info = mgslpc_device_list;
2689 while(info && info->line != line)
2690 info = info->next_device;
2691 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2692 return -ENODEV;
2693
2694 tty->driver_data = info;
2695 info->tty = tty;
2696
2697 if (debug_level >= DEBUG_LEVEL_INFO)
2698 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2699 __FILE__,__LINE__,tty->driver->name, info->count);
2700
2701 /* If port is closing, signal caller to try again */
2702 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2703 if (info->flags & ASYNC_CLOSING)
2704 interruptible_sleep_on(&info->close_wait);
2705 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2706 -EAGAIN : -ERESTARTSYS);
2707 goto cleanup;
2708 }
2709
2710 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2711
2712 spin_lock_irqsave(&info->netlock, flags);
2713 if (info->netcount) {
2714 retval = -EBUSY;
2715 spin_unlock_irqrestore(&info->netlock, flags);
2716 goto cleanup;
2717 }
2718 info->count++;
2719 spin_unlock_irqrestore(&info->netlock, flags);
2720
2721 if (info->count == 1) {
2722 /* 1st open on this device, init hardware */
2723 retval = startup(info);
2724 if (retval < 0)
2725 goto cleanup;
2726 }
2727
2728 retval = block_til_ready(tty, filp, info);
2729 if (retval) {
2730 if (debug_level >= DEBUG_LEVEL_INFO)
2731 printk("%s(%d):block_til_ready(%s) returned %d\n",
2732 __FILE__,__LINE__, info->device_name, retval);
2733 goto cleanup;
2734 }
2735
2736 if (debug_level >= DEBUG_LEVEL_INFO)
2737 printk("%s(%d):mgslpc_open(%s) success\n",
2738 __FILE__,__LINE__, info->device_name);
2739 retval = 0;
2740
2741 cleanup:
2742 if (retval) {
2743 if (tty->count == 1)
2744 info->tty = NULL; /* tty layer will release tty struct */
2745 if(info->count)
2746 info->count--;
2747 }
2748
2749 return retval;
2750 }
2751
2752 /*
2753 * /proc fs routines....
2754 */
2755
2756 static inline int line_info(char *buf, MGSLPC_INFO *info)
2757 {
2758 char stat_buf[30];
2759 int ret;
2760 unsigned long flags;
2761
2762 ret = sprintf(buf, "%s:io:%04X irq:%d",
2763 info->device_name, info->io_base, info->irq_level);
2764
2765 /* output current serial signal states */
2766 spin_lock_irqsave(&info->lock,flags);
2767 get_signals(info);
2768 spin_unlock_irqrestore(&info->lock,flags);
2769
2770 stat_buf[0] = 0;
2771 stat_buf[1] = 0;
2772 if (info->serial_signals & SerialSignal_RTS)
2773 strcat(stat_buf, "|RTS");
2774 if (info->serial_signals & SerialSignal_CTS)
2775 strcat(stat_buf, "|CTS");
2776 if (info->serial_signals & SerialSignal_DTR)
2777 strcat(stat_buf, "|DTR");
2778 if (info->serial_signals & SerialSignal_DSR)
2779 strcat(stat_buf, "|DSR");
2780 if (info->serial_signals & SerialSignal_DCD)
2781 strcat(stat_buf, "|CD");
2782 if (info->serial_signals & SerialSignal_RI)
2783 strcat(stat_buf, "|RI");
2784
2785 if (info->params.mode == MGSL_MODE_HDLC) {
2786 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2787 info->icount.txok, info->icount.rxok);
2788 if (info->icount.txunder)
2789 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2790 if (info->icount.txabort)
2791 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2792 if (info->icount.rxshort)
2793 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2794 if (info->icount.rxlong)
2795 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2796 if (info->icount.rxover)
2797 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2798 if (info->icount.rxcrc)
2799 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2800 } else {
2801 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2802 info->icount.tx, info->icount.rx);
2803 if (info->icount.frame)
2804 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2805 if (info->icount.parity)
2806 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2807 if (info->icount.brk)
2808 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2809 if (info->icount.overrun)
2810 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2811 }
2812
2813 /* Append serial signal status to end */
2814 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2815
2816 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2817 info->tx_active,info->bh_requested,info->bh_running,
2818 info->pending_bh);
2819
2820 return ret;
2821 }
2822
2823 /* Called to print information about devices
2824 */
2825 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2826 int *eof, void *data)
2827 {
2828 int len = 0, l;
2829 off_t begin = 0;
2830 MGSLPC_INFO *info;
2831
2832 len += sprintf(page, "synclink driver:%s\n", driver_version);
2833
2834 info = mgslpc_device_list;
2835 while( info ) {
2836 l = line_info(page + len, info);
2837 len += l;
2838 if (len+begin > off+count)
2839 goto done;
2840 if (len+begin < off) {
2841 begin += len;
2842 len = 0;
2843 }
2844 info = info->next_device;
2845 }
2846
2847 *eof = 1;
2848 done:
2849 if (off >= len+begin)
2850 return 0;
2851 *start = page + (off-begin);
2852 return ((count < begin+len-off) ? count : begin+len-off);
2853 }
2854
2855 static int rx_alloc_buffers(MGSLPC_INFO *info)
2856 {
2857 /* each buffer has header and data */
2858 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2859
2860 /* calculate total allocation size for 8 buffers */
2861 info->rx_buf_total_size = info->rx_buf_size * 8;
2862
2863 /* limit total allocated memory */
2864 if (info->rx_buf_total_size > 0x10000)
2865 info->rx_buf_total_size = 0x10000;
2866
2867 /* calculate number of buffers */
2868 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2869
2870 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2871 if (info->rx_buf == NULL)
2872 return -ENOMEM;
2873
2874 rx_reset_buffers(info);
2875 return 0;
2876 }
2877
2878 static void rx_free_buffers(MGSLPC_INFO *info)
2879 {
2880 kfree(info->rx_buf);
2881 info->rx_buf = NULL;
2882 }
2883
2884 static int claim_resources(MGSLPC_INFO *info)
2885 {
2886 if (rx_alloc_buffers(info) < 0 ) {
2887 printk( "Cant allocate rx buffer %s\n", info->device_name);
2888 release_resources(info);
2889 return -ENODEV;
2890 }
2891 return 0;
2892 }
2893
2894 static void release_resources(MGSLPC_INFO *info)
2895 {
2896 if (debug_level >= DEBUG_LEVEL_INFO)
2897 printk("release_resources(%s)\n", info->device_name);
2898 rx_free_buffers(info);
2899 }
2900
2901 /* Add the specified device instance data structure to the
2902 * global linked list of devices and increment the device count.
2903 *
2904 * Arguments: info pointer to device instance data
2905 */
2906 static void mgslpc_add_device(MGSLPC_INFO *info)
2907 {
2908 info->next_device = NULL;
2909 info->line = mgslpc_device_count;
2910 sprintf(info->device_name,"ttySLP%d",info->line);
2911
2912 if (info->line < MAX_DEVICE_COUNT) {
2913 if (maxframe[info->line])
2914 info->max_frame_size = maxframe[info->line];
2915 }
2916
2917 mgslpc_device_count++;
2918
2919 if (!mgslpc_device_list)
2920 mgslpc_device_list = info;
2921 else {
2922 MGSLPC_INFO *current_dev = mgslpc_device_list;
2923 while( current_dev->next_device )
2924 current_dev = current_dev->next_device;
2925 current_dev->next_device = info;
2926 }
2927
2928 if (info->max_frame_size < 4096)
2929 info->max_frame_size = 4096;
2930 else if (info->max_frame_size > 65535)
2931 info->max_frame_size = 65535;
2932
2933 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2934 info->device_name, info->io_base, info->irq_level);
2935
2936 #if SYNCLINK_GENERIC_HDLC
2937 hdlcdev_init(info);
2938 #endif
2939 }
2940
2941 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2942 {
2943 MGSLPC_INFO *info = mgslpc_device_list;
2944 MGSLPC_INFO *last = NULL;
2945
2946 while(info) {
2947 if (info == remove_info) {
2948 if (last)
2949 last->next_device = info->next_device;
2950 else
2951 mgslpc_device_list = info->next_device;
2952 #if SYNCLINK_GENERIC_HDLC
2953 hdlcdev_exit(info);
2954 #endif
2955 release_resources(info);
2956 kfree(info);
2957 mgslpc_device_count--;
2958 return;
2959 }
2960 last = info;
2961 info = info->next_device;
2962 }
2963 }
2964
2965 static struct pcmcia_device_id mgslpc_ids[] = {
2966 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2967 PCMCIA_DEVICE_NULL
2968 };
2969 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2970
2971 static struct pcmcia_driver mgslpc_driver = {
2972 .owner = THIS_MODULE,
2973 .drv = {
2974 .name = "synclink_cs",
2975 },
2976 .probe = mgslpc_probe,
2977 .remove = mgslpc_detach,
2978 .id_table = mgslpc_ids,
2979 .suspend = mgslpc_suspend,
2980 .resume = mgslpc_resume,
2981 };
2982
2983 static const struct tty_operations mgslpc_ops = {
2984 .open = mgslpc_open,
2985 .close = mgslpc_close,
2986 .write = mgslpc_write,
2987 .put_char = mgslpc_put_char,
2988 .flush_chars = mgslpc_flush_chars,
2989 .write_room = mgslpc_write_room,
2990 .chars_in_buffer = mgslpc_chars_in_buffer,
2991 .flush_buffer = mgslpc_flush_buffer,
2992 .ioctl = mgslpc_ioctl,
2993 .throttle = mgslpc_throttle,
2994 .unthrottle = mgslpc_unthrottle,
2995 .send_xchar = mgslpc_send_xchar,
2996 .break_ctl = mgslpc_break,
2997 .wait_until_sent = mgslpc_wait_until_sent,
2998 .read_proc = mgslpc_read_proc,
2999 .set_termios = mgslpc_set_termios,
3000 .stop = tx_pause,
3001 .start = tx_release,
3002 .hangup = mgslpc_hangup,
3003 .tiocmget = tiocmget,
3004 .tiocmset = tiocmset,
3005 };
3006
3007 static void synclink_cs_cleanup(void)
3008 {
3009 int rc;
3010
3011 printk("Unloading %s: version %s\n", driver_name, driver_version);
3012
3013 while(mgslpc_device_list)
3014 mgslpc_remove_device(mgslpc_device_list);
3015
3016 if (serial_driver) {
3017 if ((rc = tty_unregister_driver(serial_driver)))
3018 printk("%s(%d) failed to unregister tty driver err=%d\n",
3019 __FILE__,__LINE__,rc);
3020 put_tty_driver(serial_driver);
3021 }
3022
3023 pcmcia_unregister_driver(&mgslpc_driver);
3024 }
3025
3026 static int __init synclink_cs_init(void)
3027 {
3028 int rc;
3029
3030 if (break_on_load) {
3031 mgslpc_get_text_ptr();
3032 BREAKPOINT();
3033 }
3034
3035 printk("%s %s\n", driver_name, driver_version);
3036
3037 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3038 return rc;
3039
3040 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3041 if (!serial_driver) {
3042 rc = -ENOMEM;
3043 goto error;
3044 }
3045
3046 /* Initialize the tty_driver structure */
3047
3048 serial_driver->owner = THIS_MODULE;
3049 serial_driver->driver_name = "synclink_cs";
3050 serial_driver->name = "ttySLP";
3051 serial_driver->major = ttymajor;
3052 serial_driver->minor_start = 64;
3053 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3054 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3055 serial_driver->init_termios = tty_std_termios;
3056 serial_driver->init_termios.c_cflag =
3057 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3058 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3059 tty_set_operations(serial_driver, &mgslpc_ops);
3060
3061 if ((rc = tty_register_driver(serial_driver)) < 0) {
3062 printk("%s(%d):Couldn't register serial driver\n",
3063 __FILE__,__LINE__);
3064 put_tty_driver(serial_driver);
3065 serial_driver = NULL;
3066 goto error;
3067 }
3068
3069 printk("%s %s, tty major#%d\n",
3070 driver_name, driver_version,
3071 serial_driver->major);
3072
3073 return 0;
3074
3075 error:
3076 synclink_cs_cleanup();
3077 return rc;
3078 }
3079
3080 static void __exit synclink_cs_exit(void)
3081 {
3082 synclink_cs_cleanup();
3083 }
3084
3085 module_init(synclink_cs_init);
3086 module_exit(synclink_cs_exit);
3087
3088 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3089 {
3090 unsigned int M, N;
3091 unsigned char val;
3092
3093 /* note:standard BRG mode is broken in V3.2 chip
3094 * so enhanced mode is always used
3095 */
3096
3097 if (rate) {
3098 N = 3686400 / rate;
3099 if (!N)
3100 N = 1;
3101 N >>= 1;
3102 for (M = 1; N > 64 && M < 16; M++)
3103 N >>= 1;
3104 N--;
3105
3106 /* BGR[5..0] = N
3107 * BGR[9..6] = M
3108 * BGR[7..0] contained in BGR register
3109 * BGR[9..8] contained in CCR2[7..6]
3110 * divisor = (N+1)*2^M
3111 *
3112 * Note: M *must* not be zero (causes asymetric duty cycle)
3113 */
3114 write_reg(info, (unsigned char) (channel + BGR),
3115 (unsigned char) ((M << 6) + N));
3116 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3117 val |= ((M << 4) & 0xc0);
3118 write_reg(info, (unsigned char) (channel + CCR2), val);
3119 }
3120 }
3121
3122 /* Enabled the AUX clock output at the specified frequency.
3123 */
3124 static void enable_auxclk(MGSLPC_INFO *info)
3125 {
3126 unsigned char val;
3127
3128 /* MODE
3129 *
3130 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3131 * 05 ADM Address Mode, 0 = no addr recognition
3132 * 04 TMD Timer Mode, 0 = external
3133 * 03 RAC Receiver Active, 0 = inactive
3134 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3135 * 01 TRS Timer Resolution, 1=512
3136 * 00 TLP Test Loop, 0 = no loop
3137 *
3138 * 1000 0010
3139 */
3140 val = 0x82;
3141
3142 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3143 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3144 val |= BIT2;
3145 write_reg(info, CHB + MODE, val);
3146
3147 /* CCR0
3148 *
3149 * 07 PU Power Up, 1=active, 0=power down
3150 * 06 MCE Master Clock Enable, 1=enabled
3151 * 05 Reserved, 0
3152 * 04..02 SC[2..0] Encoding
3153 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3154 *
3155 * 11000000
3156 */
3157 write_reg(info, CHB + CCR0, 0xc0);
3158
3159 /* CCR1
3160 *
3161 * 07 SFLG Shared Flag, 0 = disable shared flags
3162 * 06 GALP Go Active On Loop, 0 = not used
3163 * 05 GLP Go On Loop, 0 = not used
3164 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3165 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3166 * 02..00 CM[2..0] Clock Mode
3167 *
3168 * 0001 0111
3169 */
3170 write_reg(info, CHB + CCR1, 0x17);
3171
3172 /* CCR2 (Channel B)
3173 *
3174 * 07..06 BGR[9..8] Baud rate bits 9..8
3175 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3176 * 04 SSEL Clock source select, 1=submode b
3177 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3178 * 02 RWX Read/Write Exchange 0=disabled
3179 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3180 * 00 DIV, data inversion 0=disabled, 1=enabled
3181 *
3182 * 0011 1000
3183 */
3184 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3185 write_reg(info, CHB + CCR2, 0x38);
3186 else
3187 write_reg(info, CHB + CCR2, 0x30);
3188
3189 /* CCR4
3190 *
3191 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3192 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3193 * 05 TST1 Test Pin, 0=normal operation
3194 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3195 * 03..02 Reserved, must be 0
3196 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3197 *
3198 * 0101 0000
3199 */
3200 write_reg(info, CHB + CCR4, 0x50);
3201
3202 /* if auxclk not enabled, set internal BRG so
3203 * CTS transitions can be detected (requires TxC)
3204 */
3205 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3206 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3207 else
3208 mgslpc_set_rate(info, CHB, 921600);
3209 }
3210
3211 static void loopback_enable(MGSLPC_INFO *info)
3212 {
3213 unsigned char val;
3214
3215 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3216 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3217 write_reg(info, CHA + CCR1, val);
3218
3219 /* CCR2:04 SSEL Clock source select, 1=submode b */
3220 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3221 write_reg(info, CHA + CCR2, val);
3222
3223 /* set LinkSpeed if available, otherwise default to 2Mbps */
3224 if (info->params.clock_speed)
3225 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3226 else
3227 mgslpc_set_rate(info, CHA, 1843200);
3228
3229 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3230 val = read_reg(info, CHA + MODE) | BIT0;
3231 write_reg(info, CHA + MODE, val);
3232 }
3233
3234 static void hdlc_mode(MGSLPC_INFO *info)
3235 {
3236 unsigned char val;
3237 unsigned char clkmode, clksubmode;
3238
3239 /* disable all interrupts */
3240 irq_disable(info, CHA, 0xffff);
3241 irq_disable(info, CHB, 0xffff);
3242 port_irq_disable(info, 0xff);
3243
3244 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3245 clkmode = clksubmode = 0;
3246 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3247 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3248 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3249 clkmode = 7;
3250 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3251 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3252 /* clock mode 7b, rcv = BRG, xmt = BRG */
3253 clkmode = 7;
3254 clksubmode = 1;
3255 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3256 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3257 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3258 clkmode = 6;
3259 clksubmode = 1;
3260 } else {
3261 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3262 clkmode = 6;
3263 }
3264 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3265 /* clock mode 0b, rcv = RxC, xmt = BRG */
3266 clksubmode = 1;
3267 }
3268
3269 /* MODE
3270 *
3271 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3272 * 05 ADM Address Mode, 0 = no addr recognition
3273 * 04 TMD Timer Mode, 0 = external
3274 * 03 RAC Receiver Active, 0 = inactive
3275 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3276 * 01 TRS Timer Resolution, 1=512
3277 * 00 TLP Test Loop, 0 = no loop
3278 *
3279 * 1000 0010
3280 */
3281 val = 0x82;
3282 if (info->params.loopback)
3283 val |= BIT0;
3284
3285 /* preserve RTS state */
3286 if (info->serial_signals & SerialSignal_RTS)
3287 val |= BIT2;
3288 write_reg(info, CHA + MODE, val);
3289
3290 /* CCR0
3291 *
3292 * 07 PU Power Up, 1=active, 0=power down
3293 * 06 MCE Master Clock Enable, 1=enabled
3294 * 05 Reserved, 0
3295 * 04..02 SC[2..0] Encoding
3296 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3297 *
3298 * 11000000
3299 */
3300 val = 0xc0;
3301 switch (info->params.encoding)
3302 {
3303 case HDLC_ENCODING_NRZI:
3304 val |= BIT3;
3305 break;
3306 case HDLC_ENCODING_BIPHASE_SPACE:
3307 val |= BIT4;
3308 break; // FM0
3309 case HDLC_ENCODING_BIPHASE_MARK:
3310 val |= BIT4 + BIT2;
3311 break; // FM1
3312 case HDLC_ENCODING_BIPHASE_LEVEL:
3313 val |= BIT4 + BIT3;
3314 break; // Manchester
3315 }
3316 write_reg(info, CHA + CCR0, val);
3317
3318 /* CCR1
3319 *
3320 * 07 SFLG Shared Flag, 0 = disable shared flags
3321 * 06 GALP Go Active On Loop, 0 = not used
3322 * 05 GLP Go On Loop, 0 = not used
3323 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3324 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3325 * 02..00 CM[2..0] Clock Mode
3326 *
3327 * 0001 0000
3328 */
3329 val = 0x10 + clkmode;
3330 write_reg(info, CHA + CCR1, val);
3331
3332 /* CCR2
3333 *
3334 * 07..06 BGR[9..8] Baud rate bits 9..8
3335 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3336 * 04 SSEL Clock source select, 1=submode b
3337 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3338 * 02 RWX Read/Write Exchange 0=disabled
3339 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3340 * 00 DIV, data inversion 0=disabled, 1=enabled
3341 *
3342 * 0000 0000
3343 */
3344 val = 0x00;
3345 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3346 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3347 val |= BIT5;
3348 if (clksubmode)
3349 val |= BIT4;
3350 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3351 val |= BIT1;
3352 if (info->params.encoding == HDLC_ENCODING_NRZB)
3353 val |= BIT0;
3354 write_reg(info, CHA + CCR2, val);
3355
3356 /* CCR3
3357 *
3358 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3359 * 05 EPT Enable preamble transmission, 1=enabled
3360 * 04 RADD Receive address pushed to FIFO, 0=disabled
3361 * 03 CRL CRC Reset Level, 0=FFFF
3362 * 02 RCRC Rx CRC 0=On 1=Off
3363 * 01 TCRC Tx CRC 0=On 1=Off
3364 * 00 PSD DPLL Phase Shift Disable
3365 *
3366 * 0000 0000
3367 */
3368 val = 0x00;
3369 if (info->params.crc_type == HDLC_CRC_NONE)
3370 val |= BIT2 + BIT1;
3371 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3372 val |= BIT5;
3373 switch (info->params.preamble_length)
3374 {
3375 case HDLC_PREAMBLE_LENGTH_16BITS:
3376 val |= BIT6;
3377 break;
3378 case HDLC_PREAMBLE_LENGTH_32BITS:
3379 val |= BIT6;
3380 break;
3381 case HDLC_PREAMBLE_LENGTH_64BITS:
3382 val |= BIT7 + BIT6;
3383 break;
3384 }
3385 write_reg(info, CHA + CCR3, val);
3386
3387 /* PRE - Preamble pattern */
3388 val = 0;
3389 switch (info->params.preamble)
3390 {
3391 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3392 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3393 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3394 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3395 }
3396 write_reg(info, CHA + PRE, val);
3397
3398 /* CCR4
3399 *
3400 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3401 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3402 * 05 TST1 Test Pin, 0=normal operation
3403 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3404 * 03..02 Reserved, must be 0
3405 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3406 *
3407 * 0101 0000
3408 */
3409 val = 0x50;
3410 write_reg(info, CHA + CCR4, val);
3411 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3412 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3413 else
3414 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3415
3416 /* RLCR Receive length check register
3417 *
3418 * 7 1=enable receive length check
3419 * 6..0 Max frame length = (RL + 1) * 32
3420 */
3421 write_reg(info, CHA + RLCR, 0);
3422
3423 /* XBCH Transmit Byte Count High
3424 *
3425 * 07 DMA mode, 0 = interrupt driven
3426 * 06 NRM, 0=ABM (ignored)
3427 * 05 CAS Carrier Auto Start
3428 * 04 XC Transmit Continuously (ignored)
3429 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3430 *
3431 * 0000 0000
3432 */
3433 val = 0x00;
3434 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3435 val |= BIT5;
3436 write_reg(info, CHA + XBCH, val);
3437 enable_auxclk(info);
3438 if (info->params.loopback || info->testing_irq)
3439 loopback_enable(info);
3440 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3441 {
3442 irq_enable(info, CHB, IRQ_CTS);
3443 /* PVR[3] 1=AUTO CTS active */
3444 set_reg_bits(info, CHA + PVR, BIT3);
3445 } else
3446 clear_reg_bits(info, CHA + PVR, BIT3);
3447
3448 irq_enable(info, CHA,
3449 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3450 IRQ_UNDERRUN + IRQ_TXFIFO);
3451 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3452 wait_command_complete(info, CHA);
3453 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3454
3455 /* Master clock mode enabled above to allow reset commands
3456 * to complete even if no data clocks are present.
3457 *
3458 * Disable master clock mode for normal communications because
3459 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3460 * IRQ when in master clock mode.
3461 *
3462 * Leave master clock mode enabled for IRQ test because the
3463 * timer IRQ used by the test can only happen in master clock mode.
3464 */
3465 if (!info->testing_irq)
3466 clear_reg_bits(info, CHA + CCR0, BIT6);
3467
3468 tx_set_idle(info);
3469
3470 tx_stop(info);
3471 rx_stop(info);
3472 }
3473
3474 static void rx_stop(MGSLPC_INFO *info)
3475 {
3476 if (debug_level >= DEBUG_LEVEL_ISR)
3477 printk("%s(%d):rx_stop(%s)\n",
3478 __FILE__,__LINE__, info->device_name );
3479
3480 /* MODE:03 RAC Receiver Active, 0=inactive */
3481 clear_reg_bits(info, CHA + MODE, BIT3);
3482
3483 info->rx_enabled = false;
3484 info->rx_overflow = false;
3485 }
3486
3487 static void rx_start(MGSLPC_INFO *info)
3488 {
3489 if (debug_level >= DEBUG_LEVEL_ISR)
3490 printk("%s(%d):rx_start(%s)\n",
3491 __FILE__,__LINE__, info->device_name );
3492
3493 rx_reset_buffers(info);
3494 info->rx_enabled = false;
3495 info->rx_overflow = false;
3496
3497 /* MODE:03 RAC Receiver Active, 1=active */
3498 set_reg_bits(info, CHA + MODE, BIT3);
3499
3500 info->rx_enabled = true;
3501 }
3502
3503 static void tx_start(MGSLPC_INFO *info)
3504 {
3505 if (debug_level >= DEBUG_LEVEL_ISR)
3506 printk("%s(%d):tx_start(%s)\n",
3507 __FILE__,__LINE__, info->device_name );
3508
3509 if (info->tx_count) {
3510 /* If auto RTS enabled and RTS is inactive, then assert */
3511 /* RTS and set a flag indicating that the driver should */
3512 /* negate RTS when the transmission completes. */
3513 info->drop_rts_on_tx_done = false;
3514
3515 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3516 get_signals(info);
3517 if (!(info->serial_signals & SerialSignal_RTS)) {
3518 info->serial_signals |= SerialSignal_RTS;
3519 set_signals(info);
3520 info->drop_rts_on_tx_done = true;
3521 }
3522 }
3523
3524 if (info->params.mode == MGSL_MODE_ASYNC) {
3525 if (!info->tx_active) {
3526 info->tx_active = true;
3527 tx_ready(info);
3528 }
3529 } else {
3530 info->tx_active = true;
3531 tx_ready(info);
3532 mod_timer(&info->tx_timer, jiffies +
3533 msecs_to_jiffies(5000));
3534 }
3535 }
3536
3537 if (!info->tx_enabled)
3538 info->tx_enabled = true;
3539 }
3540
3541 static void tx_stop(MGSLPC_INFO *info)
3542 {
3543 if (debug_level >= DEBUG_LEVEL_ISR)
3544 printk("%s(%d):tx_stop(%s)\n",
3545 __FILE__,__LINE__, info->device_name );
3546
3547 del_timer(&info->tx_timer);
3548
3549 info->tx_enabled = false;
3550 info->tx_active = false;
3551 }
3552
3553 /* Reset the adapter to a known state and prepare it for further use.
3554 */
3555 static void reset_device(MGSLPC_INFO *info)
3556 {
3557 /* power up both channels (set BIT7) */
3558 write_reg(info, CHA + CCR0, 0x80);
3559 write_reg(info, CHB + CCR0, 0x80);
3560 write_reg(info, CHA + MODE, 0);
3561 write_reg(info, CHB + MODE, 0);
3562
3563 /* disable all interrupts */
3564 irq_disable(info, CHA, 0xffff);
3565 irq_disable(info, CHB, 0xffff);
3566 port_irq_disable(info, 0xff);
3567
3568 /* PCR Port Configuration Register
3569 *
3570 * 07..04 DEC[3..0] Serial I/F select outputs
3571 * 03 output, 1=AUTO CTS control enabled
3572 * 02 RI Ring Indicator input 0=active
3573 * 01 DSR input 0=active
3574 * 00 DTR output 0=active
3575 *
3576 * 0000 0110
3577 */
3578 write_reg(info, PCR, 0x06);
3579
3580 /* PVR Port Value Register
3581 *
3582 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3583 * 03 AUTO CTS output 1=enabled
3584 * 02 RI Ring Indicator input
3585 * 01 DSR input
3586 * 00 DTR output (1=inactive)
3587 *
3588 * 0000 0001
3589 */
3590 // write_reg(info, PVR, PVR_DTR);
3591
3592 /* IPC Interrupt Port Configuration
3593 *
3594 * 07 VIS 1=Masked interrupts visible
3595 * 06..05 Reserved, 0
3596 * 04..03 SLA Slave address, 00 ignored
3597 * 02 CASM Cascading Mode, 1=daisy chain
3598 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3599 *
3600 * 0000 0101
3601 */
3602 write_reg(info, IPC, 0x05);
3603 }
3604
3605 static void async_mode(MGSLPC_INFO *info)
3606 {
3607 unsigned char val;
3608
3609 /* disable all interrupts */
3610 irq_disable(info, CHA, 0xffff);
3611 irq_disable(info, CHB, 0xffff);
3612 port_irq_disable(info, 0xff);
3613
3614 /* MODE
3615 *
3616 * 07 Reserved, 0
3617 * 06 FRTS RTS State, 0=active
3618 * 05 FCTS Flow Control on CTS
3619 * 04 FLON Flow Control Enable
3620 * 03 RAC Receiver Active, 0 = inactive
3621 * 02 RTS 0=Auto RTS, 1=manual RTS
3622 * 01 TRS Timer Resolution, 1=512
3623 * 00 TLP Test Loop, 0 = no loop
3624 *
3625 * 0000 0110
3626 */
3627 val = 0x06;
3628 if (info->params.loopback)
3629 val |= BIT0;
3630
3631 /* preserve RTS state */
3632 if (!(info->serial_signals & SerialSignal_RTS))
3633 val |= BIT6;
3634 write_reg(info, CHA + MODE, val);
3635
3636 /* CCR0
3637 *
3638 * 07 PU Power Up, 1=active, 0=power down
3639 * 06 MCE Master Clock Enable, 1=enabled
3640 * 05 Reserved, 0
3641 * 04..02 SC[2..0] Encoding, 000=NRZ
3642 * 01..00 SM[1..0] Serial Mode, 11=Async
3643 *
3644 * 1000 0011
3645 */
3646 write_reg(info, CHA + CCR0, 0x83);
3647
3648 /* CCR1
3649 *
3650 * 07..05 Reserved, 0
3651 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3652 * 03 BCR Bit Clock Rate, 1=16x
3653 * 02..00 CM[2..0] Clock Mode, 111=BRG
3654 *
3655 * 0001 1111
3656 */
3657 write_reg(info, CHA + CCR1, 0x1f);
3658
3659 /* CCR2 (channel A)
3660 *
3661 * 07..06 BGR[9..8] Baud rate bits 9..8
3662 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3663 * 04 SSEL Clock source select, 1=submode b
3664 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3665 * 02 RWX Read/Write Exchange 0=disabled
3666 * 01 Reserved, 0
3667 * 00 DIV, data inversion 0=disabled, 1=enabled
3668 *
3669 * 0001 0000
3670 */
3671 write_reg(info, CHA + CCR2, 0x10);
3672
3673 /* CCR3
3674 *
3675 * 07..01 Reserved, 0
3676 * 00 PSD DPLL Phase Shift Disable
3677 *
3678 * 0000 0000
3679 */
3680 write_reg(info, CHA + CCR3, 0);
3681
3682 /* CCR4
3683 *
3684 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3685 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3686 * 05 TST1 Test Pin, 0=normal operation
3687 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3688 * 03..00 Reserved, must be 0
3689 *
3690 * 0101 0000
3691 */
3692 write_reg(info, CHA + CCR4, 0x50);
3693 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3694
3695 /* DAFO Data Format
3696 *
3697 * 07 Reserved, 0
3698 * 06 XBRK transmit break, 0=normal operation
3699 * 05 Stop bits (0=1, 1=2)
3700 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3701 * 02 PAREN Parity Enable
3702 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3703 *
3704 */
3705 val = 0x00;
3706 if (info->params.data_bits != 8)
3707 val |= BIT0; /* 7 bits */
3708 if (info->params.stop_bits != 1)
3709 val |= BIT5;
3710 if (info->params.parity != ASYNC_PARITY_NONE)
3711 {
3712 val |= BIT2; /* Parity enable */
3713 if (info->params.parity == ASYNC_PARITY_ODD)
3714 val |= BIT3;
3715 else
3716 val |= BIT4;
3717 }
3718 write_reg(info, CHA + DAFO, val);
3719
3720 /* RFC Rx FIFO Control
3721 *
3722 * 07 Reserved, 0
3723 * 06 DPS, 1=parity bit not stored in data byte
3724 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3725 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3726 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3727 * 01 Reserved, 0
3728 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3729 *
3730 * 0101 1100
3731 */
3732 write_reg(info, CHA + RFC, 0x5c);
3733
3734 /* RLCR Receive length check register
3735 *
3736 * Max frame length = (RL + 1) * 32
3737 */
3738 write_reg(info, CHA + RLCR, 0);
3739
3740 /* XBCH Transmit Byte Count High
3741 *
3742 * 07 DMA mode, 0 = interrupt driven
3743 * 06 NRM, 0=ABM (ignored)
3744 * 05 CAS Carrier Auto Start
3745 * 04 XC Transmit Continuously (ignored)
3746 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3747 *
3748 * 0000 0000
3749 */
3750 val = 0x00;
3751 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3752 val |= BIT5;
3753 write_reg(info, CHA + XBCH, val);
3754 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3755 irq_enable(info, CHA, IRQ_CTS);
3756
3757 /* MODE:03 RAC Receiver Active, 1=active */
3758 set_reg_bits(info, CHA + MODE, BIT3);
3759 enable_auxclk(info);
3760 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3761 irq_enable(info, CHB, IRQ_CTS);
3762 /* PVR[3] 1=AUTO CTS active */
3763 set_reg_bits(info, CHA + PVR, BIT3);
3764 } else
3765 clear_reg_bits(info, CHA + PVR, BIT3);
3766 irq_enable(info, CHA,
3767 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3768 IRQ_ALLSENT + IRQ_TXFIFO);
3769 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3770 wait_command_complete(info, CHA);
3771 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3772 }
3773
3774 /* Set the HDLC idle mode for the transmitter.
3775 */
3776 static void tx_set_idle(MGSLPC_INFO *info)
3777 {
3778 /* Note: ESCC2 only supports flags and one idle modes */
3779 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3780 set_reg_bits(info, CHA + CCR1, BIT3);
3781 else
3782 clear_reg_bits(info, CHA + CCR1, BIT3);
3783 }
3784
3785 /* get state of the V24 status (input) signals.
3786 */
3787 static void get_signals(MGSLPC_INFO *info)
3788 {
3789 unsigned char status = 0;
3790
3791 /* preserve DTR and RTS */
3792 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3793
3794 if (read_reg(info, CHB + VSTR) & BIT7)
3795 info->serial_signals |= SerialSignal_DCD;
3796 if (read_reg(info, CHB + STAR) & BIT1)
3797 info->serial_signals |= SerialSignal_CTS;
3798
3799 status = read_reg(info, CHA + PVR);
3800 if (!(status & PVR_RI))
3801 info->serial_signals |= SerialSignal_RI;
3802 if (!(status & PVR_DSR))
3803 info->serial_signals |= SerialSignal_DSR;
3804 }
3805
3806 /* Set the state of DTR and RTS based on contents of
3807 * serial_signals member of device extension.
3808 */
3809 static void set_signals(MGSLPC_INFO *info)
3810 {
3811 unsigned char val;
3812
3813 val = read_reg(info, CHA + MODE);
3814 if (info->params.mode == MGSL_MODE_ASYNC) {
3815 if (info->serial_signals & SerialSignal_RTS)
3816 val &= ~BIT6;
3817 else
3818 val |= BIT6;
3819 } else {
3820 if (info->serial_signals & SerialSignal_RTS)
3821 val |= BIT2;
3822 else
3823 val &= ~BIT2;
3824 }
3825 write_reg(info, CHA + MODE, val);
3826
3827 if (info->serial_signals & SerialSignal_DTR)
3828 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3829 else
3830 set_reg_bits(info, CHA + PVR, PVR_DTR);
3831 }
3832
3833 static void rx_reset_buffers(MGSLPC_INFO *info)
3834 {
3835 RXBUF *buf;
3836 int i;
3837
3838 info->rx_put = 0;
3839 info->rx_get = 0;
3840 info->rx_frame_count = 0;
3841 for (i=0 ; i < info->rx_buf_count ; i++) {
3842 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3843 buf->status = buf->count = 0;
3844 }
3845 }
3846
3847 /* Attempt to return a received HDLC frame
3848 * Only frames received without errors are returned.
3849 *
3850 * Returns true if frame returned, otherwise false
3851 */
3852 static bool rx_get_frame(MGSLPC_INFO *info)
3853 {
3854 unsigned short status;
3855 RXBUF *buf;
3856 unsigned int framesize = 0;
3857 unsigned long flags;
3858 struct tty_struct *tty = info->tty;
3859 bool return_frame = false;
3860
3861 if (info->rx_frame_count == 0)
3862 return false;
3863
3864 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3865
3866 status = buf->status;
3867
3868 /* 07 VFR 1=valid frame
3869 * 06 RDO 1=data overrun
3870 * 05 CRC 1=OK, 0=error
3871 * 04 RAB 1=frame aborted
3872 */
3873 if ((status & 0xf0) != 0xA0) {
3874 if (!(status & BIT7) || (status & BIT4))
3875 info->icount.rxabort++;
3876 else if (status & BIT6)
3877 info->icount.rxover++;
3878 else if (!(status & BIT5)) {
3879 info->icount.rxcrc++;
3880 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3881 return_frame = true;
3882 }
3883 framesize = 0;
3884 #if SYNCLINK_GENERIC_HDLC
3885 {
3886 info->netdev->stats.rx_errors++;
3887 info->netdev->stats.rx_frame_errors++;
3888 }
3889 #endif
3890 } else
3891 return_frame = true;
3892
3893 if (return_frame)
3894 framesize = buf->count;
3895
3896 if (debug_level >= DEBUG_LEVEL_BH)
3897 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3898 __FILE__,__LINE__,info->device_name,status,framesize);
3899
3900 if (debug_level >= DEBUG_LEVEL_DATA)
3901 trace_block(info, buf->data, framesize, 0);
3902
3903 if (framesize) {
3904 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3905 framesize+1 > info->max_frame_size) ||
3906 framesize > info->max_frame_size)
3907 info->icount.rxlong++;
3908 else {
3909 if (status & BIT5)
3910 info->icount.rxok++;
3911
3912 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3913 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3914 ++framesize;
3915 }
3916
3917 #if SYNCLINK_GENERIC_HDLC
3918 if (info->netcount)
3919 hdlcdev_rx(info, buf->data, framesize);
3920 else
3921 #endif
3922 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3923 }
3924 }
3925
3926 spin_lock_irqsave(&info->lock,flags);
3927 buf->status = buf->count = 0;
3928 info->rx_frame_count--;
3929 info->rx_get++;
3930 if (info->rx_get >= info->rx_buf_count)
3931 info->rx_get = 0;
3932 spin_unlock_irqrestore(&info->lock,flags);
3933
3934 return true;
3935 }
3936
3937 static bool register_test(MGSLPC_INFO *info)
3938 {
3939 static unsigned char patterns[] =
3940 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3941 static unsigned int count = ARRAY_SIZE(patterns);
3942 unsigned int i;
3943 bool rc = true;
3944 unsigned long flags;
3945
3946 spin_lock_irqsave(&info->lock,flags);
3947 reset_device(info);
3948
3949 for (i = 0; i < count; i++) {
3950 write_reg(info, XAD1, patterns[i]);
3951 write_reg(info, XAD2, patterns[(i + 1) % count]);
3952 if ((read_reg(info, XAD1) != patterns[i]) ||
3953 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3954 rc = false;
3955 break;
3956 }
3957 }
3958
3959 spin_unlock_irqrestore(&info->lock,flags);
3960 return rc;
3961 }
3962
3963 static bool irq_test(MGSLPC_INFO *info)
3964 {
3965 unsigned long end_time;
3966 unsigned long flags;
3967
3968 spin_lock_irqsave(&info->lock,flags);
3969 reset_device(info);
3970
3971 info->testing_irq = true;
3972 hdlc_mode(info);
3973
3974 info->irq_occurred = false;
3975
3976 /* init hdlc mode */
3977
3978 irq_enable(info, CHA, IRQ_TIMER);
3979 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3980 issue_command(info, CHA, CMD_START_TIMER);
3981
3982 spin_unlock_irqrestore(&info->lock,flags);
3983
3984 end_time=100;
3985 while(end_time-- && !info->irq_occurred) {
3986 msleep_interruptible(10);
3987 }
3988
3989 info->testing_irq = false;
3990
3991 spin_lock_irqsave(&info->lock,flags);
3992 reset_device(info);
3993 spin_unlock_irqrestore(&info->lock,flags);
3994
3995 return info->irq_occurred;
3996 }
3997
3998 static int adapter_test(MGSLPC_INFO *info)
3999 {
4000 if (!register_test(info)) {
4001 info->init_error = DiagStatus_AddressFailure;
4002 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4003 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4004 return -ENODEV;
4005 }
4006
4007 if (!irq_test(info)) {
4008 info->init_error = DiagStatus_IrqFailure;
4009 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4010 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4011 return -ENODEV;
4012 }
4013
4014 if (debug_level >= DEBUG_LEVEL_INFO)
4015 printk("%s(%d):device %s passed diagnostics\n",
4016 __FILE__,__LINE__,info->device_name);
4017 return 0;
4018 }
4019
4020 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4021 {
4022 int i;
4023 int linecount;
4024 if (xmit)
4025 printk("%s tx data:\n",info->device_name);
4026 else
4027 printk("%s rx data:\n",info->device_name);
4028
4029 while(count) {
4030 if (count > 16)
4031 linecount = 16;
4032 else
4033 linecount = count;
4034
4035 for(i=0;i<linecount;i++)
4036 printk("%02X ",(unsigned char)data[i]);
4037 for(;i<17;i++)
4038 printk(" ");
4039 for(i=0;i<linecount;i++) {
4040 if (data[i]>=040 && data[i]<=0176)
4041 printk("%c",data[i]);
4042 else
4043 printk(".");
4044 }
4045 printk("\n");
4046
4047 data += linecount;
4048 count -= linecount;
4049 }
4050 }
4051
4052 /* HDLC frame time out
4053 * update stats and do tx completion processing
4054 */
4055 static void tx_timeout(unsigned long context)
4056 {
4057 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4058 unsigned long flags;
4059
4060 if ( debug_level >= DEBUG_LEVEL_INFO )
4061 printk( "%s(%d):tx_timeout(%s)\n",
4062 __FILE__,__LINE__,info->device_name);
4063 if(info->tx_active &&
4064 info->params.mode == MGSL_MODE_HDLC) {
4065 info->icount.txtimeout++;
4066 }
4067 spin_lock_irqsave(&info->lock,flags);
4068 info->tx_active = false;
4069 info->tx_count = info->tx_put = info->tx_get = 0;
4070
4071 spin_unlock_irqrestore(&info->lock,flags);
4072
4073 #if SYNCLINK_GENERIC_HDLC
4074 if (info->netcount)
4075 hdlcdev_tx_done(info);
4076 else
4077 #endif
4078 bh_transmit(info);
4079 }
4080
4081 #if SYNCLINK_GENERIC_HDLC
4082
4083 /**
4084 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4085 * set encoding and frame check sequence (FCS) options
4086 *
4087 * dev pointer to network device structure
4088 * encoding serial encoding setting
4089 * parity FCS setting
4090 *
4091 * returns 0 if success, otherwise error code
4092 */
4093 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4094 unsigned short parity)
4095 {
4096 MGSLPC_INFO *info = dev_to_port(dev);
4097 unsigned char new_encoding;
4098 unsigned short new_crctype;
4099
4100 /* return error if TTY interface open */
4101 if (info->count)
4102 return -EBUSY;
4103
4104 switch (encoding)
4105 {
4106 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4107 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4108 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4109 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4110 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4111 default: return -EINVAL;
4112 }
4113
4114 switch (parity)
4115 {
4116 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4117 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4118 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4119 default: return -EINVAL;
4120 }
4121
4122 info->params.encoding = new_encoding;
4123 info->params.crc_type = new_crctype;
4124
4125 /* if network interface up, reprogram hardware */
4126 if (info->netcount)
4127 mgslpc_program_hw(info);
4128
4129 return 0;
4130 }
4131
4132 /**
4133 * called by generic HDLC layer to send frame
4134 *
4135 * skb socket buffer containing HDLC frame
4136 * dev pointer to network device structure
4137 *
4138 * returns 0 if success, otherwise error code
4139 */
4140 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4141 {
4142 MGSLPC_INFO *info = dev_to_port(dev);
4143 unsigned long flags;
4144
4145 if (debug_level >= DEBUG_LEVEL_INFO)
4146 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4147
4148 /* stop sending until this frame completes */
4149 netif_stop_queue(dev);
4150
4151 /* copy data to device buffers */
4152 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
4153 info->tx_get = 0;
4154 info->tx_put = info->tx_count = skb->len;
4155
4156 /* update network statistics */
4157 dev->stats.tx_packets++;
4158 dev->stats.tx_bytes += skb->len;
4159
4160 /* done with socket buffer, so free it */
4161 dev_kfree_skb(skb);
4162
4163 /* save start time for transmit timeout detection */
4164 dev->trans_start = jiffies;
4165
4166 /* start hardware transmitter if necessary */
4167 spin_lock_irqsave(&info->lock,flags);
4168 if (!info->tx_active)
4169 tx_start(info);
4170 spin_unlock_irqrestore(&info->lock,flags);
4171
4172 return 0;
4173 }
4174
4175 /**
4176 * called by network layer when interface enabled
4177 * claim resources and initialize hardware
4178 *
4179 * dev pointer to network device structure
4180 *
4181 * returns 0 if success, otherwise error code
4182 */
4183 static int hdlcdev_open(struct net_device *dev)
4184 {
4185 MGSLPC_INFO *info = dev_to_port(dev);
4186 int rc;
4187 unsigned long flags;
4188
4189 if (debug_level >= DEBUG_LEVEL_INFO)
4190 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4191
4192 /* generic HDLC layer open processing */
4193 if ((rc = hdlc_open(dev)))
4194 return rc;
4195
4196 /* arbitrate between network and tty opens */
4197 spin_lock_irqsave(&info->netlock, flags);
4198 if (info->count != 0 || info->netcount != 0) {
4199 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4200 spin_unlock_irqrestore(&info->netlock, flags);
4201 return -EBUSY;
4202 }
4203 info->netcount=1;
4204 spin_unlock_irqrestore(&info->netlock, flags);
4205
4206 /* claim resources and init adapter */
4207 if ((rc = startup(info)) != 0) {
4208 spin_lock_irqsave(&info->netlock, flags);
4209 info->netcount=0;
4210 spin_unlock_irqrestore(&info->netlock, flags);
4211 return rc;
4212 }
4213
4214 /* assert DTR and RTS, apply hardware settings */
4215 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4216 mgslpc_program_hw(info);
4217
4218 /* enable network layer transmit */
4219 dev->trans_start = jiffies;
4220 netif_start_queue(dev);
4221
4222 /* inform generic HDLC layer of current DCD status */
4223 spin_lock_irqsave(&info->lock, flags);
4224 get_signals(info);
4225 spin_unlock_irqrestore(&info->lock, flags);
4226 if (info->serial_signals & SerialSignal_DCD)
4227 netif_carrier_on(dev);
4228 else
4229 netif_carrier_off(dev);
4230 return 0;
4231 }
4232
4233 /**
4234 * called by network layer when interface is disabled
4235 * shutdown hardware and release resources
4236 *
4237 * dev pointer to network device structure
4238 *
4239 * returns 0 if success, otherwise error code
4240 */
4241 static int hdlcdev_close(struct net_device *dev)
4242 {
4243 MGSLPC_INFO *info = dev_to_port(dev);
4244 unsigned long flags;
4245
4246 if (debug_level >= DEBUG_LEVEL_INFO)
4247 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4248
4249 netif_stop_queue(dev);
4250
4251 /* shutdown adapter and release resources */
4252 shutdown(info);
4253
4254 hdlc_close(dev);
4255
4256 spin_lock_irqsave(&info->netlock, flags);
4257 info->netcount=0;
4258 spin_unlock_irqrestore(&info->netlock, flags);
4259
4260 return 0;
4261 }
4262
4263 /**
4264 * called by network layer to process IOCTL call to network device
4265 *
4266 * dev pointer to network device structure
4267 * ifr pointer to network interface request structure
4268 * cmd IOCTL command code
4269 *
4270 * returns 0 if success, otherwise error code
4271 */
4272 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4273 {
4274 const size_t size = sizeof(sync_serial_settings);
4275 sync_serial_settings new_line;
4276 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4277 MGSLPC_INFO *info = dev_to_port(dev);
4278 unsigned int flags;
4279
4280 if (debug_level >= DEBUG_LEVEL_INFO)
4281 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4282
4283 /* return error if TTY interface open */
4284 if (info->count)
4285 return -EBUSY;
4286
4287 if (cmd != SIOCWANDEV)
4288 return hdlc_ioctl(dev, ifr, cmd);
4289
4290 switch(ifr->ifr_settings.type) {
4291 case IF_GET_IFACE: /* return current sync_serial_settings */
4292
4293 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4294 if (ifr->ifr_settings.size < size) {
4295 ifr->ifr_settings.size = size; /* data size wanted */
4296 return -ENOBUFS;
4297 }
4298
4299 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4300 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4301 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4302 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4303
4304 switch (flags){
4305 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4306 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4307 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4308 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4309 default: new_line.clock_type = CLOCK_DEFAULT;
4310 }
4311
4312 new_line.clock_rate = info->params.clock_speed;
4313 new_line.loopback = info->params.loopback ? 1:0;
4314
4315 if (copy_to_user(line, &new_line, size))
4316 return -EFAULT;
4317 return 0;
4318
4319 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4320
4321 if(!capable(CAP_NET_ADMIN))
4322 return -EPERM;
4323 if (copy_from_user(&new_line, line, size))
4324 return -EFAULT;
4325
4326 switch (new_line.clock_type)
4327 {
4328 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4329 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4330 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4331 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4332 case CLOCK_DEFAULT: flags = info->params.flags &
4333 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4334 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4335 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4336 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4337 default: return -EINVAL;
4338 }
4339
4340 if (new_line.loopback != 0 && new_line.loopback != 1)
4341 return -EINVAL;
4342
4343 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4344 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4345 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4346 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4347 info->params.flags |= flags;
4348
4349 info->params.loopback = new_line.loopback;
4350
4351 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4352 info->params.clock_speed = new_line.clock_rate;
4353 else
4354 info->params.clock_speed = 0;
4355
4356 /* if network interface up, reprogram hardware */
4357 if (info->netcount)
4358 mgslpc_program_hw(info);
4359 return 0;
4360
4361 default:
4362 return hdlc_ioctl(dev, ifr, cmd);
4363 }
4364 }
4365
4366 /**
4367 * called by network layer when transmit timeout is detected
4368 *
4369 * dev pointer to network device structure
4370 */
4371 static void hdlcdev_tx_timeout(struct net_device *dev)
4372 {
4373 MGSLPC_INFO *info = dev_to_port(dev);
4374 unsigned long flags;
4375
4376 if (debug_level >= DEBUG_LEVEL_INFO)
4377 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4378
4379 dev->stats.tx_errors++;
4380 dev->stats.tx_aborted_errors++;
4381
4382 spin_lock_irqsave(&info->lock,flags);
4383 tx_stop(info);
4384 spin_unlock_irqrestore(&info->lock,flags);
4385
4386 netif_wake_queue(dev);
4387 }
4388
4389 /**
4390 * called by device driver when transmit completes
4391 * reenable network layer transmit if stopped
4392 *
4393 * info pointer to device instance information
4394 */
4395 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4396 {
4397 if (netif_queue_stopped(info->netdev))
4398 netif_wake_queue(info->netdev);
4399 }
4400
4401 /**
4402 * called by device driver when frame received
4403 * pass frame to network layer
4404 *
4405 * info pointer to device instance information
4406 * buf pointer to buffer contianing frame data
4407 * size count of data bytes in buf
4408 */
4409 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4410 {
4411 struct sk_buff *skb = dev_alloc_skb(size);
4412 struct net_device *dev = info->netdev;
4413
4414 if (debug_level >= DEBUG_LEVEL_INFO)
4415 printk("hdlcdev_rx(%s)\n",dev->name);
4416
4417 if (skb == NULL) {
4418 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4419 dev->stats.rx_dropped++;
4420 return;
4421 }
4422
4423 memcpy(skb_put(skb, size), buf, size);
4424
4425 skb->protocol = hdlc_type_trans(skb, dev);
4426
4427 dev->stats.rx_packets++;
4428 dev->stats.rx_bytes += size;
4429
4430 netif_rx(skb);
4431
4432 dev->last_rx = jiffies;
4433 }
4434
4435 /**
4436 * called by device driver when adding device instance
4437 * do generic HDLC initialization
4438 *
4439 * info pointer to device instance information
4440 *
4441 * returns 0 if success, otherwise error code
4442 */
4443 static int hdlcdev_init(MGSLPC_INFO *info)
4444 {
4445 int rc;
4446 struct net_device *dev;
4447 hdlc_device *hdlc;
4448
4449 /* allocate and initialize network and HDLC layer objects */
4450
4451 if (!(dev = alloc_hdlcdev(info))) {
4452 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4453 return -ENOMEM;
4454 }
4455
4456 /* for network layer reporting purposes only */
4457 dev->base_addr = info->io_base;
4458 dev->irq = info->irq_level;
4459
4460 /* network layer callbacks and settings */
4461 dev->do_ioctl = hdlcdev_ioctl;
4462 dev->open = hdlcdev_open;
4463 dev->stop = hdlcdev_close;
4464 dev->tx_timeout = hdlcdev_tx_timeout;
4465 dev->watchdog_timeo = 10*HZ;
4466 dev->tx_queue_len = 50;
4467
4468 /* generic HDLC layer callbacks and settings */
4469 hdlc = dev_to_hdlc(dev);
4470 hdlc->attach = hdlcdev_attach;
4471 hdlc->xmit = hdlcdev_xmit;
4472
4473 /* register objects with HDLC layer */
4474 if ((rc = register_hdlc_device(dev))) {
4475 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4476 free_netdev(dev);
4477 return rc;
4478 }
4479
4480 info->netdev = dev;
4481 return 0;
4482 }
4483
4484 /**
4485 * called by device driver when removing device instance
4486 * do generic HDLC cleanup
4487 *
4488 * info pointer to device instance information
4489 */
4490 static void hdlcdev_exit(MGSLPC_INFO *info)
4491 {
4492 unregister_hdlc_device(info->netdev);
4493 free_netdev(info->netdev);
4494 info->netdev = NULL;
4495 }
4496
4497 #endif /* CONFIG_HDLC */
4498
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