2 * $Id: synclink_gt.c,v 4.25 2006/02/06 21:20:33 paulkf Exp $
4 * Device driver for Microgate SyncLink GT serial adapters.
6 * written by Paul Fulghum for Microgate Corporation
9 * Microgate and SyncLink are trademarks of Microgate Corporation
11 * This code is released under the GNU General Public License (GPL)
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
16 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
17 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
18 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
19 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
23 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 * DEBUG OUTPUT DEFINITIONS
29 * uncomment lines below to enable specific types of debug output
31 * DBGINFO information - most verbose output
32 * DBGERR serious errors
33 * DBGBH bottom half service routine debugging
34 * DBGISR interrupt service routine debugging
35 * DBGDATA output receive and transmit data
36 * DBGTBUF output transmit DMA buffers and registers
37 * DBGRBUF output receive DMA buffers and registers
40 #define DBGINFO(fmt) if (debug_level >= DEBUG_LEVEL_INFO) printk fmt
41 #define DBGERR(fmt) if (debug_level >= DEBUG_LEVEL_ERROR) printk fmt
42 #define DBGBH(fmt) if (debug_level >= DEBUG_LEVEL_BH) printk fmt
43 #define DBGISR(fmt) if (debug_level >= DEBUG_LEVEL_ISR) printk fmt
44 #define DBGDATA(info, buf, size, label) if (debug_level >= DEBUG_LEVEL_DATA) trace_block((info), (buf), (size), (label))
45 //#define DBGTBUF(info) dump_tbufs(info)
46 //#define DBGRBUF(info) dump_rbufs(info)
49 #include <linux/config.h>
50 #include <linux/module.h>
51 #include <linux/version.h>
52 #include <linux/errno.h>
53 #include <linux/signal.h>
54 #include <linux/sched.h>
55 #include <linux/timer.h>
56 #include <linux/interrupt.h>
57 #include <linux/pci.h>
58 #include <linux/tty.h>
59 #include <linux/tty_flip.h>
60 #include <linux/serial.h>
61 #include <linux/major.h>
62 #include <linux/string.h>
63 #include <linux/fcntl.h>
64 #include <linux/ptrace.h>
65 #include <linux/ioport.h>
67 #include <linux/slab.h>
68 #include <linux/netdevice.h>
69 #include <linux/vmalloc.h>
70 #include <linux/init.h>
71 #include <linux/delay.h>
72 #include <linux/ioctl.h>
73 #include <linux/termios.h>
74 #include <linux/bitops.h>
75 #include <linux/workqueue.h>
76 #include <linux/hdlc.h>
78 #include <asm/system.h>
82 #include <asm/types.h>
83 #include <asm/uaccess.h>
85 #include "linux/synclink.h"
87 #ifdef CONFIG_HDLC_MODULE
92 * module identification
94 static char *driver_name
= "SyncLink GT";
95 static char *driver_version
= "$Revision: 4.25 $";
96 static char *tty_driver_name
= "synclink_gt";
97 static char *tty_dev_prefix
= "ttySLG";
98 MODULE_LICENSE("GPL");
99 #define MGSL_MAGIC 0x5401
100 #define MAX_DEVICES 12
102 static struct pci_device_id pci_table
[] = {
103 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
104 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT2_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
105 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT4_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
106 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_AC_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
107 {0,}, /* terminate list */
109 MODULE_DEVICE_TABLE(pci
, pci_table
);
111 static int init_one(struct pci_dev
*dev
,const struct pci_device_id
*ent
);
112 static void remove_one(struct pci_dev
*dev
);
113 static struct pci_driver pci_driver
= {
114 .name
= "synclink_gt",
115 .id_table
= pci_table
,
117 .remove
= __devexit_p(remove_one
),
120 static int pci_registered
;
123 * module configuration and status
125 static struct slgt_info
*slgt_device_list
;
126 static int slgt_device_count
;
129 static int debug_level
;
130 static int maxframe
[MAX_DEVICES
];
131 static int dosyncppp
[MAX_DEVICES
];
133 module_param(ttymajor
, int, 0);
134 module_param(debug_level
, int, 0);
135 module_param_array(maxframe
, int, NULL
, 0);
136 module_param_array(dosyncppp
, int, NULL
, 0);
138 MODULE_PARM_DESC(ttymajor
, "TTY major device number override: 0=auto assigned");
139 MODULE_PARM_DESC(debug_level
, "Debug syslog output: 0=disabled, 1 to 5=increasing detail");
140 MODULE_PARM_DESC(maxframe
, "Maximum frame size used by device (4096 to 65535)");
141 MODULE_PARM_DESC(dosyncppp
, "Enable synchronous net device, 0=disable 1=enable");
144 * tty support and callbacks
146 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
148 static struct tty_driver
*serial_driver
;
150 static int open(struct tty_struct
*tty
, struct file
* filp
);
151 static void close(struct tty_struct
*tty
, struct file
* filp
);
152 static void hangup(struct tty_struct
*tty
);
153 static void set_termios(struct tty_struct
*tty
, struct termios
*old_termios
);
155 static int write(struct tty_struct
*tty
, const unsigned char *buf
, int count
);
156 static void put_char(struct tty_struct
*tty
, unsigned char ch
);
157 static void send_xchar(struct tty_struct
*tty
, char ch
);
158 static void wait_until_sent(struct tty_struct
*tty
, int timeout
);
159 static int write_room(struct tty_struct
*tty
);
160 static void flush_chars(struct tty_struct
*tty
);
161 static void flush_buffer(struct tty_struct
*tty
);
162 static void tx_hold(struct tty_struct
*tty
);
163 static void tx_release(struct tty_struct
*tty
);
165 static int ioctl(struct tty_struct
*tty
, struct file
*file
, unsigned int cmd
, unsigned long arg
);
166 static int read_proc(char *page
, char **start
, off_t off
, int count
,int *eof
, void *data
);
167 static int chars_in_buffer(struct tty_struct
*tty
);
168 static void throttle(struct tty_struct
* tty
);
169 static void unthrottle(struct tty_struct
* tty
);
170 static void set_break(struct tty_struct
*tty
, int break_state
);
173 * generic HDLC support and callbacks
176 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
177 static void hdlcdev_tx_done(struct slgt_info
*info
);
178 static void hdlcdev_rx(struct slgt_info
*info
, char *buf
, int size
);
179 static int hdlcdev_init(struct slgt_info
*info
);
180 static void hdlcdev_exit(struct slgt_info
*info
);
185 * device specific structures, macros and functions
188 #define SLGT_MAX_PORTS 4
189 #define SLGT_REG_SIZE 256
192 * conditional wait facility
195 struct cond_wait
*next
;
200 static void init_cond_wait(struct cond_wait
*w
, unsigned int data
);
201 static void add_cond_wait(struct cond_wait
**head
, struct cond_wait
*w
);
202 static void remove_cond_wait(struct cond_wait
**head
, struct cond_wait
*w
);
203 static void flush_cond_wait(struct cond_wait
**head
);
206 * DMA buffer descriptor and access macros
210 unsigned short count
;
211 unsigned short status
;
212 unsigned int pbuf
; /* physical address of data buffer */
213 unsigned int next
; /* physical address of next descriptor */
215 /* driver book keeping */
216 char *buf
; /* virtual address of data buffer */
217 unsigned int pdesc
; /* physical address of this descriptor */
218 dma_addr_t buf_dma_addr
;
221 #define set_desc_buffer(a,b) (a).pbuf = cpu_to_le32((unsigned int)(b))
222 #define set_desc_next(a,b) (a).next = cpu_to_le32((unsigned int)(b))
223 #define set_desc_count(a,b)(a).count = cpu_to_le16((unsigned short)(b))
224 #define set_desc_eof(a,b) (a).status = cpu_to_le16((b) ? (le16_to_cpu((a).status) | BIT0) : (le16_to_cpu((a).status) & ~BIT0))
225 #define desc_count(a) (le16_to_cpu((a).count))
226 #define desc_status(a) (le16_to_cpu((a).status))
227 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)
228 #define desc_eof(a) (le16_to_cpu((a).status) & BIT2)
229 #define desc_crc_error(a) (le16_to_cpu((a).status) & BIT1)
230 #define desc_abort(a) (le16_to_cpu((a).status) & BIT0)
231 #define desc_residue(a) ((le16_to_cpu((a).status) & 0x38) >> 3)
233 struct _input_signal_events
{
245 * device instance data structure
248 void *if_ptr
; /* General purpose pointer (used by SPPP) */
250 struct slgt_info
*next_device
; /* device list link */
255 char device_name
[25];
256 struct pci_dev
*pdev
;
258 int port_count
; /* count of ports on adapter */
259 int adapter_num
; /* adapter instance number */
260 int port_num
; /* port instance number */
262 /* array of pointers to port contexts on this adapter */
263 struct slgt_info
*port_array
[SLGT_MAX_PORTS
];
265 int count
; /* count of opens */
266 int line
; /* tty line instance number */
267 unsigned short close_delay
;
268 unsigned short closing_wait
; /* time to wait before closing */
270 struct mgsl_icount icount
;
272 struct tty_struct
*tty
;
274 int x_char
; /* xon/xoff character */
275 int blocked_open
; /* # of blocked opens */
276 unsigned int read_status_mask
;
277 unsigned int ignore_status_mask
;
279 wait_queue_head_t open_wait
;
280 wait_queue_head_t close_wait
;
282 wait_queue_head_t status_event_wait_q
;
283 wait_queue_head_t event_wait_q
;
284 struct timer_list tx_timer
;
285 struct timer_list rx_timer
;
287 unsigned int gpio_present
;
288 struct cond_wait
*gpio_wait_q
;
290 spinlock_t lock
; /* spinlock for synchronizing with ISR */
292 struct work_struct task
;
298 int irq_requested
; /* nonzero if IRQ requested */
299 int irq_occurred
; /* for diagnostics use */
301 /* device configuration */
303 unsigned int bus_type
;
304 unsigned int irq_level
;
305 unsigned long irq_flags
;
307 unsigned char __iomem
* reg_addr
; /* memory mapped registers address */
309 int reg_addr_requested
;
311 MGSL_PARAMS params
; /* communications parameters */
313 u32 max_frame_size
; /* as set by device config */
315 unsigned int raw_rx_size
;
316 unsigned int if_mode
;
326 unsigned char signals
; /* serial signal states */
327 int init_error
; /* initialization error */
329 unsigned char *tx_buf
;
332 char flag_buf
[MAX_ASYNC_BUFFER_SIZE
];
333 char char_buf
[MAX_ASYNC_BUFFER_SIZE
];
334 BOOLEAN drop_rts_on_tx_done
;
335 struct _input_signal_events input_signal_events
;
337 int dcd_chkcount
; /* check counts to prevent */
338 int cts_chkcount
; /* too many IRQs if a signal */
339 int dsr_chkcount
; /* is floating */
342 char *bufs
; /* virtual address of DMA buffer lists */
343 dma_addr_t bufs_dma_addr
; /* physical address of buffer descriptors */
345 unsigned int rbuf_count
;
346 struct slgt_desc
*rbufs
;
347 unsigned int rbuf_current
;
348 unsigned int rbuf_index
;
350 unsigned int tbuf_count
;
351 struct slgt_desc
*tbufs
;
352 unsigned int tbuf_current
;
353 unsigned int tbuf_start
;
355 unsigned char *tmp_rbuf
;
356 unsigned int tmp_rbuf_count
;
358 /* SPPP/Cisco HDLC device parts */
364 struct net_device
*netdev
;
369 static MGSL_PARAMS default_params
= {
370 .mode
= MGSL_MODE_HDLC
,
372 .flags
= HDLC_FLAG_UNDERRUN_ABORT15
,
373 .encoding
= HDLC_ENCODING_NRZI_SPACE
,
376 .crc_type
= HDLC_CRC_16_CCITT
,
377 .preamble_length
= HDLC_PREAMBLE_LENGTH_8BITS
,
378 .preamble
= HDLC_PREAMBLE_PATTERN_NONE
,
382 .parity
= ASYNC_PARITY_NONE
387 #define BH_TRANSMIT 2
389 #define IO_PIN_SHUTDOWN_LIMIT 100
391 #define DMABUFSIZE 256
392 #define DESC_LIST_SIZE 4096
394 #define MASK_PARITY BIT1
395 #define MASK_FRAMING BIT2
396 #define MASK_BREAK BIT3
397 #define MASK_OVERRUN BIT4
399 #define GSR 0x00 /* global status */
400 #define JCR 0x04 /* JTAG control */
401 #define IODR 0x08 /* GPIO direction */
402 #define IOER 0x0c /* GPIO interrupt enable */
403 #define IOVR 0x10 /* GPIO value */
404 #define IOSR 0x14 /* GPIO interrupt status */
405 #define TDR 0x80 /* tx data */
406 #define RDR 0x80 /* rx data */
407 #define TCR 0x82 /* tx control */
408 #define TIR 0x84 /* tx idle */
409 #define TPR 0x85 /* tx preamble */
410 #define RCR 0x86 /* rx control */
411 #define VCR 0x88 /* V.24 control */
412 #define CCR 0x89 /* clock control */
413 #define BDR 0x8a /* baud divisor */
414 #define SCR 0x8c /* serial control */
415 #define SSR 0x8e /* serial status */
416 #define RDCSR 0x90 /* rx DMA control/status */
417 #define TDCSR 0x94 /* tx DMA control/status */
418 #define RDDAR 0x98 /* rx DMA descriptor address */
419 #define TDDAR 0x9c /* tx DMA descriptor address */
422 #define RXBREAK BIT14
423 #define IRQ_TXDATA BIT13
424 #define IRQ_TXIDLE BIT12
425 #define IRQ_TXUNDER BIT11 /* HDLC */
426 #define IRQ_RXDATA BIT10
427 #define IRQ_RXIDLE BIT9 /* HDLC */
428 #define IRQ_RXBREAK BIT9 /* async */
429 #define IRQ_RXOVER BIT8
434 #define IRQ_ALL 0x3ff0
435 #define IRQ_MASTER BIT0
437 #define slgt_irq_on(info, mask) \
438 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
439 #define slgt_irq_off(info, mask) \
440 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
442 static __u8
rd_reg8(struct slgt_info
*info
, unsigned int addr
);
443 static void wr_reg8(struct slgt_info
*info
, unsigned int addr
, __u8 value
);
444 static __u16
rd_reg16(struct slgt_info
*info
, unsigned int addr
);
445 static void wr_reg16(struct slgt_info
*info
, unsigned int addr
, __u16 value
);
446 static __u32
rd_reg32(struct slgt_info
*info
, unsigned int addr
);
447 static void wr_reg32(struct slgt_info
*info
, unsigned int addr
, __u32 value
);
449 static void msc_set_vcr(struct slgt_info
*info
);
451 static int startup(struct slgt_info
*info
);
452 static int block_til_ready(struct tty_struct
*tty
, struct file
* filp
,struct slgt_info
*info
);
453 static void shutdown(struct slgt_info
*info
);
454 static void program_hw(struct slgt_info
*info
);
455 static void change_params(struct slgt_info
*info
);
457 static int register_test(struct slgt_info
*info
);
458 static int irq_test(struct slgt_info
*info
);
459 static int loopback_test(struct slgt_info
*info
);
460 static int adapter_test(struct slgt_info
*info
);
462 static void reset_adapter(struct slgt_info
*info
);
463 static void reset_port(struct slgt_info
*info
);
464 static void async_mode(struct slgt_info
*info
);
465 static void hdlc_mode(struct slgt_info
*info
);
467 static void rx_stop(struct slgt_info
*info
);
468 static void rx_start(struct slgt_info
*info
);
469 static void reset_rbufs(struct slgt_info
*info
);
470 static void free_rbufs(struct slgt_info
*info
, unsigned int first
, unsigned int last
);
471 static void rdma_reset(struct slgt_info
*info
);
472 static int rx_get_frame(struct slgt_info
*info
);
473 static int rx_get_buf(struct slgt_info
*info
);
475 static void tx_start(struct slgt_info
*info
);
476 static void tx_stop(struct slgt_info
*info
);
477 static void tx_set_idle(struct slgt_info
*info
);
478 static unsigned int free_tbuf_count(struct slgt_info
*info
);
479 static void reset_tbufs(struct slgt_info
*info
);
480 static void tdma_reset(struct slgt_info
*info
);
481 static void tx_load(struct slgt_info
*info
, const char *buf
, unsigned int count
);
483 static void get_signals(struct slgt_info
*info
);
484 static void set_signals(struct slgt_info
*info
);
485 static void enable_loopback(struct slgt_info
*info
);
486 static void set_rate(struct slgt_info
*info
, u32 data_rate
);
488 static int bh_action(struct slgt_info
*info
);
489 static void bh_handler(void* context
);
490 static void bh_transmit(struct slgt_info
*info
);
491 static void isr_serial(struct slgt_info
*info
);
492 static void isr_rdma(struct slgt_info
*info
);
493 static void isr_txeom(struct slgt_info
*info
, unsigned short status
);
494 static void isr_tdma(struct slgt_info
*info
);
495 static irqreturn_t
slgt_interrupt(int irq
, void *dev_id
, struct pt_regs
* regs
);
497 static int alloc_dma_bufs(struct slgt_info
*info
);
498 static void free_dma_bufs(struct slgt_info
*info
);
499 static int alloc_desc(struct slgt_info
*info
);
500 static void free_desc(struct slgt_info
*info
);
501 static int alloc_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
);
502 static void free_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
);
504 static int alloc_tmp_rbuf(struct slgt_info
*info
);
505 static void free_tmp_rbuf(struct slgt_info
*info
);
507 static void tx_timeout(unsigned long context
);
508 static void rx_timeout(unsigned long context
);
513 static int get_stats(struct slgt_info
*info
, struct mgsl_icount __user
*user_icount
);
514 static int get_params(struct slgt_info
*info
, MGSL_PARAMS __user
*params
);
515 static int set_params(struct slgt_info
*info
, MGSL_PARAMS __user
*params
);
516 static int get_txidle(struct slgt_info
*info
, int __user
*idle_mode
);
517 static int set_txidle(struct slgt_info
*info
, int idle_mode
);
518 static int tx_enable(struct slgt_info
*info
, int enable
);
519 static int tx_abort(struct slgt_info
*info
);
520 static int rx_enable(struct slgt_info
*info
, int enable
);
521 static int modem_input_wait(struct slgt_info
*info
,int arg
);
522 static int wait_mgsl_event(struct slgt_info
*info
, int __user
*mask_ptr
);
523 static int tiocmget(struct tty_struct
*tty
, struct file
*file
);
524 static int tiocmset(struct tty_struct
*tty
, struct file
*file
,
525 unsigned int set
, unsigned int clear
);
526 static void set_break(struct tty_struct
*tty
, int break_state
);
527 static int get_interface(struct slgt_info
*info
, int __user
*if_mode
);
528 static int set_interface(struct slgt_info
*info
, int if_mode
);
529 static int set_gpio(struct slgt_info
*info
, struct gpio_desc __user
*gpio
);
530 static int get_gpio(struct slgt_info
*info
, struct gpio_desc __user
*gpio
);
531 static int wait_gpio(struct slgt_info
*info
, struct gpio_desc __user
*gpio
);
536 static void add_device(struct slgt_info
*info
);
537 static void device_init(int adapter_num
, struct pci_dev
*pdev
);
538 static int claim_resources(struct slgt_info
*info
);
539 static void release_resources(struct slgt_info
*info
);
558 static void trace_block(struct slgt_info
*info
, const char *data
, int count
, const char *label
)
562 printk("%s %s data:\n",info
->device_name
, label
);
564 linecount
= (count
> 16) ? 16 : count
;
565 for(i
=0; i
< linecount
; i
++)
566 printk("%02X ",(unsigned char)data
[i
]);
569 for(i
=0;i
<linecount
;i
++) {
570 if (data
[i
]>=040 && data
[i
]<=0176)
571 printk("%c",data
[i
]);
581 #define DBGDATA(info, buf, size, label)
585 static void dump_tbufs(struct slgt_info
*info
)
588 printk("tbuf_current=%d\n", info
->tbuf_current
);
589 for (i
=0 ; i
< info
->tbuf_count
; i
++) {
590 printk("%d: count=%04X status=%04X\n",
591 i
, le16_to_cpu(info
->tbufs
[i
].count
), le16_to_cpu(info
->tbufs
[i
].status
));
595 #define DBGTBUF(info)
599 static void dump_rbufs(struct slgt_info
*info
)
602 printk("rbuf_current=%d\n", info
->rbuf_current
);
603 for (i
=0 ; i
< info
->rbuf_count
; i
++) {
604 printk("%d: count=%04X status=%04X\n",
605 i
, le16_to_cpu(info
->rbufs
[i
].count
), le16_to_cpu(info
->rbufs
[i
].status
));
609 #define DBGRBUF(info)
612 static inline int sanity_check(struct slgt_info
*info
, char *devname
, const char *name
)
616 printk("null struct slgt_info for (%s) in %s\n", devname
, name
);
619 if (info
->magic
!= MGSL_MAGIC
) {
620 printk("bad magic number struct slgt_info (%s) in %s\n", devname
, name
);
631 * line discipline callback wrappers
633 * The wrappers maintain line discipline references
634 * while calling into the line discipline.
636 * ldisc_receive_buf - pass receive data to line discipline
638 static void ldisc_receive_buf(struct tty_struct
*tty
,
639 const __u8
*data
, char *flags
, int count
)
641 struct tty_ldisc
*ld
;
644 ld
= tty_ldisc_ref(tty
);
647 ld
->receive_buf(tty
, data
, flags
, count
);
654 static int open(struct tty_struct
*tty
, struct file
*filp
)
656 struct slgt_info
*info
;
661 if ((line
< 0) || (line
>= slgt_device_count
)) {
662 DBGERR(("%s: open with invalid line #%d.\n", driver_name
, line
));
666 info
= slgt_device_list
;
667 while(info
&& info
->line
!= line
)
668 info
= info
->next_device
;
669 if (sanity_check(info
, tty
->name
, "open"))
671 if (info
->init_error
) {
672 DBGERR(("%s init error=%d\n", info
->device_name
, info
->init_error
));
676 tty
->driver_data
= info
;
679 DBGINFO(("%s open, old ref count = %d\n", info
->device_name
, info
->count
));
681 /* If port is closing, signal caller to try again */
682 if (tty_hung_up_p(filp
) || info
->flags
& ASYNC_CLOSING
){
683 if (info
->flags
& ASYNC_CLOSING
)
684 interruptible_sleep_on(&info
->close_wait
);
685 retval
= ((info
->flags
& ASYNC_HUP_NOTIFY
) ?
686 -EAGAIN
: -ERESTARTSYS
);
690 info
->tty
->low_latency
= (info
->flags
& ASYNC_LOW_LATENCY
) ? 1 : 0;
692 spin_lock_irqsave(&info
->netlock
, flags
);
693 if (info
->netcount
) {
695 spin_unlock_irqrestore(&info
->netlock
, flags
);
699 spin_unlock_irqrestore(&info
->netlock
, flags
);
701 if (info
->count
== 1) {
702 /* 1st open on this device, init hardware */
703 retval
= startup(info
);
708 retval
= block_til_ready(tty
, filp
, info
);
710 DBGINFO(("%s block_til_ready rc=%d\n", info
->device_name
, retval
));
719 info
->tty
= NULL
; /* tty layer will release tty struct */
724 DBGINFO(("%s open rc=%d\n", info
->device_name
, retval
));
728 static void close(struct tty_struct
*tty
, struct file
*filp
)
730 struct slgt_info
*info
= tty
->driver_data
;
732 if (sanity_check(info
, tty
->name
, "close"))
734 DBGINFO(("%s close entry, count=%d\n", info
->device_name
, info
->count
));
739 if (tty_hung_up_p(filp
))
742 if ((tty
->count
== 1) && (info
->count
!= 1)) {
744 * tty->count is 1 and the tty structure will be freed.
745 * info->count should be one in this case.
746 * if it's not, correct it so that the port is shutdown.
748 DBGERR(("%s close: bad refcount; tty->count=1, "
749 "info->count=%d\n", info
->device_name
, info
->count
));
755 /* if at least one open remaining, leave hardware active */
759 info
->flags
|= ASYNC_CLOSING
;
761 /* set tty->closing to notify line discipline to
762 * only process XON/XOFF characters. Only the N_TTY
763 * discipline appears to use this (ppp does not).
767 /* wait for transmit data to clear all layers */
769 if (info
->closing_wait
!= ASYNC_CLOSING_WAIT_NONE
) {
770 DBGINFO(("%s call tty_wait_until_sent\n", info
->device_name
));
771 tty_wait_until_sent(tty
, info
->closing_wait
);
774 if (info
->flags
& ASYNC_INITIALIZED
)
775 wait_until_sent(tty
, info
->timeout
);
776 if (tty
->driver
->flush_buffer
)
777 tty
->driver
->flush_buffer(tty
);
778 tty_ldisc_flush(tty
);
785 if (info
->blocked_open
) {
786 if (info
->close_delay
) {
787 msleep_interruptible(jiffies_to_msecs(info
->close_delay
));
789 wake_up_interruptible(&info
->open_wait
);
792 info
->flags
&= ~(ASYNC_NORMAL_ACTIVE
|ASYNC_CLOSING
);
794 wake_up_interruptible(&info
->close_wait
);
797 DBGINFO(("%s close exit, count=%d\n", tty
->driver
->name
, info
->count
));
800 static void hangup(struct tty_struct
*tty
)
802 struct slgt_info
*info
= tty
->driver_data
;
804 if (sanity_check(info
, tty
->name
, "hangup"))
806 DBGINFO(("%s hangup\n", info
->device_name
));
812 info
->flags
&= ~ASYNC_NORMAL_ACTIVE
;
815 wake_up_interruptible(&info
->open_wait
);
818 static void set_termios(struct tty_struct
*tty
, struct termios
*old_termios
)
820 struct slgt_info
*info
= tty
->driver_data
;
823 DBGINFO(("%s set_termios\n", tty
->driver
->name
));
825 /* just return if nothing has changed */
826 if ((tty
->termios
->c_cflag
== old_termios
->c_cflag
)
827 && (RELEVANT_IFLAG(tty
->termios
->c_iflag
)
828 == RELEVANT_IFLAG(old_termios
->c_iflag
)))
833 /* Handle transition to B0 status */
834 if (old_termios
->c_cflag
& CBAUD
&&
835 !(tty
->termios
->c_cflag
& CBAUD
)) {
836 info
->signals
&= ~(SerialSignal_RTS
+ SerialSignal_DTR
);
837 spin_lock_irqsave(&info
->lock
,flags
);
839 spin_unlock_irqrestore(&info
->lock
,flags
);
842 /* Handle transition away from B0 status */
843 if (!(old_termios
->c_cflag
& CBAUD
) &&
844 tty
->termios
->c_cflag
& CBAUD
) {
845 info
->signals
|= SerialSignal_DTR
;
846 if (!(tty
->termios
->c_cflag
& CRTSCTS
) ||
847 !test_bit(TTY_THROTTLED
, &tty
->flags
)) {
848 info
->signals
|= SerialSignal_RTS
;
850 spin_lock_irqsave(&info
->lock
,flags
);
852 spin_unlock_irqrestore(&info
->lock
,flags
);
855 /* Handle turning off CRTSCTS */
856 if (old_termios
->c_cflag
& CRTSCTS
&&
857 !(tty
->termios
->c_cflag
& CRTSCTS
)) {
863 static int write(struct tty_struct
*tty
,
864 const unsigned char *buf
, int count
)
867 struct slgt_info
*info
= tty
->driver_data
;
870 if (sanity_check(info
, tty
->name
, "write"))
872 DBGINFO(("%s write count=%d\n", info
->device_name
, count
));
877 if (count
> info
->max_frame_size
) {
885 if (info
->params
.mode
== MGSL_MODE_RAW
) {
886 unsigned int bufs_needed
= (count
/DMABUFSIZE
);
887 unsigned int bufs_free
= free_tbuf_count(info
);
888 if (count
% DMABUFSIZE
)
890 if (bufs_needed
> bufs_free
)
895 if (info
->tx_count
) {
896 /* send accumulated data from send_char() calls */
897 /* as frame and wait before accepting more data. */
898 tx_load(info
, info
->tx_buf
, info
->tx_count
);
903 ret
= info
->tx_count
= count
;
904 tx_load(info
, buf
, count
);
908 if (info
->tx_count
&& !tty
->stopped
&& !tty
->hw_stopped
) {
909 spin_lock_irqsave(&info
->lock
,flags
);
910 if (!info
->tx_active
)
912 spin_unlock_irqrestore(&info
->lock
,flags
);
916 DBGINFO(("%s write rc=%d\n", info
->device_name
, ret
));
920 static void put_char(struct tty_struct
*tty
, unsigned char ch
)
922 struct slgt_info
*info
= tty
->driver_data
;
925 if (sanity_check(info
, tty
->name
, "put_char"))
927 DBGINFO(("%s put_char(%d)\n", info
->device_name
, ch
));
930 spin_lock_irqsave(&info
->lock
,flags
);
931 if (!info
->tx_active
&& (info
->tx_count
< info
->max_frame_size
))
932 info
->tx_buf
[info
->tx_count
++] = ch
;
933 spin_unlock_irqrestore(&info
->lock
,flags
);
936 static void send_xchar(struct tty_struct
*tty
, char ch
)
938 struct slgt_info
*info
= tty
->driver_data
;
941 if (sanity_check(info
, tty
->name
, "send_xchar"))
943 DBGINFO(("%s send_xchar(%d)\n", info
->device_name
, ch
));
946 spin_lock_irqsave(&info
->lock
,flags
);
947 if (!info
->tx_enabled
)
949 spin_unlock_irqrestore(&info
->lock
,flags
);
953 static void wait_until_sent(struct tty_struct
*tty
, int timeout
)
955 struct slgt_info
*info
= tty
->driver_data
;
956 unsigned long orig_jiffies
, char_time
;
960 if (sanity_check(info
, tty
->name
, "wait_until_sent"))
962 DBGINFO(("%s wait_until_sent entry\n", info
->device_name
));
963 if (!(info
->flags
& ASYNC_INITIALIZED
))
966 orig_jiffies
= jiffies
;
968 /* Set check interval to 1/5 of estimated time to
969 * send a character, and make it at least 1. The check
970 * interval should also be less than the timeout.
971 * Note: use tight timings here to satisfy the NIST-PCTS.
974 if (info
->params
.data_rate
) {
975 char_time
= info
->timeout
/(32 * 5);
982 char_time
= min_t(unsigned long, char_time
, timeout
);
984 while (info
->tx_active
) {
985 msleep_interruptible(jiffies_to_msecs(char_time
));
986 if (signal_pending(current
))
988 if (timeout
&& time_after(jiffies
, orig_jiffies
+ timeout
))
993 DBGINFO(("%s wait_until_sent exit\n", info
->device_name
));
996 static int write_room(struct tty_struct
*tty
)
998 struct slgt_info
*info
= tty
->driver_data
;
1001 if (sanity_check(info
, tty
->name
, "write_room"))
1003 ret
= (info
->tx_active
) ? 0 : HDLC_MAX_FRAME_SIZE
;
1004 DBGINFO(("%s write_room=%d\n", info
->device_name
, ret
));
1008 static void flush_chars(struct tty_struct
*tty
)
1010 struct slgt_info
*info
= tty
->driver_data
;
1011 unsigned long flags
;
1013 if (sanity_check(info
, tty
->name
, "flush_chars"))
1015 DBGINFO(("%s flush_chars entry tx_count=%d\n", info
->device_name
, info
->tx_count
));
1017 if (info
->tx_count
<= 0 || tty
->stopped
||
1018 tty
->hw_stopped
|| !info
->tx_buf
)
1021 DBGINFO(("%s flush_chars start transmit\n", info
->device_name
));
1023 spin_lock_irqsave(&info
->lock
,flags
);
1024 if (!info
->tx_active
&& info
->tx_count
) {
1025 tx_load(info
, info
->tx_buf
,info
->tx_count
);
1028 spin_unlock_irqrestore(&info
->lock
,flags
);
1031 static void flush_buffer(struct tty_struct
*tty
)
1033 struct slgt_info
*info
= tty
->driver_data
;
1034 unsigned long flags
;
1036 if (sanity_check(info
, tty
->name
, "flush_buffer"))
1038 DBGINFO(("%s flush_buffer\n", info
->device_name
));
1040 spin_lock_irqsave(&info
->lock
,flags
);
1041 if (!info
->tx_active
)
1043 spin_unlock_irqrestore(&info
->lock
,flags
);
1045 wake_up_interruptible(&tty
->write_wait
);
1050 * throttle (stop) transmitter
1052 static void tx_hold(struct tty_struct
*tty
)
1054 struct slgt_info
*info
= tty
->driver_data
;
1055 unsigned long flags
;
1057 if (sanity_check(info
, tty
->name
, "tx_hold"))
1059 DBGINFO(("%s tx_hold\n", info
->device_name
));
1060 spin_lock_irqsave(&info
->lock
,flags
);
1061 if (info
->tx_enabled
&& info
->params
.mode
== MGSL_MODE_ASYNC
)
1063 spin_unlock_irqrestore(&info
->lock
,flags
);
1067 * release (start) transmitter
1069 static void tx_release(struct tty_struct
*tty
)
1071 struct slgt_info
*info
= tty
->driver_data
;
1072 unsigned long flags
;
1074 if (sanity_check(info
, tty
->name
, "tx_release"))
1076 DBGINFO(("%s tx_release\n", info
->device_name
));
1077 spin_lock_irqsave(&info
->lock
,flags
);
1078 if (!info
->tx_active
&& info
->tx_count
) {
1079 tx_load(info
, info
->tx_buf
, info
->tx_count
);
1082 spin_unlock_irqrestore(&info
->lock
,flags
);
1086 * Service an IOCTL request
1090 * tty pointer to tty instance data
1091 * file pointer to associated file object for device
1092 * cmd IOCTL command code
1093 * arg command argument/context
1095 * Return 0 if success, otherwise error code
1097 static int ioctl(struct tty_struct
*tty
, struct file
*file
,
1098 unsigned int cmd
, unsigned long arg
)
1100 struct slgt_info
*info
= tty
->driver_data
;
1101 struct mgsl_icount cnow
; /* kernel counter temps */
1102 struct serial_icounter_struct __user
*p_cuser
; /* user space */
1103 unsigned long flags
;
1104 void __user
*argp
= (void __user
*)arg
;
1106 if (sanity_check(info
, tty
->name
, "ioctl"))
1108 DBGINFO(("%s ioctl() cmd=%08X\n", info
->device_name
, cmd
));
1110 if ((cmd
!= TIOCGSERIAL
) && (cmd
!= TIOCSSERIAL
) &&
1111 (cmd
!= TIOCMIWAIT
) && (cmd
!= TIOCGICOUNT
)) {
1112 if (tty
->flags
& (1 << TTY_IO_ERROR
))
1117 case MGSL_IOCGPARAMS
:
1118 return get_params(info
, argp
);
1119 case MGSL_IOCSPARAMS
:
1120 return set_params(info
, argp
);
1121 case MGSL_IOCGTXIDLE
:
1122 return get_txidle(info
, argp
);
1123 case MGSL_IOCSTXIDLE
:
1124 return set_txidle(info
, (int)arg
);
1125 case MGSL_IOCTXENABLE
:
1126 return tx_enable(info
, (int)arg
);
1127 case MGSL_IOCRXENABLE
:
1128 return rx_enable(info
, (int)arg
);
1129 case MGSL_IOCTXABORT
:
1130 return tx_abort(info
);
1131 case MGSL_IOCGSTATS
:
1132 return get_stats(info
, argp
);
1133 case MGSL_IOCWAITEVENT
:
1134 return wait_mgsl_event(info
, argp
);
1136 return modem_input_wait(info
,(int)arg
);
1138 return get_interface(info
, argp
);
1140 return set_interface(info
,(int)arg
);
1142 return set_gpio(info
, argp
);
1144 return get_gpio(info
, argp
);
1145 case MGSL_IOCWAITGPIO
:
1146 return wait_gpio(info
, argp
);
1148 spin_lock_irqsave(&info
->lock
,flags
);
1149 cnow
= info
->icount
;
1150 spin_unlock_irqrestore(&info
->lock
,flags
);
1152 if (put_user(cnow
.cts
, &p_cuser
->cts
) ||
1153 put_user(cnow
.dsr
, &p_cuser
->dsr
) ||
1154 put_user(cnow
.rng
, &p_cuser
->rng
) ||
1155 put_user(cnow
.dcd
, &p_cuser
->dcd
) ||
1156 put_user(cnow
.rx
, &p_cuser
->rx
) ||
1157 put_user(cnow
.tx
, &p_cuser
->tx
) ||
1158 put_user(cnow
.frame
, &p_cuser
->frame
) ||
1159 put_user(cnow
.overrun
, &p_cuser
->overrun
) ||
1160 put_user(cnow
.parity
, &p_cuser
->parity
) ||
1161 put_user(cnow
.brk
, &p_cuser
->brk
) ||
1162 put_user(cnow
.buf_overrun
, &p_cuser
->buf_overrun
))
1166 return -ENOIOCTLCMD
;
1174 static inline int line_info(char *buf
, struct slgt_info
*info
)
1178 unsigned long flags
;
1180 ret
= sprintf(buf
, "%s: IO=%08X IRQ=%d MaxFrameSize=%u\n",
1181 info
->device_name
, info
->phys_reg_addr
,
1182 info
->irq_level
, info
->max_frame_size
);
1184 /* output current serial signal states */
1185 spin_lock_irqsave(&info
->lock
,flags
);
1187 spin_unlock_irqrestore(&info
->lock
,flags
);
1191 if (info
->signals
& SerialSignal_RTS
)
1192 strcat(stat_buf
, "|RTS");
1193 if (info
->signals
& SerialSignal_CTS
)
1194 strcat(stat_buf
, "|CTS");
1195 if (info
->signals
& SerialSignal_DTR
)
1196 strcat(stat_buf
, "|DTR");
1197 if (info
->signals
& SerialSignal_DSR
)
1198 strcat(stat_buf
, "|DSR");
1199 if (info
->signals
& SerialSignal_DCD
)
1200 strcat(stat_buf
, "|CD");
1201 if (info
->signals
& SerialSignal_RI
)
1202 strcat(stat_buf
, "|RI");
1204 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
1205 ret
+= sprintf(buf
+ret
, "\tHDLC txok:%d rxok:%d",
1206 info
->icount
.txok
, info
->icount
.rxok
);
1207 if (info
->icount
.txunder
)
1208 ret
+= sprintf(buf
+ret
, " txunder:%d", info
->icount
.txunder
);
1209 if (info
->icount
.txabort
)
1210 ret
+= sprintf(buf
+ret
, " txabort:%d", info
->icount
.txabort
);
1211 if (info
->icount
.rxshort
)
1212 ret
+= sprintf(buf
+ret
, " rxshort:%d", info
->icount
.rxshort
);
1213 if (info
->icount
.rxlong
)
1214 ret
+= sprintf(buf
+ret
, " rxlong:%d", info
->icount
.rxlong
);
1215 if (info
->icount
.rxover
)
1216 ret
+= sprintf(buf
+ret
, " rxover:%d", info
->icount
.rxover
);
1217 if (info
->icount
.rxcrc
)
1218 ret
+= sprintf(buf
+ret
, " rxcrc:%d", info
->icount
.rxcrc
);
1220 ret
+= sprintf(buf
+ret
, "\tASYNC tx:%d rx:%d",
1221 info
->icount
.tx
, info
->icount
.rx
);
1222 if (info
->icount
.frame
)
1223 ret
+= sprintf(buf
+ret
, " fe:%d", info
->icount
.frame
);
1224 if (info
->icount
.parity
)
1225 ret
+= sprintf(buf
+ret
, " pe:%d", info
->icount
.parity
);
1226 if (info
->icount
.brk
)
1227 ret
+= sprintf(buf
+ret
, " brk:%d", info
->icount
.brk
);
1228 if (info
->icount
.overrun
)
1229 ret
+= sprintf(buf
+ret
, " oe:%d", info
->icount
.overrun
);
1232 /* Append serial signal status to end */
1233 ret
+= sprintf(buf
+ret
, " %s\n", stat_buf
+1);
1235 ret
+= sprintf(buf
+ret
, "\ttxactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
1236 info
->tx_active
,info
->bh_requested
,info
->bh_running
,
1242 /* Called to print information about devices
1244 static int read_proc(char *page
, char **start
, off_t off
, int count
,
1245 int *eof
, void *data
)
1249 struct slgt_info
*info
;
1251 len
+= sprintf(page
, "synclink_gt driver:%s\n", driver_version
);
1253 info
= slgt_device_list
;
1255 l
= line_info(page
+ len
, info
);
1257 if (len
+begin
> off
+count
)
1259 if (len
+begin
< off
) {
1263 info
= info
->next_device
;
1268 if (off
>= len
+begin
)
1270 *start
= page
+ (off
-begin
);
1271 return ((count
< begin
+len
-off
) ? count
: begin
+len
-off
);
1275 * return count of bytes in transmit buffer
1277 static int chars_in_buffer(struct tty_struct
*tty
)
1279 struct slgt_info
*info
= tty
->driver_data
;
1280 if (sanity_check(info
, tty
->name
, "chars_in_buffer"))
1282 DBGINFO(("%s chars_in_buffer()=%d\n", info
->device_name
, info
->tx_count
));
1283 return info
->tx_count
;
1287 * signal remote device to throttle send data (our receive data)
1289 static void throttle(struct tty_struct
* tty
)
1291 struct slgt_info
*info
= tty
->driver_data
;
1292 unsigned long flags
;
1294 if (sanity_check(info
, tty
->name
, "throttle"))
1296 DBGINFO(("%s throttle\n", info
->device_name
));
1298 send_xchar(tty
, STOP_CHAR(tty
));
1299 if (tty
->termios
->c_cflag
& CRTSCTS
) {
1300 spin_lock_irqsave(&info
->lock
,flags
);
1301 info
->signals
&= ~SerialSignal_RTS
;
1303 spin_unlock_irqrestore(&info
->lock
,flags
);
1308 * signal remote device to stop throttling send data (our receive data)
1310 static void unthrottle(struct tty_struct
* tty
)
1312 struct slgt_info
*info
= tty
->driver_data
;
1313 unsigned long flags
;
1315 if (sanity_check(info
, tty
->name
, "unthrottle"))
1317 DBGINFO(("%s unthrottle\n", info
->device_name
));
1322 send_xchar(tty
, START_CHAR(tty
));
1324 if (tty
->termios
->c_cflag
& CRTSCTS
) {
1325 spin_lock_irqsave(&info
->lock
,flags
);
1326 info
->signals
|= SerialSignal_RTS
;
1328 spin_unlock_irqrestore(&info
->lock
,flags
);
1333 * set or clear transmit break condition
1334 * break_state -1=set break condition, 0=clear
1336 static void set_break(struct tty_struct
*tty
, int break_state
)
1338 struct slgt_info
*info
= tty
->driver_data
;
1339 unsigned short value
;
1340 unsigned long flags
;
1342 if (sanity_check(info
, tty
->name
, "set_break"))
1344 DBGINFO(("%s set_break(%d)\n", info
->device_name
, break_state
));
1346 spin_lock_irqsave(&info
->lock
,flags
);
1347 value
= rd_reg16(info
, TCR
);
1348 if (break_state
== -1)
1352 wr_reg16(info
, TCR
, value
);
1353 spin_unlock_irqrestore(&info
->lock
,flags
);
1359 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
1360 * set encoding and frame check sequence (FCS) options
1362 * dev pointer to network device structure
1363 * encoding serial encoding setting
1364 * parity FCS setting
1366 * returns 0 if success, otherwise error code
1368 static int hdlcdev_attach(struct net_device
*dev
, unsigned short encoding
,
1369 unsigned short parity
)
1371 struct slgt_info
*info
= dev_to_port(dev
);
1372 unsigned char new_encoding
;
1373 unsigned short new_crctype
;
1375 /* return error if TTY interface open */
1379 DBGINFO(("%s hdlcdev_attach\n", info
->device_name
));
1383 case ENCODING_NRZ
: new_encoding
= HDLC_ENCODING_NRZ
; break;
1384 case ENCODING_NRZI
: new_encoding
= HDLC_ENCODING_NRZI_SPACE
; break;
1385 case ENCODING_FM_MARK
: new_encoding
= HDLC_ENCODING_BIPHASE_MARK
; break;
1386 case ENCODING_FM_SPACE
: new_encoding
= HDLC_ENCODING_BIPHASE_SPACE
; break;
1387 case ENCODING_MANCHESTER
: new_encoding
= HDLC_ENCODING_BIPHASE_LEVEL
; break;
1388 default: return -EINVAL
;
1393 case PARITY_NONE
: new_crctype
= HDLC_CRC_NONE
; break;
1394 case PARITY_CRC16_PR1_CCITT
: new_crctype
= HDLC_CRC_16_CCITT
; break;
1395 case PARITY_CRC32_PR1_CCITT
: new_crctype
= HDLC_CRC_32_CCITT
; break;
1396 default: return -EINVAL
;
1399 info
->params
.encoding
= new_encoding
;
1400 info
->params
.crc_type
= new_crctype
;
1402 /* if network interface up, reprogram hardware */
1410 * called by generic HDLC layer to send frame
1412 * skb socket buffer containing HDLC frame
1413 * dev pointer to network device structure
1415 * returns 0 if success, otherwise error code
1417 static int hdlcdev_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1419 struct slgt_info
*info
= dev_to_port(dev
);
1420 struct net_device_stats
*stats
= hdlc_stats(dev
);
1421 unsigned long flags
;
1423 DBGINFO(("%s hdlc_xmit\n", dev
->name
));
1425 /* stop sending until this frame completes */
1426 netif_stop_queue(dev
);
1428 /* copy data to device buffers */
1429 info
->tx_count
= skb
->len
;
1430 tx_load(info
, skb
->data
, skb
->len
);
1432 /* update network statistics */
1433 stats
->tx_packets
++;
1434 stats
->tx_bytes
+= skb
->len
;
1436 /* done with socket buffer, so free it */
1439 /* save start time for transmit timeout detection */
1440 dev
->trans_start
= jiffies
;
1442 /* start hardware transmitter if necessary */
1443 spin_lock_irqsave(&info
->lock
,flags
);
1444 if (!info
->tx_active
)
1446 spin_unlock_irqrestore(&info
->lock
,flags
);
1452 * called by network layer when interface enabled
1453 * claim resources and initialize hardware
1455 * dev pointer to network device structure
1457 * returns 0 if success, otherwise error code
1459 static int hdlcdev_open(struct net_device
*dev
)
1461 struct slgt_info
*info
= dev_to_port(dev
);
1463 unsigned long flags
;
1465 DBGINFO(("%s hdlcdev_open\n", dev
->name
));
1467 /* generic HDLC layer open processing */
1468 if ((rc
= hdlc_open(dev
)))
1471 /* arbitrate between network and tty opens */
1472 spin_lock_irqsave(&info
->netlock
, flags
);
1473 if (info
->count
!= 0 || info
->netcount
!= 0) {
1474 DBGINFO(("%s hdlc_open busy\n", dev
->name
));
1475 spin_unlock_irqrestore(&info
->netlock
, flags
);
1479 spin_unlock_irqrestore(&info
->netlock
, flags
);
1481 /* claim resources and init adapter */
1482 if ((rc
= startup(info
)) != 0) {
1483 spin_lock_irqsave(&info
->netlock
, flags
);
1485 spin_unlock_irqrestore(&info
->netlock
, flags
);
1489 /* assert DTR and RTS, apply hardware settings */
1490 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
1493 /* enable network layer transmit */
1494 dev
->trans_start
= jiffies
;
1495 netif_start_queue(dev
);
1497 /* inform generic HDLC layer of current DCD status */
1498 spin_lock_irqsave(&info
->lock
, flags
);
1500 spin_unlock_irqrestore(&info
->lock
, flags
);
1501 hdlc_set_carrier(info
->signals
& SerialSignal_DCD
, dev
);
1507 * called by network layer when interface is disabled
1508 * shutdown hardware and release resources
1510 * dev pointer to network device structure
1512 * returns 0 if success, otherwise error code
1514 static int hdlcdev_close(struct net_device
*dev
)
1516 struct slgt_info
*info
= dev_to_port(dev
);
1517 unsigned long flags
;
1519 DBGINFO(("%s hdlcdev_close\n", dev
->name
));
1521 netif_stop_queue(dev
);
1523 /* shutdown adapter and release resources */
1528 spin_lock_irqsave(&info
->netlock
, flags
);
1530 spin_unlock_irqrestore(&info
->netlock
, flags
);
1536 * called by network layer to process IOCTL call to network device
1538 * dev pointer to network device structure
1539 * ifr pointer to network interface request structure
1540 * cmd IOCTL command code
1542 * returns 0 if success, otherwise error code
1544 static int hdlcdev_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1546 const size_t size
= sizeof(sync_serial_settings
);
1547 sync_serial_settings new_line
;
1548 sync_serial_settings __user
*line
= ifr
->ifr_settings
.ifs_ifsu
.sync
;
1549 struct slgt_info
*info
= dev_to_port(dev
);
1552 DBGINFO(("%s hdlcdev_ioctl\n", dev
->name
));
1554 /* return error if TTY interface open */
1558 if (cmd
!= SIOCWANDEV
)
1559 return hdlc_ioctl(dev
, ifr
, cmd
);
1561 switch(ifr
->ifr_settings
.type
) {
1562 case IF_GET_IFACE
: /* return current sync_serial_settings */
1564 ifr
->ifr_settings
.type
= IF_IFACE_SYNC_SERIAL
;
1565 if (ifr
->ifr_settings
.size
< size
) {
1566 ifr
->ifr_settings
.size
= size
; /* data size wanted */
1570 flags
= info
->params
.flags
& (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1571 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1572 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1573 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
);
1576 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_TXCPIN
): new_line
.clock_type
= CLOCK_EXT
; break;
1577 case (HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
): new_line
.clock_type
= CLOCK_INT
; break;
1578 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_BRG
): new_line
.clock_type
= CLOCK_TXINT
; break;
1579 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_RXCPIN
): new_line
.clock_type
= CLOCK_TXFROMRX
; break;
1580 default: new_line
.clock_type
= CLOCK_DEFAULT
;
1583 new_line
.clock_rate
= info
->params
.clock_speed
;
1584 new_line
.loopback
= info
->params
.loopback
? 1:0;
1586 if (copy_to_user(line
, &new_line
, size
))
1590 case IF_IFACE_SYNC_SERIAL
: /* set sync_serial_settings */
1592 if(!capable(CAP_NET_ADMIN
))
1594 if (copy_from_user(&new_line
, line
, size
))
1597 switch (new_line
.clock_type
)
1599 case CLOCK_EXT
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_TXCPIN
; break;
1600 case CLOCK_TXFROMRX
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_RXCPIN
; break;
1601 case CLOCK_INT
: flags
= HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
; break;
1602 case CLOCK_TXINT
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_BRG
; break;
1603 case CLOCK_DEFAULT
: flags
= info
->params
.flags
&
1604 (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1605 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1606 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1607 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
); break;
1608 default: return -EINVAL
;
1611 if (new_line
.loopback
!= 0 && new_line
.loopback
!= 1)
1614 info
->params
.flags
&= ~(HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1615 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1616 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1617 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
);
1618 info
->params
.flags
|= flags
;
1620 info
->params
.loopback
= new_line
.loopback
;
1622 if (flags
& (HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
))
1623 info
->params
.clock_speed
= new_line
.clock_rate
;
1625 info
->params
.clock_speed
= 0;
1627 /* if network interface up, reprogram hardware */
1633 return hdlc_ioctl(dev
, ifr
, cmd
);
1638 * called by network layer when transmit timeout is detected
1640 * dev pointer to network device structure
1642 static void hdlcdev_tx_timeout(struct net_device
*dev
)
1644 struct slgt_info
*info
= dev_to_port(dev
);
1645 struct net_device_stats
*stats
= hdlc_stats(dev
);
1646 unsigned long flags
;
1648 DBGINFO(("%s hdlcdev_tx_timeout\n", dev
->name
));
1651 stats
->tx_aborted_errors
++;
1653 spin_lock_irqsave(&info
->lock
,flags
);
1655 spin_unlock_irqrestore(&info
->lock
,flags
);
1657 netif_wake_queue(dev
);
1661 * called by device driver when transmit completes
1662 * reenable network layer transmit if stopped
1664 * info pointer to device instance information
1666 static void hdlcdev_tx_done(struct slgt_info
*info
)
1668 if (netif_queue_stopped(info
->netdev
))
1669 netif_wake_queue(info
->netdev
);
1673 * called by device driver when frame received
1674 * pass frame to network layer
1676 * info pointer to device instance information
1677 * buf pointer to buffer contianing frame data
1678 * size count of data bytes in buf
1680 static void hdlcdev_rx(struct slgt_info
*info
, char *buf
, int size
)
1682 struct sk_buff
*skb
= dev_alloc_skb(size
);
1683 struct net_device
*dev
= info
->netdev
;
1684 struct net_device_stats
*stats
= hdlc_stats(dev
);
1686 DBGINFO(("%s hdlcdev_rx\n", dev
->name
));
1689 DBGERR(("%s: can't alloc skb, drop packet\n", dev
->name
));
1690 stats
->rx_dropped
++;
1694 memcpy(skb_put(skb
, size
),buf
,size
);
1696 skb
->protocol
= hdlc_type_trans(skb
, info
->netdev
);
1698 stats
->rx_packets
++;
1699 stats
->rx_bytes
+= size
;
1703 info
->netdev
->last_rx
= jiffies
;
1707 * called by device driver when adding device instance
1708 * do generic HDLC initialization
1710 * info pointer to device instance information
1712 * returns 0 if success, otherwise error code
1714 static int hdlcdev_init(struct slgt_info
*info
)
1717 struct net_device
*dev
;
1720 /* allocate and initialize network and HDLC layer objects */
1722 if (!(dev
= alloc_hdlcdev(info
))) {
1723 printk(KERN_ERR
"%s hdlc device alloc failure\n", info
->device_name
);
1727 /* for network layer reporting purposes only */
1728 dev
->mem_start
= info
->phys_reg_addr
;
1729 dev
->mem_end
= info
->phys_reg_addr
+ SLGT_REG_SIZE
- 1;
1730 dev
->irq
= info
->irq_level
;
1732 /* network layer callbacks and settings */
1733 dev
->do_ioctl
= hdlcdev_ioctl
;
1734 dev
->open
= hdlcdev_open
;
1735 dev
->stop
= hdlcdev_close
;
1736 dev
->tx_timeout
= hdlcdev_tx_timeout
;
1737 dev
->watchdog_timeo
= 10*HZ
;
1738 dev
->tx_queue_len
= 50;
1740 /* generic HDLC layer callbacks and settings */
1741 hdlc
= dev_to_hdlc(dev
);
1742 hdlc
->attach
= hdlcdev_attach
;
1743 hdlc
->xmit
= hdlcdev_xmit
;
1745 /* register objects with HDLC layer */
1746 if ((rc
= register_hdlc_device(dev
))) {
1747 printk(KERN_WARNING
"%s:unable to register hdlc device\n",__FILE__
);
1757 * called by device driver when removing device instance
1758 * do generic HDLC cleanup
1760 * info pointer to device instance information
1762 static void hdlcdev_exit(struct slgt_info
*info
)
1764 unregister_hdlc_device(info
->netdev
);
1765 free_netdev(info
->netdev
);
1766 info
->netdev
= NULL
;
1769 #endif /* ifdef CONFIG_HDLC */
1772 * get async data from rx DMA buffers
1774 static void rx_async(struct slgt_info
*info
)
1776 struct tty_struct
*tty
= info
->tty
;
1777 struct mgsl_icount
*icount
= &info
->icount
;
1778 unsigned int start
, end
;
1780 unsigned char status
;
1781 struct slgt_desc
*bufs
= info
->rbufs
;
1787 start
= end
= info
->rbuf_current
;
1789 while(desc_complete(bufs
[end
])) {
1790 count
= desc_count(bufs
[end
]) - info
->rbuf_index
;
1791 p
= bufs
[end
].buf
+ info
->rbuf_index
;
1793 DBGISR(("%s rx_async count=%d\n", info
->device_name
, count
));
1794 DBGDATA(info
, p
, count
, "rx");
1796 for(i
=0 ; i
< count
; i
+=2, p
+=2) {
1802 if ((status
= *(p
+1) & (BIT9
+ BIT8
))) {
1805 else if (status
& BIT8
)
1807 /* discard char if tty control flags say so */
1808 if (status
& info
->ignore_status_mask
)
1812 else if (status
& BIT8
)
1816 tty_insert_flip_char(tty
, ch
, stat
);
1822 /* receive buffer not completed */
1823 info
->rbuf_index
+= i
;
1824 info
->rx_timer
.expires
= jiffies
+ 1;
1825 add_timer(&info
->rx_timer
);
1829 info
->rbuf_index
= 0;
1830 free_rbufs(info
, end
, end
);
1832 if (++end
== info
->rbuf_count
)
1835 /* if entire list searched then no frame available */
1841 tty_flip_buffer_push(tty
);
1845 * return next bottom half action to perform
1847 static int bh_action(struct slgt_info
*info
)
1849 unsigned long flags
;
1852 spin_lock_irqsave(&info
->lock
,flags
);
1854 if (info
->pending_bh
& BH_RECEIVE
) {
1855 info
->pending_bh
&= ~BH_RECEIVE
;
1857 } else if (info
->pending_bh
& BH_TRANSMIT
) {
1858 info
->pending_bh
&= ~BH_TRANSMIT
;
1860 } else if (info
->pending_bh
& BH_STATUS
) {
1861 info
->pending_bh
&= ~BH_STATUS
;
1864 /* Mark BH routine as complete */
1865 info
->bh_running
= 0;
1866 info
->bh_requested
= 0;
1870 spin_unlock_irqrestore(&info
->lock
,flags
);
1876 * perform bottom half processing
1878 static void bh_handler(void* context
)
1880 struct slgt_info
*info
= context
;
1885 info
->bh_running
= 1;
1887 while((action
= bh_action(info
))) {
1890 DBGBH(("%s bh receive\n", info
->device_name
));
1891 switch(info
->params
.mode
) {
1892 case MGSL_MODE_ASYNC
:
1895 case MGSL_MODE_HDLC
:
1896 while(rx_get_frame(info
));
1899 while(rx_get_buf(info
));
1902 /* restart receiver if rx DMA buffers exhausted */
1903 if (info
->rx_restart
)
1910 DBGBH(("%s bh status\n", info
->device_name
));
1911 info
->ri_chkcount
= 0;
1912 info
->dsr_chkcount
= 0;
1913 info
->dcd_chkcount
= 0;
1914 info
->cts_chkcount
= 0;
1917 DBGBH(("%s unknown action\n", info
->device_name
));
1921 DBGBH(("%s bh_handler exit\n", info
->device_name
));
1924 static void bh_transmit(struct slgt_info
*info
)
1926 struct tty_struct
*tty
= info
->tty
;
1928 DBGBH(("%s bh_transmit\n", info
->device_name
));
1931 wake_up_interruptible(&tty
->write_wait
);
1935 static void dsr_change(struct slgt_info
*info
)
1938 DBGISR(("dsr_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1939 if ((info
->dsr_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1940 slgt_irq_off(info
, IRQ_DSR
);
1944 if (info
->signals
& SerialSignal_DSR
)
1945 info
->input_signal_events
.dsr_up
++;
1947 info
->input_signal_events
.dsr_down
++;
1948 wake_up_interruptible(&info
->status_event_wait_q
);
1949 wake_up_interruptible(&info
->event_wait_q
);
1950 info
->pending_bh
|= BH_STATUS
;
1953 static void cts_change(struct slgt_info
*info
)
1956 DBGISR(("cts_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1957 if ((info
->cts_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1958 slgt_irq_off(info
, IRQ_CTS
);
1962 if (info
->signals
& SerialSignal_CTS
)
1963 info
->input_signal_events
.cts_up
++;
1965 info
->input_signal_events
.cts_down
++;
1966 wake_up_interruptible(&info
->status_event_wait_q
);
1967 wake_up_interruptible(&info
->event_wait_q
);
1968 info
->pending_bh
|= BH_STATUS
;
1970 if (info
->flags
& ASYNC_CTS_FLOW
) {
1972 if (info
->tty
->hw_stopped
) {
1973 if (info
->signals
& SerialSignal_CTS
) {
1974 info
->tty
->hw_stopped
= 0;
1975 info
->pending_bh
|= BH_TRANSMIT
;
1979 if (!(info
->signals
& SerialSignal_CTS
))
1980 info
->tty
->hw_stopped
= 1;
1986 static void dcd_change(struct slgt_info
*info
)
1989 DBGISR(("dcd_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1990 if ((info
->dcd_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1991 slgt_irq_off(info
, IRQ_DCD
);
1995 if (info
->signals
& SerialSignal_DCD
) {
1996 info
->input_signal_events
.dcd_up
++;
1998 info
->input_signal_events
.dcd_down
++;
2002 hdlc_set_carrier(info
->signals
& SerialSignal_DCD
, info
->netdev
);
2004 wake_up_interruptible(&info
->status_event_wait_q
);
2005 wake_up_interruptible(&info
->event_wait_q
);
2006 info
->pending_bh
|= BH_STATUS
;
2008 if (info
->flags
& ASYNC_CHECK_CD
) {
2009 if (info
->signals
& SerialSignal_DCD
)
2010 wake_up_interruptible(&info
->open_wait
);
2013 tty_hangup(info
->tty
);
2018 static void ri_change(struct slgt_info
*info
)
2021 DBGISR(("ri_change %s signals=%04X\n", info
->device_name
, info
->signals
));
2022 if ((info
->ri_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
2023 slgt_irq_off(info
, IRQ_RI
);
2027 if (info
->signals
& SerialSignal_RI
) {
2028 info
->input_signal_events
.ri_up
++;
2030 info
->input_signal_events
.ri_down
++;
2032 wake_up_interruptible(&info
->status_event_wait_q
);
2033 wake_up_interruptible(&info
->event_wait_q
);
2034 info
->pending_bh
|= BH_STATUS
;
2037 static void isr_serial(struct slgt_info
*info
)
2039 unsigned short status
= rd_reg16(info
, SSR
);
2041 DBGISR(("%s isr_serial status=%04X\n", info
->device_name
, status
));
2043 wr_reg16(info
, SSR
, status
); /* clear pending */
2045 info
->irq_occurred
= 1;
2047 if (info
->params
.mode
== MGSL_MODE_ASYNC
) {
2048 if (status
& IRQ_TXIDLE
) {
2050 isr_txeom(info
, status
);
2052 if ((status
& IRQ_RXBREAK
) && (status
& RXBREAK
)) {
2054 /* process break detection if tty control allows */
2056 if (!(status
& info
->ignore_status_mask
)) {
2057 if (info
->read_status_mask
& MASK_BREAK
) {
2058 tty_insert_flip_char(info
->tty
, 0, TTY_BREAK
);
2059 if (info
->flags
& ASYNC_SAK
)
2066 if (status
& (IRQ_TXIDLE
+ IRQ_TXUNDER
))
2067 isr_txeom(info
, status
);
2069 if (status
& IRQ_RXIDLE
) {
2070 if (status
& RXIDLE
)
2071 info
->icount
.rxidle
++;
2073 info
->icount
.exithunt
++;
2074 wake_up_interruptible(&info
->event_wait_q
);
2077 if (status
& IRQ_RXOVER
)
2081 if (status
& IRQ_DSR
)
2083 if (status
& IRQ_CTS
)
2085 if (status
& IRQ_DCD
)
2087 if (status
& IRQ_RI
)
2091 static void isr_rdma(struct slgt_info
*info
)
2093 unsigned int status
= rd_reg32(info
, RDCSR
);
2095 DBGISR(("%s isr_rdma status=%08x\n", info
->device_name
, status
));
2097 /* RDCSR (rx DMA control/status)
2100 * 06 save status byte to DMA buffer
2102 * 04 eol (end of list)
2103 * 03 eob (end of buffer)
2108 wr_reg32(info
, RDCSR
, status
); /* clear pending */
2110 if (status
& (BIT5
+ BIT4
)) {
2111 DBGISR(("%s isr_rdma rx_restart=1\n", info
->device_name
));
2112 info
->rx_restart
= 1;
2114 info
->pending_bh
|= BH_RECEIVE
;
2117 static void isr_tdma(struct slgt_info
*info
)
2119 unsigned int status
= rd_reg32(info
, TDCSR
);
2121 DBGISR(("%s isr_tdma status=%08x\n", info
->device_name
, status
));
2123 /* TDCSR (tx DMA control/status)
2127 * 04 eol (end of list)
2128 * 03 eob (end of buffer)
2133 wr_reg32(info
, TDCSR
, status
); /* clear pending */
2135 if (status
& (BIT5
+ BIT4
+ BIT3
)) {
2136 // another transmit buffer has completed
2137 // run bottom half to get more send data from user
2138 info
->pending_bh
|= BH_TRANSMIT
;
2142 static void isr_txeom(struct slgt_info
*info
, unsigned short status
)
2144 DBGISR(("%s txeom status=%04x\n", info
->device_name
, status
));
2146 slgt_irq_off(info
, IRQ_TXDATA
+ IRQ_TXIDLE
+ IRQ_TXUNDER
);
2149 if (status
& IRQ_TXUNDER
) {
2150 unsigned short val
= rd_reg16(info
, TCR
);
2151 wr_reg16(info
, TCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
2152 wr_reg16(info
, TCR
, val
); /* clear reset bit */
2155 if (info
->tx_active
) {
2156 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
2157 if (status
& IRQ_TXUNDER
)
2158 info
->icount
.txunder
++;
2159 else if (status
& IRQ_TXIDLE
)
2160 info
->icount
.txok
++;
2163 info
->tx_active
= 0;
2166 del_timer(&info
->tx_timer
);
2168 if (info
->params
.mode
!= MGSL_MODE_ASYNC
&& info
->drop_rts_on_tx_done
) {
2169 info
->signals
&= ~SerialSignal_RTS
;
2170 info
->drop_rts_on_tx_done
= 0;
2176 hdlcdev_tx_done(info
);
2180 if (info
->tty
&& (info
->tty
->stopped
|| info
->tty
->hw_stopped
)) {
2184 info
->pending_bh
|= BH_TRANSMIT
;
2189 static void isr_gpio(struct slgt_info
*info
, unsigned int changed
, unsigned int state
)
2191 struct cond_wait
*w
, *prev
;
2193 /* wake processes waiting for specific transitions */
2194 for (w
= info
->gpio_wait_q
, prev
= NULL
; w
!= NULL
; w
= w
->next
) {
2195 if (w
->data
& changed
) {
2197 wake_up_interruptible(&w
->q
);
2199 prev
->next
= w
->next
;
2201 info
->gpio_wait_q
= w
->next
;
2207 /* interrupt service routine
2209 * irq interrupt number
2210 * dev_id device ID supplied during interrupt registration
2211 * regs interrupted processor context
2213 static irqreturn_t
slgt_interrupt(int irq
, void *dev_id
, struct pt_regs
* regs
)
2215 struct slgt_info
*info
;
2219 DBGISR(("slgt_interrupt irq=%d entry\n", irq
));
2225 spin_lock(&info
->lock
);
2227 while((gsr
= rd_reg32(info
, GSR
) & 0xffffff00)) {
2228 DBGISR(("%s gsr=%08x\n", info
->device_name
, gsr
));
2229 info
->irq_occurred
= 1;
2230 for(i
=0; i
< info
->port_count
; i
++) {
2231 if (info
->port_array
[i
] == NULL
)
2233 if (gsr
& (BIT8
<< i
))
2234 isr_serial(info
->port_array
[i
]);
2235 if (gsr
& (BIT16
<< (i
*2)))
2236 isr_rdma(info
->port_array
[i
]);
2237 if (gsr
& (BIT17
<< (i
*2)))
2238 isr_tdma(info
->port_array
[i
]);
2242 if (info
->gpio_present
) {
2244 unsigned int changed
;
2245 while ((changed
= rd_reg32(info
, IOSR
)) != 0) {
2246 DBGISR(("%s iosr=%08x\n", info
->device_name
, changed
));
2247 /* read latched state of GPIO signals */
2248 state
= rd_reg32(info
, IOVR
);
2249 /* clear pending GPIO interrupt bits */
2250 wr_reg32(info
, IOSR
, changed
);
2251 for (i
=0 ; i
< info
->port_count
; i
++) {
2252 if (info
->port_array
[i
] != NULL
)
2253 isr_gpio(info
->port_array
[i
], changed
, state
);
2258 for(i
=0; i
< info
->port_count
; i
++) {
2259 struct slgt_info
*port
= info
->port_array
[i
];
2261 if (port
&& (port
->count
|| port
->netcount
) &&
2262 port
->pending_bh
&& !port
->bh_running
&&
2263 !port
->bh_requested
) {
2264 DBGISR(("%s bh queued\n", port
->device_name
));
2265 schedule_work(&port
->task
);
2266 port
->bh_requested
= 1;
2270 spin_unlock(&info
->lock
);
2272 DBGISR(("slgt_interrupt irq=%d exit\n", irq
));
2276 static int startup(struct slgt_info
*info
)
2278 DBGINFO(("%s startup\n", info
->device_name
));
2280 if (info
->flags
& ASYNC_INITIALIZED
)
2283 if (!info
->tx_buf
) {
2284 info
->tx_buf
= kmalloc(info
->max_frame_size
, GFP_KERNEL
);
2285 if (!info
->tx_buf
) {
2286 DBGERR(("%s can't allocate tx buffer\n", info
->device_name
));
2291 info
->pending_bh
= 0;
2293 memset(&info
->icount
, 0, sizeof(info
->icount
));
2295 /* program hardware for current parameters */
2296 change_params(info
);
2299 clear_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
2301 info
->flags
|= ASYNC_INITIALIZED
;
2307 * called by close() and hangup() to shutdown hardware
2309 static void shutdown(struct slgt_info
*info
)
2311 unsigned long flags
;
2313 if (!(info
->flags
& ASYNC_INITIALIZED
))
2316 DBGINFO(("%s shutdown\n", info
->device_name
));
2318 /* clear status wait queue because status changes */
2319 /* can't happen after shutting down the hardware */
2320 wake_up_interruptible(&info
->status_event_wait_q
);
2321 wake_up_interruptible(&info
->event_wait_q
);
2323 del_timer_sync(&info
->tx_timer
);
2324 del_timer_sync(&info
->rx_timer
);
2326 kfree(info
->tx_buf
);
2327 info
->tx_buf
= NULL
;
2329 spin_lock_irqsave(&info
->lock
,flags
);
2334 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
2336 if (!info
->tty
|| info
->tty
->termios
->c_cflag
& HUPCL
) {
2337 info
->signals
&= ~(SerialSignal_DTR
+ SerialSignal_RTS
);
2341 flush_cond_wait(&info
->gpio_wait_q
);
2343 spin_unlock_irqrestore(&info
->lock
,flags
);
2346 set_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
2348 info
->flags
&= ~ASYNC_INITIALIZED
;
2351 static void program_hw(struct slgt_info
*info
)
2353 unsigned long flags
;
2355 spin_lock_irqsave(&info
->lock
,flags
);
2360 if (info
->params
.mode
== MGSL_MODE_HDLC
||
2361 info
->params
.mode
== MGSL_MODE_RAW
||
2369 info
->dcd_chkcount
= 0;
2370 info
->cts_chkcount
= 0;
2371 info
->ri_chkcount
= 0;
2372 info
->dsr_chkcount
= 0;
2374 slgt_irq_on(info
, IRQ_DCD
| IRQ_CTS
| IRQ_DSR
);
2377 if (info
->netcount
||
2378 (info
->tty
&& info
->tty
->termios
->c_cflag
& CREAD
))
2381 spin_unlock_irqrestore(&info
->lock
,flags
);
2385 * reconfigure adapter based on new parameters
2387 static void change_params(struct slgt_info
*info
)
2392 if (!info
->tty
|| !info
->tty
->termios
)
2394 DBGINFO(("%s change_params\n", info
->device_name
));
2396 cflag
= info
->tty
->termios
->c_cflag
;
2398 /* if B0 rate (hangup) specified then negate DTR and RTS */
2399 /* otherwise assert DTR and RTS */
2401 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
2403 info
->signals
&= ~(SerialSignal_RTS
+ SerialSignal_DTR
);
2405 /* byte size and parity */
2407 switch (cflag
& CSIZE
) {
2408 case CS5
: info
->params
.data_bits
= 5; break;
2409 case CS6
: info
->params
.data_bits
= 6; break;
2410 case CS7
: info
->params
.data_bits
= 7; break;
2411 case CS8
: info
->params
.data_bits
= 8; break;
2412 default: info
->params
.data_bits
= 7; break;
2415 info
->params
.stop_bits
= (cflag
& CSTOPB
) ? 2 : 1;
2418 info
->params
.parity
= (cflag
& PARODD
) ? ASYNC_PARITY_ODD
: ASYNC_PARITY_EVEN
;
2420 info
->params
.parity
= ASYNC_PARITY_NONE
;
2422 /* calculate number of jiffies to transmit a full
2423 * FIFO (32 bytes) at specified data rate
2425 bits_per_char
= info
->params
.data_bits
+
2426 info
->params
.stop_bits
+ 1;
2428 info
->params
.data_rate
= tty_get_baud_rate(info
->tty
);
2430 if (info
->params
.data_rate
) {
2431 info
->timeout
= (32*HZ
*bits_per_char
) /
2432 info
->params
.data_rate
;
2434 info
->timeout
+= HZ
/50; /* Add .02 seconds of slop */
2436 if (cflag
& CRTSCTS
)
2437 info
->flags
|= ASYNC_CTS_FLOW
;
2439 info
->flags
&= ~ASYNC_CTS_FLOW
;
2442 info
->flags
&= ~ASYNC_CHECK_CD
;
2444 info
->flags
|= ASYNC_CHECK_CD
;
2446 /* process tty input control flags */
2448 info
->read_status_mask
= IRQ_RXOVER
;
2449 if (I_INPCK(info
->tty
))
2450 info
->read_status_mask
|= MASK_PARITY
| MASK_FRAMING
;
2451 if (I_BRKINT(info
->tty
) || I_PARMRK(info
->tty
))
2452 info
->read_status_mask
|= MASK_BREAK
;
2453 if (I_IGNPAR(info
->tty
))
2454 info
->ignore_status_mask
|= MASK_PARITY
| MASK_FRAMING
;
2455 if (I_IGNBRK(info
->tty
)) {
2456 info
->ignore_status_mask
|= MASK_BREAK
;
2457 /* If ignoring parity and break indicators, ignore
2458 * overruns too. (For real raw support).
2460 if (I_IGNPAR(info
->tty
))
2461 info
->ignore_status_mask
|= MASK_OVERRUN
;
2467 static int get_stats(struct slgt_info
*info
, struct mgsl_icount __user
*user_icount
)
2469 DBGINFO(("%s get_stats\n", info
->device_name
));
2471 memset(&info
->icount
, 0, sizeof(info
->icount
));
2473 if (copy_to_user(user_icount
, &info
->icount
, sizeof(struct mgsl_icount
)))
2479 static int get_params(struct slgt_info
*info
, MGSL_PARAMS __user
*user_params
)
2481 DBGINFO(("%s get_params\n", info
->device_name
));
2482 if (copy_to_user(user_params
, &info
->params
, sizeof(MGSL_PARAMS
)))
2487 static int set_params(struct slgt_info
*info
, MGSL_PARAMS __user
*new_params
)
2489 unsigned long flags
;
2490 MGSL_PARAMS tmp_params
;
2492 DBGINFO(("%s set_params\n", info
->device_name
));
2493 if (copy_from_user(&tmp_params
, new_params
, sizeof(MGSL_PARAMS
)))
2496 spin_lock_irqsave(&info
->lock
, flags
);
2497 memcpy(&info
->params
, &tmp_params
, sizeof(MGSL_PARAMS
));
2498 spin_unlock_irqrestore(&info
->lock
, flags
);
2500 change_params(info
);
2505 static int get_txidle(struct slgt_info
*info
, int __user
*idle_mode
)
2507 DBGINFO(("%s get_txidle=%d\n", info
->device_name
, info
->idle_mode
));
2508 if (put_user(info
->idle_mode
, idle_mode
))
2513 static int set_txidle(struct slgt_info
*info
, int idle_mode
)
2515 unsigned long flags
;
2516 DBGINFO(("%s set_txidle(%d)\n", info
->device_name
, idle_mode
));
2517 spin_lock_irqsave(&info
->lock
,flags
);
2518 info
->idle_mode
= idle_mode
;
2519 if (info
->params
.mode
!= MGSL_MODE_ASYNC
)
2521 spin_unlock_irqrestore(&info
->lock
,flags
);
2525 static int tx_enable(struct slgt_info
*info
, int enable
)
2527 unsigned long flags
;
2528 DBGINFO(("%s tx_enable(%d)\n", info
->device_name
, enable
));
2529 spin_lock_irqsave(&info
->lock
,flags
);
2531 if (!info
->tx_enabled
)
2534 if (info
->tx_enabled
)
2537 spin_unlock_irqrestore(&info
->lock
,flags
);
2542 * abort transmit HDLC frame
2544 static int tx_abort(struct slgt_info
*info
)
2546 unsigned long flags
;
2547 DBGINFO(("%s tx_abort\n", info
->device_name
));
2548 spin_lock_irqsave(&info
->lock
,flags
);
2550 spin_unlock_irqrestore(&info
->lock
,flags
);
2554 static int rx_enable(struct slgt_info
*info
, int enable
)
2556 unsigned long flags
;
2557 DBGINFO(("%s rx_enable(%d)\n", info
->device_name
, enable
));
2558 spin_lock_irqsave(&info
->lock
,flags
);
2560 if (!info
->rx_enabled
)
2563 if (info
->rx_enabled
)
2566 spin_unlock_irqrestore(&info
->lock
,flags
);
2571 * wait for specified event to occur
2573 static int wait_mgsl_event(struct slgt_info
*info
, int __user
*mask_ptr
)
2575 unsigned long flags
;
2578 struct mgsl_icount cprev
, cnow
;
2581 struct _input_signal_events oldsigs
, newsigs
;
2582 DECLARE_WAITQUEUE(wait
, current
);
2584 if (get_user(mask
, mask_ptr
))
2587 DBGINFO(("%s wait_mgsl_event(%d)\n", info
->device_name
, mask
));
2589 spin_lock_irqsave(&info
->lock
,flags
);
2591 /* return immediately if state matches requested events */
2596 ( ((s
& SerialSignal_DSR
) ? MgslEvent_DsrActive
:MgslEvent_DsrInactive
) +
2597 ((s
& SerialSignal_DCD
) ? MgslEvent_DcdActive
:MgslEvent_DcdInactive
) +
2598 ((s
& SerialSignal_CTS
) ? MgslEvent_CtsActive
:MgslEvent_CtsInactive
) +
2599 ((s
& SerialSignal_RI
) ? MgslEvent_RiActive
:MgslEvent_RiInactive
) );
2601 spin_unlock_irqrestore(&info
->lock
,flags
);
2605 /* save current irq counts */
2606 cprev
= info
->icount
;
2607 oldsigs
= info
->input_signal_events
;
2609 /* enable hunt and idle irqs if needed */
2610 if (mask
& (MgslEvent_ExitHuntMode
+MgslEvent_IdleReceived
)) {
2611 unsigned short val
= rd_reg16(info
, SCR
);
2612 if (!(val
& IRQ_RXIDLE
))
2613 wr_reg16(info
, SCR
, (unsigned short)(val
| IRQ_RXIDLE
));
2616 set_current_state(TASK_INTERRUPTIBLE
);
2617 add_wait_queue(&info
->event_wait_q
, &wait
);
2619 spin_unlock_irqrestore(&info
->lock
,flags
);
2623 if (signal_pending(current
)) {
2628 /* get current irq counts */
2629 spin_lock_irqsave(&info
->lock
,flags
);
2630 cnow
= info
->icount
;
2631 newsigs
= info
->input_signal_events
;
2632 set_current_state(TASK_INTERRUPTIBLE
);
2633 spin_unlock_irqrestore(&info
->lock
,flags
);
2635 /* if no change, wait aborted for some reason */
2636 if (newsigs
.dsr_up
== oldsigs
.dsr_up
&&
2637 newsigs
.dsr_down
== oldsigs
.dsr_down
&&
2638 newsigs
.dcd_up
== oldsigs
.dcd_up
&&
2639 newsigs
.dcd_down
== oldsigs
.dcd_down
&&
2640 newsigs
.cts_up
== oldsigs
.cts_up
&&
2641 newsigs
.cts_down
== oldsigs
.cts_down
&&
2642 newsigs
.ri_up
== oldsigs
.ri_up
&&
2643 newsigs
.ri_down
== oldsigs
.ri_down
&&
2644 cnow
.exithunt
== cprev
.exithunt
&&
2645 cnow
.rxidle
== cprev
.rxidle
) {
2651 ( (newsigs
.dsr_up
!= oldsigs
.dsr_up
? MgslEvent_DsrActive
:0) +
2652 (newsigs
.dsr_down
!= oldsigs
.dsr_down
? MgslEvent_DsrInactive
:0) +
2653 (newsigs
.dcd_up
!= oldsigs
.dcd_up
? MgslEvent_DcdActive
:0) +
2654 (newsigs
.dcd_down
!= oldsigs
.dcd_down
? MgslEvent_DcdInactive
:0) +
2655 (newsigs
.cts_up
!= oldsigs
.cts_up
? MgslEvent_CtsActive
:0) +
2656 (newsigs
.cts_down
!= oldsigs
.cts_down
? MgslEvent_CtsInactive
:0) +
2657 (newsigs
.ri_up
!= oldsigs
.ri_up
? MgslEvent_RiActive
:0) +
2658 (newsigs
.ri_down
!= oldsigs
.ri_down
? MgslEvent_RiInactive
:0) +
2659 (cnow
.exithunt
!= cprev
.exithunt
? MgslEvent_ExitHuntMode
:0) +
2660 (cnow
.rxidle
!= cprev
.rxidle
? MgslEvent_IdleReceived
:0) );
2668 remove_wait_queue(&info
->event_wait_q
, &wait
);
2669 set_current_state(TASK_RUNNING
);
2672 if (mask
& (MgslEvent_ExitHuntMode
+ MgslEvent_IdleReceived
)) {
2673 spin_lock_irqsave(&info
->lock
,flags
);
2674 if (!waitqueue_active(&info
->event_wait_q
)) {
2675 /* disable enable exit hunt mode/idle rcvd IRQs */
2677 (unsigned short)(rd_reg16(info
, SCR
) & ~IRQ_RXIDLE
));
2679 spin_unlock_irqrestore(&info
->lock
,flags
);
2683 rc
= put_user(events
, mask_ptr
);
2687 static int get_interface(struct slgt_info
*info
, int __user
*if_mode
)
2689 DBGINFO(("%s get_interface=%x\n", info
->device_name
, info
->if_mode
));
2690 if (put_user(info
->if_mode
, if_mode
))
2695 static int set_interface(struct slgt_info
*info
, int if_mode
)
2697 unsigned long flags
;
2700 DBGINFO(("%s set_interface=%x)\n", info
->device_name
, if_mode
));
2701 spin_lock_irqsave(&info
->lock
,flags
);
2702 info
->if_mode
= if_mode
;
2706 /* TCR (tx control) 07 1=RTS driver control */
2707 val
= rd_reg16(info
, TCR
);
2708 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
2712 wr_reg16(info
, TCR
, val
);
2714 spin_unlock_irqrestore(&info
->lock
,flags
);
2719 * set general purpose IO pin state and direction
2722 * state each bit indicates a pin state
2723 * smask set bit indicates pin state to set
2724 * dir each bit indicates a pin direction (0=input, 1=output)
2725 * dmask set bit indicates pin direction to set
2727 static int set_gpio(struct slgt_info
*info
, struct gpio_desc __user
*user_gpio
)
2729 unsigned long flags
;
2730 struct gpio_desc gpio
;
2733 if (!info
->gpio_present
)
2735 if (copy_from_user(&gpio
, user_gpio
, sizeof(gpio
)))
2737 DBGINFO(("%s set_gpio state=%08x smask=%08x dir=%08x dmask=%08x\n",
2738 info
->device_name
, gpio
.state
, gpio
.smask
,
2739 gpio
.dir
, gpio
.dmask
));
2741 spin_lock_irqsave(&info
->lock
,flags
);
2743 data
= rd_reg32(info
, IODR
);
2744 data
|= gpio
.dmask
& gpio
.dir
;
2745 data
&= ~(gpio
.dmask
& ~gpio
.dir
);
2746 wr_reg32(info
, IODR
, data
);
2749 data
= rd_reg32(info
, IOVR
);
2750 data
|= gpio
.smask
& gpio
.state
;
2751 data
&= ~(gpio
.smask
& ~gpio
.state
);
2752 wr_reg32(info
, IOVR
, data
);
2754 spin_unlock_irqrestore(&info
->lock
,flags
);
2760 * get general purpose IO pin state and direction
2762 static int get_gpio(struct slgt_info
*info
, struct gpio_desc __user
*user_gpio
)
2764 struct gpio_desc gpio
;
2765 if (!info
->gpio_present
)
2767 gpio
.state
= rd_reg32(info
, IOVR
);
2768 gpio
.smask
= 0xffffffff;
2769 gpio
.dir
= rd_reg32(info
, IODR
);
2770 gpio
.dmask
= 0xffffffff;
2771 if (copy_to_user(user_gpio
, &gpio
, sizeof(gpio
)))
2773 DBGINFO(("%s get_gpio state=%08x dir=%08x\n",
2774 info
->device_name
, gpio
.state
, gpio
.dir
));
2779 * conditional wait facility
2781 static void init_cond_wait(struct cond_wait
*w
, unsigned int data
)
2783 init_waitqueue_head(&w
->q
);
2784 init_waitqueue_entry(&w
->wait
, current
);
2788 static void add_cond_wait(struct cond_wait
**head
, struct cond_wait
*w
)
2790 set_current_state(TASK_INTERRUPTIBLE
);
2791 add_wait_queue(&w
->q
, &w
->wait
);
2796 static void remove_cond_wait(struct cond_wait
**head
, struct cond_wait
*cw
)
2798 struct cond_wait
*w
, *prev
;
2799 remove_wait_queue(&cw
->q
, &cw
->wait
);
2800 set_current_state(TASK_RUNNING
);
2801 for (w
= *head
, prev
= NULL
; w
!= NULL
; prev
= w
, w
= w
->next
) {
2804 prev
->next
= w
->next
;
2812 static void flush_cond_wait(struct cond_wait
**head
)
2814 while (*head
!= NULL
) {
2815 wake_up_interruptible(&(*head
)->q
);
2816 *head
= (*head
)->next
;
2821 * wait for general purpose I/O pin(s) to enter specified state
2824 * state - bit indicates target pin state
2825 * smask - set bit indicates watched pin
2827 * The wait ends when at least one watched pin enters the specified
2828 * state. When 0 (no error) is returned, user_gpio->state is set to the
2829 * state of all GPIO pins when the wait ends.
2831 * Note: Each pin may be a dedicated input, dedicated output, or
2832 * configurable input/output. The number and configuration of pins
2833 * varies with the specific adapter model. Only input pins (dedicated
2834 * or configured) can be monitored with this function.
2836 static int wait_gpio(struct slgt_info
*info
, struct gpio_desc __user
*user_gpio
)
2838 unsigned long flags
;
2840 struct gpio_desc gpio
;
2841 struct cond_wait wait
;
2844 if (!info
->gpio_present
)
2846 if (copy_from_user(&gpio
, user_gpio
, sizeof(gpio
)))
2848 DBGINFO(("%s wait_gpio() state=%08x smask=%08x\n",
2849 info
->device_name
, gpio
.state
, gpio
.smask
));
2850 /* ignore output pins identified by set IODR bit */
2851 if ((gpio
.smask
&= ~rd_reg32(info
, IODR
)) == 0)
2853 init_cond_wait(&wait
, gpio
.smask
);
2855 spin_lock_irqsave(&info
->lock
, flags
);
2856 /* enable interrupts for watched pins */
2857 wr_reg32(info
, IOER
, rd_reg32(info
, IOER
) | gpio
.smask
);
2858 /* get current pin states */
2859 state
= rd_reg32(info
, IOVR
);
2861 if (gpio
.smask
& ~(state
^ gpio
.state
)) {
2862 /* already in target state */
2865 /* wait for target state */
2866 add_cond_wait(&info
->gpio_wait_q
, &wait
);
2867 spin_unlock_irqrestore(&info
->lock
, flags
);
2869 if (signal_pending(current
))
2872 gpio
.state
= wait
.data
;
2873 spin_lock_irqsave(&info
->lock
, flags
);
2874 remove_cond_wait(&info
->gpio_wait_q
, &wait
);
2877 /* disable all GPIO interrupts if no waiting processes */
2878 if (info
->gpio_wait_q
== NULL
)
2879 wr_reg32(info
, IOER
, 0);
2880 spin_unlock_irqrestore(&info
->lock
,flags
);
2882 if ((rc
== 0) && copy_to_user(user_gpio
, &gpio
, sizeof(gpio
)))
2887 static int modem_input_wait(struct slgt_info
*info
,int arg
)
2889 unsigned long flags
;
2891 struct mgsl_icount cprev
, cnow
;
2892 DECLARE_WAITQUEUE(wait
, current
);
2894 /* save current irq counts */
2895 spin_lock_irqsave(&info
->lock
,flags
);
2896 cprev
= info
->icount
;
2897 add_wait_queue(&info
->status_event_wait_q
, &wait
);
2898 set_current_state(TASK_INTERRUPTIBLE
);
2899 spin_unlock_irqrestore(&info
->lock
,flags
);
2903 if (signal_pending(current
)) {
2908 /* get new irq counts */
2909 spin_lock_irqsave(&info
->lock
,flags
);
2910 cnow
= info
->icount
;
2911 set_current_state(TASK_INTERRUPTIBLE
);
2912 spin_unlock_irqrestore(&info
->lock
,flags
);
2914 /* if no change, wait aborted for some reason */
2915 if (cnow
.rng
== cprev
.rng
&& cnow
.dsr
== cprev
.dsr
&&
2916 cnow
.dcd
== cprev
.dcd
&& cnow
.cts
== cprev
.cts
) {
2921 /* check for change in caller specified modem input */
2922 if ((arg
& TIOCM_RNG
&& cnow
.rng
!= cprev
.rng
) ||
2923 (arg
& TIOCM_DSR
&& cnow
.dsr
!= cprev
.dsr
) ||
2924 (arg
& TIOCM_CD
&& cnow
.dcd
!= cprev
.dcd
) ||
2925 (arg
& TIOCM_CTS
&& cnow
.cts
!= cprev
.cts
)) {
2932 remove_wait_queue(&info
->status_event_wait_q
, &wait
);
2933 set_current_state(TASK_RUNNING
);
2938 * return state of serial control and status signals
2940 static int tiocmget(struct tty_struct
*tty
, struct file
*file
)
2942 struct slgt_info
*info
= tty
->driver_data
;
2943 unsigned int result
;
2944 unsigned long flags
;
2946 spin_lock_irqsave(&info
->lock
,flags
);
2948 spin_unlock_irqrestore(&info
->lock
,flags
);
2950 result
= ((info
->signals
& SerialSignal_RTS
) ? TIOCM_RTS
:0) +
2951 ((info
->signals
& SerialSignal_DTR
) ? TIOCM_DTR
:0) +
2952 ((info
->signals
& SerialSignal_DCD
) ? TIOCM_CAR
:0) +
2953 ((info
->signals
& SerialSignal_RI
) ? TIOCM_RNG
:0) +
2954 ((info
->signals
& SerialSignal_DSR
) ? TIOCM_DSR
:0) +
2955 ((info
->signals
& SerialSignal_CTS
) ? TIOCM_CTS
:0);
2957 DBGINFO(("%s tiocmget value=%08X\n", info
->device_name
, result
));
2962 * set modem control signals (DTR/RTS)
2964 * cmd signal command: TIOCMBIS = set bit TIOCMBIC = clear bit
2965 * TIOCMSET = set/clear signal values
2966 * value bit mask for command
2968 static int tiocmset(struct tty_struct
*tty
, struct file
*file
,
2969 unsigned int set
, unsigned int clear
)
2971 struct slgt_info
*info
= tty
->driver_data
;
2972 unsigned long flags
;
2974 DBGINFO(("%s tiocmset(%x,%x)\n", info
->device_name
, set
, clear
));
2976 if (set
& TIOCM_RTS
)
2977 info
->signals
|= SerialSignal_RTS
;
2978 if (set
& TIOCM_DTR
)
2979 info
->signals
|= SerialSignal_DTR
;
2980 if (clear
& TIOCM_RTS
)
2981 info
->signals
&= ~SerialSignal_RTS
;
2982 if (clear
& TIOCM_DTR
)
2983 info
->signals
&= ~SerialSignal_DTR
;
2985 spin_lock_irqsave(&info
->lock
,flags
);
2987 spin_unlock_irqrestore(&info
->lock
,flags
);
2992 * block current process until the device is ready to open
2994 static int block_til_ready(struct tty_struct
*tty
, struct file
*filp
,
2995 struct slgt_info
*info
)
2997 DECLARE_WAITQUEUE(wait
, current
);
2999 int do_clocal
= 0, extra_count
= 0;
3000 unsigned long flags
;
3002 DBGINFO(("%s block_til_ready\n", tty
->driver
->name
));
3004 if (filp
->f_flags
& O_NONBLOCK
|| tty
->flags
& (1 << TTY_IO_ERROR
)){
3005 /* nonblock mode is set or port is not enabled */
3006 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
3010 if (tty
->termios
->c_cflag
& CLOCAL
)
3013 /* Wait for carrier detect and the line to become
3014 * free (i.e., not in use by the callout). While we are in
3015 * this loop, info->count is dropped by one, so that
3016 * close() knows when to free things. We restore it upon
3017 * exit, either normal or abnormal.
3021 add_wait_queue(&info
->open_wait
, &wait
);
3023 spin_lock_irqsave(&info
->lock
, flags
);
3024 if (!tty_hung_up_p(filp
)) {
3028 spin_unlock_irqrestore(&info
->lock
, flags
);
3029 info
->blocked_open
++;
3032 if ((tty
->termios
->c_cflag
& CBAUD
)) {
3033 spin_lock_irqsave(&info
->lock
,flags
);
3034 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
3036 spin_unlock_irqrestore(&info
->lock
,flags
);
3039 set_current_state(TASK_INTERRUPTIBLE
);
3041 if (tty_hung_up_p(filp
) || !(info
->flags
& ASYNC_INITIALIZED
)){
3042 retval
= (info
->flags
& ASYNC_HUP_NOTIFY
) ?
3043 -EAGAIN
: -ERESTARTSYS
;
3047 spin_lock_irqsave(&info
->lock
,flags
);
3049 spin_unlock_irqrestore(&info
->lock
,flags
);
3051 if (!(info
->flags
& ASYNC_CLOSING
) &&
3052 (do_clocal
|| (info
->signals
& SerialSignal_DCD
)) ) {
3056 if (signal_pending(current
)) {
3057 retval
= -ERESTARTSYS
;
3061 DBGINFO(("%s block_til_ready wait\n", tty
->driver
->name
));
3065 set_current_state(TASK_RUNNING
);
3066 remove_wait_queue(&info
->open_wait
, &wait
);
3070 info
->blocked_open
--;
3073 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
3075 DBGINFO(("%s block_til_ready ready, rc=%d\n", tty
->driver
->name
, retval
));
3079 static int alloc_tmp_rbuf(struct slgt_info
*info
)
3081 info
->tmp_rbuf
= kmalloc(info
->max_frame_size
+ 5, GFP_KERNEL
);
3082 if (info
->tmp_rbuf
== NULL
)
3087 static void free_tmp_rbuf(struct slgt_info
*info
)
3089 kfree(info
->tmp_rbuf
);
3090 info
->tmp_rbuf
= NULL
;
3094 * allocate DMA descriptor lists.
3096 static int alloc_desc(struct slgt_info
*info
)
3101 /* allocate memory to hold descriptor lists */
3102 info
->bufs
= pci_alloc_consistent(info
->pdev
, DESC_LIST_SIZE
, &info
->bufs_dma_addr
);
3103 if (info
->bufs
== NULL
)
3106 memset(info
->bufs
, 0, DESC_LIST_SIZE
);
3108 info
->rbufs
= (struct slgt_desc
*)info
->bufs
;
3109 info
->tbufs
= ((struct slgt_desc
*)info
->bufs
) + info
->rbuf_count
;
3111 pbufs
= (unsigned int)info
->bufs_dma_addr
;
3114 * Build circular lists of descriptors
3117 for (i
=0; i
< info
->rbuf_count
; i
++) {
3118 /* physical address of this descriptor */
3119 info
->rbufs
[i
].pdesc
= pbufs
+ (i
* sizeof(struct slgt_desc
));
3121 /* physical address of next descriptor */
3122 if (i
== info
->rbuf_count
- 1)
3123 info
->rbufs
[i
].next
= cpu_to_le32(pbufs
);
3125 info
->rbufs
[i
].next
= cpu_to_le32(pbufs
+ ((i
+1) * sizeof(struct slgt_desc
)));
3126 set_desc_count(info
->rbufs
[i
], DMABUFSIZE
);
3129 for (i
=0; i
< info
->tbuf_count
; i
++) {
3130 /* physical address of this descriptor */
3131 info
->tbufs
[i
].pdesc
= pbufs
+ ((info
->rbuf_count
+ i
) * sizeof(struct slgt_desc
));
3133 /* physical address of next descriptor */
3134 if (i
== info
->tbuf_count
- 1)
3135 info
->tbufs
[i
].next
= cpu_to_le32(pbufs
+ info
->rbuf_count
* sizeof(struct slgt_desc
));
3137 info
->tbufs
[i
].next
= cpu_to_le32(pbufs
+ ((info
->rbuf_count
+ i
+ 1) * sizeof(struct slgt_desc
)));
3143 static void free_desc(struct slgt_info
*info
)
3145 if (info
->bufs
!= NULL
) {
3146 pci_free_consistent(info
->pdev
, DESC_LIST_SIZE
, info
->bufs
, info
->bufs_dma_addr
);
3153 static int alloc_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
)
3156 for (i
=0; i
< count
; i
++) {
3157 if ((bufs
[i
].buf
= pci_alloc_consistent(info
->pdev
, DMABUFSIZE
, &bufs
[i
].buf_dma_addr
)) == NULL
)
3159 bufs
[i
].pbuf
= cpu_to_le32((unsigned int)bufs
[i
].buf_dma_addr
);
3164 static void free_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
)
3167 for (i
=0; i
< count
; i
++) {
3168 if (bufs
[i
].buf
== NULL
)
3170 pci_free_consistent(info
->pdev
, DMABUFSIZE
, bufs
[i
].buf
, bufs
[i
].buf_dma_addr
);
3175 static int alloc_dma_bufs(struct slgt_info
*info
)
3177 info
->rbuf_count
= 32;
3178 info
->tbuf_count
= 32;
3180 if (alloc_desc(info
) < 0 ||
3181 alloc_bufs(info
, info
->rbufs
, info
->rbuf_count
) < 0 ||
3182 alloc_bufs(info
, info
->tbufs
, info
->tbuf_count
) < 0 ||
3183 alloc_tmp_rbuf(info
) < 0) {
3184 DBGERR(("%s DMA buffer alloc fail\n", info
->device_name
));
3191 static void free_dma_bufs(struct slgt_info
*info
)
3194 free_bufs(info
, info
->rbufs
, info
->rbuf_count
);
3195 free_bufs(info
, info
->tbufs
, info
->tbuf_count
);
3198 free_tmp_rbuf(info
);
3201 static int claim_resources(struct slgt_info
*info
)
3203 if (request_mem_region(info
->phys_reg_addr
, SLGT_REG_SIZE
, "synclink_gt") == NULL
) {
3204 DBGERR(("%s reg addr conflict, addr=%08X\n",
3205 info
->device_name
, info
->phys_reg_addr
));
3206 info
->init_error
= DiagStatus_AddressConflict
;
3210 info
->reg_addr_requested
= 1;
3212 info
->reg_addr
= ioremap(info
->phys_reg_addr
, SLGT_REG_SIZE
);
3213 if (!info
->reg_addr
) {
3214 DBGERR(("%s cant map device registers, addr=%08X\n",
3215 info
->device_name
, info
->phys_reg_addr
));
3216 info
->init_error
= DiagStatus_CantAssignPciResources
;
3222 release_resources(info
);
3226 static void release_resources(struct slgt_info
*info
)
3228 if (info
->irq_requested
) {
3229 free_irq(info
->irq_level
, info
);
3230 info
->irq_requested
= 0;
3233 if (info
->reg_addr_requested
) {
3234 release_mem_region(info
->phys_reg_addr
, SLGT_REG_SIZE
);
3235 info
->reg_addr_requested
= 0;
3238 if (info
->reg_addr
) {
3239 iounmap(info
->reg_addr
);
3240 info
->reg_addr
= NULL
;
3244 /* Add the specified device instance data structure to the
3245 * global linked list of devices and increment the device count.
3247 static void add_device(struct slgt_info
*info
)
3251 info
->next_device
= NULL
;
3252 info
->line
= slgt_device_count
;
3253 sprintf(info
->device_name
, "%s%d", tty_dev_prefix
, info
->line
);
3255 if (info
->line
< MAX_DEVICES
) {
3256 if (maxframe
[info
->line
])
3257 info
->max_frame_size
= maxframe
[info
->line
];
3258 info
->dosyncppp
= dosyncppp
[info
->line
];
3261 slgt_device_count
++;
3263 if (!slgt_device_list
)
3264 slgt_device_list
= info
;
3266 struct slgt_info
*current_dev
= slgt_device_list
;
3267 while(current_dev
->next_device
)
3268 current_dev
= current_dev
->next_device
;
3269 current_dev
->next_device
= info
;
3272 if (info
->max_frame_size
< 4096)
3273 info
->max_frame_size
= 4096;
3274 else if (info
->max_frame_size
> 65535)
3275 info
->max_frame_size
= 65535;
3277 switch(info
->pdev
->device
) {
3278 case SYNCLINK_GT_DEVICE_ID
:
3281 case SYNCLINK_GT2_DEVICE_ID
:
3284 case SYNCLINK_GT4_DEVICE_ID
:
3287 case SYNCLINK_AC_DEVICE_ID
:
3289 info
->params
.mode
= MGSL_MODE_ASYNC
;
3292 devstr
= "(unknown model)";
3294 printk("SyncLink %s %s IO=%08x IRQ=%d MaxFrameSize=%u\n",
3295 devstr
, info
->device_name
, info
->phys_reg_addr
,
3296 info
->irq_level
, info
->max_frame_size
);
3304 * allocate device instance structure, return NULL on failure
3306 static struct slgt_info
*alloc_dev(int adapter_num
, int port_num
, struct pci_dev
*pdev
)
3308 struct slgt_info
*info
;
3310 info
= kmalloc(sizeof(struct slgt_info
), GFP_KERNEL
);
3313 DBGERR(("%s device alloc failed adapter=%d port=%d\n",
3314 driver_name
, adapter_num
, port_num
));
3316 memset(info
, 0, sizeof(struct slgt_info
));
3317 info
->magic
= MGSL_MAGIC
;
3318 INIT_WORK(&info
->task
, bh_handler
, info
);
3319 info
->max_frame_size
= 4096;
3320 info
->raw_rx_size
= DMABUFSIZE
;
3321 info
->close_delay
= 5*HZ
/10;
3322 info
->closing_wait
= 30*HZ
;
3323 init_waitqueue_head(&info
->open_wait
);
3324 init_waitqueue_head(&info
->close_wait
);
3325 init_waitqueue_head(&info
->status_event_wait_q
);
3326 init_waitqueue_head(&info
->event_wait_q
);
3327 spin_lock_init(&info
->netlock
);
3328 memcpy(&info
->params
,&default_params
,sizeof(MGSL_PARAMS
));
3329 info
->idle_mode
= HDLC_TXIDLE_FLAGS
;
3330 info
->adapter_num
= adapter_num
;
3331 info
->port_num
= port_num
;
3333 init_timer(&info
->tx_timer
);
3334 info
->tx_timer
.data
= (unsigned long)info
;
3335 info
->tx_timer
.function
= tx_timeout
;
3337 init_timer(&info
->rx_timer
);
3338 info
->rx_timer
.data
= (unsigned long)info
;
3339 info
->rx_timer
.function
= rx_timeout
;
3341 /* Copy configuration info to device instance data */
3343 info
->irq_level
= pdev
->irq
;
3344 info
->phys_reg_addr
= pci_resource_start(pdev
,0);
3346 info
->bus_type
= MGSL_BUS_TYPE_PCI
;
3347 info
->irq_flags
= SA_SHIRQ
;
3349 info
->init_error
= -1; /* assume error, set to 0 on successful init */
3355 static void device_init(int adapter_num
, struct pci_dev
*pdev
)
3357 struct slgt_info
*port_array
[SLGT_MAX_PORTS
];
3361 if (pdev
->device
== SYNCLINK_GT2_DEVICE_ID
)
3363 else if (pdev
->device
== SYNCLINK_GT4_DEVICE_ID
)
3366 /* allocate device instances for all ports */
3367 for (i
=0; i
< port_count
; ++i
) {
3368 port_array
[i
] = alloc_dev(adapter_num
, i
, pdev
);
3369 if (port_array
[i
] == NULL
) {
3370 for (--i
; i
>= 0; --i
)
3371 kfree(port_array
[i
]);
3376 /* give copy of port_array to all ports and add to device list */
3377 for (i
=0; i
< port_count
; ++i
) {
3378 memcpy(port_array
[i
]->port_array
, port_array
, sizeof(port_array
));
3379 add_device(port_array
[i
]);
3380 port_array
[i
]->port_count
= port_count
;
3381 spin_lock_init(&port_array
[i
]->lock
);
3384 /* Allocate and claim adapter resources */
3385 if (!claim_resources(port_array
[0])) {
3387 alloc_dma_bufs(port_array
[0]);
3389 /* copy resource information from first port to others */
3390 for (i
= 1; i
< port_count
; ++i
) {
3391 port_array
[i
]->lock
= port_array
[0]->lock
;
3392 port_array
[i
]->irq_level
= port_array
[0]->irq_level
;
3393 port_array
[i
]->reg_addr
= port_array
[0]->reg_addr
;
3394 alloc_dma_bufs(port_array
[i
]);
3397 if (request_irq(port_array
[0]->irq_level
,
3399 port_array
[0]->irq_flags
,
3400 port_array
[0]->device_name
,
3401 port_array
[0]) < 0) {
3402 DBGERR(("%s request_irq failed IRQ=%d\n",
3403 port_array
[0]->device_name
,
3404 port_array
[0]->irq_level
));
3406 port_array
[0]->irq_requested
= 1;
3407 adapter_test(port_array
[0]);
3408 for (i
=1 ; i
< port_count
; i
++) {
3409 port_array
[i
]->init_error
= port_array
[0]->init_error
;
3410 port_array
[i
]->gpio_present
= port_array
[0]->gpio_present
;
3416 static int __devinit
init_one(struct pci_dev
*dev
,
3417 const struct pci_device_id
*ent
)
3419 if (pci_enable_device(dev
)) {
3420 printk("error enabling pci device %p\n", dev
);
3423 pci_set_master(dev
);
3424 device_init(slgt_device_count
, dev
);
3428 static void __devexit
remove_one(struct pci_dev
*dev
)
3432 static struct tty_operations ops
= {
3436 .put_char
= put_char
,
3437 .flush_chars
= flush_chars
,
3438 .write_room
= write_room
,
3439 .chars_in_buffer
= chars_in_buffer
,
3440 .flush_buffer
= flush_buffer
,
3442 .throttle
= throttle
,
3443 .unthrottle
= unthrottle
,
3444 .send_xchar
= send_xchar
,
3445 .break_ctl
= set_break
,
3446 .wait_until_sent
= wait_until_sent
,
3447 .read_proc
= read_proc
,
3448 .set_termios
= set_termios
,
3450 .start
= tx_release
,
3452 .tiocmget
= tiocmget
,
3453 .tiocmset
= tiocmset
,
3456 static void slgt_cleanup(void)
3459 struct slgt_info
*info
;
3460 struct slgt_info
*tmp
;
3462 printk("unload %s %s\n", driver_name
, driver_version
);
3464 if (serial_driver
) {
3465 if ((rc
= tty_unregister_driver(serial_driver
)))
3466 DBGERR(("tty_unregister_driver error=%d\n", rc
));
3467 put_tty_driver(serial_driver
);
3471 info
= slgt_device_list
;
3474 info
= info
->next_device
;
3477 /* release devices */
3478 info
= slgt_device_list
;
3483 free_dma_bufs(info
);
3484 free_tmp_rbuf(info
);
3485 if (info
->port_num
== 0)
3486 release_resources(info
);
3488 info
= info
->next_device
;
3493 pci_unregister_driver(&pci_driver
);
3497 * Driver initialization entry point.
3499 static int __init
slgt_init(void)
3503 printk("%s %s\n", driver_name
, driver_version
);
3505 slgt_device_count
= 0;
3506 if ((rc
= pci_register_driver(&pci_driver
)) < 0) {
3507 printk("%s pci_register_driver error=%d\n", driver_name
, rc
);
3512 if (!slgt_device_list
) {
3513 printk("%s no devices found\n",driver_name
);
3517 serial_driver
= alloc_tty_driver(MAX_DEVICES
);
3518 if (!serial_driver
) {
3523 /* Initialize the tty_driver structure */
3525 serial_driver
->owner
= THIS_MODULE
;
3526 serial_driver
->driver_name
= tty_driver_name
;
3527 serial_driver
->name
= tty_dev_prefix
;
3528 serial_driver
->major
= ttymajor
;
3529 serial_driver
->minor_start
= 64;
3530 serial_driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
3531 serial_driver
->subtype
= SERIAL_TYPE_NORMAL
;
3532 serial_driver
->init_termios
= tty_std_termios
;
3533 serial_driver
->init_termios
.c_cflag
=
3534 B9600
| CS8
| CREAD
| HUPCL
| CLOCAL
;
3535 serial_driver
->flags
= TTY_DRIVER_REAL_RAW
;
3536 tty_set_operations(serial_driver
, &ops
);
3537 if ((rc
= tty_register_driver(serial_driver
)) < 0) {
3538 DBGERR(("%s can't register serial driver\n", driver_name
));
3539 put_tty_driver(serial_driver
);
3540 serial_driver
= NULL
;
3544 printk("%s %s, tty major#%d\n",
3545 driver_name
, driver_version
,
3546 serial_driver
->major
);
3555 static void __exit
slgt_exit(void)
3560 module_init(slgt_init
);
3561 module_exit(slgt_exit
);
3564 * register access routines
3567 #define CALC_REGADDR() \
3568 unsigned long reg_addr = ((unsigned long)info->reg_addr) + addr; \
3570 reg_addr += (info->port_num) * 32;
3572 static __u8
rd_reg8(struct slgt_info
*info
, unsigned int addr
)
3575 return readb((void __iomem
*)reg_addr
);
3578 static void wr_reg8(struct slgt_info
*info
, unsigned int addr
, __u8 value
)
3581 writeb(value
, (void __iomem
*)reg_addr
);
3584 static __u16
rd_reg16(struct slgt_info
*info
, unsigned int addr
)
3587 return readw((void __iomem
*)reg_addr
);
3590 static void wr_reg16(struct slgt_info
*info
, unsigned int addr
, __u16 value
)
3593 writew(value
, (void __iomem
*)reg_addr
);
3596 static __u32
rd_reg32(struct slgt_info
*info
, unsigned int addr
)
3599 return readl((void __iomem
*)reg_addr
);
3602 static void wr_reg32(struct slgt_info
*info
, unsigned int addr
, __u32 value
)
3605 writel(value
, (void __iomem
*)reg_addr
);
3608 static void rdma_reset(struct slgt_info
*info
)
3613 wr_reg32(info
, RDCSR
, BIT1
);
3615 /* wait for enable bit cleared */
3616 for(i
=0 ; i
< 1000 ; i
++)
3617 if (!(rd_reg32(info
, RDCSR
) & BIT0
))
3621 static void tdma_reset(struct slgt_info
*info
)
3626 wr_reg32(info
, TDCSR
, BIT1
);
3628 /* wait for enable bit cleared */
3629 for(i
=0 ; i
< 1000 ; i
++)
3630 if (!(rd_reg32(info
, TDCSR
) & BIT0
))
3635 * enable internal loopback
3636 * TxCLK and RxCLK are generated from BRG
3637 * and TxD is looped back to RxD internally.
3639 static void enable_loopback(struct slgt_info
*info
)
3641 /* SCR (serial control) BIT2=looopback enable */
3642 wr_reg16(info
, SCR
, (unsigned short)(rd_reg16(info
, SCR
) | BIT2
));
3644 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3645 /* CCR (clock control)
3646 * 07..05 tx clock source (010 = BRG)
3647 * 04..02 rx clock source (010 = BRG)
3648 * 01 auxclk enable (0 = disable)
3649 * 00 BRG enable (1 = enable)
3653 wr_reg8(info
, CCR
, 0x49);
3655 /* set speed if available, otherwise use default */
3656 if (info
->params
.clock_speed
)
3657 set_rate(info
, info
->params
.clock_speed
);
3659 set_rate(info
, 3686400);
3664 * set baud rate generator to specified rate
3666 static void set_rate(struct slgt_info
*info
, u32 rate
)
3669 static unsigned int osc
= 14745600;
3671 /* div = osc/rate - 1
3673 * Round div up if osc/rate is not integer to
3674 * force to next slowest rate.
3679 if (!(osc
% rate
) && div
)
3681 wr_reg16(info
, BDR
, (unsigned short)div
);
3685 static void rx_stop(struct slgt_info
*info
)
3689 /* disable and reset receiver */
3690 val
= rd_reg16(info
, RCR
) & ~BIT1
; /* clear enable bit */
3691 wr_reg16(info
, RCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3692 wr_reg16(info
, RCR
, val
); /* clear reset bit */
3694 slgt_irq_off(info
, IRQ_RXOVER
+ IRQ_RXDATA
+ IRQ_RXIDLE
);
3696 /* clear pending rx interrupts */
3697 wr_reg16(info
, SSR
, IRQ_RXIDLE
+ IRQ_RXOVER
);
3701 info
->rx_enabled
= 0;
3702 info
->rx_restart
= 0;
3705 static void rx_start(struct slgt_info
*info
)
3709 slgt_irq_off(info
, IRQ_RXOVER
+ IRQ_RXDATA
);
3711 /* clear pending rx overrun IRQ */
3712 wr_reg16(info
, SSR
, IRQ_RXOVER
);
3714 /* reset and disable receiver */
3715 val
= rd_reg16(info
, RCR
) & ~BIT1
; /* clear enable bit */
3716 wr_reg16(info
, RCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3717 wr_reg16(info
, RCR
, val
); /* clear reset bit */
3722 /* set 1st descriptor address */
3723 wr_reg32(info
, RDDAR
, info
->rbufs
[0].pdesc
);
3725 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3726 /* enable rx DMA and DMA interrupt */
3727 wr_reg32(info
, RDCSR
, (BIT2
+ BIT0
));
3729 /* enable saving of rx status, rx DMA and DMA interrupt */
3730 wr_reg32(info
, RDCSR
, (BIT6
+ BIT2
+ BIT0
));
3733 slgt_irq_on(info
, IRQ_RXOVER
);
3735 /* enable receiver */
3736 wr_reg16(info
, RCR
, (unsigned short)(rd_reg16(info
, RCR
) | BIT1
));
3738 info
->rx_restart
= 0;
3739 info
->rx_enabled
= 1;
3742 static void tx_start(struct slgt_info
*info
)
3744 if (!info
->tx_enabled
) {
3746 (unsigned short)(rd_reg16(info
, TCR
) | BIT1
));
3747 info
->tx_enabled
= TRUE
;
3750 if (info
->tx_count
) {
3751 info
->drop_rts_on_tx_done
= 0;
3753 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3754 if (info
->params
.flags
& HDLC_FLAG_AUTO_RTS
) {
3756 if (!(info
->signals
& SerialSignal_RTS
)) {
3757 info
->signals
|= SerialSignal_RTS
;
3759 info
->drop_rts_on_tx_done
= 1;
3763 slgt_irq_off(info
, IRQ_TXDATA
);
3764 slgt_irq_on(info
, IRQ_TXUNDER
+ IRQ_TXIDLE
);
3765 /* clear tx idle and underrun status bits */
3766 wr_reg16(info
, SSR
, (unsigned short)(IRQ_TXIDLE
+ IRQ_TXUNDER
));
3768 if (!(rd_reg32(info
, TDCSR
) & BIT0
)) {
3769 /* tx DMA stopped, restart tx DMA */
3771 /* set 1st descriptor address */
3772 wr_reg32(info
, TDDAR
, info
->tbufs
[info
->tbuf_start
].pdesc
);
3773 if (info
->params
.mode
== MGSL_MODE_RAW
)
3774 wr_reg32(info
, TDCSR
, BIT2
+ BIT0
); /* IRQ + DMA enable */
3776 wr_reg32(info
, TDCSR
, BIT0
); /* DMA enable */
3779 if (info
->params
.mode
!= MGSL_MODE_RAW
) {
3780 info
->tx_timer
.expires
= jiffies
+ msecs_to_jiffies(5000);
3781 add_timer(&info
->tx_timer
);
3785 /* set 1st descriptor address */
3786 wr_reg32(info
, TDDAR
, info
->tbufs
[info
->tbuf_start
].pdesc
);
3788 slgt_irq_off(info
, IRQ_TXDATA
);
3789 slgt_irq_on(info
, IRQ_TXIDLE
);
3790 /* clear tx idle status bit */
3791 wr_reg16(info
, SSR
, IRQ_TXIDLE
);
3794 wr_reg32(info
, TDCSR
, BIT0
);
3797 info
->tx_active
= 1;
3801 static void tx_stop(struct slgt_info
*info
)
3805 del_timer(&info
->tx_timer
);
3809 /* reset and disable transmitter */
3810 val
= rd_reg16(info
, TCR
) & ~BIT1
; /* clear enable bit */
3811 wr_reg16(info
, TCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3812 wr_reg16(info
, TCR
, val
); /* clear reset */
3814 slgt_irq_off(info
, IRQ_TXDATA
+ IRQ_TXIDLE
+ IRQ_TXUNDER
);
3816 /* clear tx idle and underrun status bit */
3817 wr_reg16(info
, SSR
, (unsigned short)(IRQ_TXIDLE
+ IRQ_TXUNDER
));
3821 info
->tx_enabled
= 0;
3822 info
->tx_active
= 0;
3825 static void reset_port(struct slgt_info
*info
)
3827 if (!info
->reg_addr
)
3833 info
->signals
&= ~(SerialSignal_DTR
+ SerialSignal_RTS
);
3836 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3839 static void reset_adapter(struct slgt_info
*info
)
3842 for (i
=0; i
< info
->port_count
; ++i
) {
3843 if (info
->port_array
[i
])
3844 reset_port(info
->port_array
[i
]);
3848 static void async_mode(struct slgt_info
*info
)
3852 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3858 * 15..13 mode, 010=async
3859 * 12..10 encoding, 000=NRZ
3861 * 08 1=odd parity, 0=even parity
3862 * 07 1=RTS driver control
3864 * 05..04 character length
3869 * 03 0=1 stop bit, 1=2 stop bits
3872 * 00 auto-CTS enable
3876 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
3879 if (info
->params
.parity
!= ASYNC_PARITY_NONE
) {
3881 if (info
->params
.parity
== ASYNC_PARITY_ODD
)
3885 switch (info
->params
.data_bits
)
3887 case 6: val
|= BIT4
; break;
3888 case 7: val
|= BIT5
; break;
3889 case 8: val
|= BIT5
+ BIT4
; break;
3892 if (info
->params
.stop_bits
!= 1)
3895 if (info
->params
.flags
& HDLC_FLAG_AUTO_CTS
)
3898 wr_reg16(info
, TCR
, val
);
3902 * 15..13 mode, 010=async
3903 * 12..10 encoding, 000=NRZ
3905 * 08 1=odd parity, 0=even parity
3906 * 07..06 reserved, must be 0
3907 * 05..04 character length
3912 * 03 reserved, must be zero
3915 * 00 auto-DCD enable
3919 if (info
->params
.parity
!= ASYNC_PARITY_NONE
) {
3921 if (info
->params
.parity
== ASYNC_PARITY_ODD
)
3925 switch (info
->params
.data_bits
)
3927 case 6: val
|= BIT4
; break;
3928 case 7: val
|= BIT5
; break;
3929 case 8: val
|= BIT5
+ BIT4
; break;
3932 if (info
->params
.flags
& HDLC_FLAG_AUTO_DCD
)
3935 wr_reg16(info
, RCR
, val
);
3937 /* CCR (clock control)
3939 * 07..05 011 = tx clock source is BRG/16
3940 * 04..02 010 = rx clock source is BRG
3941 * 01 0 = auxclk disabled
3942 * 00 1 = BRG enabled
3946 wr_reg8(info
, CCR
, 0x69);
3950 /* SCR (serial control)
3952 * 15 1=tx req on FIFO half empty
3953 * 14 1=rx req on FIFO half full
3954 * 13 tx data IRQ enable
3955 * 12 tx idle IRQ enable
3956 * 11 rx break on IRQ enable
3957 * 10 rx data IRQ enable
3958 * 09 rx break off IRQ enable
3959 * 08 overrun IRQ enable
3964 * 03 reserved, must be zero
3965 * 02 1=txd->rxd internal loopback enable
3966 * 01 reserved, must be zero
3967 * 00 1=master IRQ enable
3969 val
= BIT15
+ BIT14
+ BIT0
;
3970 wr_reg16(info
, SCR
, val
);
3972 slgt_irq_on(info
, IRQ_RXBREAK
| IRQ_RXOVER
);
3974 set_rate(info
, info
->params
.data_rate
* 16);
3976 if (info
->params
.loopback
)
3977 enable_loopback(info
);
3980 static void hdlc_mode(struct slgt_info
*info
)
3984 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3990 * 15..13 mode, 000=HDLC 001=raw sync
3994 * 07 1=RTS driver control
3995 * 06 preamble enable
3996 * 05..04 preamble length
3997 * 03 share open/close flag
4000 * 00 auto-CTS enable
4004 if (info
->params
.mode
== MGSL_MODE_RAW
)
4006 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
4009 switch(info
->params
.encoding
)
4011 case HDLC_ENCODING_NRZB
: val
|= BIT10
; break;
4012 case HDLC_ENCODING_NRZI_MARK
: val
|= BIT11
; break;
4013 case HDLC_ENCODING_NRZI
: val
|= BIT11
+ BIT10
; break;
4014 case HDLC_ENCODING_BIPHASE_MARK
: val
|= BIT12
; break;
4015 case HDLC_ENCODING_BIPHASE_SPACE
: val
|= BIT12
+ BIT10
; break;
4016 case HDLC_ENCODING_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
; break;
4017 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
+ BIT10
; break;
4020 switch (info
->params
.crc_type
& HDLC_CRC_MASK
)
4022 case HDLC_CRC_16_CCITT
: val
|= BIT9
; break;
4023 case HDLC_CRC_32_CCITT
: val
|= BIT9
+ BIT8
; break;
4026 if (info
->params
.preamble
!= HDLC_PREAMBLE_PATTERN_NONE
)
4029 switch (info
->params
.preamble_length
)
4031 case HDLC_PREAMBLE_LENGTH_16BITS
: val
|= BIT5
; break;
4032 case HDLC_PREAMBLE_LENGTH_32BITS
: val
|= BIT4
; break;
4033 case HDLC_PREAMBLE_LENGTH_64BITS
: val
|= BIT5
+ BIT4
; break;
4036 if (info
->params
.flags
& HDLC_FLAG_AUTO_CTS
)
4039 wr_reg16(info
, TCR
, val
);
4041 /* TPR (transmit preamble) */
4043 switch (info
->params
.preamble
)
4045 case HDLC_PREAMBLE_PATTERN_FLAGS
: val
= 0x7e; break;
4046 case HDLC_PREAMBLE_PATTERN_ONES
: val
= 0xff; break;
4047 case HDLC_PREAMBLE_PATTERN_ZEROS
: val
= 0x00; break;
4048 case HDLC_PREAMBLE_PATTERN_10
: val
= 0x55; break;
4049 case HDLC_PREAMBLE_PATTERN_01
: val
= 0xaa; break;
4050 default: val
= 0x7e; break;
4052 wr_reg8(info
, TPR
, (unsigned char)val
);
4056 * 15..13 mode, 000=HDLC 001=raw sync
4060 * 07..03 reserved, must be 0
4063 * 00 auto-DCD enable
4067 if (info
->params
.mode
== MGSL_MODE_RAW
)
4070 switch(info
->params
.encoding
)
4072 case HDLC_ENCODING_NRZB
: val
|= BIT10
; break;
4073 case HDLC_ENCODING_NRZI_MARK
: val
|= BIT11
; break;
4074 case HDLC_ENCODING_NRZI
: val
|= BIT11
+ BIT10
; break;
4075 case HDLC_ENCODING_BIPHASE_MARK
: val
|= BIT12
; break;
4076 case HDLC_ENCODING_BIPHASE_SPACE
: val
|= BIT12
+ BIT10
; break;
4077 case HDLC_ENCODING_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
; break;
4078 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
+ BIT10
; break;
4081 switch (info
->params
.crc_type
& HDLC_CRC_MASK
)
4083 case HDLC_CRC_16_CCITT
: val
|= BIT9
; break;
4084 case HDLC_CRC_32_CCITT
: val
|= BIT9
+ BIT8
; break;
4087 if (info
->params
.flags
& HDLC_FLAG_AUTO_DCD
)
4090 wr_reg16(info
, RCR
, val
);
4092 /* CCR (clock control)
4094 * 07..05 tx clock source
4095 * 04..02 rx clock source
4101 if (info
->params
.flags
& HDLC_FLAG_TXC_BRG
)
4103 // when RxC source is DPLL, BRG generates 16X DPLL
4104 // reference clock, so take TxC from BRG/16 to get
4105 // transmit clock at actual data rate
4106 if (info
->params
.flags
& HDLC_FLAG_RXC_DPLL
)
4107 val
|= BIT6
+ BIT5
; /* 011, txclk = BRG/16 */
4109 val
|= BIT6
; /* 010, txclk = BRG */
4111 else if (info
->params
.flags
& HDLC_FLAG_TXC_DPLL
)
4112 val
|= BIT7
; /* 100, txclk = DPLL Input */
4113 else if (info
->params
.flags
& HDLC_FLAG_TXC_RXCPIN
)
4114 val
|= BIT5
; /* 001, txclk = RXC Input */
4116 if (info
->params
.flags
& HDLC_FLAG_RXC_BRG
)
4117 val
|= BIT3
; /* 010, rxclk = BRG */
4118 else if (info
->params
.flags
& HDLC_FLAG_RXC_DPLL
)
4119 val
|= BIT4
; /* 100, rxclk = DPLL */
4120 else if (info
->params
.flags
& HDLC_FLAG_RXC_TXCPIN
)
4121 val
|= BIT2
; /* 001, rxclk = TXC Input */
4123 if (info
->params
.clock_speed
)
4126 wr_reg8(info
, CCR
, (unsigned char)val
);
4128 if (info
->params
.flags
& (HDLC_FLAG_TXC_DPLL
+ HDLC_FLAG_RXC_DPLL
))
4130 // program DPLL mode
4131 switch(info
->params
.encoding
)
4133 case HDLC_ENCODING_BIPHASE_MARK
:
4134 case HDLC_ENCODING_BIPHASE_SPACE
:
4136 case HDLC_ENCODING_BIPHASE_LEVEL
:
4137 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
:
4138 val
= BIT7
+ BIT6
; break;
4139 default: val
= BIT6
; // NRZ encodings
4141 wr_reg16(info
, RCR
, (unsigned short)(rd_reg16(info
, RCR
) | val
));
4143 // DPLL requires a 16X reference clock from BRG
4144 set_rate(info
, info
->params
.clock_speed
* 16);
4147 set_rate(info
, info
->params
.clock_speed
);
4153 /* SCR (serial control)
4155 * 15 1=tx req on FIFO half empty
4156 * 14 1=rx req on FIFO half full
4157 * 13 tx data IRQ enable
4158 * 12 tx idle IRQ enable
4159 * 11 underrun IRQ enable
4160 * 10 rx data IRQ enable
4161 * 09 rx idle IRQ enable
4162 * 08 overrun IRQ enable
4167 * 03 reserved, must be zero
4168 * 02 1=txd->rxd internal loopback enable
4169 * 01 reserved, must be zero
4170 * 00 1=master IRQ enable
4172 wr_reg16(info
, SCR
, BIT15
+ BIT14
+ BIT0
);
4174 if (info
->params
.loopback
)
4175 enable_loopback(info
);
4179 * set transmit idle mode
4181 static void tx_set_idle(struct slgt_info
*info
)
4186 /* if preamble enabled (tcr[6] == 1) then tx idle size = 8 bits
4187 * else tcr[5:4] = tx idle size: 00 = 8 bits, 01 = 16 bits
4189 tcr
= rd_reg16(info
, TCR
);
4190 if (info
->idle_mode
& HDLC_TXIDLE_CUSTOM_16
) {
4191 /* disable preamble, set idle size to 16 bits */
4192 tcr
= (tcr
& ~(BIT6
+ BIT5
)) | BIT4
;
4193 /* MSB of 16 bit idle specified in tx preamble register (TPR) */
4194 wr_reg8(info
, TPR
, (unsigned char)((info
->idle_mode
>> 8) & 0xff));
4195 } else if (!(tcr
& BIT6
)) {
4196 /* preamble is disabled, set idle size to 8 bits */
4197 tcr
&= ~(BIT5
+ BIT4
);
4199 wr_reg16(info
, TCR
, tcr
);
4201 if (info
->idle_mode
& (HDLC_TXIDLE_CUSTOM_8
| HDLC_TXIDLE_CUSTOM_16
)) {
4202 /* LSB of custom tx idle specified in tx idle register */
4203 val
= (unsigned char)(info
->idle_mode
& 0xff);
4205 /* standard 8 bit idle patterns */
4206 switch(info
->idle_mode
)
4208 case HDLC_TXIDLE_FLAGS
: val
= 0x7e; break;
4209 case HDLC_TXIDLE_ALT_ZEROS_ONES
:
4210 case HDLC_TXIDLE_ALT_MARK_SPACE
: val
= 0xaa; break;
4211 case HDLC_TXIDLE_ZEROS
:
4212 case HDLC_TXIDLE_SPACE
: val
= 0x00; break;
4213 default: val
= 0xff;
4217 wr_reg8(info
, TIR
, val
);
4221 * get state of V24 status (input) signals
4223 static void get_signals(struct slgt_info
*info
)
4225 unsigned short status
= rd_reg16(info
, SSR
);
4227 /* clear all serial signals except DTR and RTS */
4228 info
->signals
&= SerialSignal_DTR
+ SerialSignal_RTS
;
4231 info
->signals
|= SerialSignal_DSR
;
4233 info
->signals
|= SerialSignal_CTS
;
4235 info
->signals
|= SerialSignal_DCD
;
4237 info
->signals
|= SerialSignal_RI
;
4241 * set V.24 Control Register based on current configuration
4243 static void msc_set_vcr(struct slgt_info
*info
)
4245 unsigned char val
= 0;
4247 /* VCR (V.24 control)
4249 * 07..04 serial IF select
4256 switch(info
->if_mode
& MGSL_INTERFACE_MASK
)
4258 case MGSL_INTERFACE_RS232
:
4259 val
|= BIT5
; /* 0010 */
4261 case MGSL_INTERFACE_V35
:
4262 val
|= BIT7
+ BIT6
+ BIT5
; /* 1110 */
4264 case MGSL_INTERFACE_RS422
:
4265 val
|= BIT6
; /* 0100 */
4269 if (info
->signals
& SerialSignal_DTR
)
4271 if (info
->signals
& SerialSignal_RTS
)
4273 if (info
->if_mode
& MGSL_INTERFACE_LL
)
4275 if (info
->if_mode
& MGSL_INTERFACE_RL
)
4277 wr_reg8(info
, VCR
, val
);
4281 * set state of V24 control (output) signals
4283 static void set_signals(struct slgt_info
*info
)
4285 unsigned char val
= rd_reg8(info
, VCR
);
4286 if (info
->signals
& SerialSignal_DTR
)
4290 if (info
->signals
& SerialSignal_RTS
)
4294 wr_reg8(info
, VCR
, val
);
4298 * free range of receive DMA buffers (i to last)
4300 static void free_rbufs(struct slgt_info
*info
, unsigned int i
, unsigned int last
)
4305 /* reset current buffer for reuse */
4306 info
->rbufs
[i
].status
= 0;
4307 if (info
->params
.mode
== MGSL_MODE_RAW
)
4308 set_desc_count(info
->rbufs
[i
], info
->raw_rx_size
);
4310 set_desc_count(info
->rbufs
[i
], DMABUFSIZE
);
4314 if (++i
== info
->rbuf_count
)
4317 info
->rbuf_current
= i
;
4321 * mark all receive DMA buffers as free
4323 static void reset_rbufs(struct slgt_info
*info
)
4325 free_rbufs(info
, 0, info
->rbuf_count
- 1);
4329 * pass receive HDLC frame to upper layer
4331 * return 1 if frame available, otherwise 0
4333 static int rx_get_frame(struct slgt_info
*info
)
4335 unsigned int start
, end
;
4336 unsigned short status
;
4337 unsigned int framesize
= 0;
4339 unsigned long flags
;
4340 struct tty_struct
*tty
= info
->tty
;
4341 unsigned char addr_field
= 0xff;
4342 unsigned int crc_size
= 0;
4344 switch (info
->params
.crc_type
& HDLC_CRC_MASK
) {
4345 case HDLC_CRC_16_CCITT
: crc_size
= 2; break;
4346 case HDLC_CRC_32_CCITT
: crc_size
= 4; break;
4353 start
= end
= info
->rbuf_current
;
4356 if (!desc_complete(info
->rbufs
[end
]))
4359 if (framesize
== 0 && info
->params
.addr_filter
!= 0xff)
4360 addr_field
= info
->rbufs
[end
].buf
[0];
4362 framesize
+= desc_count(info
->rbufs
[end
]);
4364 if (desc_eof(info
->rbufs
[end
]))
4367 if (++end
== info
->rbuf_count
)
4370 if (end
== info
->rbuf_current
) {
4371 if (info
->rx_enabled
){
4372 spin_lock_irqsave(&info
->lock
,flags
);
4374 spin_unlock_irqrestore(&info
->lock
,flags
);
4382 * 15 buffer complete
4385 * 02 eof (end of frame)
4389 status
= desc_status(info
->rbufs
[end
]);
4391 /* ignore CRC bit if not using CRC (bit is undefined) */
4392 if ((info
->params
.crc_type
& HDLC_CRC_MASK
) == HDLC_CRC_NONE
)
4395 if (framesize
== 0 ||
4396 (addr_field
!= 0xff && addr_field
!= info
->params
.addr_filter
)) {
4397 free_rbufs(info
, start
, end
);
4401 if (framesize
< (2 + crc_size
) || status
& BIT0
) {
4402 info
->icount
.rxshort
++;
4404 } else if (status
& BIT1
) {
4405 info
->icount
.rxcrc
++;
4406 if (!(info
->params
.crc_type
& HDLC_CRC_RETURN_EX
))
4411 if (framesize
== 0) {
4412 struct net_device_stats
*stats
= hdlc_stats(info
->netdev
);
4414 stats
->rx_frame_errors
++;
4418 DBGBH(("%s rx frame status=%04X size=%d\n",
4419 info
->device_name
, status
, framesize
));
4420 DBGDATA(info
, info
->rbufs
[start
].buf
, min_t(int, framesize
, DMABUFSIZE
), "rx");
4423 if (!(info
->params
.crc_type
& HDLC_CRC_RETURN_EX
)) {
4424 framesize
-= crc_size
;
4428 if (framesize
> info
->max_frame_size
+ crc_size
)
4429 info
->icount
.rxlong
++;
4431 /* copy dma buffer(s) to contiguous temp buffer */
4432 int copy_count
= framesize
;
4434 unsigned char *p
= info
->tmp_rbuf
;
4435 info
->tmp_rbuf_count
= framesize
;
4437 info
->icount
.rxok
++;
4440 int partial_count
= min(copy_count
, DMABUFSIZE
);
4441 memcpy(p
, info
->rbufs
[i
].buf
, partial_count
);
4443 copy_count
-= partial_count
;
4444 if (++i
== info
->rbuf_count
)
4448 if (info
->params
.crc_type
& HDLC_CRC_RETURN_EX
) {
4449 *p
= (status
& BIT1
) ? RX_CRC_ERROR
: RX_OK
;
4455 hdlcdev_rx(info
,info
->tmp_rbuf
, framesize
);
4458 ldisc_receive_buf(tty
, info
->tmp_rbuf
, info
->flag_buf
, framesize
);
4461 free_rbufs(info
, start
, end
);
4469 * pass receive buffer (RAW synchronous mode) to tty layer
4470 * return 1 if buffer available, otherwise 0
4472 static int rx_get_buf(struct slgt_info
*info
)
4474 unsigned int i
= info
->rbuf_current
;
4476 if (!desc_complete(info
->rbufs
[i
]))
4478 DBGDATA(info
, info
->rbufs
[i
].buf
, desc_count(info
->rbufs
[i
]), "rx");
4479 DBGINFO(("rx_get_buf size=%d\n", desc_count(info
->rbufs
[i
])));
4480 ldisc_receive_buf(info
->tty
, info
->rbufs
[i
].buf
,
4481 info
->flag_buf
, desc_count(info
->rbufs
[i
]));
4482 free_rbufs(info
, i
, i
);
4486 static void reset_tbufs(struct slgt_info
*info
)
4489 info
->tbuf_current
= 0;
4490 for (i
=0 ; i
< info
->tbuf_count
; i
++) {
4491 info
->tbufs
[i
].status
= 0;
4492 info
->tbufs
[i
].count
= 0;
4497 * return number of free transmit DMA buffers
4499 static unsigned int free_tbuf_count(struct slgt_info
*info
)
4501 unsigned int count
= 0;
4502 unsigned int i
= info
->tbuf_current
;
4506 if (desc_count(info
->tbufs
[i
]))
4507 break; /* buffer in use */
4509 if (++i
== info
->tbuf_count
)
4511 } while (i
!= info
->tbuf_current
);
4513 /* last buffer with zero count may be in use, assume it is */
4521 * load transmit DMA buffer(s) with data
4523 static void tx_load(struct slgt_info
*info
, const char *buf
, unsigned int size
)
4525 unsigned short count
;
4527 struct slgt_desc
*d
;
4532 DBGDATA(info
, buf
, size
, "tx");
4534 info
->tbuf_start
= i
= info
->tbuf_current
;
4537 d
= &info
->tbufs
[i
];
4538 if (++i
== info
->tbuf_count
)
4541 count
= (unsigned short)((size
> DMABUFSIZE
) ? DMABUFSIZE
: size
);
4542 memcpy(d
->buf
, buf
, count
);
4547 if (!size
&& info
->params
.mode
!= MGSL_MODE_RAW
)
4548 set_desc_eof(*d
, 1); /* HDLC: set EOF of last desc */
4550 set_desc_eof(*d
, 0);
4552 set_desc_count(*d
, count
);
4555 info
->tbuf_current
= i
;
4558 static int register_test(struct slgt_info
*info
)
4560 static unsigned short patterns
[] =
4561 {0x0000, 0xffff, 0xaaaa, 0x5555, 0x6969, 0x9696};
4562 static unsigned int count
= sizeof(patterns
)/sizeof(patterns
[0]);
4566 for (i
=0 ; i
< count
; i
++) {
4567 wr_reg16(info
, TIR
, patterns
[i
]);
4568 wr_reg16(info
, BDR
, patterns
[(i
+1)%count
]);
4569 if ((rd_reg16(info
, TIR
) != patterns
[i
]) ||
4570 (rd_reg16(info
, BDR
) != patterns
[(i
+1)%count
])) {
4575 info
->gpio_present
= (rd_reg32(info
, JCR
) & BIT5
) ? 1 : 0;
4576 info
->init_error
= rc
? 0 : DiagStatus_AddressFailure
;
4580 static int irq_test(struct slgt_info
*info
)
4582 unsigned long timeout
;
4583 unsigned long flags
;
4584 struct tty_struct
*oldtty
= info
->tty
;
4585 u32 speed
= info
->params
.data_rate
;
4587 info
->params
.data_rate
= 921600;
4590 spin_lock_irqsave(&info
->lock
, flags
);
4592 slgt_irq_on(info
, IRQ_TXIDLE
);
4594 /* enable transmitter */
4596 (unsigned short)(rd_reg16(info
, TCR
) | BIT1
));
4598 /* write one byte and wait for tx idle */
4599 wr_reg16(info
, TDR
, 0);
4601 /* assume failure */
4602 info
->init_error
= DiagStatus_IrqFailure
;
4603 info
->irq_occurred
= FALSE
;
4605 spin_unlock_irqrestore(&info
->lock
, flags
);
4608 while(timeout
-- && !info
->irq_occurred
)
4609 msleep_interruptible(10);
4611 spin_lock_irqsave(&info
->lock
,flags
);
4613 spin_unlock_irqrestore(&info
->lock
,flags
);
4615 info
->params
.data_rate
= speed
;
4618 info
->init_error
= info
->irq_occurred
? 0 : DiagStatus_IrqFailure
;
4619 return info
->irq_occurred
? 0 : -ENODEV
;
4622 static int loopback_test_rx(struct slgt_info
*info
)
4624 unsigned char *src
, *dest
;
4627 if (desc_complete(info
->rbufs
[0])) {
4628 count
= desc_count(info
->rbufs
[0]);
4629 src
= info
->rbufs
[0].buf
;
4630 dest
= info
->tmp_rbuf
;
4632 for( ; count
; count
-=2, src
+=2) {
4633 /* src=data byte (src+1)=status byte */
4634 if (!(*(src
+1) & (BIT9
+ BIT8
))) {
4637 info
->tmp_rbuf_count
++;
4640 DBGDATA(info
, info
->tmp_rbuf
, info
->tmp_rbuf_count
, "rx");
4646 static int loopback_test(struct slgt_info
*info
)
4648 #define TESTFRAMESIZE 20
4650 unsigned long timeout
;
4651 u16 count
= TESTFRAMESIZE
;
4652 unsigned char buf
[TESTFRAMESIZE
];
4654 unsigned long flags
;
4656 struct tty_struct
*oldtty
= info
->tty
;
4659 memcpy(¶ms
, &info
->params
, sizeof(params
));
4661 info
->params
.mode
= MGSL_MODE_ASYNC
;
4662 info
->params
.data_rate
= 921600;
4663 info
->params
.loopback
= 1;
4666 /* build and send transmit frame */
4667 for (count
= 0; count
< TESTFRAMESIZE
; ++count
)
4668 buf
[count
] = (unsigned char)count
;
4670 info
->tmp_rbuf_count
= 0;
4671 memset(info
->tmp_rbuf
, 0, TESTFRAMESIZE
);
4673 /* program hardware for HDLC and enabled receiver */
4674 spin_lock_irqsave(&info
->lock
,flags
);
4677 info
->tx_count
= count
;
4678 tx_load(info
, buf
, count
);
4680 spin_unlock_irqrestore(&info
->lock
, flags
);
4682 /* wait for receive complete */
4683 for (timeout
= 100; timeout
; --timeout
) {
4684 msleep_interruptible(10);
4685 if (loopback_test_rx(info
)) {
4691 /* verify received frame length and contents */
4692 if (!rc
&& (info
->tmp_rbuf_count
!= count
||
4693 memcmp(buf
, info
->tmp_rbuf
, count
))) {
4697 spin_lock_irqsave(&info
->lock
,flags
);
4698 reset_adapter(info
);
4699 spin_unlock_irqrestore(&info
->lock
,flags
);
4701 memcpy(&info
->params
, ¶ms
, sizeof(info
->params
));
4704 info
->init_error
= rc
? DiagStatus_DmaFailure
: 0;
4708 static int adapter_test(struct slgt_info
*info
)
4710 DBGINFO(("testing %s\n", info
->device_name
));
4711 if (register_test(info
) < 0) {
4712 printk("register test failure %s addr=%08X\n",
4713 info
->device_name
, info
->phys_reg_addr
);
4714 } else if (irq_test(info
) < 0) {
4715 printk("IRQ test failure %s IRQ=%d\n",
4716 info
->device_name
, info
->irq_level
);
4717 } else if (loopback_test(info
) < 0) {
4718 printk("loopback test failure %s\n", info
->device_name
);
4720 return info
->init_error
;
4724 * transmit timeout handler
4726 static void tx_timeout(unsigned long context
)
4728 struct slgt_info
*info
= (struct slgt_info
*)context
;
4729 unsigned long flags
;
4731 DBGINFO(("%s tx_timeout\n", info
->device_name
));
4732 if(info
->tx_active
&& info
->params
.mode
== MGSL_MODE_HDLC
) {
4733 info
->icount
.txtimeout
++;
4735 spin_lock_irqsave(&info
->lock
,flags
);
4736 info
->tx_active
= 0;
4738 spin_unlock_irqrestore(&info
->lock
,flags
);
4742 hdlcdev_tx_done(info
);
4749 * receive buffer polling timer
4751 static void rx_timeout(unsigned long context
)
4753 struct slgt_info
*info
= (struct slgt_info
*)context
;
4754 unsigned long flags
;
4756 DBGINFO(("%s rx_timeout\n", info
->device_name
));
4757 spin_lock_irqsave(&info
->lock
, flags
);
4758 info
->pending_bh
|= BH_RECEIVE
;
4759 spin_unlock_irqrestore(&info
->lock
, flags
);