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1 /******************************************************************************
2 * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX,
3 * based on the TCG TPM Interface Spec version 1.2.
4 * Specifications at www.trustedcomputinggroup.org
5 *
6 * Copyright (C) 2011, Nuvoton Technology Corporation.
7 * Dan Morav <dan.morav@nuvoton.com>
8 * Copyright (C) 2013, Obsidian Research Corp.
9 * Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
10 *
11 * This program is free software: you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see http://www.gnu.org/licenses/>.
23 *
24 * Nuvoton contact information: APC.Support@nuvoton.com
25 *****************************************************************************/
26
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/slab.h>
31 #include <linux/interrupt.h>
32 #include <linux/wait.h>
33 #include <linux/i2c.h>
34 #include <linux/of_device.h>
35 #include "tpm.h"
36
37 /* I2C interface offsets */
38 #define TPM_STS 0x00
39 #define TPM_BURST_COUNT 0x01
40 #define TPM_DATA_FIFO_W 0x20
41 #define TPM_DATA_FIFO_R 0x40
42 #define TPM_VID_DID_RID 0x60
43 #define TPM_I2C_RETRIES 5
44 /*
45 * I2C bus device maximum buffer size w/o counting I2C address or command
46 * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
47 */
48 #define TPM_I2C_MAX_BUF_SIZE 32
49 #define TPM_I2C_RETRY_COUNT 32
50 #define TPM_I2C_BUS_DELAY 1000 /* usec */
51 #define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */
52 #define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */
53 #define TPM_I2C_DELAY_RANGE 300 /* usec */
54
55 #define OF_IS_TPM2 ((void *)1)
56 #define I2C_IS_TPM2 1
57
58 struct priv_data {
59 int irq;
60 unsigned int intrs;
61 wait_queue_head_t read_queue;
62 };
63
64 static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
65 u8 *data)
66 {
67 s32 status;
68
69 status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
70 dev_dbg(&client->dev,
71 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
72 offset, size, (int)size, data, status);
73 return status;
74 }
75
76 static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
77 u8 *data)
78 {
79 s32 status;
80
81 status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
82 dev_dbg(&client->dev,
83 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
84 offset, size, (int)size, data, status);
85 return status;
86 }
87
88 #define TPM_STS_VALID 0x80
89 #define TPM_STS_COMMAND_READY 0x40
90 #define TPM_STS_GO 0x20
91 #define TPM_STS_DATA_AVAIL 0x10
92 #define TPM_STS_EXPECT 0x08
93 #define TPM_STS_RESPONSE_RETRY 0x02
94 #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
95
96 #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
97 #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
98
99 /* read TPM_STS register */
100 static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
101 {
102 struct i2c_client *client = to_i2c_client(chip->dev.parent);
103 s32 status;
104 u8 data;
105
106 status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
107 if (status <= 0) {
108 dev_err(&chip->dev, "%s() error return %d\n", __func__,
109 status);
110 data = TPM_STS_ERR_VAL;
111 }
112
113 return data;
114 }
115
116 /* write byte to TPM_STS register */
117 static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
118 {
119 s32 status;
120 int i;
121
122 /* this causes the current command to be aborted */
123 for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
124 status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
125 if (status < 0)
126 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
127 + TPM_I2C_DELAY_RANGE);
128 }
129 return status;
130 }
131
132 /* write commandReady to TPM_STS register */
133 static void i2c_nuvoton_ready(struct tpm_chip *chip)
134 {
135 struct i2c_client *client = to_i2c_client(chip->dev.parent);
136 s32 status;
137
138 /* this causes the current command to be aborted */
139 status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
140 if (status < 0)
141 dev_err(&chip->dev,
142 "%s() fail to write TPM_STS.commandReady\n", __func__);
143 }
144
145 /* read burstCount field from TPM_STS register
146 * return -1 on fail to read */
147 static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
148 struct tpm_chip *chip)
149 {
150 unsigned long stop = jiffies + chip->timeout_d;
151 s32 status;
152 int burst_count = -1;
153 u8 data;
154
155 /* wait for burstcount to be non-zero */
156 do {
157 /* in I2C burstCount is 1 byte */
158 status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
159 &data);
160 if (status > 0 && data > 0) {
161 burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
162 break;
163 }
164 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
165 + TPM_I2C_DELAY_RANGE);
166 } while (time_before(jiffies, stop));
167
168 return burst_count;
169 }
170
171 /*
172 * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail
173 * any call to this function which is not waiting for dataAvail will
174 * set queue to NULL to avoid waiting for interrupt
175 */
176 static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
177 {
178 u8 status = i2c_nuvoton_read_status(chip);
179 return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
180 }
181
182 static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
183 u32 timeout, wait_queue_head_t *queue)
184 {
185 if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) {
186 s32 rc;
187 struct priv_data *priv = dev_get_drvdata(&chip->dev);
188 unsigned int cur_intrs = priv->intrs;
189
190 enable_irq(priv->irq);
191 rc = wait_event_interruptible_timeout(*queue,
192 cur_intrs != priv->intrs,
193 timeout);
194 if (rc > 0)
195 return 0;
196 /* At this point we know that the SINT pin is asserted, so we
197 * do not need to do i2c_nuvoton_check_status */
198 } else {
199 unsigned long ten_msec, stop;
200 bool status_valid;
201
202 /* check current status */
203 status_valid = i2c_nuvoton_check_status(chip, mask, value);
204 if (status_valid)
205 return 0;
206
207 /* use polling to wait for the event */
208 ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
209 stop = jiffies + timeout;
210 do {
211 if (time_before(jiffies, ten_msec))
212 usleep_range(TPM_I2C_RETRY_DELAY_SHORT,
213 TPM_I2C_RETRY_DELAY_SHORT
214 + TPM_I2C_DELAY_RANGE);
215 else
216 usleep_range(TPM_I2C_RETRY_DELAY_LONG,
217 TPM_I2C_RETRY_DELAY_LONG
218 + TPM_I2C_DELAY_RANGE);
219 status_valid = i2c_nuvoton_check_status(chip, mask,
220 value);
221 if (status_valid)
222 return 0;
223 } while (time_before(jiffies, stop));
224 }
225 dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
226 value);
227 return -ETIMEDOUT;
228 }
229
230 /* wait for dataAvail field to be set in the TPM_STS register */
231 static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
232 wait_queue_head_t *queue)
233 {
234 return i2c_nuvoton_wait_for_stat(chip,
235 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
236 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
237 timeout, queue);
238 }
239
240 /* Read @count bytes into @buf from TPM_RD_FIFO register */
241 static int i2c_nuvoton_recv_data(struct i2c_client *client,
242 struct tpm_chip *chip, u8 *buf, size_t count)
243 {
244 struct priv_data *priv = dev_get_drvdata(&chip->dev);
245 s32 rc;
246 int burst_count, bytes2read, size = 0;
247
248 while (size < count &&
249 i2c_nuvoton_wait_for_data_avail(chip,
250 chip->timeout_c,
251 &priv->read_queue) == 0) {
252 burst_count = i2c_nuvoton_get_burstcount(client, chip);
253 if (burst_count < 0) {
254 dev_err(&chip->dev,
255 "%s() fail to read burstCount=%d\n", __func__,
256 burst_count);
257 return -EIO;
258 }
259 bytes2read = min_t(size_t, burst_count, count - size);
260 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
261 bytes2read, &buf[size]);
262 if (rc < 0) {
263 dev_err(&chip->dev,
264 "%s() fail on i2c_nuvoton_read_buf()=%d\n",
265 __func__, rc);
266 return -EIO;
267 }
268 dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read);
269 size += bytes2read;
270 }
271
272 return size;
273 }
274
275 /* Read TPM command results */
276 static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
277 {
278 struct priv_data *priv = dev_get_drvdata(&chip->dev);
279 struct device *dev = chip->dev.parent;
280 struct i2c_client *client = to_i2c_client(dev);
281 s32 rc;
282 int status;
283 int burst_count;
284 int retries;
285 int size = 0;
286 u32 expected;
287
288 if (count < TPM_HEADER_SIZE) {
289 i2c_nuvoton_ready(chip); /* return to idle */
290 dev_err(dev, "%s() count < header size\n", __func__);
291 return -EIO;
292 }
293 for (retries = 0; retries < TPM_I2C_RETRIES; retries++) {
294 if (retries > 0) {
295 /* if this is not the first trial, set responseRetry */
296 i2c_nuvoton_write_status(client,
297 TPM_STS_RESPONSE_RETRY);
298 }
299 /*
300 * read first available (> 10 bytes), including:
301 * tag, paramsize, and result
302 */
303 status = i2c_nuvoton_wait_for_data_avail(
304 chip, chip->timeout_c, &priv->read_queue);
305 if (status != 0) {
306 dev_err(dev, "%s() timeout on dataAvail\n", __func__);
307 size = -ETIMEDOUT;
308 continue;
309 }
310 burst_count = i2c_nuvoton_get_burstcount(client, chip);
311 if (burst_count < 0) {
312 dev_err(dev, "%s() fail to get burstCount\n", __func__);
313 size = -EIO;
314 continue;
315 }
316 size = i2c_nuvoton_recv_data(client, chip, buf,
317 burst_count);
318 if (size < TPM_HEADER_SIZE) {
319 dev_err(dev, "%s() fail to read header\n", __func__);
320 size = -EIO;
321 continue;
322 }
323 /*
324 * convert number of expected bytes field from big endian 32 bit
325 * to machine native
326 */
327 expected = be32_to_cpu(*(__be32 *) (buf + 2));
328 if (expected > count || expected < size) {
329 dev_err(dev, "%s() expected > count\n", __func__);
330 size = -EIO;
331 continue;
332 }
333 rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
334 expected - size);
335 size += rc;
336 if (rc < 0 || size < expected) {
337 dev_err(dev, "%s() fail to read remainder of result\n",
338 __func__);
339 size = -EIO;
340 continue;
341 }
342 if (i2c_nuvoton_wait_for_stat(
343 chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
344 TPM_STS_VALID, chip->timeout_c,
345 NULL)) {
346 dev_err(dev, "%s() error left over data\n", __func__);
347 size = -ETIMEDOUT;
348 continue;
349 }
350 break;
351 }
352 i2c_nuvoton_ready(chip);
353 dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size);
354 return size;
355 }
356
357 /*
358 * Send TPM command.
359 *
360 * If interrupts are used (signaled by an irq set in the vendor structure)
361 * tpm.c can skip polling for the data to be available as the interrupt is
362 * waited for here
363 */
364 static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len)
365 {
366 struct priv_data *priv = dev_get_drvdata(&chip->dev);
367 struct device *dev = chip->dev.parent;
368 struct i2c_client *client = to_i2c_client(dev);
369 u32 ordinal;
370 unsigned long duration;
371 size_t count = 0;
372 int burst_count, bytes2write, retries, rc = -EIO;
373
374 for (retries = 0; retries < TPM_RETRY; retries++) {
375 i2c_nuvoton_ready(chip);
376 if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
377 TPM_STS_COMMAND_READY,
378 chip->timeout_b, NULL)) {
379 dev_err(dev, "%s() timeout on commandReady\n",
380 __func__);
381 rc = -EIO;
382 continue;
383 }
384 rc = 0;
385 while (count < len - 1) {
386 burst_count = i2c_nuvoton_get_burstcount(client,
387 chip);
388 if (burst_count < 0) {
389 dev_err(dev, "%s() fail get burstCount\n",
390 __func__);
391 rc = -EIO;
392 break;
393 }
394 bytes2write = min_t(size_t, burst_count,
395 len - 1 - count);
396 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
397 bytes2write, &buf[count]);
398 if (rc < 0) {
399 dev_err(dev, "%s() fail i2cWriteBuf\n",
400 __func__);
401 break;
402 }
403 dev_dbg(dev, "%s(%d):", __func__, bytes2write);
404 count += bytes2write;
405 rc = i2c_nuvoton_wait_for_stat(chip,
406 TPM_STS_VALID |
407 TPM_STS_EXPECT,
408 TPM_STS_VALID |
409 TPM_STS_EXPECT,
410 chip->timeout_c,
411 NULL);
412 if (rc < 0) {
413 dev_err(dev, "%s() timeout on Expect\n",
414 __func__);
415 rc = -ETIMEDOUT;
416 break;
417 }
418 }
419 if (rc < 0)
420 continue;
421
422 /* write last byte */
423 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
424 &buf[count]);
425 if (rc < 0) {
426 dev_err(dev, "%s() fail to write last byte\n",
427 __func__);
428 rc = -EIO;
429 continue;
430 }
431 dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
432 rc = i2c_nuvoton_wait_for_stat(chip,
433 TPM_STS_VALID | TPM_STS_EXPECT,
434 TPM_STS_VALID,
435 chip->timeout_c, NULL);
436 if (rc) {
437 dev_err(dev, "%s() timeout on Expect to clear\n",
438 __func__);
439 rc = -ETIMEDOUT;
440 continue;
441 }
442 break;
443 }
444 if (rc < 0) {
445 /* retries == TPM_RETRY */
446 i2c_nuvoton_ready(chip);
447 return rc;
448 }
449 /* execute the TPM command */
450 rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
451 if (rc < 0) {
452 dev_err(dev, "%s() fail to write Go\n", __func__);
453 i2c_nuvoton_ready(chip);
454 return rc;
455 }
456 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
457 duration = tpm_calc_ordinal_duration(chip, ordinal);
458
459 rc = i2c_nuvoton_wait_for_data_avail(chip, duration, &priv->read_queue);
460 if (rc) {
461 dev_err(dev, "%s() timeout command duration %ld\n",
462 __func__, duration);
463 i2c_nuvoton_ready(chip);
464 return rc;
465 }
466
467 dev_dbg(dev, "%s() -> %zd\n", __func__, len);
468 return 0;
469 }
470
471 static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
472 {
473 return (status == TPM_STS_COMMAND_READY);
474 }
475
476 static const struct tpm_class_ops tpm_i2c = {
477 .flags = TPM_OPS_AUTO_STARTUP,
478 .status = i2c_nuvoton_read_status,
479 .recv = i2c_nuvoton_recv,
480 .send = i2c_nuvoton_send,
481 .cancel = i2c_nuvoton_ready,
482 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
483 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
484 .req_canceled = i2c_nuvoton_req_canceled,
485 };
486
487 /* The only purpose for the handler is to signal to any waiting threads that
488 * the interrupt is currently being asserted. The driver does not do any
489 * processing triggered by interrupts, and the chip provides no way to mask at
490 * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
491 * this means it cannot be shared. */
492 static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
493 {
494 struct tpm_chip *chip = dev_id;
495 struct priv_data *priv = dev_get_drvdata(&chip->dev);
496
497 priv->intrs++;
498 wake_up(&priv->read_queue);
499 disable_irq_nosync(priv->irq);
500 return IRQ_HANDLED;
501 }
502
503 static int get_vid(struct i2c_client *client, u32 *res)
504 {
505 static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
506 u32 temp;
507 s32 rc;
508
509 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
510 return -ENODEV;
511 rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
512 if (rc < 0)
513 return rc;
514
515 /* check WPCT301 values - ignore RID */
516 if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
517 /*
518 * f/w rev 2.81 has an issue where the VID_DID_RID is not
519 * reporting the right value. so give it another chance at
520 * offset 0x20 (FIFO_W).
521 */
522 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
523 (u8 *) (&temp));
524 if (rc < 0)
525 return rc;
526
527 /* check WPCT301 values - ignore RID */
528 if (memcmp(&temp, vid_did_rid_value,
529 sizeof(vid_did_rid_value)))
530 return -ENODEV;
531 }
532
533 *res = temp;
534 return 0;
535 }
536
537 static int i2c_nuvoton_probe(struct i2c_client *client,
538 const struct i2c_device_id *id)
539 {
540 int rc;
541 struct tpm_chip *chip;
542 struct device *dev = &client->dev;
543 struct priv_data *priv;
544 u32 vid = 0;
545
546 rc = get_vid(client, &vid);
547 if (rc)
548 return rc;
549
550 dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
551 (u8) (vid >> 16), (u8) (vid >> 24));
552
553 chip = tpmm_chip_alloc(dev, &tpm_i2c);
554 if (IS_ERR(chip))
555 return PTR_ERR(chip);
556
557 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
558 if (!priv)
559 return -ENOMEM;
560
561 if (dev->of_node) {
562 const struct of_device_id *of_id;
563
564 of_id = of_match_device(dev->driver->of_match_table, dev);
565 if (of_id && of_id->data == OF_IS_TPM2)
566 chip->flags |= TPM_CHIP_FLAG_TPM2;
567 } else
568 if (id->driver_data == I2C_IS_TPM2)
569 chip->flags |= TPM_CHIP_FLAG_TPM2;
570
571 init_waitqueue_head(&priv->read_queue);
572
573 /* Default timeouts */
574 chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
575 chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
576 chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
577 chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
578
579 dev_set_drvdata(&chip->dev, priv);
580
581 /*
582 * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
583 * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
584 * The IRQ should be set in the i2c_board_info (which is done
585 * automatically in of_i2c_register_devices, for device tree users */
586 priv->irq = client->irq;
587 if (client->irq) {
588 dev_dbg(dev, "%s() priv->irq\n", __func__);
589 rc = devm_request_irq(dev, client->irq,
590 i2c_nuvoton_int_handler,
591 IRQF_TRIGGER_LOW,
592 dev_name(&chip->dev),
593 chip);
594 if (rc) {
595 dev_err(dev, "%s() Unable to request irq: %d for use\n",
596 __func__, priv->irq);
597 priv->irq = 0;
598 } else {
599 chip->flags |= TPM_CHIP_FLAG_IRQ;
600 /* Clear any pending interrupt */
601 i2c_nuvoton_ready(chip);
602 /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
603 rc = i2c_nuvoton_wait_for_stat(chip,
604 TPM_STS_COMMAND_READY,
605 TPM_STS_COMMAND_READY,
606 chip->timeout_b,
607 NULL);
608 if (rc == 0) {
609 /*
610 * TIS is in ready state
611 * write dummy byte to enter reception state
612 * TPM_DATA_FIFO_W <- rc (0)
613 */
614 rc = i2c_nuvoton_write_buf(client,
615 TPM_DATA_FIFO_W,
616 1, (u8 *) (&rc));
617 if (rc < 0)
618 return rc;
619 /* TPM_STS <- 0x40 (commandReady) */
620 i2c_nuvoton_ready(chip);
621 } else {
622 /*
623 * timeout_b reached - command was
624 * aborted. TIS should now be in idle state -
625 * only TPM_STS_VALID should be set
626 */
627 if (i2c_nuvoton_read_status(chip) !=
628 TPM_STS_VALID)
629 return -EIO;
630 }
631 }
632 }
633
634 return tpm_chip_register(chip);
635 }
636
637 static int i2c_nuvoton_remove(struct i2c_client *client)
638 {
639 struct tpm_chip *chip = i2c_get_clientdata(client);
640
641 tpm_chip_unregister(chip);
642 return 0;
643 }
644
645 static const struct i2c_device_id i2c_nuvoton_id[] = {
646 {"tpm_i2c_nuvoton"},
647 {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2},
648 {}
649 };
650 MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
651
652 #ifdef CONFIG_OF
653 static const struct of_device_id i2c_nuvoton_of_match[] = {
654 {.compatible = "nuvoton,npct501"},
655 {.compatible = "winbond,wpct301"},
656 {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2},
657 {},
658 };
659 MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
660 #endif
661
662 static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
663
664 static struct i2c_driver i2c_nuvoton_driver = {
665 .id_table = i2c_nuvoton_id,
666 .probe = i2c_nuvoton_probe,
667 .remove = i2c_nuvoton_remove,
668 .driver = {
669 .name = "tpm_i2c_nuvoton",
670 .pm = &i2c_nuvoton_pm_ops,
671 .of_match_table = of_match_ptr(i2c_nuvoton_of_match),
672 },
673 };
674
675 module_i2c_driver(i2c_nuvoton_driver);
676
677 MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)");
678 MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
679 MODULE_LICENSE("GPL");