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1 /*
2 * Copyright (C) 2005, 2006 IBM Corporation
3 * Copyright (C) 2014, 2015 Intel Corporation
4 *
5 * Authors:
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Kylene Hall <kjhall@us.ibm.com>
8 *
9 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 *
11 * Device driver for TCG/TCPA TPM (trusted platform module).
12 * Specifications at www.trustedcomputinggroup.org
13 *
14 * This device driver implements the TPM interface as defined in
15 * the TCG TPM Interface Spec version 1.2, revision 1.0.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation, version 2 of the
20 * License.
21 */
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pnp.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/wait.h>
29 #include <linux/acpi.h>
30 #include <linux/freezer.h>
31 #include "tpm.h"
32 #include "tpm_tis_core.h"
33
34 /* Before we attempt to access the TPM we must see that the valid bit is set.
35 * The specification says that this bit is 0 at reset and remains 0 until the
36 * 'TPM has gone through its self test and initialization and has established
37 * correct values in the other bits.'
38 */
39 static int wait_startup(struct tpm_chip *chip, int l)
40 {
41 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
42 unsigned long stop = jiffies + chip->timeout_a;
43
44 do {
45 int rc;
46 u8 access;
47
48 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
49 if (rc < 0)
50 return rc;
51
52 if (access & TPM_ACCESS_VALID)
53 return 0;
54 msleep(TPM_TIMEOUT);
55 } while (time_before(jiffies, stop));
56 return -1;
57 }
58
59 static int check_locality(struct tpm_chip *chip, int l)
60 {
61 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
62 int rc;
63 u8 access;
64
65 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
66 if (rc < 0)
67 return rc;
68
69 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
70 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
71 return priv->locality = l;
72
73 return -1;
74 }
75
76 static void release_locality(struct tpm_chip *chip, int l, int force)
77 {
78 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
79 int rc;
80 u8 access;
81
82 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
83 if (rc < 0)
84 return;
85
86 if (force || (access &
87 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
88 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
89 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
90
91 }
92
93 static int request_locality(struct tpm_chip *chip, int l)
94 {
95 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
96 unsigned long stop, timeout;
97 long rc;
98
99 if (check_locality(chip, l) >= 0)
100 return l;
101
102 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
103 if (rc < 0)
104 return rc;
105
106 stop = jiffies + chip->timeout_a;
107
108 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
109 again:
110 timeout = stop - jiffies;
111 if ((long)timeout <= 0)
112 return -1;
113 rc = wait_event_interruptible_timeout(priv->int_queue,
114 (check_locality
115 (chip, l) >= 0),
116 timeout);
117 if (rc > 0)
118 return l;
119 if (rc == -ERESTARTSYS && freezing(current)) {
120 clear_thread_flag(TIF_SIGPENDING);
121 goto again;
122 }
123 } else {
124 /* wait for burstcount */
125 do {
126 if (check_locality(chip, l) >= 0)
127 return l;
128 msleep(TPM_TIMEOUT);
129 } while (time_before(jiffies, stop));
130 }
131 return -1;
132 }
133
134 static u8 tpm_tis_status(struct tpm_chip *chip)
135 {
136 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
137 int rc;
138 u8 status;
139
140 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
141 if (rc < 0)
142 return 0;
143
144 return status;
145 }
146
147 static void tpm_tis_ready(struct tpm_chip *chip)
148 {
149 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
150
151 /* this causes the current command to be aborted */
152 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
153 }
154
155 static int get_burstcount(struct tpm_chip *chip)
156 {
157 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
158 unsigned long stop;
159 int burstcnt, rc;
160 u32 value;
161
162 /* wait for burstcount */
163 /* which timeout value, spec has 2 answers (c & d) */
164 stop = jiffies + chip->timeout_d;
165 do {
166 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
167 if (rc < 0)
168 return rc;
169
170 burstcnt = (value >> 8) & 0xFFFF;
171 if (burstcnt)
172 return burstcnt;
173 msleep(TPM_TIMEOUT);
174 } while (time_before(jiffies, stop));
175 return -EBUSY;
176 }
177
178 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
179 {
180 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
181 int size = 0, burstcnt, rc;
182
183 while (size < count &&
184 wait_for_tpm_stat(chip,
185 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
186 chip->timeout_c,
187 &priv->read_queue, true) == 0) {
188 burstcnt = min_t(int, get_burstcount(chip), count - size);
189
190 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
191 burstcnt, buf + size);
192 if (rc < 0)
193 return rc;
194
195 size += burstcnt;
196 }
197 return size;
198 }
199
200 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
201 {
202 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
203 int size = 0;
204 int expected, status;
205
206 if (count < TPM_HEADER_SIZE) {
207 size = -EIO;
208 goto out;
209 }
210
211 size = recv_data(chip, buf, TPM_HEADER_SIZE);
212 /* read first 10 bytes, including tag, paramsize, and result */
213 if (size < TPM_HEADER_SIZE) {
214 dev_err(&chip->dev, "Unable to read header\n");
215 goto out;
216 }
217
218 expected = be32_to_cpu(*(__be32 *) (buf + 2));
219 if (expected > count) {
220 size = -EIO;
221 goto out;
222 }
223
224 size += recv_data(chip, &buf[TPM_HEADER_SIZE],
225 expected - TPM_HEADER_SIZE);
226 if (size < expected) {
227 dev_err(&chip->dev, "Unable to read remainder of result\n");
228 size = -ETIME;
229 goto out;
230 }
231
232 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
233 &priv->int_queue, false);
234 status = tpm_tis_status(chip);
235 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
236 dev_err(&chip->dev, "Error left over data\n");
237 size = -EIO;
238 goto out;
239 }
240
241 out:
242 tpm_tis_ready(chip);
243 release_locality(chip, priv->locality, 0);
244 return size;
245 }
246
247 /*
248 * If interrupts are used (signaled by an irq set in the vendor structure)
249 * tpm.c can skip polling for the data to be available as the interrupt is
250 * waited for here
251 */
252 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
253 {
254 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
255 int rc, status, burstcnt;
256 size_t count = 0;
257 bool itpm = priv->flags & TPM_TIS_ITPM_POSSIBLE;
258
259 if (request_locality(chip, 0) < 0)
260 return -EBUSY;
261
262 status = tpm_tis_status(chip);
263 if ((status & TPM_STS_COMMAND_READY) == 0) {
264 tpm_tis_ready(chip);
265 if (wait_for_tpm_stat
266 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
267 &priv->int_queue, false) < 0) {
268 rc = -ETIME;
269 goto out_err;
270 }
271 }
272
273 while (count < len - 1) {
274 burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
275 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
276 burstcnt, buf + count);
277 if (rc < 0)
278 goto out_err;
279
280 count += burstcnt;
281
282 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
283 &priv->int_queue, false);
284 status = tpm_tis_status(chip);
285 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
286 rc = -EIO;
287 goto out_err;
288 }
289 }
290
291 /* write last byte */
292 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
293 if (rc < 0)
294 goto out_err;
295
296 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
297 &priv->int_queue, false);
298 status = tpm_tis_status(chip);
299 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
300 rc = -EIO;
301 goto out_err;
302 }
303
304 return 0;
305
306 out_err:
307 tpm_tis_ready(chip);
308 release_locality(chip, priv->locality, 0);
309 return rc;
310 }
311
312 static void disable_interrupts(struct tpm_chip *chip)
313 {
314 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
315 u32 intmask;
316 int rc;
317
318 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
319 if (rc < 0)
320 intmask = 0;
321
322 intmask &= ~TPM_GLOBAL_INT_ENABLE;
323 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
324
325 devm_free_irq(chip->dev.parent, priv->irq, chip);
326 priv->irq = 0;
327 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
328 }
329
330 /*
331 * If interrupts are used (signaled by an irq set in the vendor structure)
332 * tpm.c can skip polling for the data to be available as the interrupt is
333 * waited for here
334 */
335 static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
336 {
337 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
338 int rc;
339 u32 ordinal;
340 unsigned long dur;
341
342 rc = tpm_tis_send_data(chip, buf, len);
343 if (rc < 0)
344 return rc;
345
346 /* go and do it */
347 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
348 if (rc < 0)
349 goto out_err;
350
351 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
352 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
353
354 if (chip->flags & TPM_CHIP_FLAG_TPM2)
355 dur = tpm2_calc_ordinal_duration(chip, ordinal);
356 else
357 dur = tpm_calc_ordinal_duration(chip, ordinal);
358
359 if (wait_for_tpm_stat
360 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
361 &priv->read_queue, false) < 0) {
362 rc = -ETIME;
363 goto out_err;
364 }
365 }
366 return len;
367 out_err:
368 tpm_tis_ready(chip);
369 release_locality(chip, priv->locality, 0);
370 return rc;
371 }
372
373 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
374 {
375 int rc, irq;
376 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
377
378 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
379 return tpm_tis_send_main(chip, buf, len);
380
381 /* Verify receipt of the expected IRQ */
382 irq = priv->irq;
383 priv->irq = 0;
384 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
385 rc = tpm_tis_send_main(chip, buf, len);
386 priv->irq = irq;
387 chip->flags |= TPM_CHIP_FLAG_IRQ;
388 if (!priv->irq_tested)
389 msleep(1);
390 if (!priv->irq_tested)
391 disable_interrupts(chip);
392 priv->irq_tested = true;
393 return rc;
394 }
395
396 struct tis_vendor_timeout_override {
397 u32 did_vid;
398 unsigned long timeout_us[4];
399 };
400
401 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
402 /* Atmel 3204 */
403 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
404 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
405 };
406
407 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
408 unsigned long *timeout_cap)
409 {
410 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
411 int i, rc;
412 u32 did_vid;
413
414 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
415 if (rc < 0)
416 return rc;
417
418 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
419 if (vendor_timeout_overrides[i].did_vid != did_vid)
420 continue;
421 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
422 sizeof(vendor_timeout_overrides[i].timeout_us));
423 return true;
424 }
425
426 return false;
427 }
428
429 /*
430 * Early probing for iTPM with STS_DATA_EXPECT flaw.
431 * Try sending command without itpm flag set and if that
432 * fails, repeat with itpm flag set.
433 */
434 static int probe_itpm(struct tpm_chip *chip)
435 {
436 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
437 int rc = 0;
438 u8 cmd_getticks[] = {
439 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
440 0x00, 0x00, 0x00, 0xf1
441 };
442 size_t len = sizeof(cmd_getticks);
443 u16 vendor;
444
445 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
446 if (rc < 0)
447 return rc;
448
449 /* probe only iTPMS */
450 if (vendor != TPM_VID_INTEL)
451 return 0;
452
453 rc = tpm_tis_send_data(chip, cmd_getticks, len);
454 if (rc == 0)
455 goto out;
456
457 tpm_tis_ready(chip);
458 release_locality(chip, priv->locality, 0);
459
460 rc = tpm_tis_send_data(chip, cmd_getticks, len);
461 if (rc == 0) {
462 dev_info(&chip->dev, "Detected an iTPM.\n");
463 rc = 1;
464 } else
465 rc = -EFAULT;
466
467 out:
468 tpm_tis_ready(chip);
469 release_locality(chip, priv->locality, 0);
470
471 return rc;
472 }
473
474 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
475 {
476 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
477
478 switch (priv->manufacturer_id) {
479 case TPM_VID_WINBOND:
480 return ((status == TPM_STS_VALID) ||
481 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
482 case TPM_VID_STM:
483 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
484 default:
485 return (status == TPM_STS_COMMAND_READY);
486 }
487 }
488
489 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
490 {
491 struct tpm_chip *chip = dev_id;
492 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
493 u32 interrupt;
494 int i, rc;
495
496 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
497 if (rc < 0)
498 return IRQ_NONE;
499
500 if (interrupt == 0)
501 return IRQ_NONE;
502
503 priv->irq_tested = true;
504 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
505 wake_up_interruptible(&priv->read_queue);
506 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
507 for (i = 0; i < 5; i++)
508 if (check_locality(chip, i) >= 0)
509 break;
510 if (interrupt &
511 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
512 TPM_INTF_CMD_READY_INT))
513 wake_up_interruptible(&priv->int_queue);
514
515 /* Clear interrupts handled with TPM_EOI */
516 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
517 if (rc < 0)
518 return IRQ_NONE;
519
520 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
521 return IRQ_HANDLED;
522 }
523
524 static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
525 {
526 const char *desc = "attempting to generate an interrupt";
527 u32 cap2;
528 cap_t cap;
529
530 if (chip->flags & TPM_CHIP_FLAG_TPM2)
531 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
532 else
533 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc);
534 }
535
536 /* Register the IRQ and issue a command that will cause an interrupt. If an
537 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
538 * everything and leave in polling mode. Returns 0 on success.
539 */
540 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
541 int flags, int irq)
542 {
543 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
544 u8 original_int_vec;
545 int rc;
546 u32 int_status;
547
548 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
549 dev_name(&chip->dev), chip) != 0) {
550 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
551 irq);
552 return -1;
553 }
554 priv->irq = irq;
555
556 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
557 &original_int_vec);
558 if (rc < 0)
559 return rc;
560
561 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
562 if (rc < 0)
563 return rc;
564
565 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
566 if (rc < 0)
567 return rc;
568
569 /* Clear all existing */
570 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
571 if (rc < 0)
572 return rc;
573
574 /* Turn on */
575 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
576 intmask | TPM_GLOBAL_INT_ENABLE);
577 if (rc < 0)
578 return rc;
579
580 priv->irq_tested = false;
581
582 /* Generate an interrupt by having the core call through to
583 * tpm_tis_send
584 */
585 rc = tpm_tis_gen_interrupt(chip);
586 if (rc < 0)
587 return rc;
588
589 /* tpm_tis_send will either confirm the interrupt is working or it
590 * will call disable_irq which undoes all of the above.
591 */
592 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
593 rc = tpm_tis_write8(priv, original_int_vec,
594 TPM_INT_VECTOR(priv->locality));
595 if (rc < 0)
596 return rc;
597
598 return 1;
599 }
600
601 return 0;
602 }
603
604 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
605 * do not have ACPI/etc. We typically expect the interrupt to be declared if
606 * present.
607 */
608 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
609 {
610 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
611 u8 original_int_vec;
612 int i, rc;
613
614 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
615 &original_int_vec);
616 if (rc < 0)
617 return;
618
619 if (!original_int_vec) {
620 if (IS_ENABLED(CONFIG_X86))
621 for (i = 3; i <= 15; i++)
622 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
623 i))
624 return;
625 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
626 original_int_vec))
627 return;
628 }
629
630 void tpm_tis_remove(struct tpm_chip *chip)
631 {
632 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
633 u32 reg = TPM_INT_ENABLE(priv->locality);
634 u32 interrupt;
635 int rc;
636
637 rc = tpm_tis_read32(priv, reg, &interrupt);
638 if (rc < 0)
639 interrupt = 0;
640
641 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
642 release_locality(chip, priv->locality, 1);
643 }
644 EXPORT_SYMBOL_GPL(tpm_tis_remove);
645
646 static const struct tpm_class_ops tpm_tis = {
647 .flags = TPM_OPS_AUTO_STARTUP,
648 .status = tpm_tis_status,
649 .recv = tpm_tis_recv,
650 .send = tpm_tis_send,
651 .cancel = tpm_tis_ready,
652 .update_timeouts = tpm_tis_update_timeouts,
653 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
654 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
655 .req_canceled = tpm_tis_req_canceled,
656 };
657
658 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
659 const struct tpm_tis_phy_ops *phy_ops,
660 acpi_handle acpi_dev_handle)
661 {
662 u32 vendor, intfcaps, intmask;
663 u8 rid;
664 int rc, probe;
665 struct tpm_chip *chip;
666
667 chip = tpmm_chip_alloc(dev, &tpm_tis);
668 if (IS_ERR(chip))
669 return PTR_ERR(chip);
670
671 #ifdef CONFIG_ACPI
672 chip->acpi_dev_handle = acpi_dev_handle;
673 #endif
674
675 /* Maximum timeouts */
676 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
677 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
678 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
679 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
680 priv->phy_ops = phy_ops;
681 dev_set_drvdata(&chip->dev, priv);
682
683 if (wait_startup(chip, 0) != 0) {
684 rc = -ENODEV;
685 goto out_err;
686 }
687
688 /* Take control of the TPM's interrupt hardware and shut it off */
689 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
690 if (rc < 0)
691 goto out_err;
692
693 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
694 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
695 intmask &= ~TPM_GLOBAL_INT_ENABLE;
696 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
697
698 if (request_locality(chip, 0) != 0) {
699 rc = -ENODEV;
700 goto out_err;
701 }
702
703 rc = tpm2_probe(chip);
704 if (rc)
705 goto out_err;
706
707 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
708 if (rc < 0)
709 goto out_err;
710
711 priv->manufacturer_id = vendor;
712
713 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
714 if (rc < 0)
715 goto out_err;
716
717 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
718 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
719 vendor >> 16, rid);
720
721 if (!(priv->flags & TPM_TIS_ITPM_POSSIBLE)) {
722 probe = probe_itpm(chip);
723 if (probe < 0) {
724 rc = -ENODEV;
725 goto out_err;
726 }
727
728 if (!!probe)
729 priv->flags |= TPM_TIS_ITPM_POSSIBLE;
730 }
731
732 /* Figure out the capabilities */
733 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
734 if (rc < 0)
735 goto out_err;
736
737 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
738 intfcaps);
739 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
740 dev_dbg(dev, "\tBurst Count Static\n");
741 if (intfcaps & TPM_INTF_CMD_READY_INT)
742 dev_dbg(dev, "\tCommand Ready Int Support\n");
743 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
744 dev_dbg(dev, "\tInterrupt Edge Falling\n");
745 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
746 dev_dbg(dev, "\tInterrupt Edge Rising\n");
747 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
748 dev_dbg(dev, "\tInterrupt Level Low\n");
749 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
750 dev_dbg(dev, "\tInterrupt Level High\n");
751 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
752 dev_dbg(dev, "\tLocality Change Int Support\n");
753 if (intfcaps & TPM_INTF_STS_VALID_INT)
754 dev_dbg(dev, "\tSts Valid Int Support\n");
755 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
756 dev_dbg(dev, "\tData Avail Int Support\n");
757
758 /* Very early on issue a command to the TPM in polling mode to make
759 * sure it works. May as well use that command to set the proper
760 * timeouts for the driver.
761 */
762 if (tpm_get_timeouts(chip)) {
763 dev_err(dev, "Could not get TPM timeouts and durations\n");
764 rc = -ENODEV;
765 goto out_err;
766 }
767
768 /* INTERRUPT Setup */
769 init_waitqueue_head(&priv->read_queue);
770 init_waitqueue_head(&priv->int_queue);
771 if (irq != -1) {
772 if (irq) {
773 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
774 irq);
775 if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
776 dev_err(&chip->dev, FW_BUG
777 "TPM interrupt not working, polling instead\n");
778 } else {
779 tpm_tis_probe_irq(chip, intmask);
780 }
781 }
782
783 return tpm_chip_register(chip);
784 out_err:
785 tpm_tis_remove(chip);
786 return rc;
787 }
788 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
789
790 #ifdef CONFIG_PM_SLEEP
791 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
792 {
793 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
794 u32 intmask;
795 int rc;
796
797 /* reenable interrupts that device may have lost or
798 * BIOS/firmware may have disabled
799 */
800 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
801 if (rc < 0)
802 return;
803
804 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
805 if (rc < 0)
806 return;
807
808 intmask |= TPM_INTF_CMD_READY_INT
809 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
810 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
811
812 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
813 }
814
815 int tpm_tis_resume(struct device *dev)
816 {
817 struct tpm_chip *chip = dev_get_drvdata(dev);
818 int ret;
819
820 if (chip->flags & TPM_CHIP_FLAG_IRQ)
821 tpm_tis_reenable_interrupts(chip);
822
823 ret = tpm_pm_resume(dev);
824 if (ret)
825 return ret;
826
827 /* TPM 1.2 requires self-test on resume. This function actually returns
828 * an error code but for unknown reason it isn't handled.
829 */
830 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
831 tpm_do_selftest(chip);
832
833 return 0;
834 }
835 EXPORT_SYMBOL_GPL(tpm_tis_resume);
836 #endif
837
838 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
839 MODULE_DESCRIPTION("TPM Driver");
840 MODULE_VERSION("2.0");
841 MODULE_LICENSE("GPL");