drivers/clk/Kconfig

   1 # SPDX-License-Identifier: GPL-2.0
   2
   3 config HAVE_CLK
   4         bool
   5         help
   6           The <linux/clk.h> calls support software clock gating and
   7           thus are a key power management tool on many systems.
   8
   9 config CLKDEV_LOOKUP
  10         bool
  11         select HAVE_CLK
  12
  13 config HAVE_CLK_PREPARE
  14         bool
  15
  16 config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
  17         bool
  18         select HAVE_CLK
  19         help
  20           Select this option when the clock API in <linux/clk.h> is implemented
  21           by platform/architecture code. This method is deprecated. Modern
  22           code should select COMMON_CLK instead and not define a custom
  23           'struct clk'.
  24
  25 menuconfig COMMON_CLK
  26         bool "Common Clock Framework"
  27         depends on !HAVE_LEGACY_CLK
  28         select HAVE_CLK_PREPARE
  29         select CLKDEV_LOOKUP
  30         select SRCU
  31         select RATIONAL
  32         help
  33           The common clock framework is a single definition of struct
  34           clk, useful across many platforms, as well as an
  35           implementation of the clock API in include/linux/clk.h.
  36           Architectures utilizing the common struct clk should select
  37           this option.
  38
  39 if COMMON_CLK
  40
  41 config COMMON_CLK_WM831X
  42         tristate "Clock driver for WM831x/2x PMICs"
  43         depends on MFD_WM831X
  44         help
  45           Supports the clocking subsystem of the WM831x/2x series of
  46           PMICs from Wolfson Microelectronics.
  47
  48 source "drivers/clk/versatile/Kconfig"
  49
  50 config CLK_HSDK
  51         bool "PLL Driver for HSDK platform"
  52         depends on ARC_SOC_HSDK || COMPILE_TEST
  53         depends on HAS_IOMEM
  54         help
  55           This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
  56           control.
  57
  58 config COMMON_CLK_MAX77686
  59         tristate "Clock driver for Maxim 77620/77686/77802 MFD"
  60         depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
  61         help
  62           This driver supports Maxim 77620/77686/77802 crystal oscillator
  63           clock.
  64
  65 config COMMON_CLK_MAX9485
  66         tristate "Maxim 9485 Programmable Clock Generator"
  67         depends on I2C
  68         help
  69           This driver supports Maxim 9485 Programmable Audio Clock Generator
  70
  71 config COMMON_CLK_RK808
  72         tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
  73         depends on MFD_RK808
  74         help
  75           This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
  76           These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
  77           Clkout1 is always on, Clkout2 can off by control register.
  78
  79 config COMMON_CLK_HI655X
  80         tristate "Clock driver for Hi655x" if EXPERT
  81         depends on (MFD_HI655X_PMIC || COMPILE_TEST)
  82         depends on REGMAP
  83         default MFD_HI655X_PMIC
  84         help
  85           This driver supports the hi655x PMIC clock. This
  86           multi-function device has one fixed-rate oscillator, clocked
  87           at 32KHz.
  88
  89 config COMMON_CLK_SCMI
  90         tristate "Clock driver controlled via SCMI interface"
  91         depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
  92         help
  93           This driver provides support for clocks that are controlled
  94           by firmware that implements the SCMI interface.
  95
  96           This driver uses SCMI Message Protocol to interact with the
  97           firmware providing all the clock controls.
  98
  99 config COMMON_CLK_SCPI
 100         tristate "Clock driver controlled via SCPI interface"
 101         depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
 102         help
 103           This driver provides support for clocks that are controlled
 104           by firmware that implements the SCPI interface.
 105
 106           This driver uses SCPI Message Protocol to interact with the
 107           firmware providing all the clock controls.
 108
 109 config COMMON_CLK_SI5341
 110         tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
 111         depends on I2C
 112         select REGMAP_I2C
 113         help
 114           This driver supports Silicon Labs Si5341 and Si5340 programmable clock
 115           generators. Not all features of these chips are currently supported
 116           by the driver, in particular it only supports XTAL input. The chip can
 117           be pre-programmed to support other configurations and features not yet
 118           implemented in the driver.
 119
 120 config COMMON_CLK_SI5351
 121         tristate "Clock driver for SiLabs 5351A/B/C"
 122         depends on I2C
 123         select REGMAP_I2C
 124         help
 125           This driver supports Silicon Labs 5351A/B/C programmable clock
 126           generators.
 127
 128 config COMMON_CLK_SI514
 129         tristate "Clock driver for SiLabs 514 devices"
 130         depends on I2C
 131         depends on OF
 132         select REGMAP_I2C
 133         help
 134           This driver supports the Silicon Labs 514 programmable clock
 135           generator.
 136
 137 config COMMON_CLK_SI544
 138         tristate "Clock driver for SiLabs 544 devices"
 139         depends on I2C
 140         select REGMAP_I2C
 141         help
 142           This driver supports the Silicon Labs 544 programmable clock
 143           generator.
 144
 145 config COMMON_CLK_SI570
 146         tristate "Clock driver for SiLabs 570 and compatible devices"
 147         depends on I2C
 148         depends on OF
 149         select REGMAP_I2C
 150         help
 151           This driver supports Silicon Labs 570/571/598/599 programmable
 152           clock generators.
 153
 154 config COMMON_CLK_BM1880
 155         bool "Clock driver for Bitmain BM1880 SoC"
 156         depends on ARCH_BITMAIN || COMPILE_TEST
 157         default ARCH_BITMAIN
 158         help
 159           This driver supports the clocks on Bitmain BM1880 SoC.
 160
 161 config COMMON_CLK_CDCE706
 162         tristate "Clock driver for TI CDCE706 clock synthesizer"
 163         depends on I2C
 164         select REGMAP_I2C
 165         help
 166           This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
 167
 168 config COMMON_CLK_CDCE925
 169         tristate "Clock driver for TI CDCE913/925/937/949 devices"
 170         depends on I2C
 171         depends on OF
 172         select REGMAP_I2C
 173         help
 174           This driver supports the TI CDCE913/925/937/949 programmable clock
 175           synthesizer. Each chip has different number of PLLs and outputs.
 176           For example, the CDCE925 contains two PLLs with spread-spectrum
 177           clocking support and five output dividers. The driver only supports
 178           the following setup, and uses a fixed setting for the output muxes.
 179           Y1 is derived from the input clock
 180           Y2 and Y3 derive from PLL1
 181           Y4 and Y5 derive from PLL2
 182           Given a target output frequency, the driver will set the PLL and
 183           divider to best approximate the desired output.
 184
 185 config COMMON_CLK_CS2000_CP
 186         tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
 187         depends on I2C
 188         help
 189           If you say yes here you get support for the CS2000 clock multiplier.
 190
 191 config COMMON_CLK_FSL_SAI
 192         bool "Clock driver for BCLK of Freescale SAI cores"
 193         depends on ARCH_LAYERSCAPE || COMPILE_TEST
 194         help
 195           This driver supports the Freescale SAI (Synchronous Audio Interface)
 196           to be used as a generic clock output. Some SoCs have restrictions
 197           regarding the possible pin multiplexer settings. Eg. on some SoCs
 198           two SAI interfaces can only be enabled together. If just one is
 199           needed, the BCLK pin of the second one can be used as general
 200           purpose clock output. Ideally, it can be used to drive an audio
 201           codec (sometimes known as MCLK).
 202
 203 config COMMON_CLK_GEMINI
 204         bool "Clock driver for Cortina Systems Gemini SoC"
 205         depends on ARCH_GEMINI || COMPILE_TEST
 206         select MFD_SYSCON
 207         select RESET_CONTROLLER
 208         help
 209           This driver supports the SoC clocks on the Cortina Systems Gemini
 210           platform, also known as SL3516 or CS3516.
 211
 212 config COMMON_CLK_ASPEED
 213         bool "Clock driver for Aspeed BMC SoCs"
 214         depends on ARCH_ASPEED || COMPILE_TEST
 215         default ARCH_ASPEED
 216         select MFD_SYSCON
 217         select RESET_CONTROLLER
 218         help
 219           This driver supports the SoC clocks on the Aspeed BMC platforms.
 220
 221           The G4 and G5 series, including the ast2400 and ast2500, are supported
 222           by this driver.
 223
 224 config COMMON_CLK_S2MPS11
 225         tristate "Clock driver for S2MPS1X/S5M8767 MFD"
 226         depends on MFD_SEC_CORE || COMPILE_TEST
 227         help
 228           This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
 229           clock. These multi-function devices have two (S2MPS14) or three
 230           (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
 231
 232 config CLK_TWL6040
 233         tristate "External McPDM functional clock from twl6040"
 234         depends on TWL6040_CORE
 235         help
 236           Enable the external functional clock support on OMAP4+ platforms for
 237           McPDM. McPDM module is using the external bit clock on the McPDM bus
 238           as functional clock.
 239
 240 config COMMON_CLK_AXI_CLKGEN
 241         tristate "AXI clkgen driver"
 242         depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
 243         help
 244           Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
 245           FPGAs. It is commonly used in Analog Devices' reference designs.
 246
 247 config CLK_QORIQ
 248         bool "Clock driver for Freescale QorIQ platforms"
 249         depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
 250         help
 251           This adds the clock driver support for Freescale QorIQ platforms
 252           using common clock framework.
 253
 254 config CLK_LS1028A_PLLDIG
 255         tristate "Clock driver for LS1028A Display output"
 256         depends on ARCH_LAYERSCAPE || COMPILE_TEST
 257         default ARCH_LAYERSCAPE
 258         help
 259           This driver support the Display output interfaces(LCD, DPHY) pixel clocks
 260           of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
 261           features of the PLL are currently supported by the driver. By default,
 262           configured bypass mode with this PLL.
 263
 264 config COMMON_CLK_XGENE
 265         bool "Clock driver for APM XGene SoC"
 266         default ARCH_XGENE
 267         depends on ARM64 || COMPILE_TEST
 268         help
 269           Support for the APM X-Gene SoC reference, PLL, and device clocks.
 270
 271 config COMMON_CLK_LOCHNAGAR
 272         tristate "Cirrus Logic Lochnagar clock driver"
 273         depends on MFD_LOCHNAGAR
 274         help
 275           This driver supports the clocking features of the Cirrus Logic
 276           Lochnagar audio development board.
 277
 278 config COMMON_CLK_NXP
 279         def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
 280         select REGMAP_MMIO if ARCH_LPC32XX
 281         select MFD_SYSCON if ARCH_LPC18XX
 282         help
 283           Support for clock providers on NXP platforms.
 284
 285 config COMMON_CLK_PALMAS
 286         tristate "Clock driver for TI Palmas devices"
 287         depends on MFD_PALMAS
 288         help
 289           This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
 290           using common clock framework.
 291
 292 config COMMON_CLK_PWM
 293         tristate "Clock driver for PWMs used as clock outputs"
 294         depends on PWM
 295         help
 296           Adapter driver so that any PWM output can be (mis)used as clock signal
 297           at 50% duty cycle.
 298
 299 config COMMON_CLK_PXA
 300         def_bool COMMON_CLK && ARCH_PXA
 301         help
 302           Support for the Marvell PXA SoC.
 303
 304 config COMMON_CLK_PIC32
 305         def_bool COMMON_CLK && MACH_PIC32
 306
 307 config COMMON_CLK_OXNAS
 308         bool "Clock driver for the OXNAS SoC Family"
 309         depends on ARCH_OXNAS || COMPILE_TEST
 310         select MFD_SYSCON
 311         help
 312           Support for the OXNAS SoC Family clocks.
 313
 314 config COMMON_CLK_VC5
 315         tristate "Clock driver for IDT VersaClock 5,6 devices"
 316         depends on I2C
 317         depends on OF
 318         select REGMAP_I2C
 319         help
 320           This driver supports the IDT VersaClock 5 and VersaClock 6
 321           programmable clock generators.
 322
 323 config COMMON_CLK_STM32MP157
 324         def_bool COMMON_CLK && MACH_STM32MP157
 325         help
 326           Support for stm32mp157 SoC family clocks
 327
 328 config COMMON_CLK_STM32F
 329         def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
 330         help
 331           Support for stm32f4 and stm32f7 SoC families clocks
 332
 333 config COMMON_CLK_STM32H7
 334         def_bool COMMON_CLK && MACH_STM32H743
 335         help
 336           Support for stm32h7 SoC family clocks
 337
 338 config COMMON_CLK_MMP2
 339         def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
 340         help
 341           Support for Marvell MMP2 and MMP3 SoC clocks
 342
 343 config COMMON_CLK_MMP2_AUDIO
 344         tristate "Clock driver for MMP2 Audio subsystem"
 345         depends on COMMON_CLK_MMP2 || COMPILE_TEST
 346         help
 347           This driver supports clocks for Audio subsystem on MMP2 SoC.
 348
 349 config COMMON_CLK_BD718XX
 350         tristate "Clock driver for 32K clk gates on ROHM PMICs"
 351         depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 || MFD_ROHM_BD71828
 352         help
 353           This driver supports ROHM BD71837, ROHM BD71847, ROHM BD71828 and
 354           ROHM BD70528 PMICs clock gates.
 355
 356 config COMMON_CLK_FIXED_MMIO
 357         bool "Clock driver for Memory Mapped Fixed values"
 358         depends on COMMON_CLK && OF
 359         help
 360           Support for Memory Mapped IO Fixed clocks
 361
 362 source "drivers/clk/actions/Kconfig"
 363 source "drivers/clk/analogbits/Kconfig"
 364 source "drivers/clk/baikal-t1/Kconfig"
 365 source "drivers/clk/bcm/Kconfig"
 366 source "drivers/clk/hisilicon/Kconfig"
 367 source "drivers/clk/imgtec/Kconfig"
 368 source "drivers/clk/imx/Kconfig"
 369 source "drivers/clk/ingenic/Kconfig"
 370 source "drivers/clk/keystone/Kconfig"
 371 source "drivers/clk/mediatek/Kconfig"
 372 source "drivers/clk/meson/Kconfig"
 373 source "drivers/clk/mvebu/Kconfig"
 374 source "drivers/clk/qcom/Kconfig"
 375 source "drivers/clk/renesas/Kconfig"
 376 source "drivers/clk/samsung/Kconfig"
 377 source "drivers/clk/sifive/Kconfig"
 378 source "drivers/clk/sprd/Kconfig"
 379 source "drivers/clk/sunxi/Kconfig"
 380 source "drivers/clk/sunxi-ng/Kconfig"
 381 source "drivers/clk/tegra/Kconfig"
 382 source "drivers/clk/ti/Kconfig"
 383 source "drivers/clk/uniphier/Kconfig"
 384 source "drivers/clk/x86/Kconfig"
 385 source "drivers/clk/zynqmp/Kconfig"
 386
 387 endif