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1 # SPDX-License-Identifier: GPL-2.0
2
3 config HAVE_CLK
4 bool
5 help
6 The <linux/clk.h> calls support software clock gating and
7 thus are a key power management tool on many systems.
8
9 config CLKDEV_LOOKUP
10 bool
11 select HAVE_CLK
12
13 config HAVE_CLK_PREPARE
14 bool
15
16 config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
17 bool
18 select HAVE_CLK
19 help
20 Select this option when the clock API in <linux/clk.h> is implemented
21 by platform/architecture code. This method is deprecated. Modern
22 code should select COMMON_CLK instead and not define a custom
23 'struct clk'.
24
25 menuconfig COMMON_CLK
26 bool "Common Clock Framework"
27 depends on !HAVE_LEGACY_CLK
28 select HAVE_CLK_PREPARE
29 select CLKDEV_LOOKUP
30 select SRCU
31 select RATIONAL
32 help
33 The common clock framework is a single definition of struct
34 clk, useful across many platforms, as well as an
35 implementation of the clock API in include/linux/clk.h.
36 Architectures utilizing the common struct clk should select
37 this option.
38
39 if COMMON_CLK
40
41 config COMMON_CLK_WM831X
42 tristate "Clock driver for WM831x/2x PMICs"
43 depends on MFD_WM831X
44 help
45 Supports the clocking subsystem of the WM831x/2x series of
46 PMICs from Wolfson Microelectronics.
47
48 source "drivers/clk/versatile/Kconfig"
49
50 config CLK_HSDK
51 bool "PLL Driver for HSDK platform"
52 depends on ARC_SOC_HSDK || COMPILE_TEST
53 depends on HAS_IOMEM
54 help
55 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
56 control.
57
58 config COMMON_CLK_MAX77686
59 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
60 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
61 help
62 This driver supports Maxim 77620/77686/77802 crystal oscillator
63 clock.
64
65 config COMMON_CLK_MAX9485
66 tristate "Maxim 9485 Programmable Clock Generator"
67 depends on I2C
68 help
69 This driver supports Maxim 9485 Programmable Audio Clock Generator
70
71 config COMMON_CLK_RK808
72 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
73 depends on MFD_RK808
74 help
75 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
76 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
77 Clkout1 is always on, Clkout2 can off by control register.
78
79 config COMMON_CLK_HI655X
80 tristate "Clock driver for Hi655x" if EXPERT
81 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
82 depends on REGMAP
83 default MFD_HI655X_PMIC
84 help
85 This driver supports the hi655x PMIC clock. This
86 multi-function device has one fixed-rate oscillator, clocked
87 at 32KHz.
88
89 config COMMON_CLK_SCMI
90 tristate "Clock driver controlled via SCMI interface"
91 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
92 help
93 This driver provides support for clocks that are controlled
94 by firmware that implements the SCMI interface.
95
96 This driver uses SCMI Message Protocol to interact with the
97 firmware providing all the clock controls.
98
99 config COMMON_CLK_SCPI
100 tristate "Clock driver controlled via SCPI interface"
101 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
102 help
103 This driver provides support for clocks that are controlled
104 by firmware that implements the SCPI interface.
105
106 This driver uses SCPI Message Protocol to interact with the
107 firmware providing all the clock controls.
108
109 config COMMON_CLK_SI5341
110 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
111 depends on I2C
112 select REGMAP_I2C
113 help
114 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
115 generators. Not all features of these chips are currently supported
116 by the driver, in particular it only supports XTAL input. The chip can
117 be pre-programmed to support other configurations and features not yet
118 implemented in the driver.
119
120 config COMMON_CLK_SI5351
121 tristate "Clock driver for SiLabs 5351A/B/C"
122 depends on I2C
123 select REGMAP_I2C
124 help
125 This driver supports Silicon Labs 5351A/B/C programmable clock
126 generators.
127
128 config COMMON_CLK_SI514
129 tristate "Clock driver for SiLabs 514 devices"
130 depends on I2C
131 depends on OF
132 select REGMAP_I2C
133 help
134 This driver supports the Silicon Labs 514 programmable clock
135 generator.
136
137 config COMMON_CLK_SI544
138 tristate "Clock driver for SiLabs 544 devices"
139 depends on I2C
140 select REGMAP_I2C
141 help
142 This driver supports the Silicon Labs 544 programmable clock
143 generator.
144
145 config COMMON_CLK_SI570
146 tristate "Clock driver for SiLabs 570 and compatible devices"
147 depends on I2C
148 depends on OF
149 select REGMAP_I2C
150 help
151 This driver supports Silicon Labs 570/571/598/599 programmable
152 clock generators.
153
154 config COMMON_CLK_BM1880
155 bool "Clock driver for Bitmain BM1880 SoC"
156 depends on ARCH_BITMAIN || COMPILE_TEST
157 default ARCH_BITMAIN
158 help
159 This driver supports the clocks on Bitmain BM1880 SoC.
160
161 config COMMON_CLK_CDCE706
162 tristate "Clock driver for TI CDCE706 clock synthesizer"
163 depends on I2C
164 select REGMAP_I2C
165 help
166 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
167
168 config COMMON_CLK_CDCE925
169 tristate "Clock driver for TI CDCE913/925/937/949 devices"
170 depends on I2C
171 depends on OF
172 select REGMAP_I2C
173 help
174 This driver supports the TI CDCE913/925/937/949 programmable clock
175 synthesizer. Each chip has different number of PLLs and outputs.
176 For example, the CDCE925 contains two PLLs with spread-spectrum
177 clocking support and five output dividers. The driver only supports
178 the following setup, and uses a fixed setting for the output muxes.
179 Y1 is derived from the input clock
180 Y2 and Y3 derive from PLL1
181 Y4 and Y5 derive from PLL2
182 Given a target output frequency, the driver will set the PLL and
183 divider to best approximate the desired output.
184
185 config COMMON_CLK_CS2000_CP
186 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
187 depends on I2C
188 help
189 If you say yes here you get support for the CS2000 clock multiplier.
190
191 config COMMON_CLK_FSL_FLEXSPI
192 tristate "Clock driver for FlexSPI on Layerscape SoCs"
193 depends on ARCH_LAYERSCAPE || COMPILE_TEST
194 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
195 help
196 On Layerscape SoCs there is a special clock for the FlexSPI
197 interface.
198
199 config COMMON_CLK_FSL_SAI
200 bool "Clock driver for BCLK of Freescale SAI cores"
201 depends on ARCH_LAYERSCAPE || COMPILE_TEST
202 help
203 This driver supports the Freescale SAI (Synchronous Audio Interface)
204 to be used as a generic clock output. Some SoCs have restrictions
205 regarding the possible pin multiplexer settings. Eg. on some SoCs
206 two SAI interfaces can only be enabled together. If just one is
207 needed, the BCLK pin of the second one can be used as general
208 purpose clock output. Ideally, it can be used to drive an audio
209 codec (sometimes known as MCLK).
210
211 config COMMON_CLK_GEMINI
212 bool "Clock driver for Cortina Systems Gemini SoC"
213 depends on ARCH_GEMINI || COMPILE_TEST
214 select MFD_SYSCON
215 select RESET_CONTROLLER
216 help
217 This driver supports the SoC clocks on the Cortina Systems Gemini
218 platform, also known as SL3516 or CS3516.
219
220 config COMMON_CLK_ASPEED
221 bool "Clock driver for Aspeed BMC SoCs"
222 depends on ARCH_ASPEED || COMPILE_TEST
223 default ARCH_ASPEED
224 select MFD_SYSCON
225 select RESET_CONTROLLER
226 help
227 This driver supports the SoC clocks on the Aspeed BMC platforms.
228
229 The G4 and G5 series, including the ast2400 and ast2500, are supported
230 by this driver.
231
232 config COMMON_CLK_S2MPS11
233 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
234 depends on MFD_SEC_CORE || COMPILE_TEST
235 help
236 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
237 clock. These multi-function devices have two (S2MPS14) or three
238 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
239
240 config CLK_TWL6040
241 tristate "External McPDM functional clock from twl6040"
242 depends on TWL6040_CORE
243 help
244 Enable the external functional clock support on OMAP4+ platforms for
245 McPDM. McPDM module is using the external bit clock on the McPDM bus
246 as functional clock.
247
248 config COMMON_CLK_AXI_CLKGEN
249 tristate "AXI clkgen driver"
250 depends on HAS_IOMEM || COMPILE_TEST
251 depends on OF
252 help
253 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
254 FPGAs. It is commonly used in Analog Devices' reference designs.
255
256 config CLK_QORIQ
257 bool "Clock driver for Freescale QorIQ platforms"
258 depends on OF
259 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
260 help
261 This adds the clock driver support for Freescale QorIQ platforms
262 using common clock framework.
263
264 config CLK_LS1028A_PLLDIG
265 tristate "Clock driver for LS1028A Display output"
266 depends on ARCH_LAYERSCAPE || COMPILE_TEST
267 default ARCH_LAYERSCAPE
268 help
269 This driver support the Display output interfaces(LCD, DPHY) pixel clocks
270 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
271 features of the PLL are currently supported by the driver. By default,
272 configured bypass mode with this PLL.
273
274 config COMMON_CLK_XGENE
275 bool "Clock driver for APM XGene SoC"
276 default ARCH_XGENE
277 depends on ARM64 || COMPILE_TEST
278 help
279 Support for the APM X-Gene SoC reference, PLL, and device clocks.
280
281 config COMMON_CLK_LOCHNAGAR
282 tristate "Cirrus Logic Lochnagar clock driver"
283 depends on MFD_LOCHNAGAR
284 help
285 This driver supports the clocking features of the Cirrus Logic
286 Lochnagar audio development board.
287
288 config COMMON_CLK_NXP
289 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
290 select REGMAP_MMIO if ARCH_LPC32XX
291 select MFD_SYSCON if ARCH_LPC18XX
292 help
293 Support for clock providers on NXP platforms.
294
295 config COMMON_CLK_PALMAS
296 tristate "Clock driver for TI Palmas devices"
297 depends on MFD_PALMAS
298 help
299 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
300 using common clock framework.
301
302 config COMMON_CLK_PWM
303 tristate "Clock driver for PWMs used as clock outputs"
304 depends on PWM
305 help
306 Adapter driver so that any PWM output can be (mis)used as clock signal
307 at 50% duty cycle.
308
309 config COMMON_CLK_PXA
310 def_bool COMMON_CLK && ARCH_PXA
311 help
312 Support for the Marvell PXA SoC.
313
314 config COMMON_CLK_PIC32
315 def_bool COMMON_CLK && MACH_PIC32
316
317 config COMMON_CLK_OXNAS
318 bool "Clock driver for the OXNAS SoC Family"
319 depends on ARCH_OXNAS || COMPILE_TEST
320 select MFD_SYSCON
321 help
322 Support for the OXNAS SoC Family clocks.
323
324 config COMMON_CLK_VC5
325 tristate "Clock driver for IDT VersaClock 5,6 devices"
326 depends on I2C
327 depends on OF
328 select REGMAP_I2C
329 help
330 This driver supports the IDT VersaClock 5 and VersaClock 6
331 programmable clock generators.
332
333 config COMMON_CLK_STM32MP157
334 def_bool COMMON_CLK && MACH_STM32MP157
335 help
336 Support for stm32mp157 SoC family clocks
337
338 config COMMON_CLK_STM32F
339 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
340 help
341 Support for stm32f4 and stm32f7 SoC families clocks
342
343 config COMMON_CLK_STM32H7
344 def_bool COMMON_CLK && MACH_STM32H743
345 help
346 Support for stm32h7 SoC family clocks
347
348 config COMMON_CLK_MMP2
349 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
350 help
351 Support for Marvell MMP2 and MMP3 SoC clocks
352
353 config COMMON_CLK_MMP2_AUDIO
354 tristate "Clock driver for MMP2 Audio subsystem"
355 depends on COMMON_CLK_MMP2 || COMPILE_TEST
356 help
357 This driver supports clocks for Audio subsystem on MMP2 SoC.
358
359 config COMMON_CLK_BD718XX
360 tristate "Clock driver for 32K clk gates on ROHM PMICs"
361 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 || MFD_ROHM_BD71828
362 help
363 This driver supports ROHM BD71837, ROHM BD71847, ROHM BD71828 and
364 ROHM BD70528 PMICs clock gates.
365
366 config COMMON_CLK_FIXED_MMIO
367 bool "Clock driver for Memory Mapped Fixed values"
368 depends on COMMON_CLK && OF
369 help
370 Support for Memory Mapped IO Fixed clocks
371
372 config COMMON_CLK_K210
373 bool "Clock driver for the Canaan Kendryte K210 SoC"
374 depends on OF && RISCV && SOC_CANAAN
375 default SOC_CANAAN
376 help
377 Support for the Canaan Kendryte K210 RISC-V SoC clocks.
378
379 source "drivers/clk/actions/Kconfig"
380 source "drivers/clk/analogbits/Kconfig"
381 source "drivers/clk/baikal-t1/Kconfig"
382 source "drivers/clk/bcm/Kconfig"
383 source "drivers/clk/hisilicon/Kconfig"
384 source "drivers/clk/imgtec/Kconfig"
385 source "drivers/clk/imx/Kconfig"
386 source "drivers/clk/ingenic/Kconfig"
387 source "drivers/clk/keystone/Kconfig"
388 source "drivers/clk/mediatek/Kconfig"
389 source "drivers/clk/meson/Kconfig"
390 source "drivers/clk/mstar/Kconfig"
391 source "drivers/clk/mvebu/Kconfig"
392 source "drivers/clk/qcom/Kconfig"
393 source "drivers/clk/ralink/Kconfig"
394 source "drivers/clk/renesas/Kconfig"
395 source "drivers/clk/rockchip/Kconfig"
396 source "drivers/clk/samsung/Kconfig"
397 source "drivers/clk/sifive/Kconfig"
398 source "drivers/clk/socfpga/Kconfig"
399 source "drivers/clk/sprd/Kconfig"
400 source "drivers/clk/sunxi/Kconfig"
401 source "drivers/clk/sunxi-ng/Kconfig"
402 source "drivers/clk/tegra/Kconfig"
403 source "drivers/clk/ti/Kconfig"
404 source "drivers/clk/uniphier/Kconfig"
405 source "drivers/clk/x86/Kconfig"
406 source "drivers/clk/xilinx/Kconfig"
407 source "drivers/clk/zynqmp/Kconfig"
408
409 endif