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git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/clk/clk-gate.c
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * Gated clock implementation
12 #include <linux/clk-provider.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
16 #include <linux/err.h>
17 #include <linux/string.h>
20 * DOC: basic gatable clock which can gate and ungate it's ouput
22 * Traits of this clock:
23 * prepare - clk_(un)prepare only ensures parent is (un)prepared
24 * enable - clk_enable and clk_disable are functional & control gating
25 * rate - inherits rate from parent. No clk_set_rate support
26 * parent - fixed parent. No clk_set_parent support
29 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
32 * It works on following logic:
34 * For enabling clock, enable = 1
35 * set2dis = 1 -> clear bit -> set = 0
36 * set2dis = 0 -> set bit -> set = 1
38 * For disabling clock, enable = 0
39 * set2dis = 1 -> set bit -> set = 1
40 * set2dis = 0 -> clear bit -> set = 0
42 * So, result is always: enable xor set2dis.
44 static void clk_gate_endisable(struct clk_hw
*hw
, int enable
)
46 struct clk_gate
*gate
= to_clk_gate(hw
);
47 int set
= gate
->flags
& CLK_GATE_SET_TO_DISABLE
? 1 : 0;
48 unsigned long uninitialized_var(flags
);
54 spin_lock_irqsave(gate
->lock
, flags
);
56 __acquire(gate
->lock
);
58 if (gate
->flags
& CLK_GATE_HIWORD_MASK
) {
59 reg
= BIT(gate
->bit_idx
+ 16);
61 reg
|= BIT(gate
->bit_idx
);
63 reg
= clk_readl(gate
->reg
);
66 reg
|= BIT(gate
->bit_idx
);
68 reg
&= ~BIT(gate
->bit_idx
);
71 clk_writel(reg
, gate
->reg
);
74 spin_unlock_irqrestore(gate
->lock
, flags
);
76 __release(gate
->lock
);
79 static int clk_gate_enable(struct clk_hw
*hw
)
81 clk_gate_endisable(hw
, 1);
86 static void clk_gate_disable(struct clk_hw
*hw
)
88 clk_gate_endisable(hw
, 0);
91 static int clk_gate_is_enabled(struct clk_hw
*hw
)
94 struct clk_gate
*gate
= to_clk_gate(hw
);
96 reg
= clk_readl(gate
->reg
);
98 /* if a set bit disables this clk, flip it before masking */
99 if (gate
->flags
& CLK_GATE_SET_TO_DISABLE
)
100 reg
^= BIT(gate
->bit_idx
);
102 reg
&= BIT(gate
->bit_idx
);
107 const struct clk_ops clk_gate_ops
= {
108 .enable
= clk_gate_enable
,
109 .disable
= clk_gate_disable
,
110 .is_enabled
= clk_gate_is_enabled
,
112 EXPORT_SYMBOL_GPL(clk_gate_ops
);
115 * clk_register_gate - register a gate clock with the clock framework
116 * @dev: device that is registering this clock
117 * @name: name of this clock
118 * @parent_name: name of this clock's parent
119 * @flags: framework-specific flags for this clock
120 * @reg: register address to control gating of this clock
121 * @bit_idx: which bit in the register controls gating of this clock
122 * @clk_gate_flags: gate-specific flags for this clock
123 * @lock: shared register lock for this clock
125 struct clk
*clk_register_gate(struct device
*dev
, const char *name
,
126 const char *parent_name
, unsigned long flags
,
127 void __iomem
*reg
, u8 bit_idx
,
128 u8 clk_gate_flags
, spinlock_t
*lock
)
130 struct clk_gate
*gate
;
132 struct clk_init_data init
;
134 if (clk_gate_flags
& CLK_GATE_HIWORD_MASK
) {
136 pr_err("gate bit exceeds LOWORD field\n");
137 return ERR_PTR(-EINVAL
);
141 /* allocate the gate */
142 gate
= kzalloc(sizeof(*gate
), GFP_KERNEL
);
144 return ERR_PTR(-ENOMEM
);
147 init
.ops
= &clk_gate_ops
;
148 init
.flags
= flags
| CLK_IS_BASIC
;
149 init
.parent_names
= (parent_name
? &parent_name
: NULL
);
150 init
.num_parents
= (parent_name
? 1 : 0);
152 /* struct clk_gate assignments */
154 gate
->bit_idx
= bit_idx
;
155 gate
->flags
= clk_gate_flags
;
157 gate
->hw
.init
= &init
;
159 clk
= clk_register(dev
, &gate
->hw
);
166 EXPORT_SYMBOL_GPL(clk_register_gate
);
168 void clk_unregister_gate(struct clk
*clk
)
170 struct clk_gate
*gate
;
173 hw
= __clk_get_hw(clk
);
177 gate
= to_clk_gate(hw
);
182 EXPORT_SYMBOL_GPL(clk_unregister_gate
);