2 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
5 * Jyri Sarha <jsarha@ti.com>
6 * Sergej Sawazki <ce3a@gmx.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Gpio controlled clock implementation
15 #include <linux/clk-provider.h>
16 #include <linux/export.h>
17 #include <linux/slab.h>
18 #include <linux/gpio.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/of_gpio.h>
21 #include <linux/err.h>
22 #include <linux/device.h>
25 * DOC: basic gpio gated clock which can be enabled and disabled
27 * Traits of this clock:
28 * prepare - clk_(un)prepare only ensures parent is (un)prepared
29 * enable - clk_enable and clk_disable are functional & control gpio
30 * rate - inherits rate from parent. No clk_set_rate support
31 * parent - fixed parent. No clk_set_parent support
34 #define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
36 static int clk_gpio_gate_enable(struct clk_hw
*hw
)
38 struct clk_gpio
*clk
= to_clk_gpio(hw
);
40 gpiod_set_value(clk
->gpiod
, 1);
45 static void clk_gpio_gate_disable(struct clk_hw
*hw
)
47 struct clk_gpio
*clk
= to_clk_gpio(hw
);
49 gpiod_set_value(clk
->gpiod
, 0);
52 static int clk_gpio_gate_is_enabled(struct clk_hw
*hw
)
54 struct clk_gpio
*clk
= to_clk_gpio(hw
);
56 return gpiod_get_value(clk
->gpiod
);
59 const struct clk_ops clk_gpio_gate_ops
= {
60 .enable
= clk_gpio_gate_enable
,
61 .disable
= clk_gpio_gate_disable
,
62 .is_enabled
= clk_gpio_gate_is_enabled
,
64 EXPORT_SYMBOL_GPL(clk_gpio_gate_ops
);
67 * DOC: basic clock multiplexer which can be controlled with a gpio output
68 * Traits of this clock:
69 * prepare - clk_prepare only ensures that parents are prepared
70 * rate - rate is only affected by parent switching. No clk_set_rate support
71 * parent - parent is adjustable through clk_set_parent
74 static u8
clk_gpio_mux_get_parent(struct clk_hw
*hw
)
76 struct clk_gpio
*clk
= to_clk_gpio(hw
);
78 return gpiod_get_value(clk
->gpiod
);
81 static int clk_gpio_mux_set_parent(struct clk_hw
*hw
, u8 index
)
83 struct clk_gpio
*clk
= to_clk_gpio(hw
);
85 gpiod_set_value(clk
->gpiod
, index
);
90 const struct clk_ops clk_gpio_mux_ops
= {
91 .get_parent
= clk_gpio_mux_get_parent
,
92 .set_parent
= clk_gpio_mux_set_parent
,
93 .determine_rate
= __clk_mux_determine_rate
,
95 EXPORT_SYMBOL_GPL(clk_gpio_mux_ops
);
97 static struct clk
*clk_register_gpio(struct device
*dev
, const char *name
,
98 const char **parent_names
, u8 num_parents
, unsigned gpio
,
99 bool active_low
, unsigned long flags
,
100 const struct clk_ops
*clk_gpio_ops
)
102 struct clk_gpio
*clk_gpio
;
104 struct clk_init_data init
= {};
105 unsigned long gpio_flags
;
109 clk_gpio
= devm_kzalloc(dev
, sizeof(*clk_gpio
), GFP_KERNEL
);
111 clk_gpio
= kzalloc(sizeof(*clk_gpio
), GFP_KERNEL
);
114 return ERR_PTR(-ENOMEM
);
117 gpio_flags
= GPIOF_ACTIVE_LOW
| GPIOF_OUT_INIT_HIGH
;
119 gpio_flags
= GPIOF_OUT_INIT_LOW
;
122 err
= devm_gpio_request_one(dev
, gpio
, gpio_flags
, name
);
124 err
= gpio_request_one(gpio
, gpio_flags
, name
);
126 if (err
!= -EPROBE_DEFER
)
127 pr_err("%s: %s: Error requesting clock control gpio %u\n",
128 __func__
, name
, gpio
);
136 init
.ops
= clk_gpio_ops
;
137 init
.flags
= flags
| CLK_IS_BASIC
;
138 init
.parent_names
= parent_names
;
139 init
.num_parents
= num_parents
;
141 clk_gpio
->gpiod
= gpio_to_desc(gpio
);
142 clk_gpio
->hw
.init
= &init
;
145 clk
= devm_clk_register(dev
, &clk_gpio
->hw
);
147 clk
= clk_register(NULL
, &clk_gpio
->hw
);
153 gpiod_put(clk_gpio
->gpiod
);
161 * clk_register_gpio_gate - register a gpio clock gate with the clock framework
162 * @dev: device that is registering this clock
163 * @name: name of this clock
164 * @parent_name: name of this clock's parent
165 * @gpio: gpio number to gate this clock
166 * @active_low: true if gpio should be set to 0 to enable clock
167 * @flags: clock flags
169 struct clk
*clk_register_gpio_gate(struct device
*dev
, const char *name
,
170 const char *parent_name
, unsigned gpio
, bool active_low
,
173 return clk_register_gpio(dev
, name
,
174 (parent_name
? &parent_name
: NULL
),
175 (parent_name
? 1 : 0), gpio
, active_low
, flags
,
178 EXPORT_SYMBOL_GPL(clk_register_gpio_gate
);
181 * clk_register_gpio_mux - register a gpio clock mux with the clock framework
182 * @dev: device that is registering this clock
183 * @name: name of this clock
184 * @parent_names: names of this clock's parents
185 * @num_parents: number of parents listed in @parent_names
186 * @gpio: gpio number to gate this clock
187 * @active_low: true if gpio should be set to 0 to enable clock
188 * @flags: clock flags
190 struct clk
*clk_register_gpio_mux(struct device
*dev
, const char *name
,
191 const char **parent_names
, u8 num_parents
, unsigned gpio
,
192 bool active_low
, unsigned long flags
)
194 if (num_parents
!= 2) {
195 pr_err("mux-clock %s must have 2 parents\n", name
);
196 return ERR_PTR(-EINVAL
);
199 return clk_register_gpio(dev
, name
, parent_names
, num_parents
,
200 gpio
, active_low
, flags
, &clk_gpio_mux_ops
);
202 EXPORT_SYMBOL_GPL(clk_register_gpio_mux
);
206 * clk_register_get() has to be delayed, because -EPROBE_DEFER
207 * can not be handled properly at of_clk_init() call time.
210 struct clk_gpio_delayed_register_data
{
211 const char *gpio_name
;
212 struct device_node
*node
;
215 struct clk
*(*clk_register_get
)(const char *name
,
216 const char **parent_names
, u8 num_parents
,
217 unsigned gpio
, bool active_low
);
220 static struct clk
*of_clk_gpio_delayed_register_get(
221 struct of_phandle_args
*clkspec
, void *_data
)
223 struct clk_gpio_delayed_register_data
*data
= _data
;
225 const char **parent_names
;
228 enum of_gpio_flags of_flags
;
230 mutex_lock(&data
->lock
);
233 mutex_unlock(&data
->lock
);
237 gpio
= of_get_named_gpio_flags(data
->node
, data
->gpio_name
, 0,
240 mutex_unlock(&data
->lock
);
241 if (gpio
== -EPROBE_DEFER
)
242 pr_debug("%s: %s: GPIOs not yet available, retry later\n",
243 data
->node
->name
, __func__
);
245 pr_err("%s: %s: Can't get '%s' DT property\n",
246 data
->node
->name
, __func__
,
248 return ERR_PTR(gpio
);
251 num_parents
= of_clk_get_parent_count(data
->node
);
253 parent_names
= kcalloc(num_parents
, sizeof(char *), GFP_KERNEL
);
255 clk
= ERR_PTR(-ENOMEM
);
259 for (i
= 0; i
< num_parents
; i
++)
260 parent_names
[i
] = of_clk_get_parent_name(data
->node
, i
);
262 clk
= data
->clk_register_get(data
->node
->name
, parent_names
,
263 num_parents
, gpio
, of_flags
& OF_GPIO_ACTIVE_LOW
);
269 mutex_unlock(&data
->lock
);
275 static struct clk
*of_clk_gpio_gate_delayed_register_get(const char *name
,
276 const char **parent_names
, u8 num_parents
,
277 unsigned gpio
, bool active_low
)
279 return clk_register_gpio_gate(NULL
, name
, parent_names
[0],
280 gpio
, active_low
, 0);
283 static struct clk
*of_clk_gpio_mux_delayed_register_get(const char *name
,
284 const char **parent_names
, u8 num_parents
, unsigned gpio
,
287 return clk_register_gpio_mux(NULL
, name
, parent_names
, num_parents
,
288 gpio
, active_low
, 0);
291 static void __init
of_gpio_clk_setup(struct device_node
*node
,
292 const char *gpio_name
,
293 struct clk
*(*clk_register_get
)(const char *name
,
294 const char **parent_names
, u8 num_parents
,
295 unsigned gpio
, bool active_low
))
297 struct clk_gpio_delayed_register_data
*data
;
299 data
= kzalloc(sizeof(*data
), GFP_KERNEL
);
304 data
->gpio_name
= gpio_name
;
305 data
->clk_register_get
= clk_register_get
;
306 mutex_init(&data
->lock
);
308 of_clk_add_provider(node
, of_clk_gpio_delayed_register_get
, data
);
311 static void __init
of_gpio_gate_clk_setup(struct device_node
*node
)
313 of_gpio_clk_setup(node
, "enable-gpios",
314 of_clk_gpio_gate_delayed_register_get
);
316 CLK_OF_DECLARE(gpio_gate_clk
, "gpio-gate-clock", of_gpio_gate_clk_setup
);
318 void __init
of_gpio_mux_clk_setup(struct device_node
*node
)
320 of_gpio_clk_setup(node
, "select-gpios",
321 of_clk_gpio_mux_delayed_register_get
);
323 CLK_OF_DECLARE(gpio_mux_clk
, "gpio-mux-clock", of_gpio_mux_clk_setup
);