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clk: Add hardware-enable column to clk summary
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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
5 *
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
7 */
8
9 #include <linux/clk.h>
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
12 #include <linux/module.h>
13 #include <linux/mutex.h>
14 #include <linux/spinlock.h>
15 #include <linux/err.h>
16 #include <linux/list.h>
17 #include <linux/slab.h>
18 #include <linux/of.h>
19 #include <linux/device.h>
20 #include <linux/init.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/sched.h>
23 #include <linux/clkdev.h>
24
25 #include "clk.h"
26
27 static DEFINE_SPINLOCK(enable_lock);
28 static DEFINE_MUTEX(prepare_lock);
29
30 static struct task_struct *prepare_owner;
31 static struct task_struct *enable_owner;
32
33 static int prepare_refcnt;
34 static int enable_refcnt;
35
36 static HLIST_HEAD(clk_root_list);
37 static HLIST_HEAD(clk_orphan_list);
38 static LIST_HEAD(clk_notifier_list);
39
40 static struct hlist_head *all_lists[] = {
41 &clk_root_list,
42 &clk_orphan_list,
43 NULL,
44 };
45
46 /*** private data structures ***/
47
48 struct clk_parent_map {
49 const struct clk_hw *hw;
50 struct clk_core *core;
51 const char *fw_name;
52 const char *name;
53 int index;
54 };
55
56 struct clk_core {
57 const char *name;
58 const struct clk_ops *ops;
59 struct clk_hw *hw;
60 struct module *owner;
61 struct device *dev;
62 struct device_node *of_node;
63 struct clk_core *parent;
64 struct clk_parent_map *parents;
65 u8 num_parents;
66 u8 new_parent_index;
67 unsigned long rate;
68 unsigned long req_rate;
69 unsigned long new_rate;
70 struct clk_core *new_parent;
71 struct clk_core *new_child;
72 unsigned long flags;
73 bool orphan;
74 bool rpm_enabled;
75 unsigned int enable_count;
76 unsigned int prepare_count;
77 unsigned int protect_count;
78 unsigned long min_rate;
79 unsigned long max_rate;
80 unsigned long accuracy;
81 int phase;
82 struct clk_duty duty;
83 struct hlist_head children;
84 struct hlist_node child_node;
85 struct hlist_head clks;
86 unsigned int notifier_count;
87 #ifdef CONFIG_DEBUG_FS
88 struct dentry *dentry;
89 struct hlist_node debug_node;
90 #endif
91 struct kref ref;
92 };
93
94 #define CREATE_TRACE_POINTS
95 #include <trace/events/clk.h>
96
97 struct clk {
98 struct clk_core *core;
99 struct device *dev;
100 const char *dev_id;
101 const char *con_id;
102 unsigned long min_rate;
103 unsigned long max_rate;
104 unsigned int exclusive_count;
105 struct hlist_node clks_node;
106 };
107
108 /*** runtime pm ***/
109 static int clk_pm_runtime_get(struct clk_core *core)
110 {
111 int ret;
112
113 if (!core->rpm_enabled)
114 return 0;
115
116 ret = pm_runtime_get_sync(core->dev);
117 if (ret < 0) {
118 pm_runtime_put_noidle(core->dev);
119 return ret;
120 }
121 return 0;
122 }
123
124 static void clk_pm_runtime_put(struct clk_core *core)
125 {
126 if (!core->rpm_enabled)
127 return;
128
129 pm_runtime_put_sync(core->dev);
130 }
131
132 /*** locking ***/
133 static void clk_prepare_lock(void)
134 {
135 if (!mutex_trylock(&prepare_lock)) {
136 if (prepare_owner == current) {
137 prepare_refcnt++;
138 return;
139 }
140 mutex_lock(&prepare_lock);
141 }
142 WARN_ON_ONCE(prepare_owner != NULL);
143 WARN_ON_ONCE(prepare_refcnt != 0);
144 prepare_owner = current;
145 prepare_refcnt = 1;
146 }
147
148 static void clk_prepare_unlock(void)
149 {
150 WARN_ON_ONCE(prepare_owner != current);
151 WARN_ON_ONCE(prepare_refcnt == 0);
152
153 if (--prepare_refcnt)
154 return;
155 prepare_owner = NULL;
156 mutex_unlock(&prepare_lock);
157 }
158
159 static unsigned long clk_enable_lock(void)
160 __acquires(enable_lock)
161 {
162 unsigned long flags;
163
164 /*
165 * On UP systems, spin_trylock_irqsave() always returns true, even if
166 * we already hold the lock. So, in that case, we rely only on
167 * reference counting.
168 */
169 if (!IS_ENABLED(CONFIG_SMP) ||
170 !spin_trylock_irqsave(&enable_lock, flags)) {
171 if (enable_owner == current) {
172 enable_refcnt++;
173 __acquire(enable_lock);
174 if (!IS_ENABLED(CONFIG_SMP))
175 local_save_flags(flags);
176 return flags;
177 }
178 spin_lock_irqsave(&enable_lock, flags);
179 }
180 WARN_ON_ONCE(enable_owner != NULL);
181 WARN_ON_ONCE(enable_refcnt != 0);
182 enable_owner = current;
183 enable_refcnt = 1;
184 return flags;
185 }
186
187 static void clk_enable_unlock(unsigned long flags)
188 __releases(enable_lock)
189 {
190 WARN_ON_ONCE(enable_owner != current);
191 WARN_ON_ONCE(enable_refcnt == 0);
192
193 if (--enable_refcnt) {
194 __release(enable_lock);
195 return;
196 }
197 enable_owner = NULL;
198 spin_unlock_irqrestore(&enable_lock, flags);
199 }
200
201 static bool clk_core_rate_is_protected(struct clk_core *core)
202 {
203 return core->protect_count;
204 }
205
206 static bool clk_core_is_prepared(struct clk_core *core)
207 {
208 bool ret = false;
209
210 /*
211 * .is_prepared is optional for clocks that can prepare
212 * fall back to software usage counter if it is missing
213 */
214 if (!core->ops->is_prepared)
215 return core->prepare_count;
216
217 if (!clk_pm_runtime_get(core)) {
218 ret = core->ops->is_prepared(core->hw);
219 clk_pm_runtime_put(core);
220 }
221
222 return ret;
223 }
224
225 static bool clk_core_is_enabled(struct clk_core *core)
226 {
227 bool ret = false;
228
229 /*
230 * .is_enabled is only mandatory for clocks that gate
231 * fall back to software usage counter if .is_enabled is missing
232 */
233 if (!core->ops->is_enabled)
234 return core->enable_count;
235
236 /*
237 * Check if clock controller's device is runtime active before
238 * calling .is_enabled callback. If not, assume that clock is
239 * disabled, because we might be called from atomic context, from
240 * which pm_runtime_get() is not allowed.
241 * This function is called mainly from clk_disable_unused_subtree,
242 * which ensures proper runtime pm activation of controller before
243 * taking enable spinlock, but the below check is needed if one tries
244 * to call it from other places.
245 */
246 if (core->rpm_enabled) {
247 pm_runtime_get_noresume(core->dev);
248 if (!pm_runtime_active(core->dev)) {
249 ret = false;
250 goto done;
251 }
252 }
253
254 ret = core->ops->is_enabled(core->hw);
255 done:
256 if (core->rpm_enabled)
257 pm_runtime_put(core->dev);
258
259 return ret;
260 }
261
262 /*** helper functions ***/
263
264 const char *__clk_get_name(const struct clk *clk)
265 {
266 return !clk ? NULL : clk->core->name;
267 }
268 EXPORT_SYMBOL_GPL(__clk_get_name);
269
270 const char *clk_hw_get_name(const struct clk_hw *hw)
271 {
272 return hw->core->name;
273 }
274 EXPORT_SYMBOL_GPL(clk_hw_get_name);
275
276 struct clk_hw *__clk_get_hw(struct clk *clk)
277 {
278 return !clk ? NULL : clk->core->hw;
279 }
280 EXPORT_SYMBOL_GPL(__clk_get_hw);
281
282 unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
283 {
284 return hw->core->num_parents;
285 }
286 EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
287
288 struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
289 {
290 return hw->core->parent ? hw->core->parent->hw : NULL;
291 }
292 EXPORT_SYMBOL_GPL(clk_hw_get_parent);
293
294 static struct clk_core *__clk_lookup_subtree(const char *name,
295 struct clk_core *core)
296 {
297 struct clk_core *child;
298 struct clk_core *ret;
299
300 if (!strcmp(core->name, name))
301 return core;
302
303 hlist_for_each_entry(child, &core->children, child_node) {
304 ret = __clk_lookup_subtree(name, child);
305 if (ret)
306 return ret;
307 }
308
309 return NULL;
310 }
311
312 static struct clk_core *clk_core_lookup(const char *name)
313 {
314 struct clk_core *root_clk;
315 struct clk_core *ret;
316
317 if (!name)
318 return NULL;
319
320 /* search the 'proper' clk tree first */
321 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
322 ret = __clk_lookup_subtree(name, root_clk);
323 if (ret)
324 return ret;
325 }
326
327 /* if not found, then search the orphan tree */
328 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
329 ret = __clk_lookup_subtree(name, root_clk);
330 if (ret)
331 return ret;
332 }
333
334 return NULL;
335 }
336
337 #ifdef CONFIG_OF
338 static int of_parse_clkspec(const struct device_node *np, int index,
339 const char *name, struct of_phandle_args *out_args);
340 static struct clk_hw *
341 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec);
342 #else
343 static inline int of_parse_clkspec(const struct device_node *np, int index,
344 const char *name,
345 struct of_phandle_args *out_args)
346 {
347 return -ENOENT;
348 }
349 static inline struct clk_hw *
350 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
351 {
352 return ERR_PTR(-ENOENT);
353 }
354 #endif
355
356 /**
357 * clk_core_get - Find the clk_core parent of a clk
358 * @core: clk to find parent of
359 * @p_index: parent index to search for
360 *
361 * This is the preferred method for clk providers to find the parent of a
362 * clk when that parent is external to the clk controller. The parent_names
363 * array is indexed and treated as a local name matching a string in the device
364 * node's 'clock-names' property or as the 'con_id' matching the device's
365 * dev_name() in a clk_lookup. This allows clk providers to use their own
366 * namespace instead of looking for a globally unique parent string.
367 *
368 * For example the following DT snippet would allow a clock registered by the
369 * clock-controller@c001 that has a clk_init_data::parent_data array
370 * with 'xtal' in the 'name' member to find the clock provided by the
371 * clock-controller@f00abcd without needing to get the globally unique name of
372 * the xtal clk.
373 *
374 * parent: clock-controller@f00abcd {
375 * reg = <0xf00abcd 0xabcd>;
376 * #clock-cells = <0>;
377 * };
378 *
379 * clock-controller@c001 {
380 * reg = <0xc001 0xf00d>;
381 * clocks = <&parent>;
382 * clock-names = "xtal";
383 * #clock-cells = <1>;
384 * };
385 *
386 * Returns: -ENOENT when the provider can't be found or the clk doesn't
387 * exist in the provider or the name can't be found in the DT node or
388 * in a clkdev lookup. NULL when the provider knows about the clk but it
389 * isn't provided on this system.
390 * A valid clk_core pointer when the clk can be found in the provider.
391 */
392 static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index)
393 {
394 const char *name = core->parents[p_index].fw_name;
395 int index = core->parents[p_index].index;
396 struct clk_hw *hw = ERR_PTR(-ENOENT);
397 struct device *dev = core->dev;
398 const char *dev_id = dev ? dev_name(dev) : NULL;
399 struct device_node *np = core->of_node;
400 struct of_phandle_args clkspec;
401
402 if (np && (name || index >= 0) &&
403 !of_parse_clkspec(np, index, name, &clkspec)) {
404 hw = of_clk_get_hw_from_clkspec(&clkspec);
405 of_node_put(clkspec.np);
406 } else if (name) {
407 /*
408 * If the DT search above couldn't find the provider fallback to
409 * looking up via clkdev based clk_lookups.
410 */
411 hw = clk_find_hw(dev_id, name);
412 }
413
414 if (IS_ERR(hw))
415 return ERR_CAST(hw);
416
417 return hw->core;
418 }
419
420 static void clk_core_fill_parent_index(struct clk_core *core, u8 index)
421 {
422 struct clk_parent_map *entry = &core->parents[index];
423 struct clk_core *parent = ERR_PTR(-ENOENT);
424
425 if (entry->hw) {
426 parent = entry->hw->core;
427 /*
428 * We have a direct reference but it isn't registered yet?
429 * Orphan it and let clk_reparent() update the orphan status
430 * when the parent is registered.
431 */
432 if (!parent)
433 parent = ERR_PTR(-EPROBE_DEFER);
434 } else {
435 parent = clk_core_get(core, index);
436 if (PTR_ERR(parent) == -ENOENT && entry->name)
437 parent = clk_core_lookup(entry->name);
438 }
439
440 /* Only cache it if it's not an error */
441 if (!IS_ERR(parent))
442 entry->core = parent;
443 }
444
445 static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
446 u8 index)
447 {
448 if (!core || index >= core->num_parents || !core->parents)
449 return NULL;
450
451 if (!core->parents[index].core)
452 clk_core_fill_parent_index(core, index);
453
454 return core->parents[index].core;
455 }
456
457 struct clk_hw *
458 clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
459 {
460 struct clk_core *parent;
461
462 parent = clk_core_get_parent_by_index(hw->core, index);
463
464 return !parent ? NULL : parent->hw;
465 }
466 EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
467
468 unsigned int __clk_get_enable_count(struct clk *clk)
469 {
470 return !clk ? 0 : clk->core->enable_count;
471 }
472
473 static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
474 {
475 if (!core)
476 return 0;
477
478 if (!core->num_parents || core->parent)
479 return core->rate;
480
481 /*
482 * Clk must have a parent because num_parents > 0 but the parent isn't
483 * known yet. Best to return 0 as the rate of this clk until we can
484 * properly recalc the rate based on the parent's rate.
485 */
486 return 0;
487 }
488
489 unsigned long clk_hw_get_rate(const struct clk_hw *hw)
490 {
491 return clk_core_get_rate_nolock(hw->core);
492 }
493 EXPORT_SYMBOL_GPL(clk_hw_get_rate);
494
495 static unsigned long clk_core_get_accuracy_no_lock(struct clk_core *core)
496 {
497 if (!core)
498 return 0;
499
500 return core->accuracy;
501 }
502
503 unsigned long clk_hw_get_flags(const struct clk_hw *hw)
504 {
505 return hw->core->flags;
506 }
507 EXPORT_SYMBOL_GPL(clk_hw_get_flags);
508
509 bool clk_hw_is_prepared(const struct clk_hw *hw)
510 {
511 return clk_core_is_prepared(hw->core);
512 }
513 EXPORT_SYMBOL_GPL(clk_hw_is_prepared);
514
515 bool clk_hw_rate_is_protected(const struct clk_hw *hw)
516 {
517 return clk_core_rate_is_protected(hw->core);
518 }
519 EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected);
520
521 bool clk_hw_is_enabled(const struct clk_hw *hw)
522 {
523 return clk_core_is_enabled(hw->core);
524 }
525 EXPORT_SYMBOL_GPL(clk_hw_is_enabled);
526
527 bool __clk_is_enabled(struct clk *clk)
528 {
529 if (!clk)
530 return false;
531
532 return clk_core_is_enabled(clk->core);
533 }
534 EXPORT_SYMBOL_GPL(__clk_is_enabled);
535
536 static bool mux_is_better_rate(unsigned long rate, unsigned long now,
537 unsigned long best, unsigned long flags)
538 {
539 if (flags & CLK_MUX_ROUND_CLOSEST)
540 return abs(now - rate) < abs(best - rate);
541
542 return now <= rate && now > best;
543 }
544
545 int clk_mux_determine_rate_flags(struct clk_hw *hw,
546 struct clk_rate_request *req,
547 unsigned long flags)
548 {
549 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
550 int i, num_parents, ret;
551 unsigned long best = 0;
552 struct clk_rate_request parent_req = *req;
553
554 /* if NO_REPARENT flag set, pass through to current parent */
555 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
556 parent = core->parent;
557 if (core->flags & CLK_SET_RATE_PARENT) {
558 ret = __clk_determine_rate(parent ? parent->hw : NULL,
559 &parent_req);
560 if (ret)
561 return ret;
562
563 best = parent_req.rate;
564 } else if (parent) {
565 best = clk_core_get_rate_nolock(parent);
566 } else {
567 best = clk_core_get_rate_nolock(core);
568 }
569
570 goto out;
571 }
572
573 /* find the parent that can provide the fastest rate <= rate */
574 num_parents = core->num_parents;
575 for (i = 0; i < num_parents; i++) {
576 parent = clk_core_get_parent_by_index(core, i);
577 if (!parent)
578 continue;
579
580 if (core->flags & CLK_SET_RATE_PARENT) {
581 parent_req = *req;
582 ret = __clk_determine_rate(parent->hw, &parent_req);
583 if (ret)
584 continue;
585 } else {
586 parent_req.rate = clk_core_get_rate_nolock(parent);
587 }
588
589 if (mux_is_better_rate(req->rate, parent_req.rate,
590 best, flags)) {
591 best_parent = parent;
592 best = parent_req.rate;
593 }
594 }
595
596 if (!best_parent)
597 return -EINVAL;
598
599 out:
600 if (best_parent)
601 req->best_parent_hw = best_parent->hw;
602 req->best_parent_rate = best;
603 req->rate = best;
604
605 return 0;
606 }
607 EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags);
608
609 struct clk *__clk_lookup(const char *name)
610 {
611 struct clk_core *core = clk_core_lookup(name);
612
613 return !core ? NULL : core->hw->clk;
614 }
615
616 static void clk_core_get_boundaries(struct clk_core *core,
617 unsigned long *min_rate,
618 unsigned long *max_rate)
619 {
620 struct clk *clk_user;
621
622 lockdep_assert_held(&prepare_lock);
623
624 *min_rate = core->min_rate;
625 *max_rate = core->max_rate;
626
627 hlist_for_each_entry(clk_user, &core->clks, clks_node)
628 *min_rate = max(*min_rate, clk_user->min_rate);
629
630 hlist_for_each_entry(clk_user, &core->clks, clks_node)
631 *max_rate = min(*max_rate, clk_user->max_rate);
632 }
633
634 void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
635 unsigned long max_rate)
636 {
637 hw->core->min_rate = min_rate;
638 hw->core->max_rate = max_rate;
639 }
640 EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
641
642 /*
643 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
644 * @hw: mux type clk to determine rate on
645 * @req: rate request, also used to return preferred parent and frequencies
646 *
647 * Helper for finding best parent to provide a given frequency. This can be used
648 * directly as a determine_rate callback (e.g. for a mux), or from a more
649 * complex clock that may combine a mux with other operations.
650 *
651 * Returns: 0 on success, -EERROR value on error
652 */
653 int __clk_mux_determine_rate(struct clk_hw *hw,
654 struct clk_rate_request *req)
655 {
656 return clk_mux_determine_rate_flags(hw, req, 0);
657 }
658 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
659
660 int __clk_mux_determine_rate_closest(struct clk_hw *hw,
661 struct clk_rate_request *req)
662 {
663 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
664 }
665 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
666
667 /*** clk api ***/
668
669 static void clk_core_rate_unprotect(struct clk_core *core)
670 {
671 lockdep_assert_held(&prepare_lock);
672
673 if (!core)
674 return;
675
676 if (WARN(core->protect_count == 0,
677 "%s already unprotected\n", core->name))
678 return;
679
680 if (--core->protect_count > 0)
681 return;
682
683 clk_core_rate_unprotect(core->parent);
684 }
685
686 static int clk_core_rate_nuke_protect(struct clk_core *core)
687 {
688 int ret;
689
690 lockdep_assert_held(&prepare_lock);
691
692 if (!core)
693 return -EINVAL;
694
695 if (core->protect_count == 0)
696 return 0;
697
698 ret = core->protect_count;
699 core->protect_count = 1;
700 clk_core_rate_unprotect(core);
701
702 return ret;
703 }
704
705 /**
706 * clk_rate_exclusive_put - release exclusivity over clock rate control
707 * @clk: the clk over which the exclusivity is released
708 *
709 * clk_rate_exclusive_put() completes a critical section during which a clock
710 * consumer cannot tolerate any other consumer making any operation on the
711 * clock which could result in a rate change or rate glitch. Exclusive clocks
712 * cannot have their rate changed, either directly or indirectly due to changes
713 * further up the parent chain of clocks. As a result, clocks up parent chain
714 * also get under exclusive control of the calling consumer.
715 *
716 * If exlusivity is claimed more than once on clock, even by the same consumer,
717 * the rate effectively gets locked as exclusivity can't be preempted.
718 *
719 * Calls to clk_rate_exclusive_put() must be balanced with calls to
720 * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return
721 * error status.
722 */
723 void clk_rate_exclusive_put(struct clk *clk)
724 {
725 if (!clk)
726 return;
727
728 clk_prepare_lock();
729
730 /*
731 * if there is something wrong with this consumer protect count, stop
732 * here before messing with the provider
733 */
734 if (WARN_ON(clk->exclusive_count <= 0))
735 goto out;
736
737 clk_core_rate_unprotect(clk->core);
738 clk->exclusive_count--;
739 out:
740 clk_prepare_unlock();
741 }
742 EXPORT_SYMBOL_GPL(clk_rate_exclusive_put);
743
744 static void clk_core_rate_protect(struct clk_core *core)
745 {
746 lockdep_assert_held(&prepare_lock);
747
748 if (!core)
749 return;
750
751 if (core->protect_count == 0)
752 clk_core_rate_protect(core->parent);
753
754 core->protect_count++;
755 }
756
757 static void clk_core_rate_restore_protect(struct clk_core *core, int count)
758 {
759 lockdep_assert_held(&prepare_lock);
760
761 if (!core)
762 return;
763
764 if (count == 0)
765 return;
766
767 clk_core_rate_protect(core);
768 core->protect_count = count;
769 }
770
771 /**
772 * clk_rate_exclusive_get - get exclusivity over the clk rate control
773 * @clk: the clk over which the exclusity of rate control is requested
774 *
775 * clk_rate_exclusive_get() begins a critical section during which a clock
776 * consumer cannot tolerate any other consumer making any operation on the
777 * clock which could result in a rate change or rate glitch. Exclusive clocks
778 * cannot have their rate changed, either directly or indirectly due to changes
779 * further up the parent chain of clocks. As a result, clocks up parent chain
780 * also get under exclusive control of the calling consumer.
781 *
782 * If exlusivity is claimed more than once on clock, even by the same consumer,
783 * the rate effectively gets locked as exclusivity can't be preempted.
784 *
785 * Calls to clk_rate_exclusive_get() should be balanced with calls to
786 * clk_rate_exclusive_put(). Calls to this function may sleep.
787 * Returns 0 on success, -EERROR otherwise
788 */
789 int clk_rate_exclusive_get(struct clk *clk)
790 {
791 if (!clk)
792 return 0;
793
794 clk_prepare_lock();
795 clk_core_rate_protect(clk->core);
796 clk->exclusive_count++;
797 clk_prepare_unlock();
798
799 return 0;
800 }
801 EXPORT_SYMBOL_GPL(clk_rate_exclusive_get);
802
803 static void clk_core_unprepare(struct clk_core *core)
804 {
805 lockdep_assert_held(&prepare_lock);
806
807 if (!core)
808 return;
809
810 if (WARN(core->prepare_count == 0,
811 "%s already unprepared\n", core->name))
812 return;
813
814 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
815 "Unpreparing critical %s\n", core->name))
816 return;
817
818 if (core->flags & CLK_SET_RATE_GATE)
819 clk_core_rate_unprotect(core);
820
821 if (--core->prepare_count > 0)
822 return;
823
824 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
825
826 trace_clk_unprepare(core);
827
828 if (core->ops->unprepare)
829 core->ops->unprepare(core->hw);
830
831 clk_pm_runtime_put(core);
832
833 trace_clk_unprepare_complete(core);
834 clk_core_unprepare(core->parent);
835 }
836
837 static void clk_core_unprepare_lock(struct clk_core *core)
838 {
839 clk_prepare_lock();
840 clk_core_unprepare(core);
841 clk_prepare_unlock();
842 }
843
844 /**
845 * clk_unprepare - undo preparation of a clock source
846 * @clk: the clk being unprepared
847 *
848 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
849 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
850 * if the operation may sleep. One example is a clk which is accessed over
851 * I2c. In the complex case a clk gate operation may require a fast and a slow
852 * part. It is this reason that clk_unprepare and clk_disable are not mutually
853 * exclusive. In fact clk_disable must be called before clk_unprepare.
854 */
855 void clk_unprepare(struct clk *clk)
856 {
857 if (IS_ERR_OR_NULL(clk))
858 return;
859
860 clk_core_unprepare_lock(clk->core);
861 }
862 EXPORT_SYMBOL_GPL(clk_unprepare);
863
864 static int clk_core_prepare(struct clk_core *core)
865 {
866 int ret = 0;
867
868 lockdep_assert_held(&prepare_lock);
869
870 if (!core)
871 return 0;
872
873 if (core->prepare_count == 0) {
874 ret = clk_pm_runtime_get(core);
875 if (ret)
876 return ret;
877
878 ret = clk_core_prepare(core->parent);
879 if (ret)
880 goto runtime_put;
881
882 trace_clk_prepare(core);
883
884 if (core->ops->prepare)
885 ret = core->ops->prepare(core->hw);
886
887 trace_clk_prepare_complete(core);
888
889 if (ret)
890 goto unprepare;
891 }
892
893 core->prepare_count++;
894
895 /*
896 * CLK_SET_RATE_GATE is a special case of clock protection
897 * Instead of a consumer claiming exclusive rate control, it is
898 * actually the provider which prevents any consumer from making any
899 * operation which could result in a rate change or rate glitch while
900 * the clock is prepared.
901 */
902 if (core->flags & CLK_SET_RATE_GATE)
903 clk_core_rate_protect(core);
904
905 return 0;
906 unprepare:
907 clk_core_unprepare(core->parent);
908 runtime_put:
909 clk_pm_runtime_put(core);
910 return ret;
911 }
912
913 static int clk_core_prepare_lock(struct clk_core *core)
914 {
915 int ret;
916
917 clk_prepare_lock();
918 ret = clk_core_prepare(core);
919 clk_prepare_unlock();
920
921 return ret;
922 }
923
924 /**
925 * clk_prepare - prepare a clock source
926 * @clk: the clk being prepared
927 *
928 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
929 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
930 * operation may sleep. One example is a clk which is accessed over I2c. In
931 * the complex case a clk ungate operation may require a fast and a slow part.
932 * It is this reason that clk_prepare and clk_enable are not mutually
933 * exclusive. In fact clk_prepare must be called before clk_enable.
934 * Returns 0 on success, -EERROR otherwise.
935 */
936 int clk_prepare(struct clk *clk)
937 {
938 if (!clk)
939 return 0;
940
941 return clk_core_prepare_lock(clk->core);
942 }
943 EXPORT_SYMBOL_GPL(clk_prepare);
944
945 static void clk_core_disable(struct clk_core *core)
946 {
947 lockdep_assert_held(&enable_lock);
948
949 if (!core)
950 return;
951
952 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
953 return;
954
955 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
956 "Disabling critical %s\n", core->name))
957 return;
958
959 if (--core->enable_count > 0)
960 return;
961
962 trace_clk_disable_rcuidle(core);
963
964 if (core->ops->disable)
965 core->ops->disable(core->hw);
966
967 trace_clk_disable_complete_rcuidle(core);
968
969 clk_core_disable(core->parent);
970 }
971
972 static void clk_core_disable_lock(struct clk_core *core)
973 {
974 unsigned long flags;
975
976 flags = clk_enable_lock();
977 clk_core_disable(core);
978 clk_enable_unlock(flags);
979 }
980
981 /**
982 * clk_disable - gate a clock
983 * @clk: the clk being gated
984 *
985 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
986 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
987 * clk if the operation is fast and will never sleep. One example is a
988 * SoC-internal clk which is controlled via simple register writes. In the
989 * complex case a clk gate operation may require a fast and a slow part. It is
990 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
991 * In fact clk_disable must be called before clk_unprepare.
992 */
993 void clk_disable(struct clk *clk)
994 {
995 if (IS_ERR_OR_NULL(clk))
996 return;
997
998 clk_core_disable_lock(clk->core);
999 }
1000 EXPORT_SYMBOL_GPL(clk_disable);
1001
1002 static int clk_core_enable(struct clk_core *core)
1003 {
1004 int ret = 0;
1005
1006 lockdep_assert_held(&enable_lock);
1007
1008 if (!core)
1009 return 0;
1010
1011 if (WARN(core->prepare_count == 0,
1012 "Enabling unprepared %s\n", core->name))
1013 return -ESHUTDOWN;
1014
1015 if (core->enable_count == 0) {
1016 ret = clk_core_enable(core->parent);
1017
1018 if (ret)
1019 return ret;
1020
1021 trace_clk_enable_rcuidle(core);
1022
1023 if (core->ops->enable)
1024 ret = core->ops->enable(core->hw);
1025
1026 trace_clk_enable_complete_rcuidle(core);
1027
1028 if (ret) {
1029 clk_core_disable(core->parent);
1030 return ret;
1031 }
1032 }
1033
1034 core->enable_count++;
1035 return 0;
1036 }
1037
1038 static int clk_core_enable_lock(struct clk_core *core)
1039 {
1040 unsigned long flags;
1041 int ret;
1042
1043 flags = clk_enable_lock();
1044 ret = clk_core_enable(core);
1045 clk_enable_unlock(flags);
1046
1047 return ret;
1048 }
1049
1050 /**
1051 * clk_gate_restore_context - restore context for poweroff
1052 * @hw: the clk_hw pointer of clock whose state is to be restored
1053 *
1054 * The clock gate restore context function enables or disables
1055 * the gate clocks based on the enable_count. This is done in cases
1056 * where the clock context is lost and based on the enable_count
1057 * the clock either needs to be enabled/disabled. This
1058 * helps restore the state of gate clocks.
1059 */
1060 void clk_gate_restore_context(struct clk_hw *hw)
1061 {
1062 struct clk_core *core = hw->core;
1063
1064 if (core->enable_count)
1065 core->ops->enable(hw);
1066 else
1067 core->ops->disable(hw);
1068 }
1069 EXPORT_SYMBOL_GPL(clk_gate_restore_context);
1070
1071 static int clk_core_save_context(struct clk_core *core)
1072 {
1073 struct clk_core *child;
1074 int ret = 0;
1075
1076 hlist_for_each_entry(child, &core->children, child_node) {
1077 ret = clk_core_save_context(child);
1078 if (ret < 0)
1079 return ret;
1080 }
1081
1082 if (core->ops && core->ops->save_context)
1083 ret = core->ops->save_context(core->hw);
1084
1085 return ret;
1086 }
1087
1088 static void clk_core_restore_context(struct clk_core *core)
1089 {
1090 struct clk_core *child;
1091
1092 if (core->ops && core->ops->restore_context)
1093 core->ops->restore_context(core->hw);
1094
1095 hlist_for_each_entry(child, &core->children, child_node)
1096 clk_core_restore_context(child);
1097 }
1098
1099 /**
1100 * clk_save_context - save clock context for poweroff
1101 *
1102 * Saves the context of the clock register for powerstates in which the
1103 * contents of the registers will be lost. Occurs deep within the suspend
1104 * code. Returns 0 on success.
1105 */
1106 int clk_save_context(void)
1107 {
1108 struct clk_core *clk;
1109 int ret;
1110
1111 hlist_for_each_entry(clk, &clk_root_list, child_node) {
1112 ret = clk_core_save_context(clk);
1113 if (ret < 0)
1114 return ret;
1115 }
1116
1117 hlist_for_each_entry(clk, &clk_orphan_list, child_node) {
1118 ret = clk_core_save_context(clk);
1119 if (ret < 0)
1120 return ret;
1121 }
1122
1123 return 0;
1124 }
1125 EXPORT_SYMBOL_GPL(clk_save_context);
1126
1127 /**
1128 * clk_restore_context - restore clock context after poweroff
1129 *
1130 * Restore the saved clock context upon resume.
1131 *
1132 */
1133 void clk_restore_context(void)
1134 {
1135 struct clk_core *core;
1136
1137 hlist_for_each_entry(core, &clk_root_list, child_node)
1138 clk_core_restore_context(core);
1139
1140 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1141 clk_core_restore_context(core);
1142 }
1143 EXPORT_SYMBOL_GPL(clk_restore_context);
1144
1145 /**
1146 * clk_enable - ungate a clock
1147 * @clk: the clk being ungated
1148 *
1149 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
1150 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
1151 * if the operation will never sleep. One example is a SoC-internal clk which
1152 * is controlled via simple register writes. In the complex case a clk ungate
1153 * operation may require a fast and a slow part. It is this reason that
1154 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
1155 * must be called before clk_enable. Returns 0 on success, -EERROR
1156 * otherwise.
1157 */
1158 int clk_enable(struct clk *clk)
1159 {
1160 if (!clk)
1161 return 0;
1162
1163 return clk_core_enable_lock(clk->core);
1164 }
1165 EXPORT_SYMBOL_GPL(clk_enable);
1166
1167 static int clk_core_prepare_enable(struct clk_core *core)
1168 {
1169 int ret;
1170
1171 ret = clk_core_prepare_lock(core);
1172 if (ret)
1173 return ret;
1174
1175 ret = clk_core_enable_lock(core);
1176 if (ret)
1177 clk_core_unprepare_lock(core);
1178
1179 return ret;
1180 }
1181
1182 static void clk_core_disable_unprepare(struct clk_core *core)
1183 {
1184 clk_core_disable_lock(core);
1185 clk_core_unprepare_lock(core);
1186 }
1187
1188 static void __init clk_unprepare_unused_subtree(struct clk_core *core)
1189 {
1190 struct clk_core *child;
1191
1192 lockdep_assert_held(&prepare_lock);
1193
1194 hlist_for_each_entry(child, &core->children, child_node)
1195 clk_unprepare_unused_subtree(child);
1196
1197 if (core->prepare_count)
1198 return;
1199
1200 if (core->flags & CLK_IGNORE_UNUSED)
1201 return;
1202
1203 if (clk_pm_runtime_get(core))
1204 return;
1205
1206 if (clk_core_is_prepared(core)) {
1207 trace_clk_unprepare(core);
1208 if (core->ops->unprepare_unused)
1209 core->ops->unprepare_unused(core->hw);
1210 else if (core->ops->unprepare)
1211 core->ops->unprepare(core->hw);
1212 trace_clk_unprepare_complete(core);
1213 }
1214
1215 clk_pm_runtime_put(core);
1216 }
1217
1218 static void __init clk_disable_unused_subtree(struct clk_core *core)
1219 {
1220 struct clk_core *child;
1221 unsigned long flags;
1222
1223 lockdep_assert_held(&prepare_lock);
1224
1225 hlist_for_each_entry(child, &core->children, child_node)
1226 clk_disable_unused_subtree(child);
1227
1228 if (core->flags & CLK_OPS_PARENT_ENABLE)
1229 clk_core_prepare_enable(core->parent);
1230
1231 if (clk_pm_runtime_get(core))
1232 goto unprepare_out;
1233
1234 flags = clk_enable_lock();
1235
1236 if (core->enable_count)
1237 goto unlock_out;
1238
1239 if (core->flags & CLK_IGNORE_UNUSED)
1240 goto unlock_out;
1241
1242 /*
1243 * some gate clocks have special needs during the disable-unused
1244 * sequence. call .disable_unused if available, otherwise fall
1245 * back to .disable
1246 */
1247 if (clk_core_is_enabled(core)) {
1248 trace_clk_disable(core);
1249 if (core->ops->disable_unused)
1250 core->ops->disable_unused(core->hw);
1251 else if (core->ops->disable)
1252 core->ops->disable(core->hw);
1253 trace_clk_disable_complete(core);
1254 }
1255
1256 unlock_out:
1257 clk_enable_unlock(flags);
1258 clk_pm_runtime_put(core);
1259 unprepare_out:
1260 if (core->flags & CLK_OPS_PARENT_ENABLE)
1261 clk_core_disable_unprepare(core->parent);
1262 }
1263
1264 static bool clk_ignore_unused __initdata;
1265 static int __init clk_ignore_unused_setup(char *__unused)
1266 {
1267 clk_ignore_unused = true;
1268 return 1;
1269 }
1270 __setup("clk_ignore_unused", clk_ignore_unused_setup);
1271
1272 static int __init clk_disable_unused(void)
1273 {
1274 struct clk_core *core;
1275
1276 if (clk_ignore_unused) {
1277 pr_warn("clk: Not disabling unused clocks\n");
1278 return 0;
1279 }
1280
1281 clk_prepare_lock();
1282
1283 hlist_for_each_entry(core, &clk_root_list, child_node)
1284 clk_disable_unused_subtree(core);
1285
1286 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1287 clk_disable_unused_subtree(core);
1288
1289 hlist_for_each_entry(core, &clk_root_list, child_node)
1290 clk_unprepare_unused_subtree(core);
1291
1292 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1293 clk_unprepare_unused_subtree(core);
1294
1295 clk_prepare_unlock();
1296
1297 return 0;
1298 }
1299 late_initcall_sync(clk_disable_unused);
1300
1301 static int clk_core_determine_round_nolock(struct clk_core *core,
1302 struct clk_rate_request *req)
1303 {
1304 long rate;
1305
1306 lockdep_assert_held(&prepare_lock);
1307
1308 if (!core)
1309 return 0;
1310
1311 /*
1312 * At this point, core protection will be disabled if
1313 * - if the provider is not protected at all
1314 * - if the calling consumer is the only one which has exclusivity
1315 * over the provider
1316 */
1317 if (clk_core_rate_is_protected(core)) {
1318 req->rate = core->rate;
1319 } else if (core->ops->determine_rate) {
1320 return core->ops->determine_rate(core->hw, req);
1321 } else if (core->ops->round_rate) {
1322 rate = core->ops->round_rate(core->hw, req->rate,
1323 &req->best_parent_rate);
1324 if (rate < 0)
1325 return rate;
1326
1327 req->rate = rate;
1328 } else {
1329 return -EINVAL;
1330 }
1331
1332 return 0;
1333 }
1334
1335 static void clk_core_init_rate_req(struct clk_core * const core,
1336 struct clk_rate_request *req)
1337 {
1338 struct clk_core *parent;
1339
1340 if (WARN_ON(!core || !req))
1341 return;
1342
1343 parent = core->parent;
1344 if (parent) {
1345 req->best_parent_hw = parent->hw;
1346 req->best_parent_rate = parent->rate;
1347 } else {
1348 req->best_parent_hw = NULL;
1349 req->best_parent_rate = 0;
1350 }
1351 }
1352
1353 static bool clk_core_can_round(struct clk_core * const core)
1354 {
1355 return core->ops->determine_rate || core->ops->round_rate;
1356 }
1357
1358 static int clk_core_round_rate_nolock(struct clk_core *core,
1359 struct clk_rate_request *req)
1360 {
1361 lockdep_assert_held(&prepare_lock);
1362
1363 if (!core) {
1364 req->rate = 0;
1365 return 0;
1366 }
1367
1368 clk_core_init_rate_req(core, req);
1369
1370 if (clk_core_can_round(core))
1371 return clk_core_determine_round_nolock(core, req);
1372 else if (core->flags & CLK_SET_RATE_PARENT)
1373 return clk_core_round_rate_nolock(core->parent, req);
1374
1375 req->rate = core->rate;
1376 return 0;
1377 }
1378
1379 /**
1380 * __clk_determine_rate - get the closest rate actually supported by a clock
1381 * @hw: determine the rate of this clock
1382 * @req: target rate request
1383 *
1384 * Useful for clk_ops such as .set_rate and .determine_rate.
1385 */
1386 int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
1387 {
1388 if (!hw) {
1389 req->rate = 0;
1390 return 0;
1391 }
1392
1393 return clk_core_round_rate_nolock(hw->core, req);
1394 }
1395 EXPORT_SYMBOL_GPL(__clk_determine_rate);
1396
1397 /**
1398 * clk_hw_round_rate() - round the given rate for a hw clk
1399 * @hw: the hw clk for which we are rounding a rate
1400 * @rate: the rate which is to be rounded
1401 *
1402 * Takes in a rate as input and rounds it to a rate that the clk can actually
1403 * use.
1404 *
1405 * Context: prepare_lock must be held.
1406 * For clk providers to call from within clk_ops such as .round_rate,
1407 * .determine_rate.
1408 *
1409 * Return: returns rounded rate of hw clk if clk supports round_rate operation
1410 * else returns the parent rate.
1411 */
1412 unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
1413 {
1414 int ret;
1415 struct clk_rate_request req;
1416
1417 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
1418 req.rate = rate;
1419
1420 ret = clk_core_round_rate_nolock(hw->core, &req);
1421 if (ret)
1422 return 0;
1423
1424 return req.rate;
1425 }
1426 EXPORT_SYMBOL_GPL(clk_hw_round_rate);
1427
1428 /**
1429 * clk_round_rate - round the given rate for a clk
1430 * @clk: the clk for which we are rounding a rate
1431 * @rate: the rate which is to be rounded
1432 *
1433 * Takes in a rate as input and rounds it to a rate that the clk can actually
1434 * use which is then returned. If clk doesn't support round_rate operation
1435 * then the parent rate is returned.
1436 */
1437 long clk_round_rate(struct clk *clk, unsigned long rate)
1438 {
1439 struct clk_rate_request req;
1440 int ret;
1441
1442 if (!clk)
1443 return 0;
1444
1445 clk_prepare_lock();
1446
1447 if (clk->exclusive_count)
1448 clk_core_rate_unprotect(clk->core);
1449
1450 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
1451 req.rate = rate;
1452
1453 ret = clk_core_round_rate_nolock(clk->core, &req);
1454
1455 if (clk->exclusive_count)
1456 clk_core_rate_protect(clk->core);
1457
1458 clk_prepare_unlock();
1459
1460 if (ret)
1461 return ret;
1462
1463 return req.rate;
1464 }
1465 EXPORT_SYMBOL_GPL(clk_round_rate);
1466
1467 /**
1468 * __clk_notify - call clk notifier chain
1469 * @core: clk that is changing rate
1470 * @msg: clk notifier type (see include/linux/clk.h)
1471 * @old_rate: old clk rate
1472 * @new_rate: new clk rate
1473 *
1474 * Triggers a notifier call chain on the clk rate-change notification
1475 * for 'clk'. Passes a pointer to the struct clk and the previous
1476 * and current rates to the notifier callback. Intended to be called by
1477 * internal clock code only. Returns NOTIFY_DONE from the last driver
1478 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1479 * a driver returns that.
1480 */
1481 static int __clk_notify(struct clk_core *core, unsigned long msg,
1482 unsigned long old_rate, unsigned long new_rate)
1483 {
1484 struct clk_notifier *cn;
1485 struct clk_notifier_data cnd;
1486 int ret = NOTIFY_DONE;
1487
1488 cnd.old_rate = old_rate;
1489 cnd.new_rate = new_rate;
1490
1491 list_for_each_entry(cn, &clk_notifier_list, node) {
1492 if (cn->clk->core == core) {
1493 cnd.clk = cn->clk;
1494 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1495 &cnd);
1496 if (ret & NOTIFY_STOP_MASK)
1497 return ret;
1498 }
1499 }
1500
1501 return ret;
1502 }
1503
1504 /**
1505 * __clk_recalc_accuracies
1506 * @core: first clk in the subtree
1507 *
1508 * Walks the subtree of clks starting with clk and recalculates accuracies as
1509 * it goes. Note that if a clk does not implement the .recalc_accuracy
1510 * callback then it is assumed that the clock will take on the accuracy of its
1511 * parent.
1512 */
1513 static void __clk_recalc_accuracies(struct clk_core *core)
1514 {
1515 unsigned long parent_accuracy = 0;
1516 struct clk_core *child;
1517
1518 lockdep_assert_held(&prepare_lock);
1519
1520 if (core->parent)
1521 parent_accuracy = core->parent->accuracy;
1522
1523 if (core->ops->recalc_accuracy)
1524 core->accuracy = core->ops->recalc_accuracy(core->hw,
1525 parent_accuracy);
1526 else
1527 core->accuracy = parent_accuracy;
1528
1529 hlist_for_each_entry(child, &core->children, child_node)
1530 __clk_recalc_accuracies(child);
1531 }
1532
1533 static long clk_core_get_accuracy_recalc(struct clk_core *core)
1534 {
1535 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1536 __clk_recalc_accuracies(core);
1537
1538 return clk_core_get_accuracy_no_lock(core);
1539 }
1540
1541 /**
1542 * clk_get_accuracy - return the accuracy of clk
1543 * @clk: the clk whose accuracy is being returned
1544 *
1545 * Simply returns the cached accuracy of the clk, unless
1546 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1547 * issued.
1548 * If clk is NULL then returns 0.
1549 */
1550 long clk_get_accuracy(struct clk *clk)
1551 {
1552 long accuracy;
1553
1554 if (!clk)
1555 return 0;
1556
1557 clk_prepare_lock();
1558 accuracy = clk_core_get_accuracy_recalc(clk->core);
1559 clk_prepare_unlock();
1560
1561 return accuracy;
1562 }
1563 EXPORT_SYMBOL_GPL(clk_get_accuracy);
1564
1565 static unsigned long clk_recalc(struct clk_core *core,
1566 unsigned long parent_rate)
1567 {
1568 unsigned long rate = parent_rate;
1569
1570 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1571 rate = core->ops->recalc_rate(core->hw, parent_rate);
1572 clk_pm_runtime_put(core);
1573 }
1574 return rate;
1575 }
1576
1577 /**
1578 * __clk_recalc_rates
1579 * @core: first clk in the subtree
1580 * @msg: notification type (see include/linux/clk.h)
1581 *
1582 * Walks the subtree of clks starting with clk and recalculates rates as it
1583 * goes. Note that if a clk does not implement the .recalc_rate callback then
1584 * it is assumed that the clock will take on the rate of its parent.
1585 *
1586 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1587 * if necessary.
1588 */
1589 static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
1590 {
1591 unsigned long old_rate;
1592 unsigned long parent_rate = 0;
1593 struct clk_core *child;
1594
1595 lockdep_assert_held(&prepare_lock);
1596
1597 old_rate = core->rate;
1598
1599 if (core->parent)
1600 parent_rate = core->parent->rate;
1601
1602 core->rate = clk_recalc(core, parent_rate);
1603
1604 /*
1605 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1606 * & ABORT_RATE_CHANGE notifiers
1607 */
1608 if (core->notifier_count && msg)
1609 __clk_notify(core, msg, old_rate, core->rate);
1610
1611 hlist_for_each_entry(child, &core->children, child_node)
1612 __clk_recalc_rates(child, msg);
1613 }
1614
1615 static unsigned long clk_core_get_rate_recalc(struct clk_core *core)
1616 {
1617 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1618 __clk_recalc_rates(core, 0);
1619
1620 return clk_core_get_rate_nolock(core);
1621 }
1622
1623 /**
1624 * clk_get_rate - return the rate of clk
1625 * @clk: the clk whose rate is being returned
1626 *
1627 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1628 * is set, which means a recalc_rate will be issued.
1629 * If clk is NULL then returns 0.
1630 */
1631 unsigned long clk_get_rate(struct clk *clk)
1632 {
1633 unsigned long rate;
1634
1635 if (!clk)
1636 return 0;
1637
1638 clk_prepare_lock();
1639 rate = clk_core_get_rate_recalc(clk->core);
1640 clk_prepare_unlock();
1641
1642 return rate;
1643 }
1644 EXPORT_SYMBOL_GPL(clk_get_rate);
1645
1646 static int clk_fetch_parent_index(struct clk_core *core,
1647 struct clk_core *parent)
1648 {
1649 int i;
1650
1651 if (!parent)
1652 return -EINVAL;
1653
1654 for (i = 0; i < core->num_parents; i++) {
1655 /* Found it first try! */
1656 if (core->parents[i].core == parent)
1657 return i;
1658
1659 /* Something else is here, so keep looking */
1660 if (core->parents[i].core)
1661 continue;
1662
1663 /* Maybe core hasn't been cached but the hw is all we know? */
1664 if (core->parents[i].hw) {
1665 if (core->parents[i].hw == parent->hw)
1666 break;
1667
1668 /* Didn't match, but we're expecting a clk_hw */
1669 continue;
1670 }
1671
1672 /* Maybe it hasn't been cached (clk_set_parent() path) */
1673 if (parent == clk_core_get(core, i))
1674 break;
1675
1676 /* Fallback to comparing globally unique names */
1677 if (core->parents[i].name &&
1678 !strcmp(parent->name, core->parents[i].name))
1679 break;
1680 }
1681
1682 if (i == core->num_parents)
1683 return -EINVAL;
1684
1685 core->parents[i].core = parent;
1686 return i;
1687 }
1688
1689 /**
1690 * clk_hw_get_parent_index - return the index of the parent clock
1691 * @hw: clk_hw associated with the clk being consumed
1692 *
1693 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
1694 * clock does not have a current parent.
1695 */
1696 int clk_hw_get_parent_index(struct clk_hw *hw)
1697 {
1698 struct clk_hw *parent = clk_hw_get_parent(hw);
1699
1700 if (WARN_ON(parent == NULL))
1701 return -EINVAL;
1702
1703 return clk_fetch_parent_index(hw->core, parent->core);
1704 }
1705 EXPORT_SYMBOL_GPL(clk_hw_get_parent_index);
1706
1707 /*
1708 * Update the orphan status of @core and all its children.
1709 */
1710 static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1711 {
1712 struct clk_core *child;
1713
1714 core->orphan = is_orphan;
1715
1716 hlist_for_each_entry(child, &core->children, child_node)
1717 clk_core_update_orphan_status(child, is_orphan);
1718 }
1719
1720 static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
1721 {
1722 bool was_orphan = core->orphan;
1723
1724 hlist_del(&core->child_node);
1725
1726 if (new_parent) {
1727 bool becomes_orphan = new_parent->orphan;
1728
1729 /* avoid duplicate POST_RATE_CHANGE notifications */
1730 if (new_parent->new_child == core)
1731 new_parent->new_child = NULL;
1732
1733 hlist_add_head(&core->child_node, &new_parent->children);
1734
1735 if (was_orphan != becomes_orphan)
1736 clk_core_update_orphan_status(core, becomes_orphan);
1737 } else {
1738 hlist_add_head(&core->child_node, &clk_orphan_list);
1739 if (!was_orphan)
1740 clk_core_update_orphan_status(core, true);
1741 }
1742
1743 core->parent = new_parent;
1744 }
1745
1746 static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1747 struct clk_core *parent)
1748 {
1749 unsigned long flags;
1750 struct clk_core *old_parent = core->parent;
1751
1752 /*
1753 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock
1754 *
1755 * 2. Migrate prepare state between parents and prevent race with
1756 * clk_enable().
1757 *
1758 * If the clock is not prepared, then a race with
1759 * clk_enable/disable() is impossible since we already have the
1760 * prepare lock (future calls to clk_enable() need to be preceded by
1761 * a clk_prepare()).
1762 *
1763 * If the clock is prepared, migrate the prepared state to the new
1764 * parent and also protect against a race with clk_enable() by
1765 * forcing the clock and the new parent on. This ensures that all
1766 * future calls to clk_enable() are practically NOPs with respect to
1767 * hardware and software states.
1768 *
1769 * See also: Comment for clk_set_parent() below.
1770 */
1771
1772 /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
1773 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1774 clk_core_prepare_enable(old_parent);
1775 clk_core_prepare_enable(parent);
1776 }
1777
1778 /* migrate prepare count if > 0 */
1779 if (core->prepare_count) {
1780 clk_core_prepare_enable(parent);
1781 clk_core_enable_lock(core);
1782 }
1783
1784 /* update the clk tree topology */
1785 flags = clk_enable_lock();
1786 clk_reparent(core, parent);
1787 clk_enable_unlock(flags);
1788
1789 return old_parent;
1790 }
1791
1792 static void __clk_set_parent_after(struct clk_core *core,
1793 struct clk_core *parent,
1794 struct clk_core *old_parent)
1795 {
1796 /*
1797 * Finish the migration of prepare state and undo the changes done
1798 * for preventing a race with clk_enable().
1799 */
1800 if (core->prepare_count) {
1801 clk_core_disable_lock(core);
1802 clk_core_disable_unprepare(old_parent);
1803 }
1804
1805 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1806 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1807 clk_core_disable_unprepare(parent);
1808 clk_core_disable_unprepare(old_parent);
1809 }
1810 }
1811
1812 static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1813 u8 p_index)
1814 {
1815 unsigned long flags;
1816 int ret = 0;
1817 struct clk_core *old_parent;
1818
1819 old_parent = __clk_set_parent_before(core, parent);
1820
1821 trace_clk_set_parent(core, parent);
1822
1823 /* change clock input source */
1824 if (parent && core->ops->set_parent)
1825 ret = core->ops->set_parent(core->hw, p_index);
1826
1827 trace_clk_set_parent_complete(core, parent);
1828
1829 if (ret) {
1830 flags = clk_enable_lock();
1831 clk_reparent(core, old_parent);
1832 clk_enable_unlock(flags);
1833 __clk_set_parent_after(core, old_parent, parent);
1834
1835 return ret;
1836 }
1837
1838 __clk_set_parent_after(core, parent, old_parent);
1839
1840 return 0;
1841 }
1842
1843 /**
1844 * __clk_speculate_rates
1845 * @core: first clk in the subtree
1846 * @parent_rate: the "future" rate of clk's parent
1847 *
1848 * Walks the subtree of clks starting with clk, speculating rates as it
1849 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1850 *
1851 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1852 * pre-rate change notifications and returns early if no clks in the
1853 * subtree have subscribed to the notifications. Note that if a clk does not
1854 * implement the .recalc_rate callback then it is assumed that the clock will
1855 * take on the rate of its parent.
1856 */
1857 static int __clk_speculate_rates(struct clk_core *core,
1858 unsigned long parent_rate)
1859 {
1860 struct clk_core *child;
1861 unsigned long new_rate;
1862 int ret = NOTIFY_DONE;
1863
1864 lockdep_assert_held(&prepare_lock);
1865
1866 new_rate = clk_recalc(core, parent_rate);
1867
1868 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1869 if (core->notifier_count)
1870 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1871
1872 if (ret & NOTIFY_STOP_MASK) {
1873 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1874 __func__, core->name, ret);
1875 goto out;
1876 }
1877
1878 hlist_for_each_entry(child, &core->children, child_node) {
1879 ret = __clk_speculate_rates(child, new_rate);
1880 if (ret & NOTIFY_STOP_MASK)
1881 break;
1882 }
1883
1884 out:
1885 return ret;
1886 }
1887
1888 static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1889 struct clk_core *new_parent, u8 p_index)
1890 {
1891 struct clk_core *child;
1892
1893 core->new_rate = new_rate;
1894 core->new_parent = new_parent;
1895 core->new_parent_index = p_index;
1896 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1897 core->new_child = NULL;
1898 if (new_parent && new_parent != core->parent)
1899 new_parent->new_child = core;
1900
1901 hlist_for_each_entry(child, &core->children, child_node) {
1902 child->new_rate = clk_recalc(child, new_rate);
1903 clk_calc_subtree(child, child->new_rate, NULL, 0);
1904 }
1905 }
1906
1907 /*
1908 * calculate the new rates returning the topmost clock that has to be
1909 * changed.
1910 */
1911 static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1912 unsigned long rate)
1913 {
1914 struct clk_core *top = core;
1915 struct clk_core *old_parent, *parent;
1916 unsigned long best_parent_rate = 0;
1917 unsigned long new_rate;
1918 unsigned long min_rate;
1919 unsigned long max_rate;
1920 int p_index = 0;
1921 long ret;
1922
1923 /* sanity */
1924 if (IS_ERR_OR_NULL(core))
1925 return NULL;
1926
1927 /* save parent rate, if it exists */
1928 parent = old_parent = core->parent;
1929 if (parent)
1930 best_parent_rate = parent->rate;
1931
1932 clk_core_get_boundaries(core, &min_rate, &max_rate);
1933
1934 /* find the closest rate and parent clk/rate */
1935 if (clk_core_can_round(core)) {
1936 struct clk_rate_request req;
1937
1938 req.rate = rate;
1939 req.min_rate = min_rate;
1940 req.max_rate = max_rate;
1941
1942 clk_core_init_rate_req(core, &req);
1943
1944 ret = clk_core_determine_round_nolock(core, &req);
1945 if (ret < 0)
1946 return NULL;
1947
1948 best_parent_rate = req.best_parent_rate;
1949 new_rate = req.rate;
1950 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
1951
1952 if (new_rate < min_rate || new_rate > max_rate)
1953 return NULL;
1954 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1955 /* pass-through clock without adjustable parent */
1956 core->new_rate = core->rate;
1957 return NULL;
1958 } else {
1959 /* pass-through clock with adjustable parent */
1960 top = clk_calc_new_rates(parent, rate);
1961 new_rate = parent->new_rate;
1962 goto out;
1963 }
1964
1965 /* some clocks must be gated to change parent */
1966 if (parent != old_parent &&
1967 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1968 pr_debug("%s: %s not gated but wants to reparent\n",
1969 __func__, core->name);
1970 return NULL;
1971 }
1972
1973 /* try finding the new parent index */
1974 if (parent && core->num_parents > 1) {
1975 p_index = clk_fetch_parent_index(core, parent);
1976 if (p_index < 0) {
1977 pr_debug("%s: clk %s can not be parent of clk %s\n",
1978 __func__, parent->name, core->name);
1979 return NULL;
1980 }
1981 }
1982
1983 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1984 best_parent_rate != parent->rate)
1985 top = clk_calc_new_rates(parent, best_parent_rate);
1986
1987 out:
1988 clk_calc_subtree(core, new_rate, parent, p_index);
1989
1990 return top;
1991 }
1992
1993 /*
1994 * Notify about rate changes in a subtree. Always walk down the whole tree
1995 * so that in case of an error we can walk down the whole tree again and
1996 * abort the change.
1997 */
1998 static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1999 unsigned long event)
2000 {
2001 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
2002 int ret = NOTIFY_DONE;
2003
2004 if (core->rate == core->new_rate)
2005 return NULL;
2006
2007 if (core->notifier_count) {
2008 ret = __clk_notify(core, event, core->rate, core->new_rate);
2009 if (ret & NOTIFY_STOP_MASK)
2010 fail_clk = core;
2011 }
2012
2013 hlist_for_each_entry(child, &core->children, child_node) {
2014 /* Skip children who will be reparented to another clock */
2015 if (child->new_parent && child->new_parent != core)
2016 continue;
2017 tmp_clk = clk_propagate_rate_change(child, event);
2018 if (tmp_clk)
2019 fail_clk = tmp_clk;
2020 }
2021
2022 /* handle the new child who might not be in core->children yet */
2023 if (core->new_child) {
2024 tmp_clk = clk_propagate_rate_change(core->new_child, event);
2025 if (tmp_clk)
2026 fail_clk = tmp_clk;
2027 }
2028
2029 return fail_clk;
2030 }
2031
2032 /*
2033 * walk down a subtree and set the new rates notifying the rate
2034 * change on the way
2035 */
2036 static void clk_change_rate(struct clk_core *core)
2037 {
2038 struct clk_core *child;
2039 struct hlist_node *tmp;
2040 unsigned long old_rate;
2041 unsigned long best_parent_rate = 0;
2042 bool skip_set_rate = false;
2043 struct clk_core *old_parent;
2044 struct clk_core *parent = NULL;
2045
2046 old_rate = core->rate;
2047
2048 if (core->new_parent) {
2049 parent = core->new_parent;
2050 best_parent_rate = core->new_parent->rate;
2051 } else if (core->parent) {
2052 parent = core->parent;
2053 best_parent_rate = core->parent->rate;
2054 }
2055
2056 if (clk_pm_runtime_get(core))
2057 return;
2058
2059 if (core->flags & CLK_SET_RATE_UNGATE) {
2060 unsigned long flags;
2061
2062 clk_core_prepare(core);
2063 flags = clk_enable_lock();
2064 clk_core_enable(core);
2065 clk_enable_unlock(flags);
2066 }
2067
2068 if (core->new_parent && core->new_parent != core->parent) {
2069 old_parent = __clk_set_parent_before(core, core->new_parent);
2070 trace_clk_set_parent(core, core->new_parent);
2071
2072 if (core->ops->set_rate_and_parent) {
2073 skip_set_rate = true;
2074 core->ops->set_rate_and_parent(core->hw, core->new_rate,
2075 best_parent_rate,
2076 core->new_parent_index);
2077 } else if (core->ops->set_parent) {
2078 core->ops->set_parent(core->hw, core->new_parent_index);
2079 }
2080
2081 trace_clk_set_parent_complete(core, core->new_parent);
2082 __clk_set_parent_after(core, core->new_parent, old_parent);
2083 }
2084
2085 if (core->flags & CLK_OPS_PARENT_ENABLE)
2086 clk_core_prepare_enable(parent);
2087
2088 trace_clk_set_rate(core, core->new_rate);
2089
2090 if (!skip_set_rate && core->ops->set_rate)
2091 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
2092
2093 trace_clk_set_rate_complete(core, core->new_rate);
2094
2095 core->rate = clk_recalc(core, best_parent_rate);
2096
2097 if (core->flags & CLK_SET_RATE_UNGATE) {
2098 unsigned long flags;
2099
2100 flags = clk_enable_lock();
2101 clk_core_disable(core);
2102 clk_enable_unlock(flags);
2103 clk_core_unprepare(core);
2104 }
2105
2106 if (core->flags & CLK_OPS_PARENT_ENABLE)
2107 clk_core_disable_unprepare(parent);
2108
2109 if (core->notifier_count && old_rate != core->rate)
2110 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
2111
2112 if (core->flags & CLK_RECALC_NEW_RATES)
2113 (void)clk_calc_new_rates(core, core->new_rate);
2114
2115 /*
2116 * Use safe iteration, as change_rate can actually swap parents
2117 * for certain clock types.
2118 */
2119 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2120 /* Skip children who will be reparented to another clock */
2121 if (child->new_parent && child->new_parent != core)
2122 continue;
2123 clk_change_rate(child);
2124 }
2125
2126 /* handle the new child who might not be in core->children yet */
2127 if (core->new_child)
2128 clk_change_rate(core->new_child);
2129
2130 clk_pm_runtime_put(core);
2131 }
2132
2133 static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core,
2134 unsigned long req_rate)
2135 {
2136 int ret, cnt;
2137 struct clk_rate_request req;
2138
2139 lockdep_assert_held(&prepare_lock);
2140
2141 if (!core)
2142 return 0;
2143
2144 /* simulate what the rate would be if it could be freely set */
2145 cnt = clk_core_rate_nuke_protect(core);
2146 if (cnt < 0)
2147 return cnt;
2148
2149 clk_core_get_boundaries(core, &req.min_rate, &req.max_rate);
2150 req.rate = req_rate;
2151
2152 ret = clk_core_round_rate_nolock(core, &req);
2153
2154 /* restore the protection */
2155 clk_core_rate_restore_protect(core, cnt);
2156
2157 return ret ? 0 : req.rate;
2158 }
2159
2160 static int clk_core_set_rate_nolock(struct clk_core *core,
2161 unsigned long req_rate)
2162 {
2163 struct clk_core *top, *fail_clk;
2164 unsigned long rate;
2165 int ret = 0;
2166
2167 if (!core)
2168 return 0;
2169
2170 rate = clk_core_req_round_rate_nolock(core, req_rate);
2171
2172 /* bail early if nothing to do */
2173 if (rate == clk_core_get_rate_nolock(core))
2174 return 0;
2175
2176 /* fail on a direct rate set of a protected provider */
2177 if (clk_core_rate_is_protected(core))
2178 return -EBUSY;
2179
2180 /* calculate new rates and get the topmost changed clock */
2181 top = clk_calc_new_rates(core, req_rate);
2182 if (!top)
2183 return -EINVAL;
2184
2185 ret = clk_pm_runtime_get(core);
2186 if (ret)
2187 return ret;
2188
2189 /* notify that we are about to change rates */
2190 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
2191 if (fail_clk) {
2192 pr_debug("%s: failed to set %s rate\n", __func__,
2193 fail_clk->name);
2194 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
2195 ret = -EBUSY;
2196 goto err;
2197 }
2198
2199 /* change the rates */
2200 clk_change_rate(top);
2201
2202 core->req_rate = req_rate;
2203 err:
2204 clk_pm_runtime_put(core);
2205
2206 return ret;
2207 }
2208
2209 /**
2210 * clk_set_rate - specify a new rate for clk
2211 * @clk: the clk whose rate is being changed
2212 * @rate: the new rate for clk
2213 *
2214 * In the simplest case clk_set_rate will only adjust the rate of clk.
2215 *
2216 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
2217 * propagate up to clk's parent; whether or not this happens depends on the
2218 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
2219 * after calling .round_rate then upstream parent propagation is ignored. If
2220 * *parent_rate comes back with a new rate for clk's parent then we propagate
2221 * up to clk's parent and set its rate. Upward propagation will continue
2222 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
2223 * .round_rate stops requesting changes to clk's parent_rate.
2224 *
2225 * Rate changes are accomplished via tree traversal that also recalculates the
2226 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2227 *
2228 * Returns 0 on success, -EERROR otherwise.
2229 */
2230 int clk_set_rate(struct clk *clk, unsigned long rate)
2231 {
2232 int ret;
2233
2234 if (!clk)
2235 return 0;
2236
2237 /* prevent racing with updates to the clock topology */
2238 clk_prepare_lock();
2239
2240 if (clk->exclusive_count)
2241 clk_core_rate_unprotect(clk->core);
2242
2243 ret = clk_core_set_rate_nolock(clk->core, rate);
2244
2245 if (clk->exclusive_count)
2246 clk_core_rate_protect(clk->core);
2247
2248 clk_prepare_unlock();
2249
2250 return ret;
2251 }
2252 EXPORT_SYMBOL_GPL(clk_set_rate);
2253
2254 /**
2255 * clk_set_rate_exclusive - specify a new rate and get exclusive control
2256 * @clk: the clk whose rate is being changed
2257 * @rate: the new rate for clk
2258 *
2259 * This is a combination of clk_set_rate() and clk_rate_exclusive_get()
2260 * within a critical section
2261 *
2262 * This can be used initially to ensure that at least 1 consumer is
2263 * satisfied when several consumers are competing for exclusivity over the
2264 * same clock provider.
2265 *
2266 * The exclusivity is not applied if setting the rate failed.
2267 *
2268 * Calls to clk_rate_exclusive_get() should be balanced with calls to
2269 * clk_rate_exclusive_put().
2270 *
2271 * Returns 0 on success, -EERROR otherwise.
2272 */
2273 int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
2274 {
2275 int ret;
2276
2277 if (!clk)
2278 return 0;
2279
2280 /* prevent racing with updates to the clock topology */
2281 clk_prepare_lock();
2282
2283 /*
2284 * The temporary protection removal is not here, on purpose
2285 * This function is meant to be used instead of clk_rate_protect,
2286 * so before the consumer code path protect the clock provider
2287 */
2288
2289 ret = clk_core_set_rate_nolock(clk->core, rate);
2290 if (!ret) {
2291 clk_core_rate_protect(clk->core);
2292 clk->exclusive_count++;
2293 }
2294
2295 clk_prepare_unlock();
2296
2297 return ret;
2298 }
2299 EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
2300
2301 /**
2302 * clk_set_rate_range - set a rate range for a clock source
2303 * @clk: clock source
2304 * @min: desired minimum clock rate in Hz, inclusive
2305 * @max: desired maximum clock rate in Hz, inclusive
2306 *
2307 * Returns success (0) or negative errno.
2308 */
2309 int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
2310 {
2311 int ret = 0;
2312 unsigned long old_min, old_max, rate;
2313
2314 if (!clk)
2315 return 0;
2316
2317 if (min > max) {
2318 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
2319 __func__, clk->core->name, clk->dev_id, clk->con_id,
2320 min, max);
2321 return -EINVAL;
2322 }
2323
2324 clk_prepare_lock();
2325
2326 if (clk->exclusive_count)
2327 clk_core_rate_unprotect(clk->core);
2328
2329 /* Save the current values in case we need to rollback the change */
2330 old_min = clk->min_rate;
2331 old_max = clk->max_rate;
2332 clk->min_rate = min;
2333 clk->max_rate = max;
2334
2335 rate = clk_core_get_rate_nolock(clk->core);
2336 if (rate < min || rate > max) {
2337 /*
2338 * FIXME:
2339 * We are in bit of trouble here, current rate is outside the
2340 * the requested range. We are going try to request appropriate
2341 * range boundary but there is a catch. It may fail for the
2342 * usual reason (clock broken, clock protected, etc) but also
2343 * because:
2344 * - round_rate() was not favorable and fell on the wrong
2345 * side of the boundary
2346 * - the determine_rate() callback does not really check for
2347 * this corner case when determining the rate
2348 */
2349
2350 if (rate < min)
2351 rate = min;
2352 else
2353 rate = max;
2354
2355 ret = clk_core_set_rate_nolock(clk->core, rate);
2356 if (ret) {
2357 /* rollback the changes */
2358 clk->min_rate = old_min;
2359 clk->max_rate = old_max;
2360 }
2361 }
2362
2363 if (clk->exclusive_count)
2364 clk_core_rate_protect(clk->core);
2365
2366 clk_prepare_unlock();
2367
2368 return ret;
2369 }
2370 EXPORT_SYMBOL_GPL(clk_set_rate_range);
2371
2372 /**
2373 * clk_set_min_rate - set a minimum clock rate for a clock source
2374 * @clk: clock source
2375 * @rate: desired minimum clock rate in Hz, inclusive
2376 *
2377 * Returns success (0) or negative errno.
2378 */
2379 int clk_set_min_rate(struct clk *clk, unsigned long rate)
2380 {
2381 if (!clk)
2382 return 0;
2383
2384 return clk_set_rate_range(clk, rate, clk->max_rate);
2385 }
2386 EXPORT_SYMBOL_GPL(clk_set_min_rate);
2387
2388 /**
2389 * clk_set_max_rate - set a maximum clock rate for a clock source
2390 * @clk: clock source
2391 * @rate: desired maximum clock rate in Hz, inclusive
2392 *
2393 * Returns success (0) or negative errno.
2394 */
2395 int clk_set_max_rate(struct clk *clk, unsigned long rate)
2396 {
2397 if (!clk)
2398 return 0;
2399
2400 return clk_set_rate_range(clk, clk->min_rate, rate);
2401 }
2402 EXPORT_SYMBOL_GPL(clk_set_max_rate);
2403
2404 /**
2405 * clk_get_parent - return the parent of a clk
2406 * @clk: the clk whose parent gets returned
2407 *
2408 * Simply returns clk->parent. Returns NULL if clk is NULL.
2409 */
2410 struct clk *clk_get_parent(struct clk *clk)
2411 {
2412 struct clk *parent;
2413
2414 if (!clk)
2415 return NULL;
2416
2417 clk_prepare_lock();
2418 /* TODO: Create a per-user clk and change callers to call clk_put */
2419 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2420 clk_prepare_unlock();
2421
2422 return parent;
2423 }
2424 EXPORT_SYMBOL_GPL(clk_get_parent);
2425
2426 static struct clk_core *__clk_init_parent(struct clk_core *core)
2427 {
2428 u8 index = 0;
2429
2430 if (core->num_parents > 1 && core->ops->get_parent)
2431 index = core->ops->get_parent(core->hw);
2432
2433 return clk_core_get_parent_by_index(core, index);
2434 }
2435
2436 static void clk_core_reparent(struct clk_core *core,
2437 struct clk_core *new_parent)
2438 {
2439 clk_reparent(core, new_parent);
2440 __clk_recalc_accuracies(core);
2441 __clk_recalc_rates(core, POST_RATE_CHANGE);
2442 }
2443
2444 void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
2445 {
2446 if (!hw)
2447 return;
2448
2449 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2450 }
2451
2452 /**
2453 * clk_has_parent - check if a clock is a possible parent for another
2454 * @clk: clock source
2455 * @parent: parent clock source
2456 *
2457 * This function can be used in drivers that need to check that a clock can be
2458 * the parent of another without actually changing the parent.
2459 *
2460 * Returns true if @parent is a possible parent for @clk, false otherwise.
2461 */
2462 bool clk_has_parent(struct clk *clk, struct clk *parent)
2463 {
2464 struct clk_core *core, *parent_core;
2465 int i;
2466
2467 /* NULL clocks should be nops, so return success if either is NULL. */
2468 if (!clk || !parent)
2469 return true;
2470
2471 core = clk->core;
2472 parent_core = parent->core;
2473
2474 /* Optimize for the case where the parent is already the parent. */
2475 if (core->parent == parent_core)
2476 return true;
2477
2478 for (i = 0; i < core->num_parents; i++)
2479 if (!strcmp(core->parents[i].name, parent_core->name))
2480 return true;
2481
2482 return false;
2483 }
2484 EXPORT_SYMBOL_GPL(clk_has_parent);
2485
2486 static int clk_core_set_parent_nolock(struct clk_core *core,
2487 struct clk_core *parent)
2488 {
2489 int ret = 0;
2490 int p_index = 0;
2491 unsigned long p_rate = 0;
2492
2493 lockdep_assert_held(&prepare_lock);
2494
2495 if (!core)
2496 return 0;
2497
2498 if (core->parent == parent)
2499 return 0;
2500
2501 /* verify ops for multi-parent clks */
2502 if (core->num_parents > 1 && !core->ops->set_parent)
2503 return -EPERM;
2504
2505 /* check that we are allowed to re-parent if the clock is in use */
2506 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2507 return -EBUSY;
2508
2509 if (clk_core_rate_is_protected(core))
2510 return -EBUSY;
2511
2512 /* try finding the new parent index */
2513 if (parent) {
2514 p_index = clk_fetch_parent_index(core, parent);
2515 if (p_index < 0) {
2516 pr_debug("%s: clk %s can not be parent of clk %s\n",
2517 __func__, parent->name, core->name);
2518 return p_index;
2519 }
2520 p_rate = parent->rate;
2521 }
2522
2523 ret = clk_pm_runtime_get(core);
2524 if (ret)
2525 return ret;
2526
2527 /* propagate PRE_RATE_CHANGE notifications */
2528 ret = __clk_speculate_rates(core, p_rate);
2529
2530 /* abort if a driver objects */
2531 if (ret & NOTIFY_STOP_MASK)
2532 goto runtime_put;
2533
2534 /* do the re-parent */
2535 ret = __clk_set_parent(core, parent, p_index);
2536
2537 /* propagate rate an accuracy recalculation accordingly */
2538 if (ret) {
2539 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
2540 } else {
2541 __clk_recalc_rates(core, POST_RATE_CHANGE);
2542 __clk_recalc_accuracies(core);
2543 }
2544
2545 runtime_put:
2546 clk_pm_runtime_put(core);
2547
2548 return ret;
2549 }
2550
2551 int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent)
2552 {
2553 return clk_core_set_parent_nolock(hw->core, parent->core);
2554 }
2555 EXPORT_SYMBOL_GPL(clk_hw_set_parent);
2556
2557 /**
2558 * clk_set_parent - switch the parent of a mux clk
2559 * @clk: the mux clk whose input we are switching
2560 * @parent: the new input to clk
2561 *
2562 * Re-parent clk to use parent as its new input source. If clk is in
2563 * prepared state, the clk will get enabled for the duration of this call. If
2564 * that's not acceptable for a specific clk (Eg: the consumer can't handle
2565 * that, the reparenting is glitchy in hardware, etc), use the
2566 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
2567 *
2568 * After successfully changing clk's parent clk_set_parent will update the
2569 * clk topology, sysfs topology and propagate rate recalculation via
2570 * __clk_recalc_rates.
2571 *
2572 * Returns 0 on success, -EERROR otherwise.
2573 */
2574 int clk_set_parent(struct clk *clk, struct clk *parent)
2575 {
2576 int ret;
2577
2578 if (!clk)
2579 return 0;
2580
2581 clk_prepare_lock();
2582
2583 if (clk->exclusive_count)
2584 clk_core_rate_unprotect(clk->core);
2585
2586 ret = clk_core_set_parent_nolock(clk->core,
2587 parent ? parent->core : NULL);
2588
2589 if (clk->exclusive_count)
2590 clk_core_rate_protect(clk->core);
2591
2592 clk_prepare_unlock();
2593
2594 return ret;
2595 }
2596 EXPORT_SYMBOL_GPL(clk_set_parent);
2597
2598 static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
2599 {
2600 int ret = -EINVAL;
2601
2602 lockdep_assert_held(&prepare_lock);
2603
2604 if (!core)
2605 return 0;
2606
2607 if (clk_core_rate_is_protected(core))
2608 return -EBUSY;
2609
2610 trace_clk_set_phase(core, degrees);
2611
2612 if (core->ops->set_phase) {
2613 ret = core->ops->set_phase(core->hw, degrees);
2614 if (!ret)
2615 core->phase = degrees;
2616 }
2617
2618 trace_clk_set_phase_complete(core, degrees);
2619
2620 return ret;
2621 }
2622
2623 /**
2624 * clk_set_phase - adjust the phase shift of a clock signal
2625 * @clk: clock signal source
2626 * @degrees: number of degrees the signal is shifted
2627 *
2628 * Shifts the phase of a clock signal by the specified
2629 * degrees. Returns 0 on success, -EERROR otherwise.
2630 *
2631 * This function makes no distinction about the input or reference
2632 * signal that we adjust the clock signal phase against. For example
2633 * phase locked-loop clock signal generators we may shift phase with
2634 * respect to feedback clock signal input, but for other cases the
2635 * clock phase may be shifted with respect to some other, unspecified
2636 * signal.
2637 *
2638 * Additionally the concept of phase shift does not propagate through
2639 * the clock tree hierarchy, which sets it apart from clock rates and
2640 * clock accuracy. A parent clock phase attribute does not have an
2641 * impact on the phase attribute of a child clock.
2642 */
2643 int clk_set_phase(struct clk *clk, int degrees)
2644 {
2645 int ret;
2646
2647 if (!clk)
2648 return 0;
2649
2650 /* sanity check degrees */
2651 degrees %= 360;
2652 if (degrees < 0)
2653 degrees += 360;
2654
2655 clk_prepare_lock();
2656
2657 if (clk->exclusive_count)
2658 clk_core_rate_unprotect(clk->core);
2659
2660 ret = clk_core_set_phase_nolock(clk->core, degrees);
2661
2662 if (clk->exclusive_count)
2663 clk_core_rate_protect(clk->core);
2664
2665 clk_prepare_unlock();
2666
2667 return ret;
2668 }
2669 EXPORT_SYMBOL_GPL(clk_set_phase);
2670
2671 static int clk_core_get_phase(struct clk_core *core)
2672 {
2673 int ret;
2674
2675 lockdep_assert_held(&prepare_lock);
2676 if (!core->ops->get_phase)
2677 return 0;
2678
2679 /* Always try to update cached phase if possible */
2680 ret = core->ops->get_phase(core->hw);
2681 if (ret >= 0)
2682 core->phase = ret;
2683
2684 return ret;
2685 }
2686
2687 /**
2688 * clk_get_phase - return the phase shift of a clock signal
2689 * @clk: clock signal source
2690 *
2691 * Returns the phase shift of a clock node in degrees, otherwise returns
2692 * -EERROR.
2693 */
2694 int clk_get_phase(struct clk *clk)
2695 {
2696 int ret;
2697
2698 if (!clk)
2699 return 0;
2700
2701 clk_prepare_lock();
2702 ret = clk_core_get_phase(clk->core);
2703 clk_prepare_unlock();
2704
2705 return ret;
2706 }
2707 EXPORT_SYMBOL_GPL(clk_get_phase);
2708
2709 static void clk_core_reset_duty_cycle_nolock(struct clk_core *core)
2710 {
2711 /* Assume a default value of 50% */
2712 core->duty.num = 1;
2713 core->duty.den = 2;
2714 }
2715
2716 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core);
2717
2718 static int clk_core_update_duty_cycle_nolock(struct clk_core *core)
2719 {
2720 struct clk_duty *duty = &core->duty;
2721 int ret = 0;
2722
2723 if (!core->ops->get_duty_cycle)
2724 return clk_core_update_duty_cycle_parent_nolock(core);
2725
2726 ret = core->ops->get_duty_cycle(core->hw, duty);
2727 if (ret)
2728 goto reset;
2729
2730 /* Don't trust the clock provider too much */
2731 if (duty->den == 0 || duty->num > duty->den) {
2732 ret = -EINVAL;
2733 goto reset;
2734 }
2735
2736 return 0;
2737
2738 reset:
2739 clk_core_reset_duty_cycle_nolock(core);
2740 return ret;
2741 }
2742
2743 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core)
2744 {
2745 int ret = 0;
2746
2747 if (core->parent &&
2748 core->flags & CLK_DUTY_CYCLE_PARENT) {
2749 ret = clk_core_update_duty_cycle_nolock(core->parent);
2750 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2751 } else {
2752 clk_core_reset_duty_cycle_nolock(core);
2753 }
2754
2755 return ret;
2756 }
2757
2758 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2759 struct clk_duty *duty);
2760
2761 static int clk_core_set_duty_cycle_nolock(struct clk_core *core,
2762 struct clk_duty *duty)
2763 {
2764 int ret;
2765
2766 lockdep_assert_held(&prepare_lock);
2767
2768 if (clk_core_rate_is_protected(core))
2769 return -EBUSY;
2770
2771 trace_clk_set_duty_cycle(core, duty);
2772
2773 if (!core->ops->set_duty_cycle)
2774 return clk_core_set_duty_cycle_parent_nolock(core, duty);
2775
2776 ret = core->ops->set_duty_cycle(core->hw, duty);
2777 if (!ret)
2778 memcpy(&core->duty, duty, sizeof(*duty));
2779
2780 trace_clk_set_duty_cycle_complete(core, duty);
2781
2782 return ret;
2783 }
2784
2785 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2786 struct clk_duty *duty)
2787 {
2788 int ret = 0;
2789
2790 if (core->parent &&
2791 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
2792 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
2793 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2794 }
2795
2796 return ret;
2797 }
2798
2799 /**
2800 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
2801 * @clk: clock signal source
2802 * @num: numerator of the duty cycle ratio to be applied
2803 * @den: denominator of the duty cycle ratio to be applied
2804 *
2805 * Apply the duty cycle ratio if the ratio is valid and the clock can
2806 * perform this operation
2807 *
2808 * Returns (0) on success, a negative errno otherwise.
2809 */
2810 int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)
2811 {
2812 int ret;
2813 struct clk_duty duty;
2814
2815 if (!clk)
2816 return 0;
2817
2818 /* sanity check the ratio */
2819 if (den == 0 || num > den)
2820 return -EINVAL;
2821
2822 duty.num = num;
2823 duty.den = den;
2824
2825 clk_prepare_lock();
2826
2827 if (clk->exclusive_count)
2828 clk_core_rate_unprotect(clk->core);
2829
2830 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
2831
2832 if (clk->exclusive_count)
2833 clk_core_rate_protect(clk->core);
2834
2835 clk_prepare_unlock();
2836
2837 return ret;
2838 }
2839 EXPORT_SYMBOL_GPL(clk_set_duty_cycle);
2840
2841 static int clk_core_get_scaled_duty_cycle(struct clk_core *core,
2842 unsigned int scale)
2843 {
2844 struct clk_duty *duty = &core->duty;
2845 int ret;
2846
2847 clk_prepare_lock();
2848
2849 ret = clk_core_update_duty_cycle_nolock(core);
2850 if (!ret)
2851 ret = mult_frac(scale, duty->num, duty->den);
2852
2853 clk_prepare_unlock();
2854
2855 return ret;
2856 }
2857
2858 /**
2859 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
2860 * @clk: clock signal source
2861 * @scale: scaling factor to be applied to represent the ratio as an integer
2862 *
2863 * Returns the duty cycle ratio of a clock node multiplied by the provided
2864 * scaling factor, or negative errno on error.
2865 */
2866 int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)
2867 {
2868 if (!clk)
2869 return 0;
2870
2871 return clk_core_get_scaled_duty_cycle(clk->core, scale);
2872 }
2873 EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle);
2874
2875 /**
2876 * clk_is_match - check if two clk's point to the same hardware clock
2877 * @p: clk compared against q
2878 * @q: clk compared against p
2879 *
2880 * Returns true if the two struct clk pointers both point to the same hardware
2881 * clock node. Put differently, returns true if struct clk *p and struct clk *q
2882 * share the same struct clk_core object.
2883 *
2884 * Returns false otherwise. Note that two NULL clks are treated as matching.
2885 */
2886 bool clk_is_match(const struct clk *p, const struct clk *q)
2887 {
2888 /* trivial case: identical struct clk's or both NULL */
2889 if (p == q)
2890 return true;
2891
2892 /* true if clk->core pointers match. Avoid dereferencing garbage */
2893 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
2894 if (p->core == q->core)
2895 return true;
2896
2897 return false;
2898 }
2899 EXPORT_SYMBOL_GPL(clk_is_match);
2900
2901 /*** debugfs support ***/
2902
2903 #ifdef CONFIG_DEBUG_FS
2904 #include <linux/debugfs.h>
2905
2906 static struct dentry *rootdir;
2907 static int inited = 0;
2908 static DEFINE_MUTEX(clk_debug_lock);
2909 static HLIST_HEAD(clk_debug_list);
2910
2911 static struct hlist_head *orphan_list[] = {
2912 &clk_orphan_list,
2913 NULL,
2914 };
2915
2916 static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
2917 int level)
2918 {
2919 int phase;
2920
2921 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ",
2922 level * 3 + 1, "",
2923 30 - level * 3, c->name,
2924 c->enable_count, c->prepare_count, c->protect_count,
2925 clk_core_get_rate_recalc(c),
2926 clk_core_get_accuracy_recalc(c));
2927
2928 phase = clk_core_get_phase(c);
2929 if (phase >= 0)
2930 seq_printf(s, "%5d", phase);
2931 else
2932 seq_puts(s, "-----");
2933
2934 seq_printf(s, " %6d", clk_core_get_scaled_duty_cycle(c, 100000));
2935
2936 if (c->ops->is_enabled)
2937 seq_printf(s, " %9c\n", clk_core_is_enabled(c) ? 'Y' : 'N');
2938 else if (!c->ops->enable)
2939 seq_printf(s, " %9c\n", 'Y');
2940 else
2941 seq_printf(s, " %9c\n", '?');
2942 }
2943
2944 static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
2945 int level)
2946 {
2947 struct clk_core *child;
2948
2949 clk_summary_show_one(s, c, level);
2950
2951 hlist_for_each_entry(child, &c->children, child_node)
2952 clk_summary_show_subtree(s, child, level + 1);
2953 }
2954
2955 static int clk_summary_show(struct seq_file *s, void *data)
2956 {
2957 struct clk_core *c;
2958 struct hlist_head **lists = (struct hlist_head **)s->private;
2959
2960 seq_puts(s, " enable prepare protect duty hardware\n");
2961 seq_puts(s, " clock count count count rate accuracy phase cycle enable\n");
2962 seq_puts(s, "-------------------------------------------------------------------------------------------------------\n");
2963
2964 clk_prepare_lock();
2965
2966 for (; *lists; lists++)
2967 hlist_for_each_entry(c, *lists, child_node)
2968 clk_summary_show_subtree(s, c, 0);
2969
2970 clk_prepare_unlock();
2971
2972 return 0;
2973 }
2974 DEFINE_SHOW_ATTRIBUTE(clk_summary);
2975
2976 static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2977 {
2978 int phase;
2979 unsigned long min_rate, max_rate;
2980
2981 clk_core_get_boundaries(c, &min_rate, &max_rate);
2982
2983 /* This should be JSON format, i.e. elements separated with a comma */
2984 seq_printf(s, "\"%s\": { ", c->name);
2985 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2986 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
2987 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
2988 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate_recalc(c));
2989 seq_printf(s, "\"min_rate\": %lu,", min_rate);
2990 seq_printf(s, "\"max_rate\": %lu,", max_rate);
2991 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy_recalc(c));
2992 phase = clk_core_get_phase(c);
2993 if (phase >= 0)
2994 seq_printf(s, "\"phase\": %d,", phase);
2995 seq_printf(s, "\"duty_cycle\": %u",
2996 clk_core_get_scaled_duty_cycle(c, 100000));
2997 }
2998
2999 static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
3000 {
3001 struct clk_core *child;
3002
3003 clk_dump_one(s, c, level);
3004
3005 hlist_for_each_entry(child, &c->children, child_node) {
3006 seq_putc(s, ',');
3007 clk_dump_subtree(s, child, level + 1);
3008 }
3009
3010 seq_putc(s, '}');
3011 }
3012
3013 static int clk_dump_show(struct seq_file *s, void *data)
3014 {
3015 struct clk_core *c;
3016 bool first_node = true;
3017 struct hlist_head **lists = (struct hlist_head **)s->private;
3018
3019 seq_putc(s, '{');
3020 clk_prepare_lock();
3021
3022 for (; *lists; lists++) {
3023 hlist_for_each_entry(c, *lists, child_node) {
3024 if (!first_node)
3025 seq_putc(s, ',');
3026 first_node = false;
3027 clk_dump_subtree(s, c, 0);
3028 }
3029 }
3030
3031 clk_prepare_unlock();
3032
3033 seq_puts(s, "}\n");
3034 return 0;
3035 }
3036 DEFINE_SHOW_ATTRIBUTE(clk_dump);
3037
3038 #undef CLOCK_ALLOW_WRITE_DEBUGFS
3039 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3040 /*
3041 * This can be dangerous, therefore don't provide any real compile time
3042 * configuration option for this feature.
3043 * People who want to use this will need to modify the source code directly.
3044 */
3045 static int clk_rate_set(void *data, u64 val)
3046 {
3047 struct clk_core *core = data;
3048 int ret;
3049
3050 clk_prepare_lock();
3051 ret = clk_core_set_rate_nolock(core, val);
3052 clk_prepare_unlock();
3053
3054 return ret;
3055 }
3056
3057 #define clk_rate_mode 0644
3058
3059 static int clk_prepare_enable_set(void *data, u64 val)
3060 {
3061 struct clk_core *core = data;
3062 int ret = 0;
3063
3064 if (val)
3065 ret = clk_prepare_enable(core->hw->clk);
3066 else
3067 clk_disable_unprepare(core->hw->clk);
3068
3069 return ret;
3070 }
3071
3072 static int clk_prepare_enable_get(void *data, u64 *val)
3073 {
3074 struct clk_core *core = data;
3075
3076 *val = core->enable_count && core->prepare_count;
3077 return 0;
3078 }
3079
3080 DEFINE_DEBUGFS_ATTRIBUTE(clk_prepare_enable_fops, clk_prepare_enable_get,
3081 clk_prepare_enable_set, "%llu\n");
3082
3083 #else
3084 #define clk_rate_set NULL
3085 #define clk_rate_mode 0444
3086 #endif
3087
3088 static int clk_rate_get(void *data, u64 *val)
3089 {
3090 struct clk_core *core = data;
3091
3092 *val = core->rate;
3093 return 0;
3094 }
3095
3096 DEFINE_DEBUGFS_ATTRIBUTE(clk_rate_fops, clk_rate_get, clk_rate_set, "%llu\n");
3097
3098 static const struct {
3099 unsigned long flag;
3100 const char *name;
3101 } clk_flags[] = {
3102 #define ENTRY(f) { f, #f }
3103 ENTRY(CLK_SET_RATE_GATE),
3104 ENTRY(CLK_SET_PARENT_GATE),
3105 ENTRY(CLK_SET_RATE_PARENT),
3106 ENTRY(CLK_IGNORE_UNUSED),
3107 ENTRY(CLK_GET_RATE_NOCACHE),
3108 ENTRY(CLK_SET_RATE_NO_REPARENT),
3109 ENTRY(CLK_GET_ACCURACY_NOCACHE),
3110 ENTRY(CLK_RECALC_NEW_RATES),
3111 ENTRY(CLK_SET_RATE_UNGATE),
3112 ENTRY(CLK_IS_CRITICAL),
3113 ENTRY(CLK_OPS_PARENT_ENABLE),
3114 ENTRY(CLK_DUTY_CYCLE_PARENT),
3115 #undef ENTRY
3116 };
3117
3118 static int clk_flags_show(struct seq_file *s, void *data)
3119 {
3120 struct clk_core *core = s->private;
3121 unsigned long flags = core->flags;
3122 unsigned int i;
3123
3124 for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) {
3125 if (flags & clk_flags[i].flag) {
3126 seq_printf(s, "%s\n", clk_flags[i].name);
3127 flags &= ~clk_flags[i].flag;
3128 }
3129 }
3130 if (flags) {
3131 /* Unknown flags */
3132 seq_printf(s, "0x%lx\n", flags);
3133 }
3134
3135 return 0;
3136 }
3137 DEFINE_SHOW_ATTRIBUTE(clk_flags);
3138
3139 static void possible_parent_show(struct seq_file *s, struct clk_core *core,
3140 unsigned int i, char terminator)
3141 {
3142 struct clk_core *parent;
3143
3144 /*
3145 * Go through the following options to fetch a parent's name.
3146 *
3147 * 1. Fetch the registered parent clock and use its name
3148 * 2. Use the global (fallback) name if specified
3149 * 3. Use the local fw_name if provided
3150 * 4. Fetch parent clock's clock-output-name if DT index was set
3151 *
3152 * This may still fail in some cases, such as when the parent is
3153 * specified directly via a struct clk_hw pointer, but it isn't
3154 * registered (yet).
3155 */
3156 parent = clk_core_get_parent_by_index(core, i);
3157 if (parent)
3158 seq_puts(s, parent->name);
3159 else if (core->parents[i].name)
3160 seq_puts(s, core->parents[i].name);
3161 else if (core->parents[i].fw_name)
3162 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3163 else if (core->parents[i].index >= 0)
3164 seq_puts(s,
3165 of_clk_get_parent_name(core->of_node,
3166 core->parents[i].index));
3167 else
3168 seq_puts(s, "(missing)");
3169
3170 seq_putc(s, terminator);
3171 }
3172
3173 static int possible_parents_show(struct seq_file *s, void *data)
3174 {
3175 struct clk_core *core = s->private;
3176 int i;
3177
3178 for (i = 0; i < core->num_parents - 1; i++)
3179 possible_parent_show(s, core, i, ' ');
3180
3181 possible_parent_show(s, core, i, '\n');
3182
3183 return 0;
3184 }
3185 DEFINE_SHOW_ATTRIBUTE(possible_parents);
3186
3187 static int current_parent_show(struct seq_file *s, void *data)
3188 {
3189 struct clk_core *core = s->private;
3190
3191 if (core->parent)
3192 seq_printf(s, "%s\n", core->parent->name);
3193
3194 return 0;
3195 }
3196 DEFINE_SHOW_ATTRIBUTE(current_parent);
3197
3198 static int clk_duty_cycle_show(struct seq_file *s, void *data)
3199 {
3200 struct clk_core *core = s->private;
3201 struct clk_duty *duty = &core->duty;
3202
3203 seq_printf(s, "%u/%u\n", duty->num, duty->den);
3204
3205 return 0;
3206 }
3207 DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
3208
3209 static int clk_min_rate_show(struct seq_file *s, void *data)
3210 {
3211 struct clk_core *core = s->private;
3212 unsigned long min_rate, max_rate;
3213
3214 clk_prepare_lock();
3215 clk_core_get_boundaries(core, &min_rate, &max_rate);
3216 clk_prepare_unlock();
3217 seq_printf(s, "%lu\n", min_rate);
3218
3219 return 0;
3220 }
3221 DEFINE_SHOW_ATTRIBUTE(clk_min_rate);
3222
3223 static int clk_max_rate_show(struct seq_file *s, void *data)
3224 {
3225 struct clk_core *core = s->private;
3226 unsigned long min_rate, max_rate;
3227
3228 clk_prepare_lock();
3229 clk_core_get_boundaries(core, &min_rate, &max_rate);
3230 clk_prepare_unlock();
3231 seq_printf(s, "%lu\n", max_rate);
3232
3233 return 0;
3234 }
3235 DEFINE_SHOW_ATTRIBUTE(clk_max_rate);
3236
3237 static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
3238 {
3239 struct dentry *root;
3240
3241 if (!core || !pdentry)
3242 return;
3243
3244 root = debugfs_create_dir(core->name, pdentry);
3245 core->dentry = root;
3246
3247 debugfs_create_file("clk_rate", clk_rate_mode, root, core,
3248 &clk_rate_fops);
3249 debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops);
3250 debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops);
3251 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3252 debugfs_create_u32("clk_phase", 0444, root, &core->phase);
3253 debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
3254 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3255 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3256 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3257 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
3258 debugfs_create_file("clk_duty_cycle", 0444, root, core,
3259 &clk_duty_cycle_fops);
3260 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3261 debugfs_create_file("clk_prepare_enable", 0644, root, core,
3262 &clk_prepare_enable_fops);
3263 #endif
3264
3265 if (core->num_parents > 0)
3266 debugfs_create_file("clk_parent", 0444, root, core,
3267 &current_parent_fops);
3268
3269 if (core->num_parents > 1)
3270 debugfs_create_file("clk_possible_parents", 0444, root, core,
3271 &possible_parents_fops);
3272
3273 if (core->ops->debug_init)
3274 core->ops->debug_init(core->hw, core->dentry);
3275 }
3276
3277 /**
3278 * clk_debug_register - add a clk node to the debugfs clk directory
3279 * @core: the clk being added to the debugfs clk directory
3280 *
3281 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
3282 * initialized. Otherwise it bails out early since the debugfs clk directory
3283 * will be created lazily by clk_debug_init as part of a late_initcall.
3284 */
3285 static void clk_debug_register(struct clk_core *core)
3286 {
3287 mutex_lock(&clk_debug_lock);
3288 hlist_add_head(&core->debug_node, &clk_debug_list);
3289 if (inited)
3290 clk_debug_create_one(core, rootdir);
3291 mutex_unlock(&clk_debug_lock);
3292 }
3293
3294 /**
3295 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3296 * @core: the clk being removed from the debugfs clk directory
3297 *
3298 * Dynamically removes a clk and all its child nodes from the
3299 * debugfs clk directory if clk->dentry points to debugfs created by
3300 * clk_debug_register in __clk_core_init.
3301 */
3302 static void clk_debug_unregister(struct clk_core *core)
3303 {
3304 mutex_lock(&clk_debug_lock);
3305 hlist_del_init(&core->debug_node);
3306 debugfs_remove_recursive(core->dentry);
3307 core->dentry = NULL;
3308 mutex_unlock(&clk_debug_lock);
3309 }
3310
3311 /**
3312 * clk_debug_init - lazily populate the debugfs clk directory
3313 *
3314 * clks are often initialized very early during boot before memory can be
3315 * dynamically allocated and well before debugfs is setup. This function
3316 * populates the debugfs clk directory once at boot-time when we know that
3317 * debugfs is setup. It should only be called once at boot-time, all other clks
3318 * added dynamically will be done so with clk_debug_register.
3319 */
3320 static int __init clk_debug_init(void)
3321 {
3322 struct clk_core *core;
3323
3324 rootdir = debugfs_create_dir("clk", NULL);
3325
3326 debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
3327 &clk_summary_fops);
3328 debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
3329 &clk_dump_fops);
3330 debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list,
3331 &clk_summary_fops);
3332 debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
3333 &clk_dump_fops);
3334
3335 mutex_lock(&clk_debug_lock);
3336 hlist_for_each_entry(core, &clk_debug_list, debug_node)
3337 clk_debug_create_one(core, rootdir);
3338
3339 inited = 1;
3340 mutex_unlock(&clk_debug_lock);
3341
3342 return 0;
3343 }
3344 late_initcall(clk_debug_init);
3345 #else
3346 static inline void clk_debug_register(struct clk_core *core) { }
3347 static inline void clk_debug_unregister(struct clk_core *core)
3348 {
3349 }
3350 #endif
3351
3352 static void clk_core_reparent_orphans_nolock(void)
3353 {
3354 struct clk_core *orphan;
3355 struct hlist_node *tmp2;
3356
3357 /*
3358 * walk the list of orphan clocks and reparent any that newly finds a
3359 * parent.
3360 */
3361 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
3362 struct clk_core *parent = __clk_init_parent(orphan);
3363
3364 /*
3365 * We need to use __clk_set_parent_before() and _after() to
3366 * to properly migrate any prepare/enable count of the orphan
3367 * clock. This is important for CLK_IS_CRITICAL clocks, which
3368 * are enabled during init but might not have a parent yet.
3369 */
3370 if (parent) {
3371 /* update the clk tree topology */
3372 __clk_set_parent_before(orphan, parent);
3373 __clk_set_parent_after(orphan, parent, NULL);
3374 __clk_recalc_accuracies(orphan);
3375 __clk_recalc_rates(orphan, 0);
3376 }
3377 }
3378 }
3379
3380 /**
3381 * __clk_core_init - initialize the data structures in a struct clk_core
3382 * @core: clk_core being initialized
3383 *
3384 * Initializes the lists in struct clk_core, queries the hardware for the
3385 * parent and rate and sets them both.
3386 */
3387 static int __clk_core_init(struct clk_core *core)
3388 {
3389 int ret;
3390 struct clk_core *parent;
3391 unsigned long rate;
3392 int phase;
3393
3394 if (!core)
3395 return -EINVAL;
3396
3397 clk_prepare_lock();
3398
3399 ret = clk_pm_runtime_get(core);
3400 if (ret)
3401 goto unlock;
3402
3403 /* check to see if a clock with this name is already registered */
3404 if (clk_core_lookup(core->name)) {
3405 pr_debug("%s: clk %s already initialized\n",
3406 __func__, core->name);
3407 ret = -EEXIST;
3408 goto out;
3409 }
3410
3411 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
3412 if (core->ops->set_rate &&
3413 !((core->ops->round_rate || core->ops->determine_rate) &&
3414 core->ops->recalc_rate)) {
3415 pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
3416 __func__, core->name);
3417 ret = -EINVAL;
3418 goto out;
3419 }
3420
3421 if (core->ops->set_parent && !core->ops->get_parent) {
3422 pr_err("%s: %s must implement .get_parent & .set_parent\n",
3423 __func__, core->name);
3424 ret = -EINVAL;
3425 goto out;
3426 }
3427
3428 if (core->num_parents > 1 && !core->ops->get_parent) {
3429 pr_err("%s: %s must implement .get_parent as it has multi parents\n",
3430 __func__, core->name);
3431 ret = -EINVAL;
3432 goto out;
3433 }
3434
3435 if (core->ops->set_rate_and_parent &&
3436 !(core->ops->set_parent && core->ops->set_rate)) {
3437 pr_err("%s: %s must implement .set_parent & .set_rate\n",
3438 __func__, core->name);
3439 ret = -EINVAL;
3440 goto out;
3441 }
3442
3443 /*
3444 * optional platform-specific magic
3445 *
3446 * The .init callback is not used by any of the basic clock types, but
3447 * exists for weird hardware that must perform initialization magic for
3448 * CCF to get an accurate view of clock for any other callbacks. It may
3449 * also be used needs to perform dynamic allocations. Such allocation
3450 * must be freed in the terminate() callback.
3451 * This callback shall not be used to initialize the parameters state,
3452 * such as rate, parent, etc ...
3453 *
3454 * If it exist, this callback should called before any other callback of
3455 * the clock
3456 */
3457 if (core->ops->init) {
3458 ret = core->ops->init(core->hw);
3459 if (ret)
3460 goto out;
3461 }
3462
3463 parent = core->parent = __clk_init_parent(core);
3464
3465 /*
3466 * Populate core->parent if parent has already been clk_core_init'd. If
3467 * parent has not yet been clk_core_init'd then place clk in the orphan
3468 * list. If clk doesn't have any parents then place it in the root
3469 * clk list.
3470 *
3471 * Every time a new clk is clk_init'd then we walk the list of orphan
3472 * clocks and re-parent any that are children of the clock currently
3473 * being clk_init'd.
3474 */
3475 if (parent) {
3476 hlist_add_head(&core->child_node, &parent->children);
3477 core->orphan = parent->orphan;
3478 } else if (!core->num_parents) {
3479 hlist_add_head(&core->child_node, &clk_root_list);
3480 core->orphan = false;
3481 } else {
3482 hlist_add_head(&core->child_node, &clk_orphan_list);
3483 core->orphan = true;
3484 }
3485
3486 /*
3487 * Set clk's accuracy. The preferred method is to use
3488 * .recalc_accuracy. For simple clocks and lazy developers the default
3489 * fallback is to use the parent's accuracy. If a clock doesn't have a
3490 * parent (or is orphaned) then accuracy is set to zero (perfect
3491 * clock).
3492 */
3493 if (core->ops->recalc_accuracy)
3494 core->accuracy = core->ops->recalc_accuracy(core->hw,
3495 clk_core_get_accuracy_no_lock(parent));
3496 else if (parent)
3497 core->accuracy = parent->accuracy;
3498 else
3499 core->accuracy = 0;
3500
3501 /*
3502 * Set clk's phase by clk_core_get_phase() caching the phase.
3503 * Since a phase is by definition relative to its parent, just
3504 * query the current clock phase, or just assume it's in phase.
3505 */
3506 phase = clk_core_get_phase(core);
3507 if (phase < 0) {
3508 ret = phase;
3509 pr_warn("%s: Failed to get phase for clk '%s'\n", __func__,
3510 core->name);
3511 goto out;
3512 }
3513
3514 /*
3515 * Set clk's duty cycle.
3516 */
3517 clk_core_update_duty_cycle_nolock(core);
3518
3519 /*
3520 * Set clk's rate. The preferred method is to use .recalc_rate. For
3521 * simple clocks and lazy developers the default fallback is to use the
3522 * parent's rate. If a clock doesn't have a parent (or is orphaned)
3523 * then rate is set to zero.
3524 */
3525 if (core->ops->recalc_rate)
3526 rate = core->ops->recalc_rate(core->hw,
3527 clk_core_get_rate_nolock(parent));
3528 else if (parent)
3529 rate = parent->rate;
3530 else
3531 rate = 0;
3532 core->rate = core->req_rate = rate;
3533
3534 /*
3535 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3536 * don't get accidentally disabled when walking the orphan tree and
3537 * reparenting clocks
3538 */
3539 if (core->flags & CLK_IS_CRITICAL) {
3540 unsigned long flags;
3541
3542 ret = clk_core_prepare(core);
3543 if (ret) {
3544 pr_warn("%s: critical clk '%s' failed to prepare\n",
3545 __func__, core->name);
3546 goto out;
3547 }
3548
3549 flags = clk_enable_lock();
3550 ret = clk_core_enable(core);
3551 clk_enable_unlock(flags);
3552 if (ret) {
3553 pr_warn("%s: critical clk '%s' failed to enable\n",
3554 __func__, core->name);
3555 clk_core_unprepare(core);
3556 goto out;
3557 }
3558 }
3559
3560 clk_core_reparent_orphans_nolock();
3561
3562
3563 kref_init(&core->ref);
3564 out:
3565 clk_pm_runtime_put(core);
3566 unlock:
3567 if (ret)
3568 hlist_del_init(&core->child_node);
3569
3570 clk_prepare_unlock();
3571
3572 if (!ret)
3573 clk_debug_register(core);
3574
3575 return ret;
3576 }
3577
3578 /**
3579 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3580 * @core: clk to add consumer to
3581 * @clk: consumer to link to a clk
3582 */
3583 static void clk_core_link_consumer(struct clk_core *core, struct clk *clk)
3584 {
3585 clk_prepare_lock();
3586 hlist_add_head(&clk->clks_node, &core->clks);
3587 clk_prepare_unlock();
3588 }
3589
3590 /**
3591 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3592 * @clk: consumer to unlink
3593 */
3594 static void clk_core_unlink_consumer(struct clk *clk)
3595 {
3596 lockdep_assert_held(&prepare_lock);
3597 hlist_del(&clk->clks_node);
3598 }
3599
3600 /**
3601 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
3602 * @core: clk to allocate a consumer for
3603 * @dev_id: string describing device name
3604 * @con_id: connection ID string on device
3605 *
3606 * Returns: clk consumer left unlinked from the consumer list
3607 */
3608 static struct clk *alloc_clk(struct clk_core *core, const char *dev_id,
3609 const char *con_id)
3610 {
3611 struct clk *clk;
3612
3613 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
3614 if (!clk)
3615 return ERR_PTR(-ENOMEM);
3616
3617 clk->core = core;
3618 clk->dev_id = dev_id;
3619 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
3620 clk->max_rate = ULONG_MAX;
3621
3622 return clk;
3623 }
3624
3625 /**
3626 * free_clk - Free a clk consumer
3627 * @clk: clk consumer to free
3628 *
3629 * Note, this assumes the clk has been unlinked from the clk_core consumer
3630 * list.
3631 */
3632 static void free_clk(struct clk *clk)
3633 {
3634 kfree_const(clk->con_id);
3635 kfree(clk);
3636 }
3637
3638 /**
3639 * clk_hw_create_clk: Allocate and link a clk consumer to a clk_core given
3640 * a clk_hw
3641 * @dev: clk consumer device
3642 * @hw: clk_hw associated with the clk being consumed
3643 * @dev_id: string describing device name
3644 * @con_id: connection ID string on device
3645 *
3646 * This is the main function used to create a clk pointer for use by clk
3647 * consumers. It connects a consumer to the clk_core and clk_hw structures
3648 * used by the framework and clk provider respectively.
3649 */
3650 struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,
3651 const char *dev_id, const char *con_id)
3652 {
3653 struct clk *clk;
3654 struct clk_core *core;
3655
3656 /* This is to allow this function to be chained to others */
3657 if (IS_ERR_OR_NULL(hw))
3658 return ERR_CAST(hw);
3659
3660 core = hw->core;
3661 clk = alloc_clk(core, dev_id, con_id);
3662 if (IS_ERR(clk))
3663 return clk;
3664 clk->dev = dev;
3665
3666 if (!try_module_get(core->owner)) {
3667 free_clk(clk);
3668 return ERR_PTR(-ENOENT);
3669 }
3670
3671 kref_get(&core->ref);
3672 clk_core_link_consumer(core, clk);
3673
3674 return clk;
3675 }
3676
3677 static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist)
3678 {
3679 const char *dst;
3680
3681 if (!src) {
3682 if (must_exist)
3683 return -EINVAL;
3684 return 0;
3685 }
3686
3687 *dst_p = dst = kstrdup_const(src, GFP_KERNEL);
3688 if (!dst)
3689 return -ENOMEM;
3690
3691 return 0;
3692 }
3693
3694 static int clk_core_populate_parent_map(struct clk_core *core,
3695 const struct clk_init_data *init)
3696 {
3697 u8 num_parents = init->num_parents;
3698 const char * const *parent_names = init->parent_names;
3699 const struct clk_hw **parent_hws = init->parent_hws;
3700 const struct clk_parent_data *parent_data = init->parent_data;
3701 int i, ret = 0;
3702 struct clk_parent_map *parents, *parent;
3703
3704 if (!num_parents)
3705 return 0;
3706
3707 /*
3708 * Avoid unnecessary string look-ups of clk_core's possible parents by
3709 * having a cache of names/clk_hw pointers to clk_core pointers.
3710 */
3711 parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL);
3712 core->parents = parents;
3713 if (!parents)
3714 return -ENOMEM;
3715
3716 /* Copy everything over because it might be __initdata */
3717 for (i = 0, parent = parents; i < num_parents; i++, parent++) {
3718 parent->index = -1;
3719 if (parent_names) {
3720 /* throw a WARN if any entries are NULL */
3721 WARN(!parent_names[i],
3722 "%s: invalid NULL in %s's .parent_names\n",
3723 __func__, core->name);
3724 ret = clk_cpy_name(&parent->name, parent_names[i],
3725 true);
3726 } else if (parent_data) {
3727 parent->hw = parent_data[i].hw;
3728 parent->index = parent_data[i].index;
3729 ret = clk_cpy_name(&parent->fw_name,
3730 parent_data[i].fw_name, false);
3731 if (!ret)
3732 ret = clk_cpy_name(&parent->name,
3733 parent_data[i].name,
3734 false);
3735 } else if (parent_hws) {
3736 parent->hw = parent_hws[i];
3737 } else {
3738 ret = -EINVAL;
3739 WARN(1, "Must specify parents if num_parents > 0\n");
3740 }
3741
3742 if (ret) {
3743 do {
3744 kfree_const(parents[i].name);
3745 kfree_const(parents[i].fw_name);
3746 } while (--i >= 0);
3747 kfree(parents);
3748
3749 return ret;
3750 }
3751 }
3752
3753 return 0;
3754 }
3755
3756 static void clk_core_free_parent_map(struct clk_core *core)
3757 {
3758 int i = core->num_parents;
3759
3760 if (!core->num_parents)
3761 return;
3762
3763 while (--i >= 0) {
3764 kfree_const(core->parents[i].name);
3765 kfree_const(core->parents[i].fw_name);
3766 }
3767
3768 kfree(core->parents);
3769 }
3770
3771 static struct clk *
3772 __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
3773 {
3774 int ret;
3775 struct clk_core *core;
3776 const struct clk_init_data *init = hw->init;
3777
3778 /*
3779 * The init data is not supposed to be used outside of registration path.
3780 * Set it to NULL so that provider drivers can't use it either and so that
3781 * we catch use of hw->init early on in the core.
3782 */
3783 hw->init = NULL;
3784
3785 core = kzalloc(sizeof(*core), GFP_KERNEL);
3786 if (!core) {
3787 ret = -ENOMEM;
3788 goto fail_out;
3789 }
3790
3791 core->name = kstrdup_const(init->name, GFP_KERNEL);
3792 if (!core->name) {
3793 ret = -ENOMEM;
3794 goto fail_name;
3795 }
3796
3797 if (WARN_ON(!init->ops)) {
3798 ret = -EINVAL;
3799 goto fail_ops;
3800 }
3801 core->ops = init->ops;
3802
3803 if (dev && pm_runtime_enabled(dev))
3804 core->rpm_enabled = true;
3805 core->dev = dev;
3806 core->of_node = np;
3807 if (dev && dev->driver)
3808 core->owner = dev->driver->owner;
3809 core->hw = hw;
3810 core->flags = init->flags;
3811 core->num_parents = init->num_parents;
3812 core->min_rate = 0;
3813 core->max_rate = ULONG_MAX;
3814 hw->core = core;
3815
3816 ret = clk_core_populate_parent_map(core, init);
3817 if (ret)
3818 goto fail_parents;
3819
3820 INIT_HLIST_HEAD(&core->clks);
3821
3822 /*
3823 * Don't call clk_hw_create_clk() here because that would pin the
3824 * provider module to itself and prevent it from ever being removed.
3825 */
3826 hw->clk = alloc_clk(core, NULL, NULL);
3827 if (IS_ERR(hw->clk)) {
3828 ret = PTR_ERR(hw->clk);
3829 goto fail_create_clk;
3830 }
3831
3832 clk_core_link_consumer(hw->core, hw->clk);
3833
3834 ret = __clk_core_init(core);
3835 if (!ret)
3836 return hw->clk;
3837
3838 clk_prepare_lock();
3839 clk_core_unlink_consumer(hw->clk);
3840 clk_prepare_unlock();
3841
3842 free_clk(hw->clk);
3843 hw->clk = NULL;
3844
3845 fail_create_clk:
3846 clk_core_free_parent_map(core);
3847 fail_parents:
3848 fail_ops:
3849 kfree_const(core->name);
3850 fail_name:
3851 kfree(core);
3852 fail_out:
3853 return ERR_PTR(ret);
3854 }
3855
3856 /**
3857 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
3858 * @dev: Device to get device node of
3859 *
3860 * Return: device node pointer of @dev, or the device node pointer of
3861 * @dev->parent if dev doesn't have a device node, or NULL if neither
3862 * @dev or @dev->parent have a device node.
3863 */
3864 static struct device_node *dev_or_parent_of_node(struct device *dev)
3865 {
3866 struct device_node *np;
3867
3868 if (!dev)
3869 return NULL;
3870
3871 np = dev_of_node(dev);
3872 if (!np)
3873 np = dev_of_node(dev->parent);
3874
3875 return np;
3876 }
3877
3878 /**
3879 * clk_register - allocate a new clock, register it and return an opaque cookie
3880 * @dev: device that is registering this clock
3881 * @hw: link to hardware-specific clock data
3882 *
3883 * clk_register is the *deprecated* interface for populating the clock tree with
3884 * new clock nodes. Use clk_hw_register() instead.
3885 *
3886 * Returns: a pointer to the newly allocated struct clk which
3887 * cannot be dereferenced by driver code but may be used in conjunction with the
3888 * rest of the clock API. In the event of an error clk_register will return an
3889 * error code; drivers must test for an error code after calling clk_register.
3890 */
3891 struct clk *clk_register(struct device *dev, struct clk_hw *hw)
3892 {
3893 return __clk_register(dev, dev_or_parent_of_node(dev), hw);
3894 }
3895 EXPORT_SYMBOL_GPL(clk_register);
3896
3897 /**
3898 * clk_hw_register - register a clk_hw and return an error code
3899 * @dev: device that is registering this clock
3900 * @hw: link to hardware-specific clock data
3901 *
3902 * clk_hw_register is the primary interface for populating the clock tree with
3903 * new clock nodes. It returns an integer equal to zero indicating success or
3904 * less than zero indicating failure. Drivers must test for an error code after
3905 * calling clk_hw_register().
3906 */
3907 int clk_hw_register(struct device *dev, struct clk_hw *hw)
3908 {
3909 return PTR_ERR_OR_ZERO(__clk_register(dev, dev_or_parent_of_node(dev),
3910 hw));
3911 }
3912 EXPORT_SYMBOL_GPL(clk_hw_register);
3913
3914 /*
3915 * of_clk_hw_register - register a clk_hw and return an error code
3916 * @node: device_node of device that is registering this clock
3917 * @hw: link to hardware-specific clock data
3918 *
3919 * of_clk_hw_register() is the primary interface for populating the clock tree
3920 * with new clock nodes when a struct device is not available, but a struct
3921 * device_node is. It returns an integer equal to zero indicating success or
3922 * less than zero indicating failure. Drivers must test for an error code after
3923 * calling of_clk_hw_register().
3924 */
3925 int of_clk_hw_register(struct device_node *node, struct clk_hw *hw)
3926 {
3927 return PTR_ERR_OR_ZERO(__clk_register(NULL, node, hw));
3928 }
3929 EXPORT_SYMBOL_GPL(of_clk_hw_register);
3930
3931 /* Free memory allocated for a clock. */
3932 static void __clk_release(struct kref *ref)
3933 {
3934 struct clk_core *core = container_of(ref, struct clk_core, ref);
3935
3936 lockdep_assert_held(&prepare_lock);
3937
3938 clk_core_free_parent_map(core);
3939 kfree_const(core->name);
3940 kfree(core);
3941 }
3942
3943 /*
3944 * Empty clk_ops for unregistered clocks. These are used temporarily
3945 * after clk_unregister() was called on a clock and until last clock
3946 * consumer calls clk_put() and the struct clk object is freed.
3947 */
3948 static int clk_nodrv_prepare_enable(struct clk_hw *hw)
3949 {
3950 return -ENXIO;
3951 }
3952
3953 static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
3954 {
3955 WARN_ON_ONCE(1);
3956 }
3957
3958 static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
3959 unsigned long parent_rate)
3960 {
3961 return -ENXIO;
3962 }
3963
3964 static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
3965 {
3966 return -ENXIO;
3967 }
3968
3969 static const struct clk_ops clk_nodrv_ops = {
3970 .enable = clk_nodrv_prepare_enable,
3971 .disable = clk_nodrv_disable_unprepare,
3972 .prepare = clk_nodrv_prepare_enable,
3973 .unprepare = clk_nodrv_disable_unprepare,
3974 .set_rate = clk_nodrv_set_rate,
3975 .set_parent = clk_nodrv_set_parent,
3976 };
3977
3978 static void clk_core_evict_parent_cache_subtree(struct clk_core *root,
3979 struct clk_core *target)
3980 {
3981 int i;
3982 struct clk_core *child;
3983
3984 for (i = 0; i < root->num_parents; i++)
3985 if (root->parents[i].core == target)
3986 root->parents[i].core = NULL;
3987
3988 hlist_for_each_entry(child, &root->children, child_node)
3989 clk_core_evict_parent_cache_subtree(child, target);
3990 }
3991
3992 /* Remove this clk from all parent caches */
3993 static void clk_core_evict_parent_cache(struct clk_core *core)
3994 {
3995 struct hlist_head **lists;
3996 struct clk_core *root;
3997
3998 lockdep_assert_held(&prepare_lock);
3999
4000 for (lists = all_lists; *lists; lists++)
4001 hlist_for_each_entry(root, *lists, child_node)
4002 clk_core_evict_parent_cache_subtree(root, core);
4003
4004 }
4005
4006 /**
4007 * clk_unregister - unregister a currently registered clock
4008 * @clk: clock to unregister
4009 */
4010 void clk_unregister(struct clk *clk)
4011 {
4012 unsigned long flags;
4013 const struct clk_ops *ops;
4014
4015 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
4016 return;
4017
4018 clk_debug_unregister(clk->core);
4019
4020 clk_prepare_lock();
4021
4022 ops = clk->core->ops;
4023 if (ops == &clk_nodrv_ops) {
4024 pr_err("%s: unregistered clock: %s\n", __func__,
4025 clk->core->name);
4026 goto unlock;
4027 }
4028 /*
4029 * Assign empty clock ops for consumers that might still hold
4030 * a reference to this clock.
4031 */
4032 flags = clk_enable_lock();
4033 clk->core->ops = &clk_nodrv_ops;
4034 clk_enable_unlock(flags);
4035
4036 if (ops->terminate)
4037 ops->terminate(clk->core->hw);
4038
4039 if (!hlist_empty(&clk->core->children)) {
4040 struct clk_core *child;
4041 struct hlist_node *t;
4042
4043 /* Reparent all children to the orphan list. */
4044 hlist_for_each_entry_safe(child, t, &clk->core->children,
4045 child_node)
4046 clk_core_set_parent_nolock(child, NULL);
4047 }
4048
4049 clk_core_evict_parent_cache(clk->core);
4050
4051 hlist_del_init(&clk->core->child_node);
4052
4053 if (clk->core->prepare_count)
4054 pr_warn("%s: unregistering prepared clock: %s\n",
4055 __func__, clk->core->name);
4056
4057 if (clk->core->protect_count)
4058 pr_warn("%s: unregistering protected clock: %s\n",
4059 __func__, clk->core->name);
4060
4061 kref_put(&clk->core->ref, __clk_release);
4062 free_clk(clk);
4063 unlock:
4064 clk_prepare_unlock();
4065 }
4066 EXPORT_SYMBOL_GPL(clk_unregister);
4067
4068 /**
4069 * clk_hw_unregister - unregister a currently registered clk_hw
4070 * @hw: hardware-specific clock data to unregister
4071 */
4072 void clk_hw_unregister(struct clk_hw *hw)
4073 {
4074 clk_unregister(hw->clk);
4075 }
4076 EXPORT_SYMBOL_GPL(clk_hw_unregister);
4077
4078 static void devm_clk_release(struct device *dev, void *res)
4079 {
4080 clk_unregister(*(struct clk **)res);
4081 }
4082
4083 static void devm_clk_hw_release(struct device *dev, void *res)
4084 {
4085 clk_hw_unregister(*(struct clk_hw **)res);
4086 }
4087
4088 /**
4089 * devm_clk_register - resource managed clk_register()
4090 * @dev: device that is registering this clock
4091 * @hw: link to hardware-specific clock data
4092 *
4093 * Managed clk_register(). This function is *deprecated*, use devm_clk_hw_register() instead.
4094 *
4095 * Clocks returned from this function are automatically clk_unregister()ed on
4096 * driver detach. See clk_register() for more information.
4097 */
4098 struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
4099 {
4100 struct clk *clk;
4101 struct clk **clkp;
4102
4103 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
4104 if (!clkp)
4105 return ERR_PTR(-ENOMEM);
4106
4107 clk = clk_register(dev, hw);
4108 if (!IS_ERR(clk)) {
4109 *clkp = clk;
4110 devres_add(dev, clkp);
4111 } else {
4112 devres_free(clkp);
4113 }
4114
4115 return clk;
4116 }
4117 EXPORT_SYMBOL_GPL(devm_clk_register);
4118
4119 /**
4120 * devm_clk_hw_register - resource managed clk_hw_register()
4121 * @dev: device that is registering this clock
4122 * @hw: link to hardware-specific clock data
4123 *
4124 * Managed clk_hw_register(). Clocks registered by this function are
4125 * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register()
4126 * for more information.
4127 */
4128 int devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
4129 {
4130 struct clk_hw **hwp;
4131 int ret;
4132
4133 hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL);
4134 if (!hwp)
4135 return -ENOMEM;
4136
4137 ret = clk_hw_register(dev, hw);
4138 if (!ret) {
4139 *hwp = hw;
4140 devres_add(dev, hwp);
4141 } else {
4142 devres_free(hwp);
4143 }
4144
4145 return ret;
4146 }
4147 EXPORT_SYMBOL_GPL(devm_clk_hw_register);
4148
4149 static int devm_clk_match(struct device *dev, void *res, void *data)
4150 {
4151 struct clk *c = res;
4152 if (WARN_ON(!c))
4153 return 0;
4154 return c == data;
4155 }
4156
4157 static int devm_clk_hw_match(struct device *dev, void *res, void *data)
4158 {
4159 struct clk_hw *hw = res;
4160
4161 if (WARN_ON(!hw))
4162 return 0;
4163 return hw == data;
4164 }
4165
4166 /**
4167 * devm_clk_unregister - resource managed clk_unregister()
4168 * @dev: device that is unregistering the clock data
4169 * @clk: clock to unregister
4170 *
4171 * Deallocate a clock allocated with devm_clk_register(). Normally
4172 * this function will not need to be called and the resource management
4173 * code will ensure that the resource is freed.
4174 */
4175 void devm_clk_unregister(struct device *dev, struct clk *clk)
4176 {
4177 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
4178 }
4179 EXPORT_SYMBOL_GPL(devm_clk_unregister);
4180
4181 /**
4182 * devm_clk_hw_unregister - resource managed clk_hw_unregister()
4183 * @dev: device that is unregistering the hardware-specific clock data
4184 * @hw: link to hardware-specific clock data
4185 *
4186 * Unregister a clk_hw registered with devm_clk_hw_register(). Normally
4187 * this function will not need to be called and the resource management
4188 * code will ensure that the resource is freed.
4189 */
4190 void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw)
4191 {
4192 WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match,
4193 hw));
4194 }
4195 EXPORT_SYMBOL_GPL(devm_clk_hw_unregister);
4196
4197 /*
4198 * clkdev helpers
4199 */
4200
4201 void __clk_put(struct clk *clk)
4202 {
4203 struct module *owner;
4204
4205 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
4206 return;
4207
4208 clk_prepare_lock();
4209
4210 /*
4211 * Before calling clk_put, all calls to clk_rate_exclusive_get() from a
4212 * given user should be balanced with calls to clk_rate_exclusive_put()
4213 * and by that same consumer
4214 */
4215 if (WARN_ON(clk->exclusive_count)) {
4216 /* We voiced our concern, let's sanitize the situation */
4217 clk->core->protect_count -= (clk->exclusive_count - 1);
4218 clk_core_rate_unprotect(clk->core);
4219 clk->exclusive_count = 0;
4220 }
4221
4222 hlist_del(&clk->clks_node);
4223 if (clk->min_rate > clk->core->req_rate ||
4224 clk->max_rate < clk->core->req_rate)
4225 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4226
4227 owner = clk->core->owner;
4228 kref_put(&clk->core->ref, __clk_release);
4229
4230 clk_prepare_unlock();
4231
4232 module_put(owner);
4233
4234 free_clk(clk);
4235 }
4236
4237 /*** clk rate change notifiers ***/
4238
4239 /**
4240 * clk_notifier_register - add a clk rate change notifier
4241 * @clk: struct clk * to watch
4242 * @nb: struct notifier_block * with callback info
4243 *
4244 * Request notification when clk's rate changes. This uses an SRCU
4245 * notifier because we want it to block and notifier unregistrations are
4246 * uncommon. The callbacks associated with the notifier must not
4247 * re-enter into the clk framework by calling any top-level clk APIs;
4248 * this will cause a nested prepare_lock mutex.
4249 *
4250 * In all notification cases (pre, post and abort rate change) the original
4251 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
4252 * and the new frequency is passed via struct clk_notifier_data.new_rate.
4253 *
4254 * clk_notifier_register() must be called from non-atomic context.
4255 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4256 * allocation failure; otherwise, passes along the return value of
4257 * srcu_notifier_chain_register().
4258 */
4259 int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
4260 {
4261 struct clk_notifier *cn;
4262 int ret = -ENOMEM;
4263
4264 if (!clk || !nb)
4265 return -EINVAL;
4266
4267 clk_prepare_lock();
4268
4269 /* search the list of notifiers for this clk */
4270 list_for_each_entry(cn, &clk_notifier_list, node)
4271 if (cn->clk == clk)
4272 break;
4273
4274 /* if clk wasn't in the notifier list, allocate new clk_notifier */
4275 if (cn->clk != clk) {
4276 cn = kzalloc(sizeof(*cn), GFP_KERNEL);
4277 if (!cn)
4278 goto out;
4279
4280 cn->clk = clk;
4281 srcu_init_notifier_head(&cn->notifier_head);
4282
4283 list_add(&cn->node, &clk_notifier_list);
4284 }
4285
4286 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4287
4288 clk->core->notifier_count++;
4289
4290 out:
4291 clk_prepare_unlock();
4292
4293 return ret;
4294 }
4295 EXPORT_SYMBOL_GPL(clk_notifier_register);
4296
4297 /**
4298 * clk_notifier_unregister - remove a clk rate change notifier
4299 * @clk: struct clk *
4300 * @nb: struct notifier_block * with callback info
4301 *
4302 * Request no further notification for changes to 'clk' and frees memory
4303 * allocated in clk_notifier_register.
4304 *
4305 * Returns -EINVAL if called with null arguments; otherwise, passes
4306 * along the return value of srcu_notifier_chain_unregister().
4307 */
4308 int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
4309 {
4310 struct clk_notifier *cn = NULL;
4311 int ret = -EINVAL;
4312
4313 if (!clk || !nb)
4314 return -EINVAL;
4315
4316 clk_prepare_lock();
4317
4318 list_for_each_entry(cn, &clk_notifier_list, node)
4319 if (cn->clk == clk)
4320 break;
4321
4322 if (cn->clk == clk) {
4323 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
4324
4325 clk->core->notifier_count--;
4326
4327 /* XXX the notifier code should handle this better */
4328 if (!cn->notifier_head.head) {
4329 srcu_cleanup_notifier_head(&cn->notifier_head);
4330 list_del(&cn->node);
4331 kfree(cn);
4332 }
4333
4334 } else {
4335 ret = -ENOENT;
4336 }
4337
4338 clk_prepare_unlock();
4339
4340 return ret;
4341 }
4342 EXPORT_SYMBOL_GPL(clk_notifier_unregister);
4343
4344 #ifdef CONFIG_OF
4345 static void clk_core_reparent_orphans(void)
4346 {
4347 clk_prepare_lock();
4348 clk_core_reparent_orphans_nolock();
4349 clk_prepare_unlock();
4350 }
4351
4352 /**
4353 * struct of_clk_provider - Clock provider registration structure
4354 * @link: Entry in global list of clock providers
4355 * @node: Pointer to device tree node of clock provider
4356 * @get: Get clock callback. Returns NULL or a struct clk for the
4357 * given clock specifier
4358 * @get_hw: Get clk_hw callback. Returns NULL, ERR_PTR or a
4359 * struct clk_hw for the given clock specifier
4360 * @data: context pointer to be passed into @get callback
4361 */
4362 struct of_clk_provider {
4363 struct list_head link;
4364
4365 struct device_node *node;
4366 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
4367 struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data);
4368 void *data;
4369 };
4370
4371 extern struct of_device_id __clk_of_table;
4372 static const struct of_device_id __clk_of_table_sentinel
4373 __used __section("__clk_of_table_end");
4374
4375 static LIST_HEAD(of_clk_providers);
4376 static DEFINE_MUTEX(of_clk_mutex);
4377
4378 struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
4379 void *data)
4380 {
4381 return data;
4382 }
4383 EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
4384
4385 struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
4386 {
4387 return data;
4388 }
4389 EXPORT_SYMBOL_GPL(of_clk_hw_simple_get);
4390
4391 struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
4392 {
4393 struct clk_onecell_data *clk_data = data;
4394 unsigned int idx = clkspec->args[0];
4395
4396 if (idx >= clk_data->clk_num) {
4397 pr_err("%s: invalid clock index %u\n", __func__, idx);
4398 return ERR_PTR(-EINVAL);
4399 }
4400
4401 return clk_data->clks[idx];
4402 }
4403 EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
4404
4405 struct clk_hw *
4406 of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
4407 {
4408 struct clk_hw_onecell_data *hw_data = data;
4409 unsigned int idx = clkspec->args[0];
4410
4411 if (idx >= hw_data->num) {
4412 pr_err("%s: invalid index %u\n", __func__, idx);
4413 return ERR_PTR(-EINVAL);
4414 }
4415
4416 return hw_data->hws[idx];
4417 }
4418 EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get);
4419
4420 /**
4421 * of_clk_add_provider() - Register a clock provider for a node
4422 * @np: Device node pointer associated with clock provider
4423 * @clk_src_get: callback for decoding clock
4424 * @data: context pointer for @clk_src_get callback.
4425 *
4426 * This function is *deprecated*. Use of_clk_add_hw_provider() instead.
4427 */
4428 int of_clk_add_provider(struct device_node *np,
4429 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
4430 void *data),
4431 void *data)
4432 {
4433 struct of_clk_provider *cp;
4434 int ret;
4435
4436 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
4437 if (!cp)
4438 return -ENOMEM;
4439
4440 cp->node = of_node_get(np);
4441 cp->data = data;
4442 cp->get = clk_src_get;
4443
4444 mutex_lock(&of_clk_mutex);
4445 list_add(&cp->link, &of_clk_providers);
4446 mutex_unlock(&of_clk_mutex);
4447 pr_debug("Added clock from %pOF\n", np);
4448
4449 clk_core_reparent_orphans();
4450
4451 ret = of_clk_set_defaults(np, true);
4452 if (ret < 0)
4453 of_clk_del_provider(np);
4454
4455 return ret;
4456 }
4457 EXPORT_SYMBOL_GPL(of_clk_add_provider);
4458
4459 /**
4460 * of_clk_add_hw_provider() - Register a clock provider for a node
4461 * @np: Device node pointer associated with clock provider
4462 * @get: callback for decoding clk_hw
4463 * @data: context pointer for @get callback.
4464 */
4465 int of_clk_add_hw_provider(struct device_node *np,
4466 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
4467 void *data),
4468 void *data)
4469 {
4470 struct of_clk_provider *cp;
4471 int ret;
4472
4473 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
4474 if (!cp)
4475 return -ENOMEM;
4476
4477 cp->node = of_node_get(np);
4478 cp->data = data;
4479 cp->get_hw = get;
4480
4481 mutex_lock(&of_clk_mutex);
4482 list_add(&cp->link, &of_clk_providers);
4483 mutex_unlock(&of_clk_mutex);
4484 pr_debug("Added clk_hw provider from %pOF\n", np);
4485
4486 clk_core_reparent_orphans();
4487
4488 ret = of_clk_set_defaults(np, true);
4489 if (ret < 0)
4490 of_clk_del_provider(np);
4491
4492 return ret;
4493 }
4494 EXPORT_SYMBOL_GPL(of_clk_add_hw_provider);
4495
4496 static void devm_of_clk_release_provider(struct device *dev, void *res)
4497 {
4498 of_clk_del_provider(*(struct device_node **)res);
4499 }
4500
4501 /*
4502 * We allow a child device to use its parent device as the clock provider node
4503 * for cases like MFD sub-devices where the child device driver wants to use
4504 * devm_*() APIs but not list the device in DT as a sub-node.
4505 */
4506 static struct device_node *get_clk_provider_node(struct device *dev)
4507 {
4508 struct device_node *np, *parent_np;
4509
4510 np = dev->of_node;
4511 parent_np = dev->parent ? dev->parent->of_node : NULL;
4512
4513 if (!of_find_property(np, "#clock-cells", NULL))
4514 if (of_find_property(parent_np, "#clock-cells", NULL))
4515 np = parent_np;
4516
4517 return np;
4518 }
4519
4520 /**
4521 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
4522 * @dev: Device acting as the clock provider (used for DT node and lifetime)
4523 * @get: callback for decoding clk_hw
4524 * @data: context pointer for @get callback
4525 *
4526 * Registers clock provider for given device's node. If the device has no DT
4527 * node or if the device node lacks of clock provider information (#clock-cells)
4528 * then the parent device's node is scanned for this information. If parent node
4529 * has the #clock-cells then it is used in registration. Provider is
4530 * automatically released at device exit.
4531 *
4532 * Return: 0 on success or an errno on failure.
4533 */
4534 int devm_of_clk_add_hw_provider(struct device *dev,
4535 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
4536 void *data),
4537 void *data)
4538 {
4539 struct device_node **ptr, *np;
4540 int ret;
4541
4542 ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr),
4543 GFP_KERNEL);
4544 if (!ptr)
4545 return -ENOMEM;
4546
4547 np = get_clk_provider_node(dev);
4548 ret = of_clk_add_hw_provider(np, get, data);
4549 if (!ret) {
4550 *ptr = np;
4551 devres_add(dev, ptr);
4552 } else {
4553 devres_free(ptr);
4554 }
4555
4556 return ret;
4557 }
4558 EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider);
4559
4560 /**
4561 * of_clk_del_provider() - Remove a previously registered clock provider
4562 * @np: Device node pointer associated with clock provider
4563 */
4564 void of_clk_del_provider(struct device_node *np)
4565 {
4566 struct of_clk_provider *cp;
4567
4568 mutex_lock(&of_clk_mutex);
4569 list_for_each_entry(cp, &of_clk_providers, link) {
4570 if (cp->node == np) {
4571 list_del(&cp->link);
4572 of_node_put(cp->node);
4573 kfree(cp);
4574 break;
4575 }
4576 }
4577 mutex_unlock(&of_clk_mutex);
4578 }
4579 EXPORT_SYMBOL_GPL(of_clk_del_provider);
4580
4581 static int devm_clk_provider_match(struct device *dev, void *res, void *data)
4582 {
4583 struct device_node **np = res;
4584
4585 if (WARN_ON(!np || !*np))
4586 return 0;
4587
4588 return *np == data;
4589 }
4590
4591 /**
4592 * devm_of_clk_del_provider() - Remove clock provider registered using devm
4593 * @dev: Device to whose lifetime the clock provider was bound
4594 */
4595 void devm_of_clk_del_provider(struct device *dev)
4596 {
4597 int ret;
4598 struct device_node *np = get_clk_provider_node(dev);
4599
4600 ret = devres_release(dev, devm_of_clk_release_provider,
4601 devm_clk_provider_match, np);
4602
4603 WARN_ON(ret);
4604 }
4605 EXPORT_SYMBOL(devm_of_clk_del_provider);
4606
4607 /**
4608 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
4609 * @np: device node to parse clock specifier from
4610 * @index: index of phandle to parse clock out of. If index < 0, @name is used
4611 * @name: clock name to find and parse. If name is NULL, the index is used
4612 * @out_args: Result of parsing the clock specifier
4613 *
4614 * Parses a device node's "clocks" and "clock-names" properties to find the
4615 * phandle and cells for the index or name that is desired. The resulting clock
4616 * specifier is placed into @out_args, or an errno is returned when there's a
4617 * parsing error. The @index argument is ignored if @name is non-NULL.
4618 *
4619 * Example:
4620 *
4621 * phandle1: clock-controller@1 {
4622 * #clock-cells = <2>;
4623 * }
4624 *
4625 * phandle2: clock-controller@2 {
4626 * #clock-cells = <1>;
4627 * }
4628 *
4629 * clock-consumer@3 {
4630 * clocks = <&phandle1 1 2 &phandle2 3>;
4631 * clock-names = "name1", "name2";
4632 * }
4633 *
4634 * To get a device_node for `clock-controller@2' node you may call this
4635 * function a few different ways:
4636 *
4637 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
4638 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
4639 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
4640 *
4641 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
4642 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
4643 * the "clock-names" property of @np.
4644 */
4645 static int of_parse_clkspec(const struct device_node *np, int index,
4646 const char *name, struct of_phandle_args *out_args)
4647 {
4648 int ret = -ENOENT;
4649
4650 /* Walk up the tree of devices looking for a clock property that matches */
4651 while (np) {
4652 /*
4653 * For named clocks, first look up the name in the
4654 * "clock-names" property. If it cannot be found, then index
4655 * will be an error code and of_parse_phandle_with_args() will
4656 * return -EINVAL.
4657 */
4658 if (name)
4659 index = of_property_match_string(np, "clock-names", name);
4660 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
4661 index, out_args);
4662 if (!ret)
4663 break;
4664 if (name && index >= 0)
4665 break;
4666
4667 /*
4668 * No matching clock found on this node. If the parent node
4669 * has a "clock-ranges" property, then we can try one of its
4670 * clocks.
4671 */
4672 np = np->parent;
4673 if (np && !of_get_property(np, "clock-ranges", NULL))
4674 break;
4675 index = 0;
4676 }
4677
4678 return ret;
4679 }
4680
4681 static struct clk_hw *
4682 __of_clk_get_hw_from_provider(struct of_clk_provider *provider,
4683 struct of_phandle_args *clkspec)
4684 {
4685 struct clk *clk;
4686
4687 if (provider->get_hw)
4688 return provider->get_hw(clkspec, provider->data);
4689
4690 clk = provider->get(clkspec, provider->data);
4691 if (IS_ERR(clk))
4692 return ERR_CAST(clk);
4693 return __clk_get_hw(clk);
4694 }
4695
4696 static struct clk_hw *
4697 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
4698 {
4699 struct of_clk_provider *provider;
4700 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
4701
4702 if (!clkspec)
4703 return ERR_PTR(-EINVAL);
4704
4705 mutex_lock(&of_clk_mutex);
4706 list_for_each_entry(provider, &of_clk_providers, link) {
4707 if (provider->node == clkspec->np) {
4708 hw = __of_clk_get_hw_from_provider(provider, clkspec);
4709 if (!IS_ERR(hw))
4710 break;
4711 }
4712 }
4713 mutex_unlock(&of_clk_mutex);
4714
4715 return hw;
4716 }
4717
4718 /**
4719 * of_clk_get_from_provider() - Lookup a clock from a clock provider
4720 * @clkspec: pointer to a clock specifier data structure
4721 *
4722 * This function looks up a struct clk from the registered list of clock
4723 * providers, an input is a clock specifier data structure as returned
4724 * from the of_parse_phandle_with_args() function call.
4725 */
4726 struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
4727 {
4728 struct clk_hw *hw = of_clk_get_hw_from_clkspec(clkspec);
4729
4730 return clk_hw_create_clk(NULL, hw, NULL, __func__);
4731 }
4732 EXPORT_SYMBOL_GPL(of_clk_get_from_provider);
4733
4734 struct clk_hw *of_clk_get_hw(struct device_node *np, int index,
4735 const char *con_id)
4736 {
4737 int ret;
4738 struct clk_hw *hw;
4739 struct of_phandle_args clkspec;
4740
4741 ret = of_parse_clkspec(np, index, con_id, &clkspec);
4742 if (ret)
4743 return ERR_PTR(ret);
4744
4745 hw = of_clk_get_hw_from_clkspec(&clkspec);
4746 of_node_put(clkspec.np);
4747
4748 return hw;
4749 }
4750
4751 static struct clk *__of_clk_get(struct device_node *np,
4752 int index, const char *dev_id,
4753 const char *con_id)
4754 {
4755 struct clk_hw *hw = of_clk_get_hw(np, index, con_id);
4756
4757 return clk_hw_create_clk(NULL, hw, dev_id, con_id);
4758 }
4759
4760 struct clk *of_clk_get(struct device_node *np, int index)
4761 {
4762 return __of_clk_get(np, index, np->full_name, NULL);
4763 }
4764 EXPORT_SYMBOL(of_clk_get);
4765
4766 /**
4767 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
4768 * @np: pointer to clock consumer node
4769 * @name: name of consumer's clock input, or NULL for the first clock reference
4770 *
4771 * This function parses the clocks and clock-names properties,
4772 * and uses them to look up the struct clk from the registered list of clock
4773 * providers.
4774 */
4775 struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
4776 {
4777 if (!np)
4778 return ERR_PTR(-ENOENT);
4779
4780 return __of_clk_get(np, 0, np->full_name, name);
4781 }
4782 EXPORT_SYMBOL(of_clk_get_by_name);
4783
4784 /**
4785 * of_clk_get_parent_count() - Count the number of clocks a device node has
4786 * @np: device node to count
4787 *
4788 * Returns: The number of clocks that are possible parents of this node
4789 */
4790 unsigned int of_clk_get_parent_count(const struct device_node *np)
4791 {
4792 int count;
4793
4794 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
4795 if (count < 0)
4796 return 0;
4797
4798 return count;
4799 }
4800 EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
4801
4802 const char *of_clk_get_parent_name(const struct device_node *np, int index)
4803 {
4804 struct of_phandle_args clkspec;
4805 struct property *prop;
4806 const char *clk_name;
4807 const __be32 *vp;
4808 u32 pv;
4809 int rc;
4810 int count;
4811 struct clk *clk;
4812
4813 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
4814 &clkspec);
4815 if (rc)
4816 return NULL;
4817
4818 index = clkspec.args_count ? clkspec.args[0] : 0;
4819 count = 0;
4820
4821 /* if there is an indices property, use it to transfer the index
4822 * specified into an array offset for the clock-output-names property.
4823 */
4824 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
4825 if (index == pv) {
4826 index = count;
4827 break;
4828 }
4829 count++;
4830 }
4831 /* We went off the end of 'clock-indices' without finding it */
4832 if (prop && !vp)
4833 return NULL;
4834
4835 if (of_property_read_string_index(clkspec.np, "clock-output-names",
4836 index,
4837 &clk_name) < 0) {
4838 /*
4839 * Best effort to get the name if the clock has been
4840 * registered with the framework. If the clock isn't
4841 * registered, we return the node name as the name of
4842 * the clock as long as #clock-cells = 0.
4843 */
4844 clk = of_clk_get_from_provider(&clkspec);
4845 if (IS_ERR(clk)) {
4846 if (clkspec.args_count == 0)
4847 clk_name = clkspec.np->name;
4848 else
4849 clk_name = NULL;
4850 } else {
4851 clk_name = __clk_get_name(clk);
4852 clk_put(clk);
4853 }
4854 }
4855
4856
4857 of_node_put(clkspec.np);
4858 return clk_name;
4859 }
4860 EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
4861
4862 /**
4863 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
4864 * number of parents
4865 * @np: Device node pointer associated with clock provider
4866 * @parents: pointer to char array that hold the parents' names
4867 * @size: size of the @parents array
4868 *
4869 * Return: number of parents for the clock node.
4870 */
4871 int of_clk_parent_fill(struct device_node *np, const char **parents,
4872 unsigned int size)
4873 {
4874 unsigned int i = 0;
4875
4876 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
4877 i++;
4878
4879 return i;
4880 }
4881 EXPORT_SYMBOL_GPL(of_clk_parent_fill);
4882
4883 struct clock_provider {
4884 void (*clk_init_cb)(struct device_node *);
4885 struct device_node *np;
4886 struct list_head node;
4887 };
4888
4889 /*
4890 * This function looks for a parent clock. If there is one, then it
4891 * checks that the provider for this parent clock was initialized, in
4892 * this case the parent clock will be ready.
4893 */
4894 static int parent_ready(struct device_node *np)
4895 {
4896 int i = 0;
4897
4898 while (true) {
4899 struct clk *clk = of_clk_get(np, i);
4900
4901 /* this parent is ready we can check the next one */
4902 if (!IS_ERR(clk)) {
4903 clk_put(clk);
4904 i++;
4905 continue;
4906 }
4907
4908 /* at least one parent is not ready, we exit now */
4909 if (PTR_ERR(clk) == -EPROBE_DEFER)
4910 return 0;
4911
4912 /*
4913 * Here we make assumption that the device tree is
4914 * written correctly. So an error means that there is
4915 * no more parent. As we didn't exit yet, then the
4916 * previous parent are ready. If there is no clock
4917 * parent, no need to wait for them, then we can
4918 * consider their absence as being ready
4919 */
4920 return 1;
4921 }
4922 }
4923
4924 /**
4925 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
4926 * @np: Device node pointer associated with clock provider
4927 * @index: clock index
4928 * @flags: pointer to top-level framework flags
4929 *
4930 * Detects if the clock-critical property exists and, if so, sets the
4931 * corresponding CLK_IS_CRITICAL flag.
4932 *
4933 * Do not use this function. It exists only for legacy Device Tree
4934 * bindings, such as the one-clock-per-node style that are outdated.
4935 * Those bindings typically put all clock data into .dts and the Linux
4936 * driver has no clock data, thus making it impossible to set this flag
4937 * correctly from the driver. Only those drivers may call
4938 * of_clk_detect_critical from their setup functions.
4939 *
4940 * Return: error code or zero on success
4941 */
4942 int of_clk_detect_critical(struct device_node *np, int index,
4943 unsigned long *flags)
4944 {
4945 struct property *prop;
4946 const __be32 *cur;
4947 uint32_t idx;
4948
4949 if (!np || !flags)
4950 return -EINVAL;
4951
4952 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
4953 if (index == idx)
4954 *flags |= CLK_IS_CRITICAL;
4955
4956 return 0;
4957 }
4958
4959 /**
4960 * of_clk_init() - Scan and init clock providers from the DT
4961 * @matches: array of compatible values and init functions for providers.
4962 *
4963 * This function scans the device tree for matching clock providers
4964 * and calls their initialization functions. It also does it by trying
4965 * to follow the dependencies.
4966 */
4967 void __init of_clk_init(const struct of_device_id *matches)
4968 {
4969 const struct of_device_id *match;
4970 struct device_node *np;
4971 struct clock_provider *clk_provider, *next;
4972 bool is_init_done;
4973 bool force = false;
4974 LIST_HEAD(clk_provider_list);
4975
4976 if (!matches)
4977 matches = &__clk_of_table;
4978
4979 /* First prepare the list of the clocks providers */
4980 for_each_matching_node_and_match(np, matches, &match) {
4981 struct clock_provider *parent;
4982
4983 if (!of_device_is_available(np))
4984 continue;
4985
4986 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
4987 if (!parent) {
4988 list_for_each_entry_safe(clk_provider, next,
4989 &clk_provider_list, node) {
4990 list_del(&clk_provider->node);
4991 of_node_put(clk_provider->np);
4992 kfree(clk_provider);
4993 }
4994 of_node_put(np);
4995 return;
4996 }
4997
4998 parent->clk_init_cb = match->data;
4999 parent->np = of_node_get(np);
5000 list_add_tail(&parent->node, &clk_provider_list);
5001 }
5002
5003 while (!list_empty(&clk_provider_list)) {
5004 is_init_done = false;
5005 list_for_each_entry_safe(clk_provider, next,
5006 &clk_provider_list, node) {
5007 if (force || parent_ready(clk_provider->np)) {
5008
5009 /* Don't populate platform devices */
5010 of_node_set_flag(clk_provider->np,
5011 OF_POPULATED);
5012
5013 clk_provider->clk_init_cb(clk_provider->np);
5014 of_clk_set_defaults(clk_provider->np, true);
5015
5016 list_del(&clk_provider->node);
5017 of_node_put(clk_provider->np);
5018 kfree(clk_provider);
5019 is_init_done = true;
5020 }
5021 }
5022
5023 /*
5024 * We didn't manage to initialize any of the
5025 * remaining providers during the last loop, so now we
5026 * initialize all the remaining ones unconditionally
5027 * in case the clock parent was not mandatory
5028 */
5029 if (!is_init_done)
5030 force = true;
5031 }
5032 }
5033 #endif