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git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/clk/imx/clk.h
1 #ifndef __MACH_IMX_CLK_H
2 #define __MACH_IMX_CLK_H
4 #include <linux/spinlock.h>
5 #include <linux/clk-provider.h>
7 extern spinlock_t imx_ccm_lock
;
9 void imx_check_clocks(struct clk
*clks
[], unsigned int count
);
10 void imx_register_uart_clocks(struct clk
** const clks
[]);
12 extern void imx_cscmr1_fixup(u32
*val
);
23 struct clk
*imx_clk_pllv1(enum imx_pllv1_type type
, const char *name
,
24 const char *parent
, void __iomem
*base
);
26 struct clk
*imx_clk_pllv2(const char *name
, const char *parent
,
39 struct clk
*imx_clk_pllv3(enum imx_pllv3_type type
, const char *name
,
40 const char *parent_name
, void __iomem
*base
, u32 div_mask
);
42 struct clk
*clk_register_gate2(struct device
*dev
, const char *name
,
43 const char *parent_name
, unsigned long flags
,
44 void __iomem
*reg
, u8 bit_idx
, u8 cgr_val
,
45 u8 clk_gate_flags
, spinlock_t
*lock
,
46 unsigned int *share_count
);
48 struct clk
* imx_obtain_fixed_clock(
49 const char *name
, unsigned long rate
);
51 struct clk
*imx_clk_gate_exclusive(const char *name
, const char *parent
,
52 void __iomem
*reg
, u8 shift
, u32 exclusive_mask
);
54 struct clk
*imx_clk_pfd(const char *name
, const char *parent_name
,
55 void __iomem
*reg
, u8 idx
);
57 struct clk
*imx_clk_busy_divider(const char *name
, const char *parent_name
,
58 void __iomem
*reg
, u8 shift
, u8 width
,
59 void __iomem
*busy_reg
, u8 busy_shift
);
61 struct clk
*imx_clk_busy_mux(const char *name
, void __iomem
*reg
, u8 shift
,
62 u8 width
, void __iomem
*busy_reg
, u8 busy_shift
,
63 const char **parent_names
, int num_parents
);
65 struct clk
*imx_clk_fixup_divider(const char *name
, const char *parent
,
66 void __iomem
*reg
, u8 shift
, u8 width
,
67 void (*fixup
)(u32
*val
));
69 struct clk
*imx_clk_fixup_mux(const char *name
, void __iomem
*reg
,
70 u8 shift
, u8 width
, const char **parents
,
71 int num_parents
, void (*fixup
)(u32
*val
));
73 static inline struct clk
*imx_clk_fixed(const char *name
, int rate
)
75 return clk_register_fixed_rate(NULL
, name
, NULL
, 0, rate
);
78 static inline struct clk
*imx_clk_fixed_factor(const char *name
,
79 const char *parent
, unsigned int mult
, unsigned int div
)
81 return clk_register_fixed_factor(NULL
, name
, parent
,
82 CLK_SET_RATE_PARENT
, mult
, div
);
85 static inline struct clk
*imx_clk_divider(const char *name
, const char *parent
,
86 void __iomem
*reg
, u8 shift
, u8 width
)
88 return clk_register_divider(NULL
, name
, parent
, CLK_SET_RATE_PARENT
,
89 reg
, shift
, width
, 0, &imx_ccm_lock
);
92 static inline struct clk
*imx_clk_divider_flags(const char *name
,
93 const char *parent
, void __iomem
*reg
, u8 shift
, u8 width
,
96 return clk_register_divider(NULL
, name
, parent
, flags
,
97 reg
, shift
, width
, 0, &imx_ccm_lock
);
100 static inline struct clk
*imx_clk_divider2(const char *name
, const char *parent
,
101 void __iomem
*reg
, u8 shift
, u8 width
)
103 return clk_register_divider(NULL
, name
, parent
,
104 CLK_SET_RATE_PARENT
| CLK_OPS_PARENT_ENABLE
,
105 reg
, shift
, width
, 0, &imx_ccm_lock
);
108 static inline struct clk
*imx_clk_gate(const char *name
, const char *parent
,
109 void __iomem
*reg
, u8 shift
)
111 return clk_register_gate(NULL
, name
, parent
, CLK_SET_RATE_PARENT
, reg
,
112 shift
, 0, &imx_ccm_lock
);
115 static inline struct clk
*imx_clk_gate_dis(const char *name
, const char *parent
,
116 void __iomem
*reg
, u8 shift
)
118 return clk_register_gate(NULL
, name
, parent
, CLK_SET_RATE_PARENT
, reg
,
119 shift
, CLK_GATE_SET_TO_DISABLE
, &imx_ccm_lock
);
122 static inline struct clk
*imx_clk_gate2(const char *name
, const char *parent
,
123 void __iomem
*reg
, u8 shift
)
125 return clk_register_gate2(NULL
, name
, parent
, CLK_SET_RATE_PARENT
, reg
,
126 shift
, 0x3, 0, &imx_ccm_lock
, NULL
);
129 static inline struct clk
*imx_clk_gate2_shared(const char *name
,
130 const char *parent
, void __iomem
*reg
, u8 shift
,
131 unsigned int *share_count
)
133 return clk_register_gate2(NULL
, name
, parent
, CLK_SET_RATE_PARENT
, reg
,
134 shift
, 0x3, 0, &imx_ccm_lock
, share_count
);
137 static inline struct clk
*imx_clk_gate2_shared2(const char *name
,
138 const char *parent
, void __iomem
*reg
, u8 shift
,
139 unsigned int *share_count
)
141 return clk_register_gate2(NULL
, name
, parent
, CLK_SET_RATE_PARENT
|
142 CLK_OPS_PARENT_ENABLE
, reg
, shift
, 0x3, 0,
143 &imx_ccm_lock
, share_count
);
146 static inline struct clk
*imx_clk_gate2_cgr(const char *name
,
147 const char *parent
, void __iomem
*reg
, u8 shift
, u8 cgr_val
)
149 return clk_register_gate2(NULL
, name
, parent
, CLK_SET_RATE_PARENT
, reg
,
150 shift
, cgr_val
, 0, &imx_ccm_lock
, NULL
);
153 static inline struct clk
*imx_clk_gate3(const char *name
, const char *parent
,
154 void __iomem
*reg
, u8 shift
)
156 return clk_register_gate(NULL
, name
, parent
,
157 CLK_SET_RATE_PARENT
| CLK_OPS_PARENT_ENABLE
,
158 reg
, shift
, 0, &imx_ccm_lock
);
161 static inline struct clk
*imx_clk_gate4(const char *name
, const char *parent
,
162 void __iomem
*reg
, u8 shift
)
164 return clk_register_gate2(NULL
, name
, parent
,
165 CLK_SET_RATE_PARENT
| CLK_OPS_PARENT_ENABLE
,
166 reg
, shift
, 0x3, 0, &imx_ccm_lock
, NULL
);
169 static inline struct clk
*imx_clk_mux(const char *name
, void __iomem
*reg
,
170 u8 shift
, u8 width
, const char **parents
, int num_parents
)
172 return clk_register_mux(NULL
, name
, parents
, num_parents
,
173 CLK_SET_RATE_NO_REPARENT
, reg
, shift
,
174 width
, 0, &imx_ccm_lock
);
177 static inline struct clk
*imx_clk_mux2(const char *name
, void __iomem
*reg
,
178 u8 shift
, u8 width
, const char **parents
, int num_parents
)
180 return clk_register_mux(NULL
, name
, parents
, num_parents
,
181 CLK_SET_RATE_NO_REPARENT
| CLK_OPS_PARENT_ENABLE
,
182 reg
, shift
, width
, 0, &imx_ccm_lock
);
185 static inline struct clk
*imx_clk_mux_flags(const char *name
,
186 void __iomem
*reg
, u8 shift
, u8 width
, const char **parents
,
187 int num_parents
, unsigned long flags
)
189 return clk_register_mux(NULL
, name
, parents
, num_parents
,
190 flags
| CLK_SET_RATE_NO_REPARENT
, reg
, shift
, width
, 0,
194 struct clk
*imx_clk_cpu(const char *name
, const char *parent_name
,
195 struct clk
*div
, struct clk
*mux
, struct clk
*pll
,