drivers/clk/sunxi-ng/ccu-sun8i-h3.h

   1 /*
   2  * Copyright 2016 Maxime Ripard
   3  *
   4  * Maxime Ripard <maxime.ripard@free-electrons.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef _CCU_SUN8I_H3_H_
  18 #define _CCU_SUN8I_H3_H_
  19
  20 #include <dt-bindings/clock/sun8i-h3-ccu.h>
  21 #include <dt-bindings/reset/sun8i-h3-ccu.h>
  22
  23 #define CLK_PLL_CPUX            0
  24 #define CLK_PLL_AUDIO_BASE      1
  25 #define CLK_PLL_AUDIO           2
  26 #define CLK_PLL_AUDIO_2X        3
  27 #define CLK_PLL_AUDIO_4X        4
  28 #define CLK_PLL_AUDIO_8X        5
  29 #define CLK_PLL_VIDEO           6
  30 #define CLK_PLL_VE              7
  31 #define CLK_PLL_DDR             8
  32
  33 /* PLL_PERIPH0 exported for PRCM */
  34
  35 #define CLK_PLL_PERIPH0_2X      10
  36 #define CLK_PLL_GPU             11
  37 #define CLK_PLL_PERIPH1         12
  38 #define CLK_PLL_DE              13
  39
  40 /* The CPUX clock is exported */
  41
  42 #define CLK_AXI                 15
  43 #define CLK_AHB1                16
  44 #define CLK_APB1                17
  45 #define CLK_APB2                18
  46 #define CLK_AHB2                19
  47
  48 /* All the bus gates are exported */
  49
  50 /* The first bunch of module clocks are exported */
  51
  52 #define CLK_DRAM                96
  53
  54 /* All the DRAM gates are exported */
  55
  56 /* Some more module clocks are exported */
  57
  58 #define CLK_MBUS                113
  59
  60 /* And the GPU module clock is exported */
  61
  62 #define CLK_NUMBER_H3           (CLK_GPU + 1)
  63 #define CLK_NUMBER_H5           (CLK_BUS_SCR1 + 1)
  64
  65 #endif /* _CCU_SUN8I_H3_H_ */