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git.proxmox.com Git - mirror_ubuntu-focal-kernel.git/blob - drivers/clk/sunxi-ng/ccu_div.h
2 * Copyright (c) 2016 Maxime Ripard. All rights reserved.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
17 #include <linux/clk-provider.h>
19 #include "ccu_common.h"
23 * struct ccu_div_internal - Internal divider description
24 * @shift: Bit offset of the divider in its register
25 * @width: Width of the divider field in its register
26 * @max: Maximum value allowed for that divider. This is the
27 * arithmetic value, not the maximum value to be set in the
29 * @flags: clk_divider flags to apply on this divider
30 * @table: Divider table pointer (if applicable)
32 * That structure represents a single divider, and is meant to be
33 * embedded in other structures representing the various clock
36 * It is basically a wrapper around the clk_divider functions
39 struct ccu_div_internal
{
48 struct clk_div_table
*table
;
51 #define _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, _flags) \
59 #define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table) \
60 _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, 0)
62 #define _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _off, _max, _flags) \
71 #define _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, _flags) \
72 _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, 1, _max, _flags)
74 #define _SUNXI_CCU_DIV_FLAGS(_shift, _width, _flags) \
75 _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, 0, _flags)
77 #define _SUNXI_CCU_DIV_MAX(_shift, _width, _max) \
78 _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, 0)
80 #define _SUNXI_CCU_DIV_OFFSET(_shift, _width, _offset) \
81 _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _offset, 0, 0)
83 #define _SUNXI_CCU_DIV(_shift, _width) \
84 _SUNXI_CCU_DIV_FLAGS(_shift, _width, 0)
89 struct ccu_div_internal div
;
90 struct ccu_mux_internal mux
;
91 struct ccu_common common
;
94 #define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \
96 _table, _gate, _flags) \
97 struct ccu_div _struct = { \
98 .div = _SUNXI_CCU_DIV_TABLE(_shift, _width, \
103 .hw.init = CLK_HW_INIT(_name, \
111 #define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \
114 SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \
115 _shift, _width, _table, 0, \
118 #define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
122 _muxshift, _muxwidth, \
124 struct ccu_div _struct = { \
126 .div = _SUNXI_CCU_DIV(_mshift, _mwidth), \
127 .mux = _SUNXI_CCU_MUX_TABLE(_muxshift, _muxwidth, _table), \
130 .hw.init = CLK_HW_INIT_PARENTS(_name, \
137 #define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
138 _mshift, _mwidth, _muxshift, _muxwidth, \
140 SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
142 _reg, _mshift, _mwidth, \
143 _muxshift, _muxwidth, \
146 #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg, \
147 _mshift, _mwidth, _muxshift, _muxwidth, \
149 SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
151 _reg, _mshift, _mwidth, \
152 _muxshift, _muxwidth, \
156 #define SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \
157 _mshift, _mwidth, _gate, \
159 struct ccu_div _struct = { \
161 .div = _SUNXI_CCU_DIV(_mshift, _mwidth), \
164 .hw.init = CLK_HW_INIT(_name, \
171 #define SUNXI_CCU_M(_struct, _name, _parent, _reg, _mshift, _mwidth, \
173 SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \
174 _mshift, _mwidth, 0, _flags)
176 static inline struct ccu_div
*hw_to_ccu_div(struct clk_hw
*hw
)
178 struct ccu_common
*common
= hw_to_ccu_common(hw
);
180 return container_of(common
, struct ccu_div
, common
);
183 extern const struct clk_ops ccu_div_ops
;
185 #endif /* _CCU_DIV_H_ */