drivers/clk/sunxi-ng/ccu_mmc_timing.c

   1 /*
   2  * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <linux/clk-provider.h>
  15 #include <linux/clk/sunxi-ng.h>
  16
  17 #include "ccu_common.h"
  18
  19 /**
  20  * sunxi_ccu_set_mmc_timing_mode: Configure the MMC clock timing mode
  21  * @clk: clock to be configured
  22  * @new_mode: true for new timing mode introduced in A83T and later
  23  *
  24  * Returns 0 on success, -ENOTSUPP if the clock does not support
  25  * switching modes.
  26  */
  27 int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)
  28 {
  29         struct clk_hw *hw = __clk_get_hw(clk);
  30         struct ccu_common *cm = hw_to_ccu_common(hw);
  31         unsigned long flags;
  32         u32 val;
  33
  34         if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
  35                 return -ENOTSUPP;
  36
  37         spin_lock_irqsave(cm->lock, flags);
  38
  39         val = readl(cm->base + cm->reg);
  40         if (new_mode)
  41                 val |= CCU_MMC_NEW_TIMING_MODE;
  42         else
  43                 val &= ~CCU_MMC_NEW_TIMING_MODE;
  44         writel(val, cm->base + cm->reg);
  45
  46         spin_unlock_irqrestore(cm->lock, flags);
  47
  48         return 0;
  49 }
  50 EXPORT_SYMBOL_GPL(sunxi_ccu_set_mmc_timing_mode);
  51
  52 /**
  53  * sunxi_ccu_set_mmc_timing_mode: Get the current MMC clock timing mode
  54  * @clk: clock to query
  55  *
  56  * Returns 0 if the clock is in old timing mode, > 0 if it is in
  57  * new timing mode, and -ENOTSUPP if the clock does not support
  58  * this function.
  59  */
  60 int sunxi_ccu_get_mmc_timing_mode(struct clk *clk)
  61 {
  62         struct clk_hw *hw = __clk_get_hw(clk);
  63         struct ccu_common *cm = hw_to_ccu_common(hw);
  64
  65         if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
  66                 return -ENOTSUPP;
  67
  68         return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE);
  69 }
  70 EXPORT_SYMBOL_GPL(sunxi_ccu_get_mmc_timing_mode);