drivers/clk/sunxi-ng/ccu_mux.c

   1 /*
   2  * Copyright (C) 2016 Maxime Ripard
   3  * Maxime Ripard <maxime.ripard@free-electrons.com>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 of
   8  * the License, or (at your option) any later version.
   9  */
  10
  11 #include <linux/clk.h>
  12 #include <linux/clk-provider.h>
  13 #include <linux/delay.h>
  14
  15 #include "ccu_gate.h"
  16 #include "ccu_mux.h"
  17
  18 static u16 ccu_mux_get_prediv(struct ccu_common *common,
  19                               struct ccu_mux_internal *cm,
  20                               int parent_index)
  21 {
  22         u16 prediv = 1;
  23         u32 reg;
  24
  25         if (!((common->features & CCU_FEATURE_FIXED_PREDIV) ||
  26               (common->features & CCU_FEATURE_VARIABLE_PREDIV) ||
  27               (common->features & CCU_FEATURE_ALL_PREDIV)))
  28                 return 1;
  29
  30         if (common->features & CCU_FEATURE_ALL_PREDIV)
  31                 return common->prediv;
  32
  33         reg = readl(common->base + common->reg);
  34         if (parent_index < 0) {
  35                 parent_index = reg >> cm->shift;
  36                 parent_index &= (1 << cm->width) - 1;
  37         }
  38
  39         if (common->features & CCU_FEATURE_FIXED_PREDIV) {
  40                 int i;
  41
  42                 for (i = 0; i < cm->n_predivs; i++)
  43                         if (parent_index == cm->fixed_predivs[i].index)
  44                                 prediv = cm->fixed_predivs[i].div;
  45         }
  46
  47         if (common->features & CCU_FEATURE_VARIABLE_PREDIV)
  48                 if (parent_index == cm->variable_prediv.index) {
  49                         u8 div;
  50
  51                         div = reg >> cm->variable_prediv.shift;
  52                         div &= (1 << cm->variable_prediv.width) - 1;
  53                         prediv = div + 1;
  54                 }
  55
  56         return prediv;
  57 }
  58
  59 unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common,
  60                                           struct ccu_mux_internal *cm,
  61                                           int parent_index,
  62                                           unsigned long parent_rate)
  63 {
  64         return parent_rate / ccu_mux_get_prediv(common, cm, parent_index);
  65 }
  66
  67 int ccu_mux_helper_determine_rate(struct ccu_common *common,
  68                                   struct ccu_mux_internal *cm,
  69                                   struct clk_rate_request *req,
  70                                   unsigned long (*round)(struct ccu_mux_internal *,
  71                                                          struct clk_hw *,
  72                                                          unsigned long *,
  73                                                          unsigned long,
  74                                                          void *),
  75                                   void *data)
  76 {
  77         unsigned long best_parent_rate = 0, best_rate = 0;
  78         struct clk_hw *best_parent, *hw = &common->hw;
  79         unsigned int i;
  80
  81         if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) {
  82                 unsigned long adj_parent_rate;
  83
  84                 best_parent = clk_hw_get_parent(hw);
  85                 best_parent_rate = clk_hw_get_rate(best_parent);
  86                 adj_parent_rate = ccu_mux_helper_apply_prediv(common, cm, -1,
  87                                                               best_parent_rate);
  88
  89                 best_rate = round(cm, best_parent, &adj_parent_rate,
  90                                   req->rate, data);
  91
  92                 goto out;
  93         }
  94
  95         for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
  96                 unsigned long tmp_rate, parent_rate, adj_parent_rate;
  97                 struct clk_hw *parent;
  98
  99                 parent = clk_hw_get_parent_by_index(hw, i);
 100                 if (!parent)
 101                         continue;
 102
 103                 parent_rate = clk_hw_get_rate(parent);
 104                 adj_parent_rate = ccu_mux_helper_apply_prediv(common, cm, i,
 105                                                               parent_rate);
 106
 107                 tmp_rate = round(cm, parent, &adj_parent_rate, req->rate, data);
 108                 if (tmp_rate == req->rate) {
 109                         best_parent = parent;
 110                         best_parent_rate = parent_rate;
 111                         best_rate = tmp_rate;
 112                         goto out;
 113                 }
 114
 115                 if ((req->rate - tmp_rate) < (req->rate - best_rate)) {
 116                         best_rate = tmp_rate;
 117                         best_parent_rate = parent_rate;
 118                         best_parent = parent;
 119                 }
 120         }
 121
 122         if (best_rate == 0)
 123                 return -EINVAL;
 124
 125 out:
 126         req->best_parent_hw = best_parent;
 127         req->best_parent_rate = best_parent_rate;
 128         req->rate = best_rate;
 129         return 0;
 130 }
 131
 132 u8 ccu_mux_helper_get_parent(struct ccu_common *common,
 133                              struct ccu_mux_internal *cm)
 134 {
 135         u32 reg;
 136         u8 parent;
 137
 138         reg = readl(common->base + common->reg);
 139         parent = reg >> cm->shift;
 140         parent &= (1 << cm->width) - 1;
 141
 142         if (cm->table) {
 143                 int num_parents = clk_hw_get_num_parents(&common->hw);
 144                 int i;
 145
 146                 for (i = 0; i < num_parents; i++)
 147                         if (cm->table[i] == parent)
 148                                 return i;
 149         }
 150
 151         return parent;
 152 }
 153
 154 int ccu_mux_helper_set_parent(struct ccu_common *common,
 155                               struct ccu_mux_internal *cm,
 156                               u8 index)
 157 {
 158         unsigned long flags;
 159         u32 reg;
 160
 161         if (cm->table)
 162                 index = cm->table[index];
 163
 164         spin_lock_irqsave(common->lock, flags);
 165
 166         reg = readl(common->base + common->reg);
 167         reg &= ~GENMASK(cm->width + cm->shift - 1, cm->shift);
 168         writel(reg | (index << cm->shift), common->base + common->reg);
 169
 170         spin_unlock_irqrestore(common->lock, flags);
 171
 172         return 0;
 173 }
 174
 175 static void ccu_mux_disable(struct clk_hw *hw)
 176 {
 177         struct ccu_mux *cm = hw_to_ccu_mux(hw);
 178
 179         return ccu_gate_helper_disable(&cm->common, cm->enable);
 180 }
 181
 182 static int ccu_mux_enable(struct clk_hw *hw)
 183 {
 184         struct ccu_mux *cm = hw_to_ccu_mux(hw);
 185
 186         return ccu_gate_helper_enable(&cm->common, cm->enable);
 187 }
 188
 189 static int ccu_mux_is_enabled(struct clk_hw *hw)
 190 {
 191         struct ccu_mux *cm = hw_to_ccu_mux(hw);
 192
 193         return ccu_gate_helper_is_enabled(&cm->common, cm->enable);
 194 }
 195
 196 static u8 ccu_mux_get_parent(struct clk_hw *hw)
 197 {
 198         struct ccu_mux *cm = hw_to_ccu_mux(hw);
 199
 200         return ccu_mux_helper_get_parent(&cm->common, &cm->mux);
 201 }
 202
 203 static int ccu_mux_set_parent(struct clk_hw *hw, u8 index)
 204 {
 205         struct ccu_mux *cm = hw_to_ccu_mux(hw);
 206
 207         return ccu_mux_helper_set_parent(&cm->common, &cm->mux, index);
 208 }
 209
 210 static unsigned long ccu_mux_recalc_rate(struct clk_hw *hw,
 211                                          unsigned long parent_rate)
 212 {
 213         struct ccu_mux *cm = hw_to_ccu_mux(hw);
 214
 215         return ccu_mux_helper_apply_prediv(&cm->common, &cm->mux, -1,
 216                                            parent_rate);
 217 }
 218
 219 const struct clk_ops ccu_mux_ops = {
 220         .disable        = ccu_mux_disable,
 221         .enable         = ccu_mux_enable,
 222         .is_enabled     = ccu_mux_is_enabled,
 223
 224         .get_parent     = ccu_mux_get_parent,
 225         .set_parent     = ccu_mux_set_parent,
 226
 227         .determine_rate = __clk_mux_determine_rate,
 228         .recalc_rate    = ccu_mux_recalc_rate,
 229 };
 230
 231 /*
 232  * This clock notifier is called when the frequency of the of the parent
 233  * PLL clock is to be changed. The idea is to switch the parent to a
 234  * stable clock, such as the main oscillator, while the PLL frequency
 235  * stabilizes.
 236  */
 237 static int ccu_mux_notifier_cb(struct notifier_block *nb,
 238                                unsigned long event, void *data)
 239 {
 240         struct ccu_mux_nb *mux = to_ccu_mux_nb(nb);
 241         int ret = 0;
 242
 243         if (event == PRE_RATE_CHANGE) {
 244                 mux->original_index = ccu_mux_helper_get_parent(mux->common,
 245                                                                 mux->cm);
 246                 ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
 247                                                 mux->bypass_index);
 248         } else if (event == POST_RATE_CHANGE) {
 249                 ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
 250                                                 mux->original_index);
 251         }
 252
 253         udelay(mux->delay_us);
 254
 255         return notifier_from_errno(ret);
 256 }
 257
 258 int ccu_mux_notifier_register(struct clk *clk, struct ccu_mux_nb *mux_nb)
 259 {
 260         mux_nb->clk_nb.notifier_call = ccu_mux_notifier_cb;
 261
 262         return clk_notifier_register(clk, &mux_nb->clk_nb);
 263 }