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1 #ifndef _CCU_MUX_H_
2 #define _CCU_MUX_H_
3
4 #include <linux/clk-provider.h>
5
6 #include "ccu_common.h"
7
8 struct ccu_mux_fixed_prediv {
9 u8 index;
10 u16 div;
11 };
12
13 struct ccu_mux_var_prediv {
14 u8 index;
15 u8 shift;
16 u8 width;
17 };
18
19 struct ccu_mux_internal {
20 u8 shift;
21 u8 width;
22 const u8 *table;
23
24 const struct ccu_mux_fixed_prediv *fixed_predivs;
25 u8 n_predivs;
26
27 const struct ccu_mux_var_prediv *var_predivs;
28 u8 n_var_predivs;
29 };
30
31 #define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table) \
32 { \
33 .shift = _shift, \
34 .width = _width, \
35 .table = _table, \
36 }
37
38 #define _SUNXI_CCU_MUX(_shift, _width) \
39 _SUNXI_CCU_MUX_TABLE(_shift, _width, NULL)
40
41 struct ccu_mux {
42 u16 reg;
43 u32 enable;
44
45 struct ccu_mux_internal mux;
46 struct ccu_common common;
47 };
48
49 #define SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, _table, \
50 _reg, _shift, _width, _gate, \
51 _flags) \
52 struct ccu_mux _struct = { \
53 .enable = _gate, \
54 .mux = _SUNXI_CCU_MUX_TABLE(_shift, _width, _table), \
55 .common = { \
56 .reg = _reg, \
57 .hw.init = CLK_HW_INIT_PARENTS(_name, \
58 _parents, \
59 &ccu_mux_ops, \
60 _flags), \
61 } \
62 }
63
64 #define SUNXI_CCU_MUX_WITH_GATE(_struct, _name, _parents, _reg, \
65 _shift, _width, _gate, _flags) \
66 SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, NULL, \
67 _reg, _shift, _width, _gate, \
68 _flags)
69
70 #define SUNXI_CCU_MUX(_struct, _name, _parents, _reg, _shift, _width, \
71 _flags) \
72 SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, NULL, \
73 _reg, _shift, _width, 0, _flags)
74
75 static inline struct ccu_mux *hw_to_ccu_mux(struct clk_hw *hw)
76 {
77 struct ccu_common *common = hw_to_ccu_common(hw);
78
79 return container_of(common, struct ccu_mux, common);
80 }
81
82 extern const struct clk_ops ccu_mux_ops;
83
84 unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common,
85 struct ccu_mux_internal *cm,
86 int parent_index,
87 unsigned long parent_rate);
88 int ccu_mux_helper_determine_rate(struct ccu_common *common,
89 struct ccu_mux_internal *cm,
90 struct clk_rate_request *req,
91 unsigned long (*round)(struct ccu_mux_internal *,
92 struct clk_hw *,
93 unsigned long *,
94 unsigned long,
95 void *),
96 void *data);
97 u8 ccu_mux_helper_get_parent(struct ccu_common *common,
98 struct ccu_mux_internal *cm);
99 int ccu_mux_helper_set_parent(struct ccu_common *common,
100 struct ccu_mux_internal *cm,
101 u8 index);
102
103 struct ccu_mux_nb {
104 struct notifier_block clk_nb;
105 struct ccu_common *common;
106 struct ccu_mux_internal *cm;
107
108 u32 delay_us; /* How many us to wait after reparenting */
109 u8 bypass_index; /* Which parent to temporarily use */
110 u8 original_index; /* This is set by the notifier callback */
111 };
112
113 #define to_ccu_mux_nb(_nb) container_of(_nb, struct ccu_mux_nb, clk_nb)
114
115 int ccu_mux_notifier_register(struct clk *clk, struct ccu_mux_nb *mux_nb);
116
117 #endif /* _CCU_MUX_H_ */