drivers/clocksource/Kconfig

   1 menu "Clock Source drivers"
   2
   3 config CLKSRC_OF
   4         bool
   5
   6 config CLKSRC_I8253
   7         bool
   8
   9 config CLKEVT_I8253
  10         bool
  11
  12 config I8253_LOCK
  13         bool
  14
  15 config CLKBLD_I8253
  16         def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
  17
  18 config CLKSRC_MMIO
  19         bool
  20
  21 config DIGICOLOR_TIMER
  22         bool
  23
  24 config DW_APB_TIMER
  25         bool
  26
  27 config DW_APB_TIMER_OF
  28         bool
  29         select DW_APB_TIMER
  30         select CLKSRC_OF
  31
  32 config ROCKCHIP_TIMER
  33         bool
  34         select CLKSRC_OF
  35
  36 config ARMADA_370_XP_TIMER
  37         bool
  38         select CLKSRC_OF
  39
  40 config MESON6_TIMER
  41         bool
  42         select CLKSRC_MMIO
  43
  44 config ORION_TIMER
  45         select CLKSRC_OF
  46         select CLKSRC_MMIO
  47         bool
  48
  49 config SUN4I_TIMER
  50         select CLKSRC_MMIO
  51         bool
  52
  53 config SUN5I_HSTIMER
  54         select CLKSRC_MMIO
  55         bool
  56
  57 config VT8500_TIMER
  58         bool
  59
  60 config CADENCE_TTC_TIMER
  61         bool
  62
  63 config CLKSRC_NOMADIK_MTU
  64         bool
  65         depends on (ARCH_NOMADIK || ARCH_U8500)
  66         select CLKSRC_MMIO
  67         help
  68           Support for Multi Timer Unit. MTU provides access
  69           to multiple interrupt generating programmable
  70           32-bit free running decrementing counters.
  71
  72 config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
  73         bool
  74         depends on CLKSRC_NOMADIK_MTU
  75         help
  76           Use the Multi Timer Unit as the sched_clock.
  77
  78 config CLKSRC_DBX500_PRCMU
  79         bool "Clocksource PRCMU Timer"
  80         depends on UX500_SOC_DB8500
  81         default y
  82         help
  83           Use the always on PRCMU Timer as clocksource
  84
  85 config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
  86         bool "Clocksource PRCMU Timer sched_clock"
  87         depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
  88         default y
  89         help
  90           Use the always on PRCMU Timer as sched_clock
  91
  92 config CLKSRC_EFM32
  93         bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
  94         depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
  95         select CLKSRC_MMIO
  96         default ARCH_EFM32
  97         help
  98           Support to use the timers of EFM32 SoCs as clock source and clock
  99           event device.
 100
 101 config ARM_ARCH_TIMER
 102         bool
 103         select CLKSRC_OF if OF
 104
 105 config ARM_ARCH_TIMER_EVTSTREAM
 106         bool "Support for ARM architected timer event stream generation"
 107         default y if ARM_ARCH_TIMER
 108         depends on ARM_ARCH_TIMER
 109         help
 110           This option enables support for event stream generation based on
 111           the ARM architected timer. It is used for waking up CPUs executing
 112           the wfe instruction at a frequency represented as a power-of-2
 113           divisor of the clock rate.
 114           The main use of the event stream is wfe-based timeouts of userspace
 115           locking implementations. It might also be useful for imposing timeout
 116           on wfe to safeguard against any programming errors in case an expected
 117           event is not generated.
 118           This must be disabled for hardware validation purposes to detect any
 119           hardware anomalies of missing events.
 120
 121 config ARM_GLOBAL_TIMER
 122         bool
 123         select CLKSRC_OF if OF
 124         help
 125           This options enables support for the ARM global timer unit
 126
 127 config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
 128         bool
 129         depends on ARM_GLOBAL_TIMER
 130         default y
 131         help
 132          Use ARM global timer clock source as sched_clock
 133
 134 config ATMEL_PIT
 135         select CLKSRC_OF if OF
 136         def_bool SOC_AT91SAM9 || SOC_SAMA5
 137
 138 config CLKSRC_METAG_GENERIC
 139         def_bool y if METAG
 140         help
 141           This option enables support for the Meta per-thread timers.
 142
 143 config CLKSRC_EXYNOS_MCT
 144         def_bool y if ARCH_EXYNOS
 145         depends on !ARM64
 146         help
 147           Support for Multi Core Timer controller on Exynos SoCs.
 148
 149 config CLKSRC_SAMSUNG_PWM
 150         bool
 151         help
 152           This is a new clocksource driver for the PWM timer found in
 153           Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
 154           for all devicetree enabled platforms. This driver will be
 155           needed only on systems that do not have the Exynos MCT available.
 156
 157 config FSL_FTM_TIMER
 158         bool
 159         help
 160           Support for Freescale FlexTimer Module (FTM) timer.
 161
 162 config VF_PIT_TIMER
 163         bool
 164         help
 165           Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
 166
 167 config SYS_SUPPORTS_SH_CMT
 168         bool
 169
 170 config MTK_TIMER
 171         select CLKSRC_OF
 172         select CLKSRC_MMIO
 173         bool
 174
 175 config SYS_SUPPORTS_SH_MTU2
 176         bool
 177
 178 config SYS_SUPPORTS_SH_TMU
 179         bool
 180
 181 config SYS_SUPPORTS_EM_STI
 182         bool
 183
 184 config SH_TIMER_CMT
 185         bool "Renesas CMT timer driver" if COMPILE_TEST
 186         depends on GENERIC_CLOCKEVENTS
 187         default SYS_SUPPORTS_SH_CMT
 188         help
 189           This enables build of a clocksource and clockevent driver for
 190           the Compare Match Timer (CMT) hardware available in 16/32/48-bit
 191           variants on a wide range of Mobile and Automotive SoCs from Renesas.
 192
 193 config SH_TIMER_MTU2
 194         bool "Renesas MTU2 timer driver" if COMPILE_TEST
 195         depends on GENERIC_CLOCKEVENTS
 196         default SYS_SUPPORTS_SH_MTU2
 197         help
 198           This enables build of a clockevent driver for the Multi-Function
 199           Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
 200           This hardware comes with 16 bit-timer registers.
 201
 202 config SH_TIMER_TMU
 203         bool "Renesas TMU timer driver" if COMPILE_TEST
 204         depends on GENERIC_CLOCKEVENTS
 205         default SYS_SUPPORTS_SH_TMU
 206         help
 207           This enables build of a clocksource and clockevent driver for
 208           the 32-bit Timer Unit (TMU) hardware available on a wide range
 209           SoCs from Renesas.
 210
 211 config EM_TIMER_STI
 212         bool "Renesas STI timer driver" if COMPILE_TEST
 213         depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
 214         default SYS_SUPPORTS_EM_STI
 215         help
 216           This enables build of a clocksource and clockevent driver for
 217           the 48-bit System Timer (STI) hardware available on a SoCs
 218           such as EMEV2 from former NEC Electronics.
 219
 220 config CLKSRC_QCOM
 221         bool
 222
 223 config CLKSRC_VERSATILE
 224         bool "ARM Versatile (Express) reference platforms clock source"
 225         depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
 226         select CLKSRC_OF
 227         default y if MFD_VEXPRESS_SYSREG
 228         help
 229           This option enables clock source based on free running
 230           counter available in the "System Registers" block of
 231           ARM Versatile, RealView and Versatile Express reference
 232           platforms.
 233
 234 config CLKSRC_MIPS_GIC
 235         bool
 236         depends on MIPS_GIC
 237         select CLKSRC_OF
 238
 239 config ASM9260_TIMER
 240         bool "Alphascale ASM9260 timer driver"
 241         depends on GENERIC_CLOCKEVENTS
 242         select CLKSRC_MMIO
 243         select CLKSRC_OF
 244         default y if MACH_ASM9260
 245         help
 246           This enables build of a clocksource and clockevent driver for
 247           the 32-bit System Timer hardware available on a Alphascale ASM9260.
 248
 249 endmenu