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[mirror_ubuntu-bionic-kernel.git] / drivers / clocksource / bcm_kona_timer.c
1 /*
2 * Copyright (C) 2012 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14 #include <linux/init.h>
15 #include <linux/irq.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/clockchips.h>
19 #include <linux/types.h>
20 #include <linux/clk.h>
21
22 #include <linux/io.h>
23 #include <asm/mach/time.h>
24
25 #include <linux/of.h>
26 #include <linux/of_address.h>
27 #include <linux/of_irq.h>
28
29
30 #define KONA_GPTIMER_STCS_OFFSET 0x00000000
31 #define KONA_GPTIMER_STCLO_OFFSET 0x00000004
32 #define KONA_GPTIMER_STCHI_OFFSET 0x00000008
33 #define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
34
35 #define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
36 #define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
37
38 struct kona_bcm_timers {
39 int tmr_irq;
40 void __iomem *tmr_regs;
41 };
42
43 static struct kona_bcm_timers timers;
44
45 static u32 arch_timer_rate;
46
47 /*
48 * We use the peripheral timers for system tick, the cpu global timer for
49 * profile tick
50 */
51 static void kona_timer_disable_and_clear(void __iomem *base)
52 {
53 uint32_t reg;
54
55 /*
56 * clear and disable interrupts
57 * We are using compare/match register 0 for our system interrupts
58 */
59 reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
60
61 /* Clear compare (0) interrupt */
62 reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
63 /* disable compare */
64 reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
65
66 writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
67
68 }
69
70 static void
71 kona_timer_get_counter(void *timer_base, uint32_t *msw, uint32_t *lsw)
72 {
73 void __iomem *base = IOMEM(timer_base);
74 int loop_limit = 4;
75
76 /*
77 * Read 64-bit free running counter
78 * 1. Read hi-word
79 * 2. Read low-word
80 * 3. Read hi-word again
81 * 4.1
82 * if new hi-word is not equal to previously read hi-word, then
83 * start from #1
84 * 4.2
85 * if new hi-word is equal to previously read hi-word then stop.
86 */
87
88 while (--loop_limit) {
89 *msw = readl(base + KONA_GPTIMER_STCHI_OFFSET);
90 *lsw = readl(base + KONA_GPTIMER_STCLO_OFFSET);
91 if (*msw == readl(base + KONA_GPTIMER_STCHI_OFFSET))
92 break;
93 }
94 if (!loop_limit) {
95 pr_err("bcm_kona_timer: getting counter failed.\n");
96 pr_err(" Timer will be impacted\n");
97 }
98
99 return;
100 }
101
102 static void __init kona_timers_init(struct device_node *node)
103 {
104 u32 freq;
105 struct clk *external_clk;
106
107 external_clk = of_clk_get_by_name(node, NULL);
108
109 if (!IS_ERR(external_clk)) {
110 arch_timer_rate = clk_get_rate(external_clk);
111 clk_prepare_enable(external_clk);
112 } else if (!of_property_read_u32(node, "clock-frequency", &freq)) {
113 arch_timer_rate = freq;
114 } else {
115 panic("unable to determine clock-frequency");
116 }
117
118 /* Setup IRQ numbers */
119 timers.tmr_irq = irq_of_parse_and_map(node, 0);
120
121 /* Setup IO addresses */
122 timers.tmr_regs = of_iomap(node, 0);
123
124 kona_timer_disable_and_clear(timers.tmr_regs);
125 }
126
127 static int kona_timer_set_next_event(unsigned long clc,
128 struct clock_event_device *unused)
129 {
130 /*
131 * timer (0) is disabled by the timer interrupt already
132 * so, here we reload the next event value and re-enable
133 * the timer.
134 *
135 * This way, we are potentially losing the time between
136 * timer-interrupt->set_next_event. CPU local timers, when
137 * they come in should get rid of skew.
138 */
139
140 uint32_t lsw, msw;
141 uint32_t reg;
142
143 kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
144
145 /* Load the "next" event tick value */
146 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
147
148 /* Enable compare */
149 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
150 reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
151 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
152
153 return 0;
154 }
155
156 static void kona_timer_set_mode(enum clock_event_mode mode,
157 struct clock_event_device *unused)
158 {
159 switch (mode) {
160 case CLOCK_EVT_MODE_ONESHOT:
161 /* by default mode is one shot don't do any thing */
162 break;
163 case CLOCK_EVT_MODE_UNUSED:
164 case CLOCK_EVT_MODE_SHUTDOWN:
165 default:
166 kona_timer_disable_and_clear(timers.tmr_regs);
167 }
168 }
169
170 static struct clock_event_device kona_clockevent_timer = {
171 .name = "timer 1",
172 .features = CLOCK_EVT_FEAT_ONESHOT,
173 .set_next_event = kona_timer_set_next_event,
174 .set_mode = kona_timer_set_mode
175 };
176
177 static void __init kona_timer_clockevents_init(void)
178 {
179 kona_clockevent_timer.cpumask = cpumask_of(0);
180 clockevents_config_and_register(&kona_clockevent_timer,
181 arch_timer_rate, 6, 0xffffffff);
182 }
183
184 static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
185 {
186 struct clock_event_device *evt = &kona_clockevent_timer;
187
188 kona_timer_disable_and_clear(timers.tmr_regs);
189 evt->event_handler(evt);
190 return IRQ_HANDLED;
191 }
192
193 static struct irqaction kona_timer_irq = {
194 .name = "Kona Timer Tick",
195 .flags = IRQF_TIMER,
196 .handler = kona_timer_interrupt,
197 };
198
199 static void __init kona_timer_init(struct device_node *node)
200 {
201 kona_timers_init(node);
202 kona_timer_clockevents_init();
203 setup_irq(timers.tmr_irq, &kona_timer_irq);
204 kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
205 }
206
207 CLOCKSOURCE_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
208 /*
209 * bcm,kona-timer is deprecated by brcm,kona-timer
210 * being kept here for driver compatibility
211 */
212 CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);