2 * Copyright (C) ST-Ericsson SA 2011
4 * License Terms: GNU General Public License v2
5 * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson
6 * Author: Sundar Iyer for ST-Ericsson
7 * sched_clock implementation is based on:
8 * plat-nomadik/timer.c Linus Walleij <linus.walleij@stericsson.com>
11 * The PRCMU has 5 timers which are available in a always-on
12 * power domain. We use the Timer 4 for our always-on clock
13 * source on DB8500 and Timer 3 on DB5500.
15 #include <linux/clockchips.h>
16 #include <linux/clksrc-dbx500-prcmu.h>
18 #include <asm/sched_clock.h>
20 #include <mach/setup.h>
22 #define RATE_32K 32768
24 #define TIMER_MODE_CONTINOUS 0x1
25 #define TIMER_DOWNCOUNT_VAL 0xffffffff
27 #define PRCMU_TIMER_REF 0
28 #define PRCMU_TIMER_DOWNCOUNT 0x4
29 #define PRCMU_TIMER_MODE 0x8
31 #define SCHED_CLOCK_MIN_WRAP 131072 /* 2^32 / 32768 */
33 static void __iomem
*clksrc_dbx500_timer_base
;
35 static cycle_t
clksrc_dbx500_prcmu_read(struct clocksource
*cs
)
40 count
= readl(clksrc_dbx500_timer_base
+
41 PRCMU_TIMER_DOWNCOUNT
);
42 count2
= readl(clksrc_dbx500_timer_base
+
43 PRCMU_TIMER_DOWNCOUNT
);
44 } while (count2
!= count
);
46 /* Negate because the timer is a decrementing counter */
50 static struct clocksource clocksource_dbx500_prcmu
= {
51 .name
= "dbx500-prcmu-timer",
53 .read
= clksrc_dbx500_prcmu_read
,
54 .mask
= CLOCKSOURCE_MASK(32),
55 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
58 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
60 static u32 notrace
dbx500_prcmu_sched_clock_read(void)
62 if (unlikely(!clksrc_dbx500_timer_base
))
65 return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu
);
70 void __init
clksrc_dbx500_prcmu_init(void __iomem
*base
)
72 clksrc_dbx500_timer_base
= base
;
75 * The A9 sub system expects the timer to be configured as
76 * a continous looping timer.
77 * The PRCMU should configure it but if it for some reason
78 * don't we do it here.
80 if (readl(clksrc_dbx500_timer_base
+ PRCMU_TIMER_MODE
) !=
81 TIMER_MODE_CONTINOUS
) {
82 writel(TIMER_MODE_CONTINOUS
,
83 clksrc_dbx500_timer_base
+ PRCMU_TIMER_MODE
);
84 writel(TIMER_DOWNCOUNT_VAL
,
85 clksrc_dbx500_timer_base
+ PRCMU_TIMER_REF
);
87 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
88 setup_sched_clock(dbx500_prcmu_sched_clock_read
,
91 clocksource_register_hz(&clocksource_dbx500_prcmu
, RATE_32K
);