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1 /*
2 * acpi-cpufreq.c - ACPI Processor P-States Driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/smp.h>
34 #include <linux/sched.h>
35 #include <linux/cpufreq.h>
36 #include <linux/compiler.h>
37 #include <linux/dmi.h>
38 #include <linux/slab.h>
39
40 #include <linux/acpi.h>
41 #include <linux/io.h>
42 #include <linux/delay.h>
43 #include <linux/uaccess.h>
44
45 #include <acpi/processor.h>
46
47 #include <asm/msr.h>
48 #include <asm/processor.h>
49 #include <asm/cpufeature.h>
50
51 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
52 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
53 MODULE_LICENSE("GPL");
54
55 enum {
56 UNDEFINED_CAPABLE = 0,
57 SYSTEM_INTEL_MSR_CAPABLE,
58 SYSTEM_AMD_MSR_CAPABLE,
59 SYSTEM_IO_CAPABLE,
60 };
61
62 #define INTEL_MSR_RANGE (0xffff)
63 #define AMD_MSR_RANGE (0x7)
64 #define HYGON_MSR_RANGE (0x7)
65
66 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
67
68 struct acpi_cpufreq_data {
69 unsigned int resume;
70 unsigned int cpu_feature;
71 unsigned int acpi_perf_cpu;
72 cpumask_var_t freqdomain_cpus;
73 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val);
74 u32 (*cpu_freq_read)(struct acpi_pct_register *reg);
75 };
76
77 /* acpi_perf_data is a pointer to percpu data. */
78 static struct acpi_processor_performance __percpu *acpi_perf_data;
79
80 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
81 {
82 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
83 }
84
85 static struct cpufreq_driver acpi_cpufreq_driver;
86
87 static unsigned int acpi_pstate_strict;
88
89 static bool boost_state(unsigned int cpu)
90 {
91 u32 lo, hi;
92 u64 msr;
93
94 switch (boot_cpu_data.x86_vendor) {
95 case X86_VENDOR_INTEL:
96 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
97 msr = lo | ((u64)hi << 32);
98 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
99 case X86_VENDOR_HYGON:
100 case X86_VENDOR_AMD:
101 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
102 msr = lo | ((u64)hi << 32);
103 return !(msr & MSR_K7_HWCR_CPB_DIS);
104 }
105 return false;
106 }
107
108 static int boost_set_msr(bool enable)
109 {
110 u32 msr_addr;
111 u64 msr_mask, val;
112
113 switch (boot_cpu_data.x86_vendor) {
114 case X86_VENDOR_INTEL:
115 msr_addr = MSR_IA32_MISC_ENABLE;
116 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
117 break;
118 case X86_VENDOR_HYGON:
119 case X86_VENDOR_AMD:
120 msr_addr = MSR_K7_HWCR;
121 msr_mask = MSR_K7_HWCR_CPB_DIS;
122 break;
123 default:
124 return -EINVAL;
125 }
126
127 rdmsrl(msr_addr, val);
128
129 if (enable)
130 val &= ~msr_mask;
131 else
132 val |= msr_mask;
133
134 wrmsrl(msr_addr, val);
135 return 0;
136 }
137
138 static void boost_set_msr_each(void *p_en)
139 {
140 bool enable = (bool) p_en;
141
142 boost_set_msr(enable);
143 }
144
145 static int set_boost(int val)
146 {
147 get_online_cpus();
148 on_each_cpu(boost_set_msr_each, (void *)(long)val, 1);
149 put_online_cpus();
150 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
151
152 return 0;
153 }
154
155 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
156 {
157 struct acpi_cpufreq_data *data = policy->driver_data;
158
159 if (unlikely(!data))
160 return -ENODEV;
161
162 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
163 }
164
165 cpufreq_freq_attr_ro(freqdomain_cpus);
166
167 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
168 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
169 size_t count)
170 {
171 int ret;
172 unsigned int val = 0;
173
174 if (!acpi_cpufreq_driver.set_boost)
175 return -EINVAL;
176
177 ret = kstrtouint(buf, 10, &val);
178 if (ret || val > 1)
179 return -EINVAL;
180
181 set_boost(val);
182
183 return count;
184 }
185
186 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
187 {
188 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
189 }
190
191 cpufreq_freq_attr_rw(cpb);
192 #endif
193
194 static int check_est_cpu(unsigned int cpuid)
195 {
196 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
197
198 return cpu_has(cpu, X86_FEATURE_EST);
199 }
200
201 static int check_amd_hwpstate_cpu(unsigned int cpuid)
202 {
203 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
204
205 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
206 }
207
208 static unsigned extract_io(struct cpufreq_policy *policy, u32 value)
209 {
210 struct acpi_cpufreq_data *data = policy->driver_data;
211 struct acpi_processor_performance *perf;
212 int i;
213
214 perf = to_perf_data(data);
215
216 for (i = 0; i < perf->state_count; i++) {
217 if (value == perf->states[i].status)
218 return policy->freq_table[i].frequency;
219 }
220 return 0;
221 }
222
223 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
224 {
225 struct acpi_cpufreq_data *data = policy->driver_data;
226 struct cpufreq_frequency_table *pos;
227 struct acpi_processor_performance *perf;
228
229 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
230 msr &= AMD_MSR_RANGE;
231 else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
232 msr &= HYGON_MSR_RANGE;
233 else
234 msr &= INTEL_MSR_RANGE;
235
236 perf = to_perf_data(data);
237
238 cpufreq_for_each_entry(pos, policy->freq_table)
239 if (msr == perf->states[pos->driver_data].status)
240 return pos->frequency;
241 return policy->freq_table[0].frequency;
242 }
243
244 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val)
245 {
246 struct acpi_cpufreq_data *data = policy->driver_data;
247
248 switch (data->cpu_feature) {
249 case SYSTEM_INTEL_MSR_CAPABLE:
250 case SYSTEM_AMD_MSR_CAPABLE:
251 return extract_msr(policy, val);
252 case SYSTEM_IO_CAPABLE:
253 return extract_io(policy, val);
254 default:
255 return 0;
256 }
257 }
258
259 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used)
260 {
261 u32 val, dummy;
262
263 rdmsr(MSR_IA32_PERF_CTL, val, dummy);
264 return val;
265 }
266
267 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val)
268 {
269 u32 lo, hi;
270
271 rdmsr(MSR_IA32_PERF_CTL, lo, hi);
272 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE);
273 wrmsr(MSR_IA32_PERF_CTL, lo, hi);
274 }
275
276 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used)
277 {
278 u32 val, dummy;
279
280 rdmsr(MSR_AMD_PERF_CTL, val, dummy);
281 return val;
282 }
283
284 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val)
285 {
286 wrmsr(MSR_AMD_PERF_CTL, val, 0);
287 }
288
289 static u32 cpu_freq_read_io(struct acpi_pct_register *reg)
290 {
291 u32 val;
292
293 acpi_os_read_port(reg->address, &val, reg->bit_width);
294 return val;
295 }
296
297 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val)
298 {
299 acpi_os_write_port(reg->address, val, reg->bit_width);
300 }
301
302 struct drv_cmd {
303 struct acpi_pct_register *reg;
304 u32 val;
305 union {
306 void (*write)(struct acpi_pct_register *reg, u32 val);
307 u32 (*read)(struct acpi_pct_register *reg);
308 } func;
309 };
310
311 /* Called via smp_call_function_single(), on the target CPU */
312 static void do_drv_read(void *_cmd)
313 {
314 struct drv_cmd *cmd = _cmd;
315
316 cmd->val = cmd->func.read(cmd->reg);
317 }
318
319 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask)
320 {
321 struct acpi_processor_performance *perf = to_perf_data(data);
322 struct drv_cmd cmd = {
323 .reg = &perf->control_register,
324 .func.read = data->cpu_freq_read,
325 };
326 int err;
327
328 err = smp_call_function_any(mask, do_drv_read, &cmd, 1);
329 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
330 return cmd.val;
331 }
332
333 /* Called via smp_call_function_many(), on the target CPUs */
334 static void do_drv_write(void *_cmd)
335 {
336 struct drv_cmd *cmd = _cmd;
337
338 cmd->func.write(cmd->reg, cmd->val);
339 }
340
341 static void drv_write(struct acpi_cpufreq_data *data,
342 const struct cpumask *mask, u32 val)
343 {
344 struct acpi_processor_performance *perf = to_perf_data(data);
345 struct drv_cmd cmd = {
346 .reg = &perf->control_register,
347 .val = val,
348 .func.write = data->cpu_freq_write,
349 };
350 int this_cpu;
351
352 this_cpu = get_cpu();
353 if (cpumask_test_cpu(this_cpu, mask))
354 do_drv_write(&cmd);
355
356 smp_call_function_many(mask, do_drv_write, &cmd, 1);
357 put_cpu();
358 }
359
360 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
361 {
362 u32 val;
363
364 if (unlikely(cpumask_empty(mask)))
365 return 0;
366
367 val = drv_read(data, mask);
368
369 pr_debug("get_cur_val = %u\n", val);
370
371 return val;
372 }
373
374 static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
375 {
376 struct acpi_cpufreq_data *data;
377 struct cpufreq_policy *policy;
378 unsigned int freq;
379 unsigned int cached_freq;
380
381 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
382
383 policy = cpufreq_cpu_get_raw(cpu);
384 if (unlikely(!policy))
385 return 0;
386
387 data = policy->driver_data;
388 if (unlikely(!data || !policy->freq_table))
389 return 0;
390
391 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency;
392 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data));
393 if (freq != cached_freq) {
394 /*
395 * The dreaded BIOS frequency change behind our back.
396 * Force set the frequency on next target call.
397 */
398 data->resume = 1;
399 }
400
401 pr_debug("cur freq = %u\n", freq);
402
403 return freq;
404 }
405
406 static unsigned int check_freqs(struct cpufreq_policy *policy,
407 const struct cpumask *mask, unsigned int freq)
408 {
409 struct acpi_cpufreq_data *data = policy->driver_data;
410 unsigned int cur_freq;
411 unsigned int i;
412
413 for (i = 0; i < 100; i++) {
414 cur_freq = extract_freq(policy, get_cur_val(mask, data));
415 if (cur_freq == freq)
416 return 1;
417 udelay(10);
418 }
419 return 0;
420 }
421
422 static int acpi_cpufreq_target(struct cpufreq_policy *policy,
423 unsigned int index)
424 {
425 struct acpi_cpufreq_data *data = policy->driver_data;
426 struct acpi_processor_performance *perf;
427 const struct cpumask *mask;
428 unsigned int next_perf_state = 0; /* Index into perf table */
429 int result = 0;
430
431 if (unlikely(!data)) {
432 return -ENODEV;
433 }
434
435 perf = to_perf_data(data);
436 next_perf_state = policy->freq_table[index].driver_data;
437 if (perf->state == next_perf_state) {
438 if (unlikely(data->resume)) {
439 pr_debug("Called after resume, resetting to P%d\n",
440 next_perf_state);
441 data->resume = 0;
442 } else {
443 pr_debug("Already at target state (P%d)\n",
444 next_perf_state);
445 return 0;
446 }
447 }
448
449 /*
450 * The core won't allow CPUs to go away until the governor has been
451 * stopped, so we can rely on the stability of policy->cpus.
452 */
453 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ?
454 cpumask_of(policy->cpu) : policy->cpus;
455
456 drv_write(data, mask, perf->states[next_perf_state].control);
457
458 if (acpi_pstate_strict) {
459 if (!check_freqs(policy, mask,
460 policy->freq_table[index].frequency)) {
461 pr_debug("acpi_cpufreq_target failed (%d)\n",
462 policy->cpu);
463 result = -EAGAIN;
464 }
465 }
466
467 if (!result)
468 perf->state = next_perf_state;
469
470 return result;
471 }
472
473 static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy,
474 unsigned int target_freq)
475 {
476 struct acpi_cpufreq_data *data = policy->driver_data;
477 struct acpi_processor_performance *perf;
478 struct cpufreq_frequency_table *entry;
479 unsigned int next_perf_state, next_freq, index;
480
481 /*
482 * Find the closest frequency above target_freq.
483 */
484 if (policy->cached_target_freq == target_freq)
485 index = policy->cached_resolved_idx;
486 else
487 index = cpufreq_table_find_index_dl(policy, target_freq);
488
489 entry = &policy->freq_table[index];
490 next_freq = entry->frequency;
491 next_perf_state = entry->driver_data;
492
493 perf = to_perf_data(data);
494 if (perf->state == next_perf_state) {
495 if (unlikely(data->resume))
496 data->resume = 0;
497 else
498 return next_freq;
499 }
500
501 data->cpu_freq_write(&perf->control_register,
502 perf->states[next_perf_state].control);
503 perf->state = next_perf_state;
504 return next_freq;
505 }
506
507 static unsigned long
508 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
509 {
510 struct acpi_processor_performance *perf;
511
512 perf = to_perf_data(data);
513 if (cpu_khz) {
514 /* search the closest match to cpu_khz */
515 unsigned int i;
516 unsigned long freq;
517 unsigned long freqn = perf->states[0].core_frequency * 1000;
518
519 for (i = 0; i < (perf->state_count-1); i++) {
520 freq = freqn;
521 freqn = perf->states[i+1].core_frequency * 1000;
522 if ((2 * cpu_khz) > (freqn + freq)) {
523 perf->state = i;
524 return freq;
525 }
526 }
527 perf->state = perf->state_count-1;
528 return freqn;
529 } else {
530 /* assume CPU is at P0... */
531 perf->state = 0;
532 return perf->states[0].core_frequency * 1000;
533 }
534 }
535
536 static void free_acpi_perf_data(void)
537 {
538 unsigned int i;
539
540 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
541 for_each_possible_cpu(i)
542 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
543 ->shared_cpu_map);
544 free_percpu(acpi_perf_data);
545 }
546
547 static int cpufreq_boost_online(unsigned int cpu)
548 {
549 /*
550 * On the CPU_UP path we simply keep the boost-disable flag
551 * in sync with the current global state.
552 */
553 return boost_set_msr(acpi_cpufreq_driver.boost_enabled);
554 }
555
556 static int cpufreq_boost_down_prep(unsigned int cpu)
557 {
558 /*
559 * Clear the boost-disable bit on the CPU_DOWN path so that
560 * this cpu cannot block the remaining ones from boosting.
561 */
562 return boost_set_msr(1);
563 }
564
565 /*
566 * acpi_cpufreq_early_init - initialize ACPI P-States library
567 *
568 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
569 * in order to determine correct frequency and voltage pairings. We can
570 * do _PDC and _PSD and find out the processor dependency for the
571 * actual init that will happen later...
572 */
573 static int __init acpi_cpufreq_early_init(void)
574 {
575 unsigned int i;
576 pr_debug("acpi_cpufreq_early_init\n");
577
578 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
579 if (!acpi_perf_data) {
580 pr_debug("Memory allocation error for acpi_perf_data.\n");
581 return -ENOMEM;
582 }
583 for_each_possible_cpu(i) {
584 if (!zalloc_cpumask_var_node(
585 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
586 GFP_KERNEL, cpu_to_node(i))) {
587
588 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
589 free_acpi_perf_data();
590 return -ENOMEM;
591 }
592 }
593
594 /* Do initialization in ACPI core */
595 acpi_processor_preregister_performance(acpi_perf_data);
596 return 0;
597 }
598
599 #ifdef CONFIG_SMP
600 /*
601 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
602 * or do it in BIOS firmware and won't inform about it to OS. If not
603 * detected, this has a side effect of making CPU run at a different speed
604 * than OS intended it to run at. Detect it and handle it cleanly.
605 */
606 static int bios_with_sw_any_bug;
607
608 static int sw_any_bug_found(const struct dmi_system_id *d)
609 {
610 bios_with_sw_any_bug = 1;
611 return 0;
612 }
613
614 static const struct dmi_system_id sw_any_bug_dmi_table[] = {
615 {
616 .callback = sw_any_bug_found,
617 .ident = "Supermicro Server X6DLP",
618 .matches = {
619 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
620 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
621 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
622 },
623 },
624 { }
625 };
626
627 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
628 {
629 /* Intel Xeon Processor 7100 Series Specification Update
630 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
631 * AL30: A Machine Check Exception (MCE) Occurring during an
632 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
633 * Both Processor Cores to Lock Up. */
634 if (c->x86_vendor == X86_VENDOR_INTEL) {
635 if ((c->x86 == 15) &&
636 (c->x86_model == 6) &&
637 (c->x86_stepping == 8)) {
638 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
639 return -ENODEV;
640 }
641 }
642 return 0;
643 }
644 #endif
645
646 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
647 {
648 unsigned int i;
649 unsigned int valid_states = 0;
650 unsigned int cpu = policy->cpu;
651 struct acpi_cpufreq_data *data;
652 unsigned int result = 0;
653 struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
654 struct acpi_processor_performance *perf;
655 struct cpufreq_frequency_table *freq_table;
656 #ifdef CONFIG_SMP
657 static int blacklisted;
658 #endif
659
660 pr_debug("acpi_cpufreq_cpu_init\n");
661
662 #ifdef CONFIG_SMP
663 if (blacklisted)
664 return blacklisted;
665 blacklisted = acpi_cpufreq_blacklist(c);
666 if (blacklisted)
667 return blacklisted;
668 #endif
669
670 data = kzalloc(sizeof(*data), GFP_KERNEL);
671 if (!data)
672 return -ENOMEM;
673
674 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
675 result = -ENOMEM;
676 goto err_free;
677 }
678
679 perf = per_cpu_ptr(acpi_perf_data, cpu);
680 data->acpi_perf_cpu = cpu;
681 policy->driver_data = data;
682
683 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
684 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
685
686 result = acpi_processor_register_performance(perf, cpu);
687 if (result)
688 goto err_free_mask;
689
690 policy->shared_type = perf->shared_type;
691
692 /*
693 * Will let policy->cpus know about dependency only when software
694 * coordination is required.
695 */
696 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
697 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
698 cpumask_copy(policy->cpus, perf->shared_cpu_map);
699 }
700 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
701
702 #ifdef CONFIG_SMP
703 dmi_check_system(sw_any_bug_dmi_table);
704 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
705 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
706 cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
707 }
708
709 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
710 cpumask_clear(policy->cpus);
711 cpumask_set_cpu(cpu, policy->cpus);
712 cpumask_copy(data->freqdomain_cpus,
713 topology_sibling_cpumask(cpu));
714 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
715 pr_info_once("overriding BIOS provided _PSD data\n");
716 }
717 #endif
718
719 /* capability check */
720 if (perf->state_count <= 1) {
721 pr_debug("No P-States\n");
722 result = -ENODEV;
723 goto err_unreg;
724 }
725
726 if (perf->control_register.space_id != perf->status_register.space_id) {
727 result = -ENODEV;
728 goto err_unreg;
729 }
730
731 switch (perf->control_register.space_id) {
732 case ACPI_ADR_SPACE_SYSTEM_IO:
733 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
734 boot_cpu_data.x86 == 0xf) {
735 pr_debug("AMD K8 systems must use native drivers.\n");
736 result = -ENODEV;
737 goto err_unreg;
738 }
739 pr_debug("SYSTEM IO addr space\n");
740 data->cpu_feature = SYSTEM_IO_CAPABLE;
741 data->cpu_freq_read = cpu_freq_read_io;
742 data->cpu_freq_write = cpu_freq_write_io;
743 break;
744 case ACPI_ADR_SPACE_FIXED_HARDWARE:
745 pr_debug("HARDWARE addr space\n");
746 if (check_est_cpu(cpu)) {
747 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
748 data->cpu_freq_read = cpu_freq_read_intel;
749 data->cpu_freq_write = cpu_freq_write_intel;
750 break;
751 }
752 if (check_amd_hwpstate_cpu(cpu)) {
753 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
754 data->cpu_freq_read = cpu_freq_read_amd;
755 data->cpu_freq_write = cpu_freq_write_amd;
756 break;
757 }
758 result = -ENODEV;
759 goto err_unreg;
760 default:
761 pr_debug("Unknown addr space %d\n",
762 (u32) (perf->control_register.space_id));
763 result = -ENODEV;
764 goto err_unreg;
765 }
766
767 freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table),
768 GFP_KERNEL);
769 if (!freq_table) {
770 result = -ENOMEM;
771 goto err_unreg;
772 }
773
774 /* detect transition latency */
775 policy->cpuinfo.transition_latency = 0;
776 for (i = 0; i < perf->state_count; i++) {
777 if ((perf->states[i].transition_latency * 1000) >
778 policy->cpuinfo.transition_latency)
779 policy->cpuinfo.transition_latency =
780 perf->states[i].transition_latency * 1000;
781 }
782
783 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
784 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
785 policy->cpuinfo.transition_latency > 20 * 1000) {
786 policy->cpuinfo.transition_latency = 20 * 1000;
787 pr_info_once("P-state transition latency capped at 20 uS\n");
788 }
789
790 /* table init */
791 for (i = 0; i < perf->state_count; i++) {
792 if (i > 0 && perf->states[i].core_frequency >=
793 freq_table[valid_states-1].frequency / 1000)
794 continue;
795
796 freq_table[valid_states].driver_data = i;
797 freq_table[valid_states].frequency =
798 perf->states[i].core_frequency * 1000;
799 valid_states++;
800 }
801 freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
802 policy->freq_table = freq_table;
803 perf->state = 0;
804
805 switch (perf->control_register.space_id) {
806 case ACPI_ADR_SPACE_SYSTEM_IO:
807 /*
808 * The core will not set policy->cur, because
809 * cpufreq_driver->get is NULL, so we need to set it here.
810 * However, we have to guess it, because the current speed is
811 * unknown and not detectable via IO ports.
812 */
813 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
814 break;
815 case ACPI_ADR_SPACE_FIXED_HARDWARE:
816 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
817 break;
818 default:
819 break;
820 }
821
822 /* notify BIOS that we exist */
823 acpi_processor_notify_smm(THIS_MODULE);
824
825 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
826 for (i = 0; i < perf->state_count; i++)
827 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
828 (i == perf->state ? '*' : ' '), i,
829 (u32) perf->states[i].core_frequency,
830 (u32) perf->states[i].power,
831 (u32) perf->states[i].transition_latency);
832
833 /*
834 * the first call to ->target() should result in us actually
835 * writing something to the appropriate registers.
836 */
837 data->resume = 1;
838
839 policy->fast_switch_possible = !acpi_pstate_strict &&
840 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY);
841
842 return result;
843
844 err_unreg:
845 acpi_processor_unregister_performance(cpu);
846 err_free_mask:
847 free_cpumask_var(data->freqdomain_cpus);
848 err_free:
849 kfree(data);
850 policy->driver_data = NULL;
851
852 return result;
853 }
854
855 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
856 {
857 struct acpi_cpufreq_data *data = policy->driver_data;
858
859 pr_debug("acpi_cpufreq_cpu_exit\n");
860
861 policy->fast_switch_possible = false;
862 policy->driver_data = NULL;
863 acpi_processor_unregister_performance(data->acpi_perf_cpu);
864 free_cpumask_var(data->freqdomain_cpus);
865 kfree(policy->freq_table);
866 kfree(data);
867
868 return 0;
869 }
870
871 static void acpi_cpufreq_cpu_ready(struct cpufreq_policy *policy)
872 {
873 struct acpi_processor_performance *perf = per_cpu_ptr(acpi_perf_data,
874 policy->cpu);
875
876 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
877 pr_warn(FW_WARN "P-state 0 is not max freq\n");
878 }
879
880 static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
881 {
882 struct acpi_cpufreq_data *data = policy->driver_data;
883
884 pr_debug("acpi_cpufreq_resume\n");
885
886 data->resume = 1;
887
888 return 0;
889 }
890
891 static struct freq_attr *acpi_cpufreq_attr[] = {
892 &cpufreq_freq_attr_scaling_available_freqs,
893 &freqdomain_cpus,
894 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
895 &cpb,
896 #endif
897 NULL,
898 };
899
900 static struct cpufreq_driver acpi_cpufreq_driver = {
901 .verify = cpufreq_generic_frequency_table_verify,
902 .target_index = acpi_cpufreq_target,
903 .fast_switch = acpi_cpufreq_fast_switch,
904 .bios_limit = acpi_processor_get_bios_limit,
905 .init = acpi_cpufreq_cpu_init,
906 .exit = acpi_cpufreq_cpu_exit,
907 .ready = acpi_cpufreq_cpu_ready,
908 .resume = acpi_cpufreq_resume,
909 .name = "acpi-cpufreq",
910 .attr = acpi_cpufreq_attr,
911 };
912
913 static enum cpuhp_state acpi_cpufreq_online;
914
915 static void __init acpi_cpufreq_boost_init(void)
916 {
917 int ret;
918
919 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)))
920 return;
921
922 acpi_cpufreq_driver.set_boost = set_boost;
923 acpi_cpufreq_driver.boost_enabled = boost_state(0);
924
925 /*
926 * This calls the online callback on all online cpu and forces all
927 * MSRs to the same value.
928 */
929 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online",
930 cpufreq_boost_online, cpufreq_boost_down_prep);
931 if (ret < 0) {
932 pr_err("acpi_cpufreq: failed to register hotplug callbacks\n");
933 return;
934 }
935 acpi_cpufreq_online = ret;
936 }
937
938 static void acpi_cpufreq_boost_exit(void)
939 {
940 if (acpi_cpufreq_online > 0)
941 cpuhp_remove_state_nocalls(acpi_cpufreq_online);
942 }
943
944 static int __init acpi_cpufreq_init(void)
945 {
946 int ret;
947
948 if (acpi_disabled)
949 return -ENODEV;
950
951 /* don't keep reloading if cpufreq_driver exists */
952 if (cpufreq_get_current_driver())
953 return -EEXIST;
954
955 pr_debug("acpi_cpufreq_init\n");
956
957 ret = acpi_cpufreq_early_init();
958 if (ret)
959 return ret;
960
961 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
962 /* this is a sysfs file with a strange name and an even stranger
963 * semantic - per CPU instantiation, but system global effect.
964 * Lets enable it only on AMD CPUs for compatibility reasons and
965 * only if configured. This is considered legacy code, which
966 * will probably be removed at some point in the future.
967 */
968 if (!check_amd_hwpstate_cpu(0)) {
969 struct freq_attr **attr;
970
971 pr_debug("CPB unsupported, do not expose it\n");
972
973 for (attr = acpi_cpufreq_attr; *attr; attr++)
974 if (*attr == &cpb) {
975 *attr = NULL;
976 break;
977 }
978 }
979 #endif
980 acpi_cpufreq_boost_init();
981
982 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
983 if (ret) {
984 free_acpi_perf_data();
985 acpi_cpufreq_boost_exit();
986 }
987 return ret;
988 }
989
990 static void __exit acpi_cpufreq_exit(void)
991 {
992 pr_debug("acpi_cpufreq_exit\n");
993
994 acpi_cpufreq_boost_exit();
995
996 cpufreq_unregister_driver(&acpi_cpufreq_driver);
997
998 free_acpi_perf_data();
999 }
1000
1001 module_param(acpi_pstate_strict, uint, 0644);
1002 MODULE_PARM_DESC(acpi_pstate_strict,
1003 "value 0 or non-zero. non-zero -> strict ACPI checks are "
1004 "performed during frequency changes.");
1005
1006 late_initcall(acpi_cpufreq_init);
1007 module_exit(acpi_cpufreq_exit);
1008
1009 static const struct x86_cpu_id acpi_cpufreq_ids[] = {
1010 X86_FEATURE_MATCH(X86_FEATURE_ACPI),
1011 X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
1012 {}
1013 };
1014 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1015
1016 static const struct acpi_device_id processor_device_ids[] = {
1017 {ACPI_PROCESSOR_OBJECT_HID, },
1018 {ACPI_PROCESSOR_DEVICE_HID, },
1019 {},
1020 };
1021 MODULE_DEVICE_TABLE(acpi, processor_device_ids);
1022
1023 MODULE_ALIAS("acpi");