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1 /*
2 * acpi-cpufreq.c - ACPI Processor P-States Driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/smp.h>
34 #include <linux/sched.h>
35 #include <linux/cpufreq.h>
36 #include <linux/compiler.h>
37 #include <linux/dmi.h>
38 #include <linux/slab.h>
39
40 #include <linux/acpi.h>
41 #include <linux/io.h>
42 #include <linux/delay.h>
43 #include <linux/uaccess.h>
44
45 #include <acpi/processor.h>
46
47 #include <asm/msr.h>
48 #include <asm/processor.h>
49 #include <asm/cpufeature.h>
50
51 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
52 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
53 MODULE_LICENSE("GPL");
54
55 enum {
56 UNDEFINED_CAPABLE = 0,
57 SYSTEM_INTEL_MSR_CAPABLE,
58 SYSTEM_AMD_MSR_CAPABLE,
59 SYSTEM_IO_CAPABLE,
60 };
61
62 #define INTEL_MSR_RANGE (0xffff)
63 #define AMD_MSR_RANGE (0x7)
64
65 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
66
67 struct acpi_cpufreq_data {
68 unsigned int resume;
69 unsigned int cpu_feature;
70 unsigned int acpi_perf_cpu;
71 cpumask_var_t freqdomain_cpus;
72 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val);
73 u32 (*cpu_freq_read)(struct acpi_pct_register *reg);
74 };
75
76 /* acpi_perf_data is a pointer to percpu data. */
77 static struct acpi_processor_performance __percpu *acpi_perf_data;
78
79 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
80 {
81 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
82 }
83
84 static struct cpufreq_driver acpi_cpufreq_driver;
85
86 static unsigned int acpi_pstate_strict;
87 static struct msr __percpu *msrs;
88
89 static bool boost_state(unsigned int cpu)
90 {
91 u32 lo, hi;
92 u64 msr;
93
94 switch (boot_cpu_data.x86_vendor) {
95 case X86_VENDOR_INTEL:
96 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
97 msr = lo | ((u64)hi << 32);
98 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
99 case X86_VENDOR_AMD:
100 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
101 msr = lo | ((u64)hi << 32);
102 return !(msr & MSR_K7_HWCR_CPB_DIS);
103 }
104 return false;
105 }
106
107 static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
108 {
109 u32 cpu;
110 u32 msr_addr;
111 u64 msr_mask;
112
113 switch (boot_cpu_data.x86_vendor) {
114 case X86_VENDOR_INTEL:
115 msr_addr = MSR_IA32_MISC_ENABLE;
116 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
117 break;
118 case X86_VENDOR_AMD:
119 msr_addr = MSR_K7_HWCR;
120 msr_mask = MSR_K7_HWCR_CPB_DIS;
121 break;
122 default:
123 return;
124 }
125
126 rdmsr_on_cpus(cpumask, msr_addr, msrs);
127
128 for_each_cpu(cpu, cpumask) {
129 struct msr *reg = per_cpu_ptr(msrs, cpu);
130 if (enable)
131 reg->q &= ~msr_mask;
132 else
133 reg->q |= msr_mask;
134 }
135
136 wrmsr_on_cpus(cpumask, msr_addr, msrs);
137 }
138
139 static int set_boost(int val)
140 {
141 get_online_cpus();
142 boost_set_msrs(val, cpu_online_mask);
143 put_online_cpus();
144 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
145
146 return 0;
147 }
148
149 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
150 {
151 struct acpi_cpufreq_data *data = policy->driver_data;
152
153 if (unlikely(!data))
154 return -ENODEV;
155
156 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
157 }
158
159 cpufreq_freq_attr_ro(freqdomain_cpus);
160
161 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
162 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
163 size_t count)
164 {
165 int ret;
166 unsigned int val = 0;
167
168 if (!acpi_cpufreq_driver.set_boost)
169 return -EINVAL;
170
171 ret = kstrtouint(buf, 10, &val);
172 if (ret || val > 1)
173 return -EINVAL;
174
175 set_boost(val);
176
177 return count;
178 }
179
180 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
181 {
182 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
183 }
184
185 cpufreq_freq_attr_rw(cpb);
186 #endif
187
188 static int check_est_cpu(unsigned int cpuid)
189 {
190 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
191
192 return cpu_has(cpu, X86_FEATURE_EST);
193 }
194
195 static int check_amd_hwpstate_cpu(unsigned int cpuid)
196 {
197 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
198
199 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
200 }
201
202 static unsigned extract_io(struct cpufreq_policy *policy, u32 value)
203 {
204 struct acpi_cpufreq_data *data = policy->driver_data;
205 struct acpi_processor_performance *perf;
206 int i;
207
208 perf = to_perf_data(data);
209
210 for (i = 0; i < perf->state_count; i++) {
211 if (value == perf->states[i].status)
212 return policy->freq_table[i].frequency;
213 }
214 return 0;
215 }
216
217 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
218 {
219 struct acpi_cpufreq_data *data = policy->driver_data;
220 struct cpufreq_frequency_table *pos;
221 struct acpi_processor_performance *perf;
222
223 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
224 msr &= AMD_MSR_RANGE;
225 else
226 msr &= INTEL_MSR_RANGE;
227
228 perf = to_perf_data(data);
229
230 cpufreq_for_each_entry(pos, policy->freq_table)
231 if (msr == perf->states[pos->driver_data].status)
232 return pos->frequency;
233 return policy->freq_table[0].frequency;
234 }
235
236 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val)
237 {
238 struct acpi_cpufreq_data *data = policy->driver_data;
239
240 switch (data->cpu_feature) {
241 case SYSTEM_INTEL_MSR_CAPABLE:
242 case SYSTEM_AMD_MSR_CAPABLE:
243 return extract_msr(policy, val);
244 case SYSTEM_IO_CAPABLE:
245 return extract_io(policy, val);
246 default:
247 return 0;
248 }
249 }
250
251 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used)
252 {
253 u32 val, dummy;
254
255 rdmsr(MSR_IA32_PERF_CTL, val, dummy);
256 return val;
257 }
258
259 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val)
260 {
261 u32 lo, hi;
262
263 rdmsr(MSR_IA32_PERF_CTL, lo, hi);
264 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE);
265 wrmsr(MSR_IA32_PERF_CTL, lo, hi);
266 }
267
268 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used)
269 {
270 u32 val, dummy;
271
272 rdmsr(MSR_AMD_PERF_CTL, val, dummy);
273 return val;
274 }
275
276 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val)
277 {
278 wrmsr(MSR_AMD_PERF_CTL, val, 0);
279 }
280
281 static u32 cpu_freq_read_io(struct acpi_pct_register *reg)
282 {
283 u32 val;
284
285 acpi_os_read_port(reg->address, &val, reg->bit_width);
286 return val;
287 }
288
289 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val)
290 {
291 acpi_os_write_port(reg->address, val, reg->bit_width);
292 }
293
294 struct drv_cmd {
295 struct acpi_pct_register *reg;
296 u32 val;
297 union {
298 void (*write)(struct acpi_pct_register *reg, u32 val);
299 u32 (*read)(struct acpi_pct_register *reg);
300 } func;
301 };
302
303 /* Called via smp_call_function_single(), on the target CPU */
304 static void do_drv_read(void *_cmd)
305 {
306 struct drv_cmd *cmd = _cmd;
307
308 cmd->val = cmd->func.read(cmd->reg);
309 }
310
311 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask)
312 {
313 struct acpi_processor_performance *perf = to_perf_data(data);
314 struct drv_cmd cmd = {
315 .reg = &perf->control_register,
316 .func.read = data->cpu_freq_read,
317 };
318 int err;
319
320 err = smp_call_function_any(mask, do_drv_read, &cmd, 1);
321 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
322 return cmd.val;
323 }
324
325 /* Called via smp_call_function_many(), on the target CPUs */
326 static void do_drv_write(void *_cmd)
327 {
328 struct drv_cmd *cmd = _cmd;
329
330 cmd->func.write(cmd->reg, cmd->val);
331 }
332
333 static void drv_write(struct acpi_cpufreq_data *data,
334 const struct cpumask *mask, u32 val)
335 {
336 struct acpi_processor_performance *perf = to_perf_data(data);
337 struct drv_cmd cmd = {
338 .reg = &perf->control_register,
339 .val = val,
340 .func.write = data->cpu_freq_write,
341 };
342 int this_cpu;
343
344 this_cpu = get_cpu();
345 if (cpumask_test_cpu(this_cpu, mask))
346 do_drv_write(&cmd);
347
348 smp_call_function_many(mask, do_drv_write, &cmd, 1);
349 put_cpu();
350 }
351
352 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
353 {
354 u32 val;
355
356 if (unlikely(cpumask_empty(mask)))
357 return 0;
358
359 val = drv_read(data, mask);
360
361 pr_debug("get_cur_val = %u\n", val);
362
363 return val;
364 }
365
366 static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
367 {
368 struct acpi_cpufreq_data *data;
369 struct cpufreq_policy *policy;
370 unsigned int freq;
371 unsigned int cached_freq;
372
373 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
374
375 policy = cpufreq_cpu_get_raw(cpu);
376 if (unlikely(!policy))
377 return 0;
378
379 data = policy->driver_data;
380 if (unlikely(!data || !policy->freq_table))
381 return 0;
382
383 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency;
384 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data));
385 if (freq != cached_freq) {
386 /*
387 * The dreaded BIOS frequency change behind our back.
388 * Force set the frequency on next target call.
389 */
390 data->resume = 1;
391 }
392
393 pr_debug("cur freq = %u\n", freq);
394
395 return freq;
396 }
397
398 static unsigned int check_freqs(struct cpufreq_policy *policy,
399 const struct cpumask *mask, unsigned int freq)
400 {
401 struct acpi_cpufreq_data *data = policy->driver_data;
402 unsigned int cur_freq;
403 unsigned int i;
404
405 for (i = 0; i < 100; i++) {
406 cur_freq = extract_freq(policy, get_cur_val(mask, data));
407 if (cur_freq == freq)
408 return 1;
409 udelay(10);
410 }
411 return 0;
412 }
413
414 static int acpi_cpufreq_target(struct cpufreq_policy *policy,
415 unsigned int index)
416 {
417 struct acpi_cpufreq_data *data = policy->driver_data;
418 struct acpi_processor_performance *perf;
419 const struct cpumask *mask;
420 unsigned int next_perf_state = 0; /* Index into perf table */
421 int result = 0;
422
423 if (unlikely(!data)) {
424 return -ENODEV;
425 }
426
427 perf = to_perf_data(data);
428 next_perf_state = policy->freq_table[index].driver_data;
429 if (perf->state == next_perf_state) {
430 if (unlikely(data->resume)) {
431 pr_debug("Called after resume, resetting to P%d\n",
432 next_perf_state);
433 data->resume = 0;
434 } else {
435 pr_debug("Already at target state (P%d)\n",
436 next_perf_state);
437 return 0;
438 }
439 }
440
441 /*
442 * The core won't allow CPUs to go away until the governor has been
443 * stopped, so we can rely on the stability of policy->cpus.
444 */
445 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ?
446 cpumask_of(policy->cpu) : policy->cpus;
447
448 drv_write(data, mask, perf->states[next_perf_state].control);
449
450 if (acpi_pstate_strict) {
451 if (!check_freqs(policy, mask,
452 policy->freq_table[index].frequency)) {
453 pr_debug("acpi_cpufreq_target failed (%d)\n",
454 policy->cpu);
455 result = -EAGAIN;
456 }
457 }
458
459 if (!result)
460 perf->state = next_perf_state;
461
462 return result;
463 }
464
465 unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy,
466 unsigned int target_freq)
467 {
468 struct acpi_cpufreq_data *data = policy->driver_data;
469 struct acpi_processor_performance *perf;
470 struct cpufreq_frequency_table *entry;
471 unsigned int next_perf_state, next_freq, index;
472
473 /*
474 * Find the closest frequency above target_freq.
475 */
476 if (policy->cached_target_freq == target_freq)
477 index = policy->cached_resolved_idx;
478 else
479 index = cpufreq_table_find_index_dl(policy, target_freq);
480
481 entry = &policy->freq_table[index];
482 next_freq = entry->frequency;
483 next_perf_state = entry->driver_data;
484
485 perf = to_perf_data(data);
486 if (perf->state == next_perf_state) {
487 if (unlikely(data->resume))
488 data->resume = 0;
489 else
490 return next_freq;
491 }
492
493 data->cpu_freq_write(&perf->control_register,
494 perf->states[next_perf_state].control);
495 perf->state = next_perf_state;
496 return next_freq;
497 }
498
499 static unsigned long
500 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
501 {
502 struct acpi_processor_performance *perf;
503
504 perf = to_perf_data(data);
505 if (cpu_khz) {
506 /* search the closest match to cpu_khz */
507 unsigned int i;
508 unsigned long freq;
509 unsigned long freqn = perf->states[0].core_frequency * 1000;
510
511 for (i = 0; i < (perf->state_count-1); i++) {
512 freq = freqn;
513 freqn = perf->states[i+1].core_frequency * 1000;
514 if ((2 * cpu_khz) > (freqn + freq)) {
515 perf->state = i;
516 return freq;
517 }
518 }
519 perf->state = perf->state_count-1;
520 return freqn;
521 } else {
522 /* assume CPU is at P0... */
523 perf->state = 0;
524 return perf->states[0].core_frequency * 1000;
525 }
526 }
527
528 static void free_acpi_perf_data(void)
529 {
530 unsigned int i;
531
532 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
533 for_each_possible_cpu(i)
534 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
535 ->shared_cpu_map);
536 free_percpu(acpi_perf_data);
537 }
538
539 static int cpufreq_boost_online(unsigned int cpu)
540 {
541 const struct cpumask *cpumask;
542
543 cpumask = get_cpu_mask(cpu);
544 /*
545 * On the CPU_UP path we simply keep the boost-disable flag
546 * in sync with the current global state.
547 */
548 boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask);
549 return 0;
550 }
551
552 static int cpufreq_boost_down_prep(unsigned int cpu)
553 {
554 const struct cpumask *cpumask;
555
556 cpumask = get_cpu_mask(cpu);
557
558 /*
559 * Clear the boost-disable bit on the CPU_DOWN path so that
560 * this cpu cannot block the remaining ones from boosting.
561 */
562 boost_set_msrs(1, cpumask);
563 return 0;
564 }
565
566 /*
567 * acpi_cpufreq_early_init - initialize ACPI P-States library
568 *
569 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
570 * in order to determine correct frequency and voltage pairings. We can
571 * do _PDC and _PSD and find out the processor dependency for the
572 * actual init that will happen later...
573 */
574 static int __init acpi_cpufreq_early_init(void)
575 {
576 unsigned int i;
577 pr_debug("acpi_cpufreq_early_init\n");
578
579 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
580 if (!acpi_perf_data) {
581 pr_debug("Memory allocation error for acpi_perf_data.\n");
582 return -ENOMEM;
583 }
584 for_each_possible_cpu(i) {
585 if (!zalloc_cpumask_var_node(
586 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
587 GFP_KERNEL, cpu_to_node(i))) {
588
589 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
590 free_acpi_perf_data();
591 return -ENOMEM;
592 }
593 }
594
595 /* Do initialization in ACPI core */
596 acpi_processor_preregister_performance(acpi_perf_data);
597 return 0;
598 }
599
600 #ifdef CONFIG_SMP
601 /*
602 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
603 * or do it in BIOS firmware and won't inform about it to OS. If not
604 * detected, this has a side effect of making CPU run at a different speed
605 * than OS intended it to run at. Detect it and handle it cleanly.
606 */
607 static int bios_with_sw_any_bug;
608
609 static int sw_any_bug_found(const struct dmi_system_id *d)
610 {
611 bios_with_sw_any_bug = 1;
612 return 0;
613 }
614
615 static const struct dmi_system_id sw_any_bug_dmi_table[] = {
616 {
617 .callback = sw_any_bug_found,
618 .ident = "Supermicro Server X6DLP",
619 .matches = {
620 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
621 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
622 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
623 },
624 },
625 { }
626 };
627
628 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
629 {
630 /* Intel Xeon Processor 7100 Series Specification Update
631 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
632 * AL30: A Machine Check Exception (MCE) Occurring during an
633 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
634 * Both Processor Cores to Lock Up. */
635 if (c->x86_vendor == X86_VENDOR_INTEL) {
636 if ((c->x86 == 15) &&
637 (c->x86_model == 6) &&
638 (c->x86_mask == 8)) {
639 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
640 return -ENODEV;
641 }
642 }
643 return 0;
644 }
645 #endif
646
647 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
648 {
649 unsigned int i;
650 unsigned int valid_states = 0;
651 unsigned int cpu = policy->cpu;
652 struct acpi_cpufreq_data *data;
653 unsigned int result = 0;
654 struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
655 struct acpi_processor_performance *perf;
656 struct cpufreq_frequency_table *freq_table;
657 #ifdef CONFIG_SMP
658 static int blacklisted;
659 #endif
660
661 pr_debug("acpi_cpufreq_cpu_init\n");
662
663 #ifdef CONFIG_SMP
664 if (blacklisted)
665 return blacklisted;
666 blacklisted = acpi_cpufreq_blacklist(c);
667 if (blacklisted)
668 return blacklisted;
669 #endif
670
671 data = kzalloc(sizeof(*data), GFP_KERNEL);
672 if (!data)
673 return -ENOMEM;
674
675 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
676 result = -ENOMEM;
677 goto err_free;
678 }
679
680 perf = per_cpu_ptr(acpi_perf_data, cpu);
681 data->acpi_perf_cpu = cpu;
682 policy->driver_data = data;
683
684 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
685 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
686
687 result = acpi_processor_register_performance(perf, cpu);
688 if (result)
689 goto err_free_mask;
690
691 policy->shared_type = perf->shared_type;
692
693 /*
694 * Will let policy->cpus know about dependency only when software
695 * coordination is required.
696 */
697 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
698 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
699 cpumask_copy(policy->cpus, perf->shared_cpu_map);
700 }
701 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
702
703 #ifdef CONFIG_SMP
704 dmi_check_system(sw_any_bug_dmi_table);
705 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
706 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
707 cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
708 }
709
710 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
711 cpumask_clear(policy->cpus);
712 cpumask_set_cpu(cpu, policy->cpus);
713 cpumask_copy(data->freqdomain_cpus,
714 topology_sibling_cpumask(cpu));
715 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
716 pr_info_once("overriding BIOS provided _PSD data\n");
717 }
718 #endif
719
720 /* capability check */
721 if (perf->state_count <= 1) {
722 pr_debug("No P-States\n");
723 result = -ENODEV;
724 goto err_unreg;
725 }
726
727 if (perf->control_register.space_id != perf->status_register.space_id) {
728 result = -ENODEV;
729 goto err_unreg;
730 }
731
732 switch (perf->control_register.space_id) {
733 case ACPI_ADR_SPACE_SYSTEM_IO:
734 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
735 boot_cpu_data.x86 == 0xf) {
736 pr_debug("AMD K8 systems must use native drivers.\n");
737 result = -ENODEV;
738 goto err_unreg;
739 }
740 pr_debug("SYSTEM IO addr space\n");
741 data->cpu_feature = SYSTEM_IO_CAPABLE;
742 data->cpu_freq_read = cpu_freq_read_io;
743 data->cpu_freq_write = cpu_freq_write_io;
744 break;
745 case ACPI_ADR_SPACE_FIXED_HARDWARE:
746 pr_debug("HARDWARE addr space\n");
747 if (check_est_cpu(cpu)) {
748 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
749 data->cpu_freq_read = cpu_freq_read_intel;
750 data->cpu_freq_write = cpu_freq_write_intel;
751 break;
752 }
753 if (check_amd_hwpstate_cpu(cpu)) {
754 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
755 data->cpu_freq_read = cpu_freq_read_amd;
756 data->cpu_freq_write = cpu_freq_write_amd;
757 break;
758 }
759 result = -ENODEV;
760 goto err_unreg;
761 default:
762 pr_debug("Unknown addr space %d\n",
763 (u32) (perf->control_register.space_id));
764 result = -ENODEV;
765 goto err_unreg;
766 }
767
768 freq_table = kzalloc(sizeof(*freq_table) *
769 (perf->state_count+1), GFP_KERNEL);
770 if (!freq_table) {
771 result = -ENOMEM;
772 goto err_unreg;
773 }
774
775 /* detect transition latency */
776 policy->cpuinfo.transition_latency = 0;
777 for (i = 0; i < perf->state_count; i++) {
778 if ((perf->states[i].transition_latency * 1000) >
779 policy->cpuinfo.transition_latency)
780 policy->cpuinfo.transition_latency =
781 perf->states[i].transition_latency * 1000;
782 }
783
784 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
785 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
786 policy->cpuinfo.transition_latency > 20 * 1000) {
787 policy->cpuinfo.transition_latency = 20 * 1000;
788 pr_info_once("P-state transition latency capped at 20 uS\n");
789 }
790
791 /* table init */
792 for (i = 0; i < perf->state_count; i++) {
793 if (i > 0 && perf->states[i].core_frequency >=
794 freq_table[valid_states-1].frequency / 1000)
795 continue;
796
797 freq_table[valid_states].driver_data = i;
798 freq_table[valid_states].frequency =
799 perf->states[i].core_frequency * 1000;
800 valid_states++;
801 }
802 freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
803 perf->state = 0;
804
805 result = cpufreq_table_validate_and_show(policy, freq_table);
806 if (result)
807 goto err_freqfree;
808
809 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
810 pr_warn(FW_WARN "P-state 0 is not max freq\n");
811
812 switch (perf->control_register.space_id) {
813 case ACPI_ADR_SPACE_SYSTEM_IO:
814 /*
815 * The core will not set policy->cur, because
816 * cpufreq_driver->get is NULL, so we need to set it here.
817 * However, we have to guess it, because the current speed is
818 * unknown and not detectable via IO ports.
819 */
820 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
821 break;
822 case ACPI_ADR_SPACE_FIXED_HARDWARE:
823 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
824 break;
825 default:
826 break;
827 }
828
829 /* notify BIOS that we exist */
830 acpi_processor_notify_smm(THIS_MODULE);
831
832 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
833 for (i = 0; i < perf->state_count; i++)
834 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
835 (i == perf->state ? '*' : ' '), i,
836 (u32) perf->states[i].core_frequency,
837 (u32) perf->states[i].power,
838 (u32) perf->states[i].transition_latency);
839
840 /*
841 * the first call to ->target() should result in us actually
842 * writing something to the appropriate registers.
843 */
844 data->resume = 1;
845
846 policy->fast_switch_possible = !acpi_pstate_strict &&
847 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY);
848
849 return result;
850
851 err_freqfree:
852 kfree(freq_table);
853 err_unreg:
854 acpi_processor_unregister_performance(cpu);
855 err_free_mask:
856 free_cpumask_var(data->freqdomain_cpus);
857 err_free:
858 kfree(data);
859 policy->driver_data = NULL;
860
861 return result;
862 }
863
864 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
865 {
866 struct acpi_cpufreq_data *data = policy->driver_data;
867
868 pr_debug("acpi_cpufreq_cpu_exit\n");
869
870 policy->fast_switch_possible = false;
871 policy->driver_data = NULL;
872 acpi_processor_unregister_performance(data->acpi_perf_cpu);
873 free_cpumask_var(data->freqdomain_cpus);
874 kfree(policy->freq_table);
875 kfree(data);
876
877 return 0;
878 }
879
880 static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
881 {
882 struct acpi_cpufreq_data *data = policy->driver_data;
883
884 pr_debug("acpi_cpufreq_resume\n");
885
886 data->resume = 1;
887
888 return 0;
889 }
890
891 static struct freq_attr *acpi_cpufreq_attr[] = {
892 &cpufreq_freq_attr_scaling_available_freqs,
893 &freqdomain_cpus,
894 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
895 &cpb,
896 #endif
897 NULL,
898 };
899
900 static struct cpufreq_driver acpi_cpufreq_driver = {
901 .verify = cpufreq_generic_frequency_table_verify,
902 .target_index = acpi_cpufreq_target,
903 .fast_switch = acpi_cpufreq_fast_switch,
904 .bios_limit = acpi_processor_get_bios_limit,
905 .init = acpi_cpufreq_cpu_init,
906 .exit = acpi_cpufreq_cpu_exit,
907 .resume = acpi_cpufreq_resume,
908 .name = "acpi-cpufreq",
909 .attr = acpi_cpufreq_attr,
910 };
911
912 static enum cpuhp_state acpi_cpufreq_online;
913
914 static void __init acpi_cpufreq_boost_init(void)
915 {
916 int ret;
917
918 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)))
919 return;
920
921 msrs = msrs_alloc();
922
923 if (!msrs)
924 return;
925
926 acpi_cpufreq_driver.set_boost = set_boost;
927 acpi_cpufreq_driver.boost_enabled = boost_state(0);
928
929 /*
930 * This calls the online callback on all online cpu and forces all
931 * MSRs to the same value.
932 */
933 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online",
934 cpufreq_boost_online, cpufreq_boost_down_prep);
935 if (ret < 0) {
936 pr_err("acpi_cpufreq: failed to register hotplug callbacks\n");
937 msrs_free(msrs);
938 msrs = NULL;
939 return;
940 }
941 acpi_cpufreq_online = ret;
942 }
943
944 static void acpi_cpufreq_boost_exit(void)
945 {
946 if (!msrs)
947 return;
948
949 if (acpi_cpufreq_online >= 0)
950 cpuhp_remove_state_nocalls(acpi_cpufreq_online);
951
952 msrs_free(msrs);
953 msrs = NULL;
954 }
955
956 static int __init acpi_cpufreq_init(void)
957 {
958 int ret;
959
960 if (acpi_disabled)
961 return -ENODEV;
962
963 /* don't keep reloading if cpufreq_driver exists */
964 if (cpufreq_get_current_driver())
965 return -EEXIST;
966
967 pr_debug("acpi_cpufreq_init\n");
968
969 ret = acpi_cpufreq_early_init();
970 if (ret)
971 return ret;
972
973 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
974 /* this is a sysfs file with a strange name and an even stranger
975 * semantic - per CPU instantiation, but system global effect.
976 * Lets enable it only on AMD CPUs for compatibility reasons and
977 * only if configured. This is considered legacy code, which
978 * will probably be removed at some point in the future.
979 */
980 if (!check_amd_hwpstate_cpu(0)) {
981 struct freq_attr **attr;
982
983 pr_debug("CPB unsupported, do not expose it\n");
984
985 for (attr = acpi_cpufreq_attr; *attr; attr++)
986 if (*attr == &cpb) {
987 *attr = NULL;
988 break;
989 }
990 }
991 #endif
992 acpi_cpufreq_boost_init();
993
994 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
995 if (ret) {
996 free_acpi_perf_data();
997 acpi_cpufreq_boost_exit();
998 }
999 return ret;
1000 }
1001
1002 static void __exit acpi_cpufreq_exit(void)
1003 {
1004 pr_debug("acpi_cpufreq_exit\n");
1005
1006 acpi_cpufreq_boost_exit();
1007
1008 cpufreq_unregister_driver(&acpi_cpufreq_driver);
1009
1010 free_acpi_perf_data();
1011 }
1012
1013 module_param(acpi_pstate_strict, uint, 0644);
1014 MODULE_PARM_DESC(acpi_pstate_strict,
1015 "value 0 or non-zero. non-zero -> strict ACPI checks are "
1016 "performed during frequency changes.");
1017
1018 late_initcall(acpi_cpufreq_init);
1019 module_exit(acpi_cpufreq_exit);
1020
1021 static const struct x86_cpu_id acpi_cpufreq_ids[] = {
1022 X86_FEATURE_MATCH(X86_FEATURE_ACPI),
1023 X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
1024 {}
1025 };
1026 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1027
1028 static const struct acpi_device_id processor_device_ids[] = {
1029 {ACPI_PROCESSOR_OBJECT_HID, },
1030 {ACPI_PROCESSOR_DEVICE_HID, },
1031 {},
1032 };
1033 MODULE_DEVICE_TABLE(acpi, processor_device_ids);
1034
1035 MODULE_ALIAS("acpi");