drivers/cpufreq/cpufreq-cpu0.c

   1 /*
   2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3  *
   4  * The OPP code in function cpu0_set_target() is reused from
   5  * drivers/cpufreq/omap-cpufreq.c
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  13
  14 #include <linux/clk.h>
  15 #include <linux/cpu.h>
  16 #include <linux/cpu_cooling.h>
  17 #include <linux/cpufreq.h>
  18 #include <linux/cpumask.h>
  19 #include <linux/err.h>
  20 #include <linux/module.h>
  21 #include <linux/of.h>
  22 #include <linux/pm_opp.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/regulator/consumer.h>
  25 #include <linux/slab.h>
  26 #include <linux/thermal.h>
  27
  28 static unsigned int transition_latency;
  29 static unsigned int voltage_tolerance; /* in percentage */
  30
  31 static struct device *cpu_dev;
  32 static struct clk *cpu_clk;
  33 static struct regulator *cpu_reg;
  34 static struct cpufreq_frequency_table *freq_table;
  35 static struct thermal_cooling_device *cdev;
  36
  37 static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
  38 {
  39         struct dev_pm_opp *opp;
  40         unsigned long volt = 0, volt_old = 0, tol = 0;
  41         unsigned int old_freq, new_freq;
  42         long freq_Hz, freq_exact;
  43         int ret;
  44
  45         freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  46         if (freq_Hz <= 0)
  47                 freq_Hz = freq_table[index].frequency * 1000;
  48
  49         freq_exact = freq_Hz;
  50         new_freq = freq_Hz / 1000;
  51         old_freq = clk_get_rate(cpu_clk) / 1000;
  52
  53         if (!IS_ERR(cpu_reg)) {
  54                 rcu_read_lock();
  55                 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
  56                 if (IS_ERR(opp)) {
  57                         rcu_read_unlock();
  58                         pr_err("failed to find OPP for %ld\n", freq_Hz);
  59                         return PTR_ERR(opp);
  60                 }
  61                 volt = dev_pm_opp_get_voltage(opp);
  62                 rcu_read_unlock();
  63                 tol = volt * voltage_tolerance / 100;
  64                 volt_old = regulator_get_voltage(cpu_reg);
  65         }
  66
  67         pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
  68                  old_freq / 1000, volt_old ? volt_old / 1000 : -1,
  69                  new_freq / 1000, volt ? volt / 1000 : -1);
  70
  71         /* scaling up?  scale voltage before frequency */
  72         if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
  73                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  74                 if (ret) {
  75                         pr_err("failed to scale voltage up: %d\n", ret);
  76                         return ret;
  77                 }
  78         }
  79
  80         ret = clk_set_rate(cpu_clk, freq_exact);
  81         if (ret) {
  82                 pr_err("failed to set clock rate: %d\n", ret);
  83                 if (!IS_ERR(cpu_reg))
  84                         regulator_set_voltage_tol(cpu_reg, volt_old, tol);
  85                 return ret;
  86         }
  87
  88         /* scaling down?  scale voltage after frequency */
  89         if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
  90                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  91                 if (ret) {
  92                         pr_err("failed to scale voltage down: %d\n", ret);
  93                         clk_set_rate(cpu_clk, old_freq * 1000);
  94                 }
  95         }
  96
  97         return ret;
  98 }
  99
 100 static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
 101 {
 102         policy->clk = cpu_clk;
 103         return cpufreq_generic_init(policy, freq_table, transition_latency);
 104 }
 105
 106 static struct cpufreq_driver cpu0_cpufreq_driver = {
 107         .flags = CPUFREQ_STICKY,
 108         .verify = cpufreq_generic_frequency_table_verify,
 109         .target_index = cpu0_set_target,
 110         .get = cpufreq_generic_get,
 111         .init = cpu0_cpufreq_init,
 112         .exit = cpufreq_generic_exit,
 113         .name = "generic_cpu0",
 114         .attr = cpufreq_generic_attr,
 115 };
 116
 117 static int cpu0_cpufreq_probe(struct platform_device *pdev)
 118 {
 119         struct device_node *np;
 120         int ret;
 121
 122         cpu_dev = get_cpu_device(0);
 123         if (!cpu_dev) {
 124                 pr_err("failed to get cpu0 device\n");
 125                 return -ENODEV;
 126         }
 127
 128         np = of_node_get(cpu_dev->of_node);
 129         if (!np) {
 130                 pr_err("failed to find cpu0 node\n");
 131                 return -ENOENT;
 132         }
 133
 134         cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0");
 135         if (IS_ERR(cpu_reg)) {
 136                 /*
 137                  * If cpu0 regulator supply node is present, but regulator is
 138                  * not yet registered, we should try defering probe.
 139                  */
 140                 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
 141                         dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
 142                         ret = -EPROBE_DEFER;
 143                         goto out_put_node;
 144                 }
 145                 pr_warn("failed to get cpu0 regulator: %ld\n",
 146                         PTR_ERR(cpu_reg));
 147         }
 148
 149         cpu_clk = devm_clk_get(cpu_dev, NULL);
 150         if (IS_ERR(cpu_clk)) {
 151                 ret = PTR_ERR(cpu_clk);
 152                 pr_err("failed to get cpu0 clock: %d\n", ret);
 153                 goto out_put_node;
 154         }
 155
 156         ret = of_init_opp_table(cpu_dev);
 157         if (ret) {
 158                 pr_err("failed to init OPP table: %d\n", ret);
 159                 goto out_put_node;
 160         }
 161
 162         ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
 163         if (ret) {
 164                 pr_err("failed to init cpufreq table: %d\n", ret);
 165                 goto out_put_node;
 166         }
 167
 168         of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
 169
 170         if (of_property_read_u32(np, "clock-latency", &transition_latency))
 171                 transition_latency = CPUFREQ_ETERNAL;
 172
 173         if (!IS_ERR(cpu_reg)) {
 174                 struct dev_pm_opp *opp;
 175                 unsigned long min_uV, max_uV;
 176                 int i;
 177
 178                 /*
 179                  * OPP is maintained in order of increasing frequency, and
 180                  * freq_table initialised from OPP is therefore sorted in the
 181                  * same order.
 182                  */
 183                 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
 184                         ;
 185                 rcu_read_lock();
 186                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 187                                 freq_table[0].frequency * 1000, true);
 188                 min_uV = dev_pm_opp_get_voltage(opp);
 189                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 190                                 freq_table[i-1].frequency * 1000, true);
 191                 max_uV = dev_pm_opp_get_voltage(opp);
 192                 rcu_read_unlock();
 193                 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
 194                 if (ret > 0)
 195                         transition_latency += ret * 1000;
 196         }
 197
 198         ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
 199         if (ret) {
 200                 pr_err("failed register driver: %d\n", ret);
 201                 goto out_free_table;
 202         }
 203
 204         /*
 205          * For now, just loading the cooling device;
 206          * thermal DT code takes care of matching them.
 207          */
 208         if (of_find_property(np, "#cooling-cells", NULL)) {
 209                 cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
 210                 if (IS_ERR(cdev))
 211                         pr_err("running cpufreq without cooling device: %ld\n",
 212                                PTR_ERR(cdev));
 213         }
 214
 215         of_node_put(np);
 216         return 0;
 217
 218 out_free_table:
 219         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
 220 out_put_node:
 221         of_node_put(np);
 222         return ret;
 223 }
 224
 225 static int cpu0_cpufreq_remove(struct platform_device *pdev)
 226 {
 227         cpufreq_cooling_unregister(cdev);
 228         cpufreq_unregister_driver(&cpu0_cpufreq_driver);
 229         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
 230
 231         return 0;
 232 }
 233
 234 static struct platform_driver cpu0_cpufreq_platdrv = {
 235         .driver = {
 236                 .name   = "cpufreq-cpu0",
 237                 .owner  = THIS_MODULE,
 238         },
 239         .probe          = cpu0_cpufreq_probe,
 240         .remove         = cpu0_cpufreq_remove,
 241 };
 242 module_platform_driver(cpu0_cpufreq_platdrv);
 243
 244 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 245 MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
 246 MODULE_LICENSE("GPL");