drivers/cpufreq/elanfreq.c

   1 /*
   2  *      elanfreq:       cpufreq driver for the AMD ELAN family
   3  *
   4  *      (c) Copyright 2002 Robert Schwebel <r.schwebel@pengutronix.de>
   5  *
   6  *      Parts of this code are (c) Sven Geggus <sven@geggus.net>
   7  *
   8  *      All Rights Reserved.
   9  *
  10  *      This program is free software; you can redistribute it and/or
  11  *      modify it under the terms of the GNU General Public License
  12  *      as published by the Free Software Foundation; either version
  13  *      2 of the License, or (at your option) any later version.
  14  *
  15  *      2002-02-13: - initial revision for 2.4.18-pre9 by Robert Schwebel
  16  *
  17  */
  18
  19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/init.h>
  24
  25 #include <linux/delay.h>
  26 #include <linux/cpufreq.h>
  27
  28 #include <asm/cpu_device_id.h>
  29 #include <asm/msr.h>
  30 #include <linux/timex.h>
  31 #include <linux/io.h>
  32
  33 #define REG_CSCIR 0x22          /* Chip Setup and Control Index Register    */
  34 #define REG_CSCDR 0x23          /* Chip Setup and Control Data  Register    */
  35
  36 /* Module parameter */
  37 static int max_freq;
  38
  39 struct s_elan_multiplier {
  40         int clock;              /* frequency in kHz                         */
  41         int val40h;             /* PMU Force Mode register                  */
  42         int val80h;             /* CPU Clock Speed Register                 */
  43 };
  44
  45 /*
  46  * It is important that the frequencies
  47  * are listed in ascending order here!
  48  */
  49 static struct s_elan_multiplier elan_multiplier[] = {
  50         {1000,  0x02,   0x18},
  51         {2000,  0x02,   0x10},
  52         {4000,  0x02,   0x08},
  53         {8000,  0x00,   0x00},
  54         {16000, 0x00,   0x02},
  55         {33000, 0x00,   0x04},
  56         {66000, 0x01,   0x04},
  57         {99000, 0x01,   0x05}
  58 };
  59
  60 static struct cpufreq_frequency_table elanfreq_table[] = {
  61         {0, 0,  1000},
  62         {0, 1,  2000},
  63         {0, 2,  4000},
  64         {0, 3,  8000},
  65         {0, 4,  16000},
  66         {0, 5,  33000},
  67         {0, 6,  66000},
  68         {0, 7,  99000},
  69         {0, 0,  CPUFREQ_TABLE_END},
  70 };
  71
  72
  73 /**
  74  *      elanfreq_get_cpu_frequency: determine current cpu speed
  75  *
  76  *      Finds out at which frequency the CPU of the Elan SOC runs
  77  *      at the moment. Frequencies from 1 to 33 MHz are generated
  78  *      the normal way, 66 and 99 MHz are called "Hyperspeed Mode"
  79  *      and have the rest of the chip running with 33 MHz.
  80  */
  81
  82 static unsigned int elanfreq_get_cpu_frequency(unsigned int cpu)
  83 {
  84         u8 clockspeed_reg;    /* Clock Speed Register */
  85
  86         local_irq_disable();
  87         outb_p(0x80, REG_CSCIR);
  88         clockspeed_reg = inb_p(REG_CSCDR);
  89         local_irq_enable();
  90
  91         if ((clockspeed_reg & 0xE0) == 0xE0)
  92                 return 0;
  93
  94         /* Are we in CPU clock multiplied mode (66/99 MHz)? */
  95         if ((clockspeed_reg & 0xE0) == 0xC0) {
  96                 if ((clockspeed_reg & 0x01) == 0)
  97                         return 66000;
  98                 else
  99                         return 99000;
 100         }
 101
 102         /* 33 MHz is not 32 MHz... */
 103         if ((clockspeed_reg & 0xE0) == 0xA0)
 104                 return 33000;
 105
 106         return (1<<((clockspeed_reg & 0xE0) >> 5)) * 1000;
 107 }
 108
 109
 110 static int elanfreq_target(struct cpufreq_policy *policy,
 111                             unsigned int state)
 112 {
 113         /*
 114          * Access to the Elan's internal registers is indexed via
 115          * 0x22: Chip Setup & Control Register Index Register (CSCI)
 116          * 0x23: Chip Setup & Control Register Data  Register (CSCD)
 117          *
 118          */
 119
 120         /*
 121          * 0x40 is the Power Management Unit's Force Mode Register.
 122          * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency)
 123          */
 124
 125         local_irq_disable();
 126         outb_p(0x40, REG_CSCIR);                /* Disable hyperspeed mode */
 127         outb_p(0x00, REG_CSCDR);
 128         local_irq_enable();             /* wait till internal pipelines and */
 129         udelay(1000);                   /* buffers have cleaned up          */
 130
 131         local_irq_disable();
 132
 133         /* now, set the CPU clock speed register (0x80) */
 134         outb_p(0x80, REG_CSCIR);
 135         outb_p(elan_multiplier[state].val80h, REG_CSCDR);
 136
 137         /* now, the hyperspeed bit in PMU Force Mode Register (0x40) */
 138         outb_p(0x40, REG_CSCIR);
 139         outb_p(elan_multiplier[state].val40h, REG_CSCDR);
 140         udelay(10000);
 141         local_irq_enable();
 142
 143         return 0;
 144 }
 145 /*
 146  *      Module init and exit code
 147  */
 148
 149 static int elanfreq_cpu_init(struct cpufreq_policy *policy)
 150 {
 151         struct cpuinfo_x86 *c = &cpu_data(0);
 152         struct cpufreq_frequency_table *pos;
 153
 154         /* capability check */
 155         if ((c->x86_vendor != X86_VENDOR_AMD) ||
 156             (c->x86 != 4) || (c->x86_model != 10))
 157                 return -ENODEV;
 158
 159         /* max freq */
 160         if (!max_freq)
 161                 max_freq = elanfreq_get_cpu_frequency(0);
 162
 163         /* table init */
 164         cpufreq_for_each_entry(pos, elanfreq_table)
 165                 if (pos->frequency > max_freq)
 166                         pos->frequency = CPUFREQ_ENTRY_INVALID;
 167
 168         /* cpuinfo and default policy values */
 169         policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
 170
 171         return cpufreq_table_validate_and_show(policy, elanfreq_table);
 172 }
 173
 174
 175 #ifndef MODULE
 176 /**
 177  * elanfreq_setup - elanfreq command line parameter parsing
 178  *
 179  * elanfreq command line parameter.  Use:
 180  *  elanfreq=66000
 181  * to set the maximum CPU frequency to 66 MHz. Note that in
 182  * case you do not give this boot parameter, the maximum
 183  * frequency will fall back to _current_ CPU frequency which
 184  * might be lower. If you build this as a module, use the
 185  * max_freq module parameter instead.
 186  */
 187 static int __init elanfreq_setup(char *str)
 188 {
 189         max_freq = simple_strtoul(str, &str, 0);
 190         pr_warn("You're using the deprecated elanfreq command line option. Use elanfreq.max_freq instead, please!\n");
 191         return 1;
 192 }
 193 __setup("elanfreq=", elanfreq_setup);
 194 #endif
 195
 196
 197 static struct cpufreq_driver elanfreq_driver = {
 198         .get            = elanfreq_get_cpu_frequency,
 199         .verify         = cpufreq_generic_frequency_table_verify,
 200         .target_index   = elanfreq_target,
 201         .init           = elanfreq_cpu_init,
 202         .name           = "elanfreq",
 203         .attr           = cpufreq_generic_attr,
 204 };
 205
 206 static const struct x86_cpu_id elan_id[] = {
 207         { X86_VENDOR_AMD, 4, 10, },
 208         {}
 209 };
 210 MODULE_DEVICE_TABLE(x86cpu, elan_id);
 211
 212 static int __init elanfreq_init(void)
 213 {
 214         if (!x86_match_cpu(elan_id))
 215                 return -ENODEV;
 216         return cpufreq_register_driver(&elanfreq_driver);
 217 }
 218
 219
 220 static void __exit elanfreq_exit(void)
 221 {
 222         cpufreq_unregister_driver(&elanfreq_driver);
 223 }
 224
 225
 226 module_param(max_freq, int, 0444);
 227
 228 MODULE_LICENSE("GPL");
 229 MODULE_AUTHOR("Robert Schwebel <r.schwebel@pengutronix.de>, "
 230                 "Sven Geggus <sven@geggus.net>");
 231 MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs");
 232
 233 module_init(elanfreq_init);
 234 module_exit(elanfreq_exit);