]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/cpufreq/exynos-cpufreq.c
cpufreq: imx6q: Fix clock enable balance
[mirror_ubuntu-zesty-kernel.git] / drivers / cpufreq / exynos-cpufreq.c
1 /*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/err.h>
14 #include <linux/clk.h>
15 #include <linux/io.h>
16 #include <linux/slab.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/cpufreq.h>
19 #include <linux/suspend.h>
20
21 #include <plat/cpu.h>
22
23 #include "exynos-cpufreq.h"
24
25 static struct exynos_dvfs_info *exynos_info;
26
27 static struct regulator *arm_regulator;
28 static struct cpufreq_freqs freqs;
29
30 static unsigned int locking_frequency;
31 static bool frequency_locked;
32 static DEFINE_MUTEX(cpufreq_lock);
33
34 static int exynos_verify_speed(struct cpufreq_policy *policy)
35 {
36 return cpufreq_frequency_table_verify(policy,
37 exynos_info->freq_table);
38 }
39
40 static unsigned int exynos_getspeed(unsigned int cpu)
41 {
42 return clk_get_rate(exynos_info->cpu_clk) / 1000;
43 }
44
45 static int exynos_cpufreq_get_index(unsigned int freq)
46 {
47 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
48 int index;
49
50 for (index = 0;
51 freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
52 if (freq_table[index].frequency == freq)
53 break;
54
55 if (freq_table[index].frequency == CPUFREQ_TABLE_END)
56 return -EINVAL;
57
58 return index;
59 }
60
61 static int exynos_cpufreq_scale(unsigned int target_freq)
62 {
63 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
64 unsigned int *volt_table = exynos_info->volt_table;
65 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
66 unsigned int arm_volt, safe_arm_volt = 0;
67 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
68 int index, old_index;
69 int ret = 0;
70
71 freqs.old = policy->cur;
72 freqs.new = target_freq;
73
74 if (freqs.new == freqs.old)
75 goto out;
76
77 /*
78 * The policy max have been changed so that we cannot get proper
79 * old_index with cpufreq_frequency_table_target(). Thus, ignore
80 * policy and get the index from the raw freqeuncy table.
81 */
82 old_index = exynos_cpufreq_get_index(freqs.old);
83 if (old_index < 0) {
84 ret = old_index;
85 goto out;
86 }
87
88 index = exynos_cpufreq_get_index(target_freq);
89 if (index < 0) {
90 ret = index;
91 goto out;
92 }
93
94 /*
95 * ARM clock source will be changed APLL to MPLL temporary
96 * To support this level, need to control regulator for
97 * required voltage level
98 */
99 if (exynos_info->need_apll_change != NULL) {
100 if (exynos_info->need_apll_change(old_index, index) &&
101 (freq_table[index].frequency < mpll_freq_khz) &&
102 (freq_table[old_index].frequency < mpll_freq_khz))
103 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
104 }
105 arm_volt = volt_table[index];
106
107 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
108
109 /* When the new frequency is higher than current frequency */
110 if ((freqs.new > freqs.old) && !safe_arm_volt) {
111 /* Firstly, voltage up to increase frequency */
112 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
113 if (ret) {
114 pr_err("%s: failed to set cpu voltage to %d\n",
115 __func__, arm_volt);
116 freqs.new = freqs.old;
117 goto post_notify;
118 }
119 }
120
121 if (safe_arm_volt) {
122 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
123 safe_arm_volt);
124 if (ret) {
125 pr_err("%s: failed to set cpu voltage to %d\n",
126 __func__, safe_arm_volt);
127 freqs.new = freqs.old;
128 goto post_notify;
129 }
130 }
131
132 exynos_info->set_freq(old_index, index);
133
134 post_notify:
135 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
136
137 if (ret)
138 goto out;
139
140 /* When the new frequency is lower than current frequency */
141 if ((freqs.new < freqs.old) ||
142 ((freqs.new > freqs.old) && safe_arm_volt)) {
143 /* down the voltage after frequency change */
144 regulator_set_voltage(arm_regulator, arm_volt,
145 arm_volt);
146 if (ret) {
147 pr_err("%s: failed to set cpu voltage to %d\n",
148 __func__, arm_volt);
149 goto out;
150 }
151 }
152
153 out:
154
155 cpufreq_cpu_put(policy);
156
157 return ret;
158 }
159
160 static int exynos_target(struct cpufreq_policy *policy,
161 unsigned int target_freq,
162 unsigned int relation)
163 {
164 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
165 unsigned int index;
166 unsigned int new_freq;
167 int ret = 0;
168
169 mutex_lock(&cpufreq_lock);
170
171 if (frequency_locked)
172 goto out;
173
174 if (cpufreq_frequency_table_target(policy, freq_table,
175 target_freq, relation, &index)) {
176 ret = -EINVAL;
177 goto out;
178 }
179
180 new_freq = freq_table[index].frequency;
181
182 ret = exynos_cpufreq_scale(new_freq);
183
184 out:
185 mutex_unlock(&cpufreq_lock);
186
187 return ret;
188 }
189
190 #ifdef CONFIG_PM
191 static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
192 {
193 return 0;
194 }
195
196 static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
197 {
198 return 0;
199 }
200 #endif
201
202 /**
203 * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
204 * context
205 * @notifier
206 * @pm_event
207 * @v
208 *
209 * While frequency_locked == true, target() ignores every frequency but
210 * locking_frequency. The locking_frequency value is the initial frequency,
211 * which is set by the bootloader. In order to eliminate possible
212 * inconsistency in clock values, we save and restore frequencies during
213 * suspend and resume and block CPUFREQ activities. Note that the standard
214 * suspend/resume cannot be used as they are too deep (syscore_ops) for
215 * regulator actions.
216 */
217 static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
218 unsigned long pm_event, void *v)
219 {
220 int ret;
221
222 switch (pm_event) {
223 case PM_SUSPEND_PREPARE:
224 mutex_lock(&cpufreq_lock);
225 frequency_locked = true;
226 mutex_unlock(&cpufreq_lock);
227
228 ret = exynos_cpufreq_scale(locking_frequency);
229 if (ret < 0)
230 return NOTIFY_BAD;
231
232 break;
233
234 case PM_POST_SUSPEND:
235 mutex_lock(&cpufreq_lock);
236 frequency_locked = false;
237 mutex_unlock(&cpufreq_lock);
238 break;
239 }
240
241 return NOTIFY_OK;
242 }
243
244 static struct notifier_block exynos_cpufreq_nb = {
245 .notifier_call = exynos_cpufreq_pm_notifier,
246 };
247
248 static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
249 {
250 policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
251
252 cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
253
254 /* set the transition latency value */
255 policy->cpuinfo.transition_latency = 100000;
256
257 cpumask_setall(policy->cpus);
258
259 return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
260 }
261
262 static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy)
263 {
264 cpufreq_frequency_table_put_attr(policy->cpu);
265 return 0;
266 }
267
268 static struct freq_attr *exynos_cpufreq_attr[] = {
269 &cpufreq_freq_attr_scaling_available_freqs,
270 NULL,
271 };
272
273 static struct cpufreq_driver exynos_driver = {
274 .flags = CPUFREQ_STICKY,
275 .verify = exynos_verify_speed,
276 .target = exynos_target,
277 .get = exynos_getspeed,
278 .init = exynos_cpufreq_cpu_init,
279 .exit = exynos_cpufreq_cpu_exit,
280 .name = "exynos_cpufreq",
281 .attr = exynos_cpufreq_attr,
282 #ifdef CONFIG_PM
283 .suspend = exynos_cpufreq_suspend,
284 .resume = exynos_cpufreq_resume,
285 #endif
286 };
287
288 static int __init exynos_cpufreq_init(void)
289 {
290 int ret = -EINVAL;
291
292 exynos_info = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
293 if (!exynos_info)
294 return -ENOMEM;
295
296 if (soc_is_exynos4210())
297 ret = exynos4210_cpufreq_init(exynos_info);
298 else if (soc_is_exynos4212() || soc_is_exynos4412())
299 ret = exynos4x12_cpufreq_init(exynos_info);
300 else if (soc_is_exynos5250())
301 ret = exynos5250_cpufreq_init(exynos_info);
302 else
303 return 0;
304
305 if (ret)
306 goto err_vdd_arm;
307
308 if (exynos_info->set_freq == NULL) {
309 pr_err("%s: No set_freq function (ERR)\n", __func__);
310 goto err_vdd_arm;
311 }
312
313 arm_regulator = regulator_get(NULL, "vdd_arm");
314 if (IS_ERR(arm_regulator)) {
315 pr_err("%s: failed to get resource vdd_arm\n", __func__);
316 goto err_vdd_arm;
317 }
318
319 locking_frequency = exynos_getspeed(0);
320
321 register_pm_notifier(&exynos_cpufreq_nb);
322
323 if (cpufreq_register_driver(&exynos_driver)) {
324 pr_err("%s: failed to register cpufreq driver\n", __func__);
325 goto err_cpufreq;
326 }
327
328 return 0;
329 err_cpufreq:
330 unregister_pm_notifier(&exynos_cpufreq_nb);
331
332 regulator_put(arm_regulator);
333 err_vdd_arm:
334 kfree(exynos_info);
335 pr_debug("%s: failed initialization\n", __func__);
336 return -EINVAL;
337 }
338 late_initcall(exynos_cpufreq_init);