2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/kernel.h>
16 #include <linux/kernel_stat.h>
17 #include <linux/module.h>
18 #include <linux/ktime.h>
19 #include <linux/hrtimer.h>
20 #include <linux/tick.h>
21 #include <linux/slab.h>
22 #include <linux/sched.h>
23 #include <linux/list.h>
24 #include <linux/cpu.h>
25 #include <linux/cpufreq.h>
26 #include <linux/sysfs.h>
27 #include <linux/types.h>
29 #include <linux/debugfs.h>
30 #include <linux/acpi.h>
31 #include <linux/vmalloc.h>
32 #include <trace/events/power.h>
34 #include <asm/div64.h>
36 #include <asm/cpu_device_id.h>
37 #include <asm/cpufeature.h>
38 #include <asm/intel-family.h>
40 #define INTEL_CPUFREQ_TRANSITION_LATENCY 20000
42 #define ATOM_RATIOS 0x66a
43 #define ATOM_VIDS 0x66b
44 #define ATOM_TURBO_RATIOS 0x66c
45 #define ATOM_TURBO_VIDS 0x66d
48 #include <acpi/processor.h>
52 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
53 #define fp_toint(X) ((X) >> FRAC_BITS)
56 #define EXT_FRAC_BITS (EXT_BITS + FRAC_BITS)
58 static inline int32_t mul_fp(int32_t x
, int32_t y
)
60 return ((int64_t)x
* (int64_t)y
) >> FRAC_BITS
;
63 static inline int32_t div_fp(s64 x
, s64 y
)
65 return div64_s64((int64_t)x
<< FRAC_BITS
, y
);
68 static inline int ceiling_fp(int32_t x
)
73 mask
= (1 << FRAC_BITS
) - 1;
79 static inline u64
mul_ext_fp(u64 x
, u64 y
)
81 return (x
* y
) >> EXT_FRAC_BITS
;
84 static inline u64
div_ext_fp(u64 x
, u64 y
)
86 return div64_u64(x
<< EXT_FRAC_BITS
, y
);
90 * struct sample - Store performance sample
91 * @core_avg_perf: Ratio of APERF/MPERF which is the actual average
92 * performance during last sample period
93 * @busy_scaled: Scaled busy value which is used to calculate next
94 * P state. This can be different than core_avg_perf
95 * to account for cpu idle period
96 * @aperf: Difference of actual performance frequency clock count
97 * read from APERF MSR between last and current sample
98 * @mperf: Difference of maximum performance frequency clock count
99 * read from MPERF MSR between last and current sample
100 * @tsc: Difference of time stamp counter between last and
102 * @time: Current time from scheduler
104 * This structure is used in the cpudata structure to store performance sample
105 * data for choosing next P State.
108 int32_t core_avg_perf
;
117 * struct pstate_data - Store P state data
118 * @current_pstate: Current requested P state
119 * @min_pstate: Min P state possible for this platform
120 * @max_pstate: Max P state possible for this platform
121 * @max_pstate_physical:This is physical Max P state for a processor
122 * This can be higher than the max_pstate which can
123 * be limited by platform thermal design power limits
124 * @scaling: Scaling factor to convert frequency to cpufreq
126 * @turbo_pstate: Max Turbo P state possible for this platform
127 * @max_freq: @max_pstate frequency in cpufreq units
128 * @turbo_freq: @turbo_pstate frequency in cpufreq units
130 * Stores the per cpu model P state limits and current P state.
136 int max_pstate_physical
;
139 unsigned int max_freq
;
140 unsigned int turbo_freq
;
144 * struct vid_data - Stores voltage information data
145 * @min: VID data for this platform corresponding to
147 * @max: VID data corresponding to the highest P State.
148 * @turbo: VID data for turbo P state
149 * @ratio: Ratio of (vid max - vid min) /
150 * (max P state - Min P State)
152 * Stores the voltage data for DVFS (Dynamic Voltage and Frequency Scaling)
153 * This data is used in Atom platforms, where in addition to target P state,
154 * the voltage data needs to be specified to select next P State.
164 * struct _pid - Stores PID data
165 * @setpoint: Target set point for busyness or performance
166 * @integral: Storage for accumulated error values
167 * @p_gain: PID proportional gain
168 * @i_gain: PID integral gain
169 * @d_gain: PID derivative gain
170 * @deadband: PID deadband
171 * @last_err: Last error storage for integral part of PID calculation
173 * Stores PID coefficients and last error for PID controller.
186 * struct perf_limits - Store user and policy limits
187 * @no_turbo: User requested turbo state from intel_pstate sysfs
188 * @turbo_disabled: Platform turbo status either from msr
189 * MSR_IA32_MISC_ENABLE or when maximum available pstate
190 * matches the maximum turbo pstate
191 * @max_perf_pct: Effective maximum performance limit in percentage, this
192 * is minimum of either limits enforced by cpufreq policy
193 * or limits from user set limits via intel_pstate sysfs
194 * @min_perf_pct: Effective minimum performance limit in percentage, this
195 * is maximum of either limits enforced by cpufreq policy
196 * or limits from user set limits via intel_pstate sysfs
197 * @max_perf: This is a scaled value between 0 to 255 for max_perf_pct
198 * This value is used to limit max pstate
199 * @min_perf: This is a scaled value between 0 to 255 for min_perf_pct
200 * This value is used to limit min pstate
201 * @max_policy_pct: The maximum performance in percentage enforced by
202 * cpufreq setpolicy interface
203 * @max_sysfs_pct: The maximum performance in percentage enforced by
204 * intel pstate sysfs interface, unused when per cpu
205 * controls are enforced
206 * @min_policy_pct: The minimum performance in percentage enforced by
207 * cpufreq setpolicy interface
208 * @min_sysfs_pct: The minimum performance in percentage enforced by
209 * intel pstate sysfs interface, unused when per cpu
210 * controls are enforced
212 * Storage for user and policy defined limits.
228 * struct cpudata - Per CPU instance data storage
229 * @cpu: CPU number for this instance data
230 * @policy: CPUFreq policy value
231 * @update_util: CPUFreq utility callback information
232 * @update_util_set: CPUFreq utility callback is set
233 * @iowait_boost: iowait-related boost fraction
234 * @last_update: Time of the last update.
235 * @pstate: Stores P state limits for this CPU
236 * @vid: Stores VID limits for this CPU
237 * @pid: Stores PID parameters for this CPU
238 * @last_sample_time: Last Sample time
239 * @prev_aperf: Last APERF value read from APERF MSR
240 * @prev_mperf: Last MPERF value read from MPERF MSR
241 * @prev_tsc: Last timestamp counter (TSC) value
242 * @prev_cummulative_iowait: IO Wait time difference from last and
244 * @sample: Storage for storing last Sample data
245 * @perf_limits: Pointer to perf_limit unique to this CPU
246 * Not all field in the structure are applicable
247 * when per cpu controls are enforced
248 * @acpi_perf_data: Stores ACPI perf information read from _PSS
249 * @valid_pss_table: Set to true for valid ACPI _PSS entries found
251 * This structure stores per CPU instance data for all CPUs.
257 struct update_util_data update_util
;
258 bool update_util_set
;
260 struct pstate_data pstate
;
265 u64 last_sample_time
;
269 u64 prev_cummulative_iowait
;
270 struct sample sample
;
271 struct perf_limits
*perf_limits
;
273 struct acpi_processor_performance acpi_perf_data
;
274 bool valid_pss_table
;
276 unsigned int iowait_boost
;
279 static struct cpudata
**all_cpu_data
;
282 * struct pstate_adjust_policy - Stores static PID configuration data
283 * @sample_rate_ms: PID calculation sample rate in ms
284 * @sample_rate_ns: Sample rate calculation in ns
285 * @deadband: PID deadband
286 * @setpoint: PID Setpoint
287 * @p_gain_pct: PID proportional gain
288 * @i_gain_pct: PID integral gain
289 * @d_gain_pct: PID derivative gain
291 * Stores per CPU model static PID configuration data.
293 struct pstate_adjust_policy
{
304 * struct pstate_funcs - Per CPU model specific callbacks
305 * @get_max: Callback to get maximum non turbo effective P state
306 * @get_max_physical: Callback to get maximum non turbo physical P state
307 * @get_min: Callback to get minimum P state
308 * @get_turbo: Callback to get turbo P state
309 * @get_scaling: Callback to get frequency scaling factor
310 * @get_val: Callback to convert P state to actual MSR write value
311 * @get_vid: Callback to get VID data for Atom platforms
312 * @get_target_pstate: Callback to a function to calculate next P state to use
314 * Core and Atom CPU models have different way to get P State limits. This
315 * structure is used to store those callbacks.
317 struct pstate_funcs
{
318 int (*get_max
)(void);
319 int (*get_max_physical
)(void);
320 int (*get_min
)(void);
321 int (*get_turbo
)(void);
322 int (*get_scaling
)(void);
323 u64 (*get_val
)(struct cpudata
*, int pstate
);
324 void (*get_vid
)(struct cpudata
*);
325 int32_t (*get_target_pstate
)(struct cpudata
*);
329 * struct cpu_defaults- Per CPU model default config data
330 * @pid_policy: PID config data
331 * @funcs: Callback function data
333 struct cpu_defaults
{
334 struct pstate_adjust_policy pid_policy
;
335 struct pstate_funcs funcs
;
338 static inline int32_t get_target_pstate_use_performance(struct cpudata
*cpu
);
339 static inline int32_t get_target_pstate_use_cpu_load(struct cpudata
*cpu
);
341 static struct pstate_adjust_policy pid_params __read_mostly
;
342 static struct pstate_funcs pstate_funcs __read_mostly
;
343 static int hwp_active __read_mostly
;
344 static bool per_cpu_limits __read_mostly
;
347 static bool acpi_ppc
;
350 static struct perf_limits performance_limits
= {
354 .max_perf
= int_tofp(1),
356 .min_perf
= int_tofp(1),
357 .max_policy_pct
= 100,
358 .max_sysfs_pct
= 100,
363 static struct perf_limits powersave_limits
= {
367 .max_perf
= int_tofp(1),
370 .max_policy_pct
= 100,
371 .max_sysfs_pct
= 100,
376 #ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
377 static struct perf_limits
*limits
= &performance_limits
;
379 static struct perf_limits
*limits
= &powersave_limits
;
382 static DEFINE_MUTEX(intel_pstate_limits_lock
);
386 static bool intel_pstate_get_ppc_enable_status(void)
388 if (acpi_gbl_FADT
.preferred_profile
== PM_ENTERPRISE_SERVER
||
389 acpi_gbl_FADT
.preferred_profile
== PM_PERFORMANCE_SERVER
)
395 static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy
*policy
)
404 if (!intel_pstate_get_ppc_enable_status())
407 cpu
= all_cpu_data
[policy
->cpu
];
409 ret
= acpi_processor_register_performance(&cpu
->acpi_perf_data
,
415 * Check if the control value in _PSS is for PERF_CTL MSR, which should
416 * guarantee that the states returned by it map to the states in our
419 if (cpu
->acpi_perf_data
.control_register
.space_id
!=
420 ACPI_ADR_SPACE_FIXED_HARDWARE
)
424 * If there is only one entry _PSS, simply ignore _PSS and continue as
425 * usual without taking _PSS into account
427 if (cpu
->acpi_perf_data
.state_count
< 2)
430 pr_debug("CPU%u - ACPI _PSS perf data\n", policy
->cpu
);
431 for (i
= 0; i
< cpu
->acpi_perf_data
.state_count
; i
++) {
432 pr_debug(" %cP%d: %u MHz, %u mW, 0x%x\n",
433 (i
== cpu
->acpi_perf_data
.state
? '*' : ' '), i
,
434 (u32
) cpu
->acpi_perf_data
.states
[i
].core_frequency
,
435 (u32
) cpu
->acpi_perf_data
.states
[i
].power
,
436 (u32
) cpu
->acpi_perf_data
.states
[i
].control
);
440 * The _PSS table doesn't contain whole turbo frequency range.
441 * This just contains +1 MHZ above the max non turbo frequency,
442 * with control value corresponding to max turbo ratio. But
443 * when cpufreq set policy is called, it will call with this
444 * max frequency, which will cause a reduced performance as
445 * this driver uses real max turbo frequency as the max
446 * frequency. So correct this frequency in _PSS table to
447 * correct max turbo frequency based on the turbo state.
448 * Also need to convert to MHz as _PSS freq is in MHz.
450 if (!limits
->turbo_disabled
)
451 cpu
->acpi_perf_data
.states
[0].core_frequency
=
452 policy
->cpuinfo
.max_freq
/ 1000;
453 cpu
->valid_pss_table
= true;
454 pr_debug("_PPC limits will be enforced\n");
459 cpu
->valid_pss_table
= false;
460 acpi_processor_unregister_performance(policy
->cpu
);
463 static void intel_pstate_exit_perf_limits(struct cpufreq_policy
*policy
)
467 cpu
= all_cpu_data
[policy
->cpu
];
468 if (!cpu
->valid_pss_table
)
471 acpi_processor_unregister_performance(policy
->cpu
);
475 static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy
*policy
)
479 static inline int intel_pstate_exit_perf_limits(struct cpufreq_policy
*policy
)
484 static inline void pid_reset(struct _pid
*pid
, int setpoint
, int busy
,
485 int deadband
, int integral
) {
486 pid
->setpoint
= int_tofp(setpoint
);
487 pid
->deadband
= int_tofp(deadband
);
488 pid
->integral
= int_tofp(integral
);
489 pid
->last_err
= int_tofp(setpoint
) - int_tofp(busy
);
492 static inline void pid_p_gain_set(struct _pid
*pid
, int percent
)
494 pid
->p_gain
= div_fp(percent
, 100);
497 static inline void pid_i_gain_set(struct _pid
*pid
, int percent
)
499 pid
->i_gain
= div_fp(percent
, 100);
502 static inline void pid_d_gain_set(struct _pid
*pid
, int percent
)
504 pid
->d_gain
= div_fp(percent
, 100);
507 static signed int pid_calc(struct _pid
*pid
, int32_t busy
)
510 int32_t pterm
, dterm
, fp_error
;
511 int32_t integral_limit
;
513 fp_error
= pid
->setpoint
- busy
;
515 if (abs(fp_error
) <= pid
->deadband
)
518 pterm
= mul_fp(pid
->p_gain
, fp_error
);
520 pid
->integral
+= fp_error
;
523 * We limit the integral here so that it will never
524 * get higher than 30. This prevents it from becoming
525 * too large an input over long periods of time and allows
526 * it to get factored out sooner.
528 * The value of 30 was chosen through experimentation.
530 integral_limit
= int_tofp(30);
531 if (pid
->integral
> integral_limit
)
532 pid
->integral
= integral_limit
;
533 if (pid
->integral
< -integral_limit
)
534 pid
->integral
= -integral_limit
;
536 dterm
= mul_fp(pid
->d_gain
, fp_error
- pid
->last_err
);
537 pid
->last_err
= fp_error
;
539 result
= pterm
+ mul_fp(pid
->integral
, pid
->i_gain
) + dterm
;
540 result
= result
+ (1 << (FRAC_BITS
-1));
541 return (signed int)fp_toint(result
);
544 static inline void intel_pstate_busy_pid_reset(struct cpudata
*cpu
)
546 pid_p_gain_set(&cpu
->pid
, pid_params
.p_gain_pct
);
547 pid_d_gain_set(&cpu
->pid
, pid_params
.d_gain_pct
);
548 pid_i_gain_set(&cpu
->pid
, pid_params
.i_gain_pct
);
550 pid_reset(&cpu
->pid
, pid_params
.setpoint
, 100, pid_params
.deadband
, 0);
553 static inline void intel_pstate_reset_all_pid(void)
557 for_each_online_cpu(cpu
) {
558 if (all_cpu_data
[cpu
])
559 intel_pstate_busy_pid_reset(all_cpu_data
[cpu
]);
563 static inline void update_turbo_state(void)
568 cpu
= all_cpu_data
[0];
569 rdmsrl(MSR_IA32_MISC_ENABLE
, misc_en
);
570 limits
->turbo_disabled
=
571 (misc_en
& MSR_IA32_MISC_ENABLE_TURBO_DISABLE
||
572 cpu
->pstate
.max_pstate
== cpu
->pstate
.turbo_pstate
);
575 static void intel_pstate_hwp_set(const struct cpumask
*cpumask
)
577 int min
, hw_min
, max
, hw_max
, cpu
, range
, adj_range
;
578 struct perf_limits
*perf_limits
= limits
;
581 for_each_cpu(cpu
, cpumask
) {
582 int max_perf_pct
, min_perf_pct
;
585 perf_limits
= all_cpu_data
[cpu
]->perf_limits
;
587 rdmsrl_on_cpu(cpu
, MSR_HWP_CAPABILITIES
, &cap
);
588 hw_min
= HWP_LOWEST_PERF(cap
);
589 hw_max
= HWP_HIGHEST_PERF(cap
);
590 range
= hw_max
- hw_min
;
592 max_perf_pct
= perf_limits
->max_perf_pct
;
593 min_perf_pct
= perf_limits
->min_perf_pct
;
595 rdmsrl_on_cpu(cpu
, MSR_HWP_REQUEST
, &value
);
596 adj_range
= min_perf_pct
* range
/ 100;
597 min
= hw_min
+ adj_range
;
598 value
&= ~HWP_MIN_PERF(~0L);
599 value
|= HWP_MIN_PERF(min
);
601 adj_range
= max_perf_pct
* range
/ 100;
602 max
= hw_min
+ adj_range
;
603 if (limits
->no_turbo
) {
604 hw_max
= HWP_GUARANTEED_PERF(cap
);
609 value
&= ~HWP_MAX_PERF(~0L);
610 value
|= HWP_MAX_PERF(max
);
611 wrmsrl_on_cpu(cpu
, MSR_HWP_REQUEST
, value
);
615 static int intel_pstate_hwp_set_policy(struct cpufreq_policy
*policy
)
618 intel_pstate_hwp_set(policy
->cpus
);
623 static void intel_pstate_hwp_set_online_cpus(void)
626 intel_pstate_hwp_set(cpu_online_mask
);
630 /************************** debugfs begin ************************/
631 static int pid_param_set(void *data
, u64 val
)
634 intel_pstate_reset_all_pid();
638 static int pid_param_get(void *data
, u64
*val
)
643 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param
, pid_param_get
, pid_param_set
, "%llu\n");
650 static struct pid_param pid_files
[] = {
651 {"sample_rate_ms", &pid_params
.sample_rate_ms
},
652 {"d_gain_pct", &pid_params
.d_gain_pct
},
653 {"i_gain_pct", &pid_params
.i_gain_pct
},
654 {"deadband", &pid_params
.deadband
},
655 {"setpoint", &pid_params
.setpoint
},
656 {"p_gain_pct", &pid_params
.p_gain_pct
},
660 static void __init
intel_pstate_debug_expose_params(void)
662 struct dentry
*debugfs_parent
;
666 pstate_funcs
.get_target_pstate
== get_target_pstate_use_cpu_load
)
669 debugfs_parent
= debugfs_create_dir("pstate_snb", NULL
);
670 if (IS_ERR_OR_NULL(debugfs_parent
))
672 while (pid_files
[i
].name
) {
673 debugfs_create_file(pid_files
[i
].name
, 0660,
674 debugfs_parent
, pid_files
[i
].value
,
680 /************************** debugfs end ************************/
682 /************************** sysfs begin ************************/
683 #define show_one(file_name, object) \
684 static ssize_t show_##file_name \
685 (struct kobject *kobj, struct attribute *attr, char *buf) \
687 return sprintf(buf, "%u\n", limits->object); \
690 static ssize_t
show_turbo_pct(struct kobject
*kobj
,
691 struct attribute
*attr
, char *buf
)
694 int total
, no_turbo
, turbo_pct
;
697 cpu
= all_cpu_data
[0];
699 total
= cpu
->pstate
.turbo_pstate
- cpu
->pstate
.min_pstate
+ 1;
700 no_turbo
= cpu
->pstate
.max_pstate
- cpu
->pstate
.min_pstate
+ 1;
701 turbo_fp
= div_fp(no_turbo
, total
);
702 turbo_pct
= 100 - fp_toint(mul_fp(turbo_fp
, int_tofp(100)));
703 return sprintf(buf
, "%u\n", turbo_pct
);
706 static ssize_t
show_num_pstates(struct kobject
*kobj
,
707 struct attribute
*attr
, char *buf
)
712 cpu
= all_cpu_data
[0];
713 total
= cpu
->pstate
.turbo_pstate
- cpu
->pstate
.min_pstate
+ 1;
714 return sprintf(buf
, "%u\n", total
);
717 static ssize_t
show_no_turbo(struct kobject
*kobj
,
718 struct attribute
*attr
, char *buf
)
722 update_turbo_state();
723 if (limits
->turbo_disabled
)
724 ret
= sprintf(buf
, "%u\n", limits
->turbo_disabled
);
726 ret
= sprintf(buf
, "%u\n", limits
->no_turbo
);
731 static ssize_t
store_no_turbo(struct kobject
*a
, struct attribute
*b
,
732 const char *buf
, size_t count
)
737 ret
= sscanf(buf
, "%u", &input
);
741 mutex_lock(&intel_pstate_limits_lock
);
743 update_turbo_state();
744 if (limits
->turbo_disabled
) {
745 pr_warn("Turbo disabled by BIOS or unavailable on processor\n");
746 mutex_unlock(&intel_pstate_limits_lock
);
750 limits
->no_turbo
= clamp_t(int, input
, 0, 1);
752 mutex_unlock(&intel_pstate_limits_lock
);
755 intel_pstate_hwp_set_online_cpus();
760 static ssize_t
store_max_perf_pct(struct kobject
*a
, struct attribute
*b
,
761 const char *buf
, size_t count
)
766 ret
= sscanf(buf
, "%u", &input
);
770 mutex_lock(&intel_pstate_limits_lock
);
772 limits
->max_sysfs_pct
= clamp_t(int, input
, 0 , 100);
773 limits
->max_perf_pct
= min(limits
->max_policy_pct
,
774 limits
->max_sysfs_pct
);
775 limits
->max_perf_pct
= max(limits
->min_policy_pct
,
776 limits
->max_perf_pct
);
777 limits
->max_perf_pct
= max(limits
->min_perf_pct
,
778 limits
->max_perf_pct
);
779 limits
->max_perf
= div_fp(limits
->max_perf_pct
, 100);
781 mutex_unlock(&intel_pstate_limits_lock
);
784 intel_pstate_hwp_set_online_cpus();
788 static ssize_t
store_min_perf_pct(struct kobject
*a
, struct attribute
*b
,
789 const char *buf
, size_t count
)
794 ret
= sscanf(buf
, "%u", &input
);
798 mutex_lock(&intel_pstate_limits_lock
);
800 limits
->min_sysfs_pct
= clamp_t(int, input
, 0 , 100);
801 limits
->min_perf_pct
= max(limits
->min_policy_pct
,
802 limits
->min_sysfs_pct
);
803 limits
->min_perf_pct
= min(limits
->max_policy_pct
,
804 limits
->min_perf_pct
);
805 limits
->min_perf_pct
= min(limits
->max_perf_pct
,
806 limits
->min_perf_pct
);
807 limits
->min_perf
= div_fp(limits
->min_perf_pct
, 100);
809 mutex_unlock(&intel_pstate_limits_lock
);
812 intel_pstate_hwp_set_online_cpus();
816 show_one(max_perf_pct
, max_perf_pct
);
817 show_one(min_perf_pct
, min_perf_pct
);
819 define_one_global_rw(no_turbo
);
820 define_one_global_rw(max_perf_pct
);
821 define_one_global_rw(min_perf_pct
);
822 define_one_global_ro(turbo_pct
);
823 define_one_global_ro(num_pstates
);
825 static struct attribute
*intel_pstate_attributes
[] = {
832 static struct attribute_group intel_pstate_attr_group
= {
833 .attrs
= intel_pstate_attributes
,
836 static void __init
intel_pstate_sysfs_expose_params(void)
838 struct kobject
*intel_pstate_kobject
;
841 intel_pstate_kobject
= kobject_create_and_add("intel_pstate",
842 &cpu_subsys
.dev_root
->kobj
);
843 if (WARN_ON(!intel_pstate_kobject
))
846 rc
= sysfs_create_group(intel_pstate_kobject
, &intel_pstate_attr_group
);
851 * If per cpu limits are enforced there are no global limits, so
852 * return without creating max/min_perf_pct attributes
857 rc
= sysfs_create_file(intel_pstate_kobject
, &max_perf_pct
.attr
);
860 rc
= sysfs_create_file(intel_pstate_kobject
, &min_perf_pct
.attr
);
864 /************************** sysfs end ************************/
866 static void intel_pstate_hwp_enable(struct cpudata
*cpudata
)
868 /* First disable HWP notification interrupt as we don't process them */
869 if (static_cpu_has(X86_FEATURE_HWP_NOTIFY
))
870 wrmsrl_on_cpu(cpudata
->cpu
, MSR_HWP_INTERRUPT
, 0x00);
872 wrmsrl_on_cpu(cpudata
->cpu
, MSR_PM_ENABLE
, 0x1);
875 static int atom_get_min_pstate(void)
879 rdmsrl(ATOM_RATIOS
, value
);
880 return (value
>> 8) & 0x7F;
883 static int atom_get_max_pstate(void)
887 rdmsrl(ATOM_RATIOS
, value
);
888 return (value
>> 16) & 0x7F;
891 static int atom_get_turbo_pstate(void)
895 rdmsrl(ATOM_TURBO_RATIOS
, value
);
899 static u64
atom_get_val(struct cpudata
*cpudata
, int pstate
)
905 val
= (u64
)pstate
<< 8;
906 if (limits
->no_turbo
&& !limits
->turbo_disabled
)
909 vid_fp
= cpudata
->vid
.min
+ mul_fp(
910 int_tofp(pstate
- cpudata
->pstate
.min_pstate
),
913 vid_fp
= clamp_t(int32_t, vid_fp
, cpudata
->vid
.min
, cpudata
->vid
.max
);
914 vid
= ceiling_fp(vid_fp
);
916 if (pstate
> cpudata
->pstate
.max_pstate
)
917 vid
= cpudata
->vid
.turbo
;
922 static int silvermont_get_scaling(void)
926 /* Defined in Table 35-6 from SDM (Sept 2015) */
927 static int silvermont_freq_table
[] = {
928 83300, 100000, 133300, 116700, 80000};
930 rdmsrl(MSR_FSB_FREQ
, value
);
934 return silvermont_freq_table
[i
];
937 static int airmont_get_scaling(void)
941 /* Defined in Table 35-10 from SDM (Sept 2015) */
942 static int airmont_freq_table
[] = {
943 83300, 100000, 133300, 116700, 80000,
944 93300, 90000, 88900, 87500};
946 rdmsrl(MSR_FSB_FREQ
, value
);
950 return airmont_freq_table
[i
];
953 static void atom_get_vid(struct cpudata
*cpudata
)
957 rdmsrl(ATOM_VIDS
, value
);
958 cpudata
->vid
.min
= int_tofp((value
>> 8) & 0x7f);
959 cpudata
->vid
.max
= int_tofp((value
>> 16) & 0x7f);
960 cpudata
->vid
.ratio
= div_fp(
961 cpudata
->vid
.max
- cpudata
->vid
.min
,
962 int_tofp(cpudata
->pstate
.max_pstate
-
963 cpudata
->pstate
.min_pstate
));
965 rdmsrl(ATOM_TURBO_VIDS
, value
);
966 cpudata
->vid
.turbo
= value
& 0x7f;
969 static int core_get_min_pstate(void)
973 rdmsrl(MSR_PLATFORM_INFO
, value
);
974 return (value
>> 40) & 0xFF;
977 static int core_get_max_pstate_physical(void)
981 rdmsrl(MSR_PLATFORM_INFO
, value
);
982 return (value
>> 8) & 0xFF;
985 static int core_get_max_pstate(void)
992 rdmsrl(MSR_PLATFORM_INFO
, plat_info
);
993 max_pstate
= (plat_info
>> 8) & 0xFF;
995 err
= rdmsrl_safe(MSR_TURBO_ACTIVATION_RATIO
, &tar
);
997 /* Do some sanity checking for safety */
998 if (plat_info
& 0x600000000) {
1003 err
= rdmsrl_safe(MSR_CONFIG_TDP_CONTROL
, &tdp_ctrl
);
1007 tdp_msr
= MSR_CONFIG_TDP_NOMINAL
+ (tdp_ctrl
& 0x3);
1008 err
= rdmsrl_safe(tdp_msr
, &tdp_ratio
);
1012 /* For level 1 and 2, bits[23:16] contain the ratio */
1016 tdp_ratio
&= 0xff; /* ratios are only 8 bits long */
1017 if (tdp_ratio
- 1 == tar
) {
1019 pr_debug("max_pstate=TAC %x\n", max_pstate
);
1030 static int core_get_turbo_pstate(void)
1035 rdmsrl(MSR_TURBO_RATIO_LIMIT
, value
);
1036 nont
= core_get_max_pstate();
1037 ret
= (value
) & 255;
1043 static inline int core_get_scaling(void)
1048 static u64
core_get_val(struct cpudata
*cpudata
, int pstate
)
1052 val
= (u64
)pstate
<< 8;
1053 if (limits
->no_turbo
&& !limits
->turbo_disabled
)
1054 val
|= (u64
)1 << 32;
1059 static int knl_get_turbo_pstate(void)
1064 rdmsrl(MSR_TURBO_RATIO_LIMIT
, value
);
1065 nont
= core_get_max_pstate();
1066 ret
= (((value
) >> 8) & 0xFF);
1072 static struct cpu_defaults core_params
= {
1074 .sample_rate_ms
= 10,
1082 .get_max
= core_get_max_pstate
,
1083 .get_max_physical
= core_get_max_pstate_physical
,
1084 .get_min
= core_get_min_pstate
,
1085 .get_turbo
= core_get_turbo_pstate
,
1086 .get_scaling
= core_get_scaling
,
1087 .get_val
= core_get_val
,
1088 .get_target_pstate
= get_target_pstate_use_performance
,
1092 static const struct cpu_defaults silvermont_params
= {
1094 .sample_rate_ms
= 10,
1102 .get_max
= atom_get_max_pstate
,
1103 .get_max_physical
= atom_get_max_pstate
,
1104 .get_min
= atom_get_min_pstate
,
1105 .get_turbo
= atom_get_turbo_pstate
,
1106 .get_val
= atom_get_val
,
1107 .get_scaling
= silvermont_get_scaling
,
1108 .get_vid
= atom_get_vid
,
1109 .get_target_pstate
= get_target_pstate_use_cpu_load
,
1113 static const struct cpu_defaults airmont_params
= {
1115 .sample_rate_ms
= 10,
1123 .get_max
= atom_get_max_pstate
,
1124 .get_max_physical
= atom_get_max_pstate
,
1125 .get_min
= atom_get_min_pstate
,
1126 .get_turbo
= atom_get_turbo_pstate
,
1127 .get_val
= atom_get_val
,
1128 .get_scaling
= airmont_get_scaling
,
1129 .get_vid
= atom_get_vid
,
1130 .get_target_pstate
= get_target_pstate_use_cpu_load
,
1134 static const struct cpu_defaults knl_params
= {
1136 .sample_rate_ms
= 10,
1144 .get_max
= core_get_max_pstate
,
1145 .get_max_physical
= core_get_max_pstate_physical
,
1146 .get_min
= core_get_min_pstate
,
1147 .get_turbo
= knl_get_turbo_pstate
,
1148 .get_scaling
= core_get_scaling
,
1149 .get_val
= core_get_val
,
1150 .get_target_pstate
= get_target_pstate_use_performance
,
1154 static const struct cpu_defaults bxt_params
= {
1156 .sample_rate_ms
= 10,
1164 .get_max
= core_get_max_pstate
,
1165 .get_max_physical
= core_get_max_pstate_physical
,
1166 .get_min
= core_get_min_pstate
,
1167 .get_turbo
= core_get_turbo_pstate
,
1168 .get_scaling
= core_get_scaling
,
1169 .get_val
= core_get_val
,
1170 .get_target_pstate
= get_target_pstate_use_cpu_load
,
1174 static void intel_pstate_get_min_max(struct cpudata
*cpu
, int *min
, int *max
)
1176 int max_perf
= cpu
->pstate
.turbo_pstate
;
1179 struct perf_limits
*perf_limits
= limits
;
1181 if (limits
->no_turbo
|| limits
->turbo_disabled
)
1182 max_perf
= cpu
->pstate
.max_pstate
;
1185 perf_limits
= cpu
->perf_limits
;
1188 * performance can be limited by user through sysfs, by cpufreq
1189 * policy, or by cpu specific default values determined through
1192 max_perf_adj
= fp_toint(max_perf
* perf_limits
->max_perf
);
1193 *max
= clamp_t(int, max_perf_adj
,
1194 cpu
->pstate
.min_pstate
, cpu
->pstate
.turbo_pstate
);
1196 min_perf
= fp_toint(max_perf
* perf_limits
->min_perf
);
1197 *min
= clamp_t(int, min_perf
, cpu
->pstate
.min_pstate
, max_perf
);
1200 static void intel_pstate_set_pstate(struct cpudata
*cpu
, int pstate
)
1202 trace_cpu_frequency(pstate
* cpu
->pstate
.scaling
, cpu
->cpu
);
1203 cpu
->pstate
.current_pstate
= pstate
;
1205 * Generally, there is no guarantee that this code will always run on
1206 * the CPU being updated, so force the register update to run on the
1209 wrmsrl_on_cpu(cpu
->cpu
, MSR_IA32_PERF_CTL
,
1210 pstate_funcs
.get_val(cpu
, pstate
));
1213 static void intel_pstate_set_min_pstate(struct cpudata
*cpu
)
1215 intel_pstate_set_pstate(cpu
, cpu
->pstate
.min_pstate
);
1218 static void intel_pstate_max_within_limits(struct cpudata
*cpu
)
1220 int min_pstate
, max_pstate
;
1222 update_turbo_state();
1223 intel_pstate_get_min_max(cpu
, &min_pstate
, &max_pstate
);
1224 intel_pstate_set_pstate(cpu
, max_pstate
);
1227 static void intel_pstate_get_cpu_pstates(struct cpudata
*cpu
)
1229 cpu
->pstate
.min_pstate
= pstate_funcs
.get_min();
1230 cpu
->pstate
.max_pstate
= pstate_funcs
.get_max();
1231 cpu
->pstate
.max_pstate_physical
= pstate_funcs
.get_max_physical();
1232 cpu
->pstate
.turbo_pstate
= pstate_funcs
.get_turbo();
1233 cpu
->pstate
.scaling
= pstate_funcs
.get_scaling();
1234 cpu
->pstate
.max_freq
= cpu
->pstate
.max_pstate
* cpu
->pstate
.scaling
;
1235 cpu
->pstate
.turbo_freq
= cpu
->pstate
.turbo_pstate
* cpu
->pstate
.scaling
;
1237 if (pstate_funcs
.get_vid
)
1238 pstate_funcs
.get_vid(cpu
);
1240 intel_pstate_set_min_pstate(cpu
);
1243 static inline void intel_pstate_calc_avg_perf(struct cpudata
*cpu
)
1245 struct sample
*sample
= &cpu
->sample
;
1247 sample
->core_avg_perf
= div_ext_fp(sample
->aperf
, sample
->mperf
);
1250 static inline bool intel_pstate_sample(struct cpudata
*cpu
, u64 time
)
1253 unsigned long flags
;
1256 local_irq_save(flags
);
1257 rdmsrl(MSR_IA32_APERF
, aperf
);
1258 rdmsrl(MSR_IA32_MPERF
, mperf
);
1260 if (cpu
->prev_mperf
== mperf
|| cpu
->prev_tsc
== tsc
) {
1261 local_irq_restore(flags
);
1264 local_irq_restore(flags
);
1266 cpu
->last_sample_time
= cpu
->sample
.time
;
1267 cpu
->sample
.time
= time
;
1268 cpu
->sample
.aperf
= aperf
;
1269 cpu
->sample
.mperf
= mperf
;
1270 cpu
->sample
.tsc
= tsc
;
1271 cpu
->sample
.aperf
-= cpu
->prev_aperf
;
1272 cpu
->sample
.mperf
-= cpu
->prev_mperf
;
1273 cpu
->sample
.tsc
-= cpu
->prev_tsc
;
1275 cpu
->prev_aperf
= aperf
;
1276 cpu
->prev_mperf
= mperf
;
1277 cpu
->prev_tsc
= tsc
;
1279 * First time this function is invoked in a given cycle, all of the
1280 * previous sample data fields are equal to zero or stale and they must
1281 * be populated with meaningful numbers for things to work, so assume
1282 * that sample.time will always be reset before setting the utilization
1283 * update hook and make the caller skip the sample then.
1285 return !!cpu
->last_sample_time
;
1288 static inline int32_t get_avg_frequency(struct cpudata
*cpu
)
1290 return mul_ext_fp(cpu
->sample
.core_avg_perf
,
1291 cpu
->pstate
.max_pstate_physical
* cpu
->pstate
.scaling
);
1294 static inline int32_t get_avg_pstate(struct cpudata
*cpu
)
1296 return mul_ext_fp(cpu
->pstate
.max_pstate_physical
,
1297 cpu
->sample
.core_avg_perf
);
1300 static inline int32_t get_target_pstate_use_cpu_load(struct cpudata
*cpu
)
1302 struct sample
*sample
= &cpu
->sample
;
1303 int32_t busy_frac
, boost
;
1304 int target
, avg_pstate
;
1306 busy_frac
= div_fp(sample
->mperf
, sample
->tsc
);
1308 boost
= cpu
->iowait_boost
;
1309 cpu
->iowait_boost
>>= 1;
1311 if (busy_frac
< boost
)
1314 sample
->busy_scaled
= busy_frac
* 100;
1316 target
= limits
->no_turbo
|| limits
->turbo_disabled
?
1317 cpu
->pstate
.max_pstate
: cpu
->pstate
.turbo_pstate
;
1318 target
+= target
>> 2;
1319 target
= mul_fp(target
, busy_frac
);
1320 if (target
< cpu
->pstate
.min_pstate
)
1321 target
= cpu
->pstate
.min_pstate
;
1324 * If the average P-state during the previous cycle was higher than the
1325 * current target, add 50% of the difference to the target to reduce
1326 * possible performance oscillations and offset possible performance
1327 * loss related to moving the workload from one CPU to another within
1330 avg_pstate
= get_avg_pstate(cpu
);
1331 if (avg_pstate
> target
)
1332 target
+= (avg_pstate
- target
) >> 1;
1337 static inline int32_t get_target_pstate_use_performance(struct cpudata
*cpu
)
1339 int32_t perf_scaled
, max_pstate
, current_pstate
, sample_ratio
;
1343 * perf_scaled is the ratio of the average P-state during the last
1344 * sampling period to the P-state requested last time (in percent).
1346 * That measures the system's response to the previous P-state
1349 max_pstate
= cpu
->pstate
.max_pstate_physical
;
1350 current_pstate
= cpu
->pstate
.current_pstate
;
1351 perf_scaled
= mul_ext_fp(cpu
->sample
.core_avg_perf
,
1352 div_fp(100 * max_pstate
, current_pstate
));
1355 * Since our utilization update callback will not run unless we are
1356 * in C0, check if the actual elapsed time is significantly greater (3x)
1357 * than our sample interval. If it is, then we were idle for a long
1358 * enough period of time to adjust our performance metric.
1360 duration_ns
= cpu
->sample
.time
- cpu
->last_sample_time
;
1361 if ((s64
)duration_ns
> pid_params
.sample_rate_ns
* 3) {
1362 sample_ratio
= div_fp(pid_params
.sample_rate_ns
, duration_ns
);
1363 perf_scaled
= mul_fp(perf_scaled
, sample_ratio
);
1365 sample_ratio
= div_fp(100 * cpu
->sample
.mperf
, cpu
->sample
.tsc
);
1366 if (sample_ratio
< int_tofp(1))
1370 cpu
->sample
.busy_scaled
= perf_scaled
;
1371 return cpu
->pstate
.current_pstate
- pid_calc(&cpu
->pid
, perf_scaled
);
1374 static int intel_pstate_prepare_request(struct cpudata
*cpu
, int pstate
)
1376 int max_perf
, min_perf
;
1378 intel_pstate_get_min_max(cpu
, &min_perf
, &max_perf
);
1379 pstate
= clamp_t(int, pstate
, min_perf
, max_perf
);
1380 trace_cpu_frequency(pstate
* cpu
->pstate
.scaling
, cpu
->cpu
);
1384 static void intel_pstate_update_pstate(struct cpudata
*cpu
, int pstate
)
1386 pstate
= intel_pstate_prepare_request(cpu
, pstate
);
1387 if (pstate
== cpu
->pstate
.current_pstate
)
1390 cpu
->pstate
.current_pstate
= pstate
;
1391 wrmsrl(MSR_IA32_PERF_CTL
, pstate_funcs
.get_val(cpu
, pstate
));
1394 static inline void intel_pstate_adjust_busy_pstate(struct cpudata
*cpu
)
1396 int from
, target_pstate
;
1397 struct sample
*sample
;
1399 from
= cpu
->pstate
.current_pstate
;
1401 target_pstate
= cpu
->policy
== CPUFREQ_POLICY_PERFORMANCE
?
1402 cpu
->pstate
.turbo_pstate
: pstate_funcs
.get_target_pstate(cpu
);
1404 update_turbo_state();
1406 intel_pstate_update_pstate(cpu
, target_pstate
);
1408 sample
= &cpu
->sample
;
1409 trace_pstate_sample(mul_ext_fp(100, sample
->core_avg_perf
),
1410 fp_toint(sample
->busy_scaled
),
1412 cpu
->pstate
.current_pstate
,
1416 get_avg_frequency(cpu
),
1417 fp_toint(cpu
->iowait_boost
* 100));
1420 static void intel_pstate_update_util(struct update_util_data
*data
, u64 time
,
1423 struct cpudata
*cpu
= container_of(data
, struct cpudata
, update_util
);
1426 if (pstate_funcs
.get_target_pstate
== get_target_pstate_use_cpu_load
) {
1427 if (flags
& SCHED_CPUFREQ_IOWAIT
) {
1428 cpu
->iowait_boost
= int_tofp(1);
1429 } else if (cpu
->iowait_boost
) {
1430 /* Clear iowait_boost if the CPU may have been idle. */
1431 delta_ns
= time
- cpu
->last_update
;
1432 if (delta_ns
> TICK_NSEC
)
1433 cpu
->iowait_boost
= 0;
1435 cpu
->last_update
= time
;
1438 delta_ns
= time
- cpu
->sample
.time
;
1439 if ((s64
)delta_ns
>= pid_params
.sample_rate_ns
) {
1440 bool sample_taken
= intel_pstate_sample(cpu
, time
);
1443 intel_pstate_calc_avg_perf(cpu
);
1445 intel_pstate_adjust_busy_pstate(cpu
);
1450 #define ICPU(model, policy) \
1451 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
1452 (unsigned long)&policy }
1454 static const struct x86_cpu_id intel_pstate_cpu_ids
[] = {
1455 ICPU(INTEL_FAM6_SANDYBRIDGE
, core_params
),
1456 ICPU(INTEL_FAM6_SANDYBRIDGE_X
, core_params
),
1457 ICPU(INTEL_FAM6_ATOM_SILVERMONT1
, silvermont_params
),
1458 ICPU(INTEL_FAM6_IVYBRIDGE
, core_params
),
1459 ICPU(INTEL_FAM6_HASWELL_CORE
, core_params
),
1460 ICPU(INTEL_FAM6_BROADWELL_CORE
, core_params
),
1461 ICPU(INTEL_FAM6_IVYBRIDGE_X
, core_params
),
1462 ICPU(INTEL_FAM6_HASWELL_X
, core_params
),
1463 ICPU(INTEL_FAM6_HASWELL_ULT
, core_params
),
1464 ICPU(INTEL_FAM6_HASWELL_GT3E
, core_params
),
1465 ICPU(INTEL_FAM6_BROADWELL_GT3E
, core_params
),
1466 ICPU(INTEL_FAM6_ATOM_AIRMONT
, airmont_params
),
1467 ICPU(INTEL_FAM6_SKYLAKE_MOBILE
, core_params
),
1468 ICPU(INTEL_FAM6_BROADWELL_X
, core_params
),
1469 ICPU(INTEL_FAM6_SKYLAKE_DESKTOP
, core_params
),
1470 ICPU(INTEL_FAM6_BROADWELL_XEON_D
, core_params
),
1471 ICPU(INTEL_FAM6_XEON_PHI_KNL
, knl_params
),
1472 ICPU(INTEL_FAM6_ATOM_GOLDMONT
, bxt_params
),
1475 MODULE_DEVICE_TABLE(x86cpu
, intel_pstate_cpu_ids
);
1477 static const struct x86_cpu_id intel_pstate_cpu_oob_ids
[] __initconst
= {
1478 ICPU(INTEL_FAM6_BROADWELL_XEON_D
, core_params
),
1479 ICPU(INTEL_FAM6_BROADWELL_X
, core_params
),
1480 ICPU(INTEL_FAM6_SKYLAKE_X
, core_params
),
1484 static int intel_pstate_init_cpu(unsigned int cpunum
)
1486 struct cpudata
*cpu
;
1488 cpu
= all_cpu_data
[cpunum
];
1491 unsigned int size
= sizeof(struct cpudata
);
1494 size
+= sizeof(struct perf_limits
);
1496 cpu
= kzalloc(size
, GFP_KERNEL
);
1500 all_cpu_data
[cpunum
] = cpu
;
1502 cpu
->perf_limits
= (struct perf_limits
*)(cpu
+ 1);
1506 cpu
= all_cpu_data
[cpunum
];
1511 intel_pstate_hwp_enable(cpu
);
1512 pid_params
.sample_rate_ms
= 50;
1513 pid_params
.sample_rate_ns
= 50 * NSEC_PER_MSEC
;
1516 intel_pstate_get_cpu_pstates(cpu
);
1518 intel_pstate_busy_pid_reset(cpu
);
1520 pr_debug("controlling: cpu %d\n", cpunum
);
1525 static unsigned int intel_pstate_get(unsigned int cpu_num
)
1527 struct cpudata
*cpu
= all_cpu_data
[cpu_num
];
1529 return cpu
? get_avg_frequency(cpu
) : 0;
1532 static void intel_pstate_set_update_util_hook(unsigned int cpu_num
)
1534 struct cpudata
*cpu
= all_cpu_data
[cpu_num
];
1536 if (cpu
->update_util_set
)
1539 /* Prevent intel_pstate_update_util() from using stale data. */
1540 cpu
->sample
.time
= 0;
1541 cpufreq_add_update_util_hook(cpu_num
, &cpu
->update_util
,
1542 intel_pstate_update_util
);
1543 cpu
->update_util_set
= true;
1546 static void intel_pstate_clear_update_util_hook(unsigned int cpu
)
1548 struct cpudata
*cpu_data
= all_cpu_data
[cpu
];
1550 if (!cpu_data
->update_util_set
)
1553 cpufreq_remove_update_util_hook(cpu
);
1554 cpu_data
->update_util_set
= false;
1555 synchronize_sched();
1558 static void intel_pstate_set_performance_limits(struct perf_limits
*limits
)
1560 mutex_lock(&intel_pstate_limits_lock
);
1561 limits
->no_turbo
= 0;
1562 limits
->turbo_disabled
= 0;
1563 limits
->max_perf_pct
= 100;
1564 limits
->max_perf
= int_tofp(1);
1565 limits
->min_perf_pct
= 100;
1566 limits
->min_perf
= int_tofp(1);
1567 limits
->max_policy_pct
= 100;
1568 limits
->max_sysfs_pct
= 100;
1569 limits
->min_policy_pct
= 0;
1570 limits
->min_sysfs_pct
= 0;
1571 mutex_unlock(&intel_pstate_limits_lock
);
1574 static void intel_pstate_update_perf_limits(struct cpufreq_policy
*policy
,
1575 struct perf_limits
*limits
)
1578 mutex_lock(&intel_pstate_limits_lock
);
1580 limits
->max_policy_pct
= DIV_ROUND_UP(policy
->max
* 100,
1581 policy
->cpuinfo
.max_freq
);
1582 limits
->max_policy_pct
= clamp_t(int, limits
->max_policy_pct
, 0, 100);
1583 if (policy
->max
== policy
->min
) {
1584 limits
->min_policy_pct
= limits
->max_policy_pct
;
1586 limits
->min_policy_pct
= DIV_ROUND_UP(policy
->min
* 100,
1587 policy
->cpuinfo
.max_freq
);
1588 limits
->min_policy_pct
= clamp_t(int, limits
->min_policy_pct
,
1592 /* Normalize user input to [min_policy_pct, max_policy_pct] */
1593 limits
->min_perf_pct
= max(limits
->min_policy_pct
,
1594 limits
->min_sysfs_pct
);
1595 limits
->min_perf_pct
= min(limits
->max_policy_pct
,
1596 limits
->min_perf_pct
);
1597 limits
->max_perf_pct
= min(limits
->max_policy_pct
,
1598 limits
->max_sysfs_pct
);
1599 limits
->max_perf_pct
= max(limits
->min_policy_pct
,
1600 limits
->max_perf_pct
);
1602 /* Make sure min_perf_pct <= max_perf_pct */
1603 limits
->min_perf_pct
= min(limits
->max_perf_pct
, limits
->min_perf_pct
);
1605 limits
->min_perf
= div_fp(limits
->min_perf_pct
, 100);
1606 limits
->max_perf
= div_fp(limits
->max_perf_pct
, 100);
1607 limits
->max_perf
= round_up(limits
->max_perf
, FRAC_BITS
);
1608 limits
->min_perf
= round_up(limits
->min_perf
, FRAC_BITS
);
1610 mutex_unlock(&intel_pstate_limits_lock
);
1612 pr_debug("cpu:%d max_perf_pct:%d min_perf_pct:%d\n", policy
->cpu
,
1613 limits
->max_perf_pct
, limits
->min_perf_pct
);
1616 static int intel_pstate_set_policy(struct cpufreq_policy
*policy
)
1618 struct cpudata
*cpu
;
1619 struct perf_limits
*perf_limits
= NULL
;
1621 if (!policy
->cpuinfo
.max_freq
)
1624 pr_debug("set_policy cpuinfo.max %u policy->max %u\n",
1625 policy
->cpuinfo
.max_freq
, policy
->max
);
1627 cpu
= all_cpu_data
[policy
->cpu
];
1628 cpu
->policy
= policy
->policy
;
1630 if (cpu
->pstate
.max_pstate_physical
> cpu
->pstate
.max_pstate
&&
1631 policy
->max
< policy
->cpuinfo
.max_freq
&&
1632 policy
->max
> cpu
->pstate
.max_pstate
* cpu
->pstate
.scaling
) {
1633 pr_debug("policy->max > max non turbo frequency\n");
1634 policy
->max
= policy
->cpuinfo
.max_freq
;
1638 perf_limits
= cpu
->perf_limits
;
1640 if (policy
->policy
== CPUFREQ_POLICY_PERFORMANCE
) {
1642 limits
= &performance_limits
;
1643 perf_limits
= limits
;
1645 if (policy
->max
>= policy
->cpuinfo
.max_freq
) {
1646 pr_debug("set performance\n");
1647 intel_pstate_set_performance_limits(perf_limits
);
1651 pr_debug("set powersave\n");
1653 limits
= &powersave_limits
;
1654 perf_limits
= limits
;
1659 intel_pstate_update_perf_limits(policy
, perf_limits
);
1661 if (cpu
->policy
== CPUFREQ_POLICY_PERFORMANCE
) {
1663 * NOHZ_FULL CPUs need this as the governor callback may not
1664 * be invoked on them.
1666 intel_pstate_clear_update_util_hook(policy
->cpu
);
1667 intel_pstate_max_within_limits(cpu
);
1670 intel_pstate_set_update_util_hook(policy
->cpu
);
1672 intel_pstate_hwp_set_policy(policy
);
1677 static int intel_pstate_verify_policy(struct cpufreq_policy
*policy
)
1679 cpufreq_verify_within_cpu_limits(policy
);
1681 if (policy
->policy
!= CPUFREQ_POLICY_POWERSAVE
&&
1682 policy
->policy
!= CPUFREQ_POLICY_PERFORMANCE
)
1688 static void intel_cpufreq_stop_cpu(struct cpufreq_policy
*policy
)
1690 intel_pstate_set_min_pstate(all_cpu_data
[policy
->cpu
]);
1693 static void intel_pstate_stop_cpu(struct cpufreq_policy
*policy
)
1695 pr_debug("CPU %d exiting\n", policy
->cpu
);
1697 intel_pstate_clear_update_util_hook(policy
->cpu
);
1699 intel_cpufreq_stop_cpu(policy
);
1702 static int intel_pstate_cpu_exit(struct cpufreq_policy
*policy
)
1704 intel_pstate_exit_perf_limits(policy
);
1706 policy
->fast_switch_possible
= false;
1711 static int __intel_pstate_cpu_init(struct cpufreq_policy
*policy
)
1713 struct cpudata
*cpu
;
1716 rc
= intel_pstate_init_cpu(policy
->cpu
);
1720 cpu
= all_cpu_data
[policy
->cpu
];
1723 * We need sane value in the cpu->perf_limits, so inherit from global
1724 * perf_limits limits, which are seeded with values based on the
1725 * CONFIG_CPU_FREQ_DEFAULT_GOV_*, during boot up.
1728 memcpy(cpu
->perf_limits
, limits
, sizeof(struct perf_limits
));
1730 policy
->min
= cpu
->pstate
.min_pstate
* cpu
->pstate
.scaling
;
1731 policy
->max
= cpu
->pstate
.turbo_pstate
* cpu
->pstate
.scaling
;
1733 /* cpuinfo and default policy values */
1734 policy
->cpuinfo
.min_freq
= cpu
->pstate
.min_pstate
* cpu
->pstate
.scaling
;
1735 update_turbo_state();
1736 policy
->cpuinfo
.max_freq
= limits
->turbo_disabled
?
1737 cpu
->pstate
.max_pstate
: cpu
->pstate
.turbo_pstate
;
1738 policy
->cpuinfo
.max_freq
*= cpu
->pstate
.scaling
;
1740 intel_pstate_init_acpi_perf_limits(policy
);
1741 cpumask_set_cpu(policy
->cpu
, policy
->cpus
);
1743 policy
->fast_switch_possible
= true;
1748 static int intel_pstate_cpu_init(struct cpufreq_policy
*policy
)
1750 int ret
= __intel_pstate_cpu_init(policy
);
1755 policy
->cpuinfo
.transition_latency
= CPUFREQ_ETERNAL
;
1756 if (limits
->min_perf_pct
== 100 && limits
->max_perf_pct
== 100)
1757 policy
->policy
= CPUFREQ_POLICY_PERFORMANCE
;
1759 policy
->policy
= CPUFREQ_POLICY_POWERSAVE
;
1764 static struct cpufreq_driver intel_pstate
= {
1765 .flags
= CPUFREQ_CONST_LOOPS
,
1766 .verify
= intel_pstate_verify_policy
,
1767 .setpolicy
= intel_pstate_set_policy
,
1768 .resume
= intel_pstate_hwp_set_policy
,
1769 .get
= intel_pstate_get
,
1770 .init
= intel_pstate_cpu_init
,
1771 .exit
= intel_pstate_cpu_exit
,
1772 .stop_cpu
= intel_pstate_stop_cpu
,
1773 .name
= "intel_pstate",
1776 static int intel_cpufreq_verify_policy(struct cpufreq_policy
*policy
)
1778 struct cpudata
*cpu
= all_cpu_data
[policy
->cpu
];
1779 struct perf_limits
*perf_limits
= limits
;
1781 update_turbo_state();
1782 policy
->cpuinfo
.max_freq
= limits
->turbo_disabled
?
1783 cpu
->pstate
.max_freq
: cpu
->pstate
.turbo_freq
;
1785 cpufreq_verify_within_cpu_limits(policy
);
1788 perf_limits
= cpu
->perf_limits
;
1790 intel_pstate_update_perf_limits(policy
, perf_limits
);
1795 static unsigned int intel_cpufreq_turbo_update(struct cpudata
*cpu
,
1796 struct cpufreq_policy
*policy
,
1797 unsigned int target_freq
)
1799 unsigned int max_freq
;
1801 update_turbo_state();
1803 max_freq
= limits
->no_turbo
|| limits
->turbo_disabled
?
1804 cpu
->pstate
.max_freq
: cpu
->pstate
.turbo_freq
;
1805 policy
->cpuinfo
.max_freq
= max_freq
;
1806 if (policy
->max
> max_freq
)
1807 policy
->max
= max_freq
;
1809 if (target_freq
> max_freq
)
1810 target_freq
= max_freq
;
1815 static int intel_cpufreq_target(struct cpufreq_policy
*policy
,
1816 unsigned int target_freq
,
1817 unsigned int relation
)
1819 struct cpudata
*cpu
= all_cpu_data
[policy
->cpu
];
1820 struct cpufreq_freqs freqs
;
1823 freqs
.old
= policy
->cur
;
1824 freqs
.new = intel_cpufreq_turbo_update(cpu
, policy
, target_freq
);
1826 cpufreq_freq_transition_begin(policy
, &freqs
);
1828 case CPUFREQ_RELATION_L
:
1829 target_pstate
= DIV_ROUND_UP(freqs
.new, cpu
->pstate
.scaling
);
1831 case CPUFREQ_RELATION_H
:
1832 target_pstate
= freqs
.new / cpu
->pstate
.scaling
;
1835 target_pstate
= DIV_ROUND_CLOSEST(freqs
.new, cpu
->pstate
.scaling
);
1838 target_pstate
= intel_pstate_prepare_request(cpu
, target_pstate
);
1839 if (target_pstate
!= cpu
->pstate
.current_pstate
) {
1840 cpu
->pstate
.current_pstate
= target_pstate
;
1841 wrmsrl_on_cpu(policy
->cpu
, MSR_IA32_PERF_CTL
,
1842 pstate_funcs
.get_val(cpu
, target_pstate
));
1844 cpufreq_freq_transition_end(policy
, &freqs
, false);
1849 static unsigned int intel_cpufreq_fast_switch(struct cpufreq_policy
*policy
,
1850 unsigned int target_freq
)
1852 struct cpudata
*cpu
= all_cpu_data
[policy
->cpu
];
1855 target_freq
= intel_cpufreq_turbo_update(cpu
, policy
, target_freq
);
1856 target_pstate
= DIV_ROUND_UP(target_freq
, cpu
->pstate
.scaling
);
1857 intel_pstate_update_pstate(cpu
, target_pstate
);
1861 static int intel_cpufreq_cpu_init(struct cpufreq_policy
*policy
)
1863 int ret
= __intel_pstate_cpu_init(policy
);
1868 policy
->cpuinfo
.transition_latency
= INTEL_CPUFREQ_TRANSITION_LATENCY
;
1869 /* This reflects the intel_pstate_get_cpu_pstates() setting. */
1870 policy
->cur
= policy
->cpuinfo
.min_freq
;
1875 static struct cpufreq_driver intel_cpufreq
= {
1876 .flags
= CPUFREQ_CONST_LOOPS
,
1877 .verify
= intel_cpufreq_verify_policy
,
1878 .target
= intel_cpufreq_target
,
1879 .fast_switch
= intel_cpufreq_fast_switch
,
1880 .init
= intel_cpufreq_cpu_init
,
1881 .exit
= intel_pstate_cpu_exit
,
1882 .stop_cpu
= intel_cpufreq_stop_cpu
,
1883 .name
= "intel_cpufreq",
1886 static struct cpufreq_driver
*intel_pstate_driver
= &intel_pstate
;
1888 static int no_load __initdata
;
1889 static int no_hwp __initdata
;
1890 static int hwp_only __initdata
;
1891 static unsigned int force_load __initdata
;
1893 static int __init
intel_pstate_msrs_not_valid(void)
1895 if (!pstate_funcs
.get_max() ||
1896 !pstate_funcs
.get_min() ||
1897 !pstate_funcs
.get_turbo())
1903 static void __init
copy_pid_params(struct pstate_adjust_policy
*policy
)
1905 pid_params
.sample_rate_ms
= policy
->sample_rate_ms
;
1906 pid_params
.sample_rate_ns
= pid_params
.sample_rate_ms
* NSEC_PER_MSEC
;
1907 pid_params
.p_gain_pct
= policy
->p_gain_pct
;
1908 pid_params
.i_gain_pct
= policy
->i_gain_pct
;
1909 pid_params
.d_gain_pct
= policy
->d_gain_pct
;
1910 pid_params
.deadband
= policy
->deadband
;
1911 pid_params
.setpoint
= policy
->setpoint
;
1915 static void intel_pstate_use_acpi_profile(void)
1917 if (acpi_gbl_FADT
.preferred_profile
== PM_MOBILE
)
1918 pstate_funcs
.get_target_pstate
=
1919 get_target_pstate_use_cpu_load
;
1922 static void intel_pstate_use_acpi_profile(void)
1927 static void __init
copy_cpu_funcs(struct pstate_funcs
*funcs
)
1929 pstate_funcs
.get_max
= funcs
->get_max
;
1930 pstate_funcs
.get_max_physical
= funcs
->get_max_physical
;
1931 pstate_funcs
.get_min
= funcs
->get_min
;
1932 pstate_funcs
.get_turbo
= funcs
->get_turbo
;
1933 pstate_funcs
.get_scaling
= funcs
->get_scaling
;
1934 pstate_funcs
.get_val
= funcs
->get_val
;
1935 pstate_funcs
.get_vid
= funcs
->get_vid
;
1936 pstate_funcs
.get_target_pstate
= funcs
->get_target_pstate
;
1938 intel_pstate_use_acpi_profile();
1943 static bool __init
intel_pstate_no_acpi_pss(void)
1947 for_each_possible_cpu(i
) {
1949 union acpi_object
*pss
;
1950 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
1951 struct acpi_processor
*pr
= per_cpu(processors
, i
);
1956 status
= acpi_evaluate_object(pr
->handle
, "_PSS", NULL
, &buffer
);
1957 if (ACPI_FAILURE(status
))
1960 pss
= buffer
.pointer
;
1961 if (pss
&& pss
->type
== ACPI_TYPE_PACKAGE
) {
1972 static bool __init
intel_pstate_has_acpi_ppc(void)
1976 for_each_possible_cpu(i
) {
1977 struct acpi_processor
*pr
= per_cpu(processors
, i
);
1981 if (acpi_has_method(pr
->handle
, "_PPC"))
1992 struct hw_vendor_info
{
1994 char oem_id
[ACPI_OEM_ID_SIZE
];
1995 char oem_table_id
[ACPI_OEM_TABLE_ID_SIZE
];
1999 /* Hardware vendor-specific info that has its own power management modes */
2000 static struct hw_vendor_info vendor_info
[] __initdata
= {
2001 {1, "HP ", "ProLiant", PSS
},
2002 {1, "ORACLE", "X4-2 ", PPC
},
2003 {1, "ORACLE", "X4-2L ", PPC
},
2004 {1, "ORACLE", "X4-2B ", PPC
},
2005 {1, "ORACLE", "X3-2 ", PPC
},
2006 {1, "ORACLE", "X3-2L ", PPC
},
2007 {1, "ORACLE", "X3-2B ", PPC
},
2008 {1, "ORACLE", "X4470M2 ", PPC
},
2009 {1, "ORACLE", "X4270M3 ", PPC
},
2010 {1, "ORACLE", "X4270M2 ", PPC
},
2011 {1, "ORACLE", "X4170M2 ", PPC
},
2012 {1, "ORACLE", "X4170 M3", PPC
},
2013 {1, "ORACLE", "X4275 M3", PPC
},
2014 {1, "ORACLE", "X6-2 ", PPC
},
2015 {1, "ORACLE", "Sudbury ", PPC
},
2019 static bool __init
intel_pstate_platform_pwr_mgmt_exists(void)
2021 struct acpi_table_header hdr
;
2022 struct hw_vendor_info
*v_info
;
2023 const struct x86_cpu_id
*id
;
2026 id
= x86_match_cpu(intel_pstate_cpu_oob_ids
);
2028 rdmsrl(MSR_MISC_PWR_MGMT
, misc_pwr
);
2029 if ( misc_pwr
& (1 << 8))
2033 if (acpi_disabled
||
2034 ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT
, 0, &hdr
)))
2037 for (v_info
= vendor_info
; v_info
->valid
; v_info
++) {
2038 if (!strncmp(hdr
.oem_id
, v_info
->oem_id
, ACPI_OEM_ID_SIZE
) &&
2039 !strncmp(hdr
.oem_table_id
, v_info
->oem_table_id
,
2040 ACPI_OEM_TABLE_ID_SIZE
))
2041 switch (v_info
->oem_pwr_table
) {
2043 return intel_pstate_no_acpi_pss();
2045 return intel_pstate_has_acpi_ppc() &&
2053 static void intel_pstate_request_control_from_smm(void)
2056 * It may be unsafe to request P-states control from SMM if _PPC support
2057 * has not been enabled.
2060 acpi_processor_pstate_control();
2062 #else /* CONFIG_ACPI not enabled */
2063 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
2064 static inline bool intel_pstate_has_acpi_ppc(void) { return false; }
2065 static inline void intel_pstate_request_control_from_smm(void) {}
2066 #endif /* CONFIG_ACPI */
2068 static const struct x86_cpu_id hwp_support_ids
[] __initconst
= {
2069 { X86_VENDOR_INTEL
, 6, X86_MODEL_ANY
, X86_FEATURE_HWP
},
2073 static int __init
intel_pstate_init(void)
2076 const struct x86_cpu_id
*id
;
2077 struct cpu_defaults
*cpu_def
;
2082 if (x86_match_cpu(hwp_support_ids
) && !no_hwp
) {
2083 copy_cpu_funcs(&core_params
.funcs
);
2085 goto hwp_cpu_matched
;
2088 id
= x86_match_cpu(intel_pstate_cpu_ids
);
2092 cpu_def
= (struct cpu_defaults
*)id
->driver_data
;
2094 copy_pid_params(&cpu_def
->pid_policy
);
2095 copy_cpu_funcs(&cpu_def
->funcs
);
2097 if (intel_pstate_msrs_not_valid())
2102 * The Intel pstate driver will be ignored if the platform
2103 * firmware has its own power management modes.
2105 if (intel_pstate_platform_pwr_mgmt_exists())
2108 pr_info("Intel P-state driver initializing\n");
2110 all_cpu_data
= vzalloc(sizeof(void *) * num_possible_cpus());
2114 if (!hwp_active
&& hwp_only
)
2117 intel_pstate_request_control_from_smm();
2119 rc
= cpufreq_register_driver(intel_pstate_driver
);
2123 intel_pstate_debug_expose_params();
2124 intel_pstate_sysfs_expose_params();
2127 pr_info("HWP enabled\n");
2132 for_each_online_cpu(cpu
) {
2133 if (all_cpu_data
[cpu
]) {
2134 if (intel_pstate_driver
== &intel_pstate
)
2135 intel_pstate_clear_update_util_hook(cpu
);
2137 kfree(all_cpu_data
[cpu
]);
2142 vfree(all_cpu_data
);
2145 device_initcall(intel_pstate_init
);
2147 static int __init
intel_pstate_setup(char *str
)
2152 if (!strcmp(str
, "disable")) {
2154 } else if (!strcmp(str
, "passive")) {
2155 pr_info("Passive mode enabled\n");
2156 intel_pstate_driver
= &intel_cpufreq
;
2159 if (!strcmp(str
, "no_hwp")) {
2160 pr_info("HWP disabled\n");
2163 if (!strcmp(str
, "force"))
2165 if (!strcmp(str
, "hwp_only"))
2167 if (!strcmp(str
, "per_cpu_perf_limits"))
2168 per_cpu_limits
= true;
2171 if (!strcmp(str
, "support_acpi_ppc"))
2177 early_param("intel_pstate", intel_pstate_setup
);
2179 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
2180 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
2181 MODULE_LICENSE("GPL");