2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/kernel.h>
16 #include <linux/kernel_stat.h>
17 #include <linux/module.h>
18 #include <linux/ktime.h>
19 #include <linux/hrtimer.h>
20 #include <linux/tick.h>
21 #include <linux/slab.h>
22 #include <linux/sched.h>
23 #include <linux/list.h>
24 #include <linux/cpu.h>
25 #include <linux/cpufreq.h>
26 #include <linux/sysfs.h>
27 #include <linux/types.h>
29 #include <linux/debugfs.h>
30 #include <linux/acpi.h>
31 #include <linux/vmalloc.h>
32 #include <trace/events/power.h>
34 #include <asm/div64.h>
36 #include <asm/cpu_device_id.h>
37 #include <asm/cpufeature.h>
38 #include <asm/intel-family.h>
40 #define INTEL_CPUFREQ_TRANSITION_LATENCY 20000
43 #include <acpi/processor.h>
44 #include <acpi/cppc_acpi.h>
48 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
49 #define fp_toint(X) ((X) >> FRAC_BITS)
52 #define EXT_FRAC_BITS (EXT_BITS + FRAC_BITS)
53 #define fp_ext_toint(X) ((X) >> EXT_FRAC_BITS)
54 #define int_ext_tofp(X) ((int64_t)(X) << EXT_FRAC_BITS)
56 static inline int32_t mul_fp(int32_t x
, int32_t y
)
58 return ((int64_t)x
* (int64_t)y
) >> FRAC_BITS
;
61 static inline int32_t div_fp(s64 x
, s64 y
)
63 return div64_s64((int64_t)x
<< FRAC_BITS
, y
);
66 static inline int ceiling_fp(int32_t x
)
71 mask
= (1 << FRAC_BITS
) - 1;
77 static inline u64
mul_ext_fp(u64 x
, u64 y
)
79 return (x
* y
) >> EXT_FRAC_BITS
;
82 static inline u64
div_ext_fp(u64 x
, u64 y
)
84 return div64_u64(x
<< EXT_FRAC_BITS
, y
);
88 * struct sample - Store performance sample
89 * @core_avg_perf: Ratio of APERF/MPERF which is the actual average
90 * performance during last sample period
91 * @busy_scaled: Scaled busy value which is used to calculate next
92 * P state. This can be different than core_avg_perf
93 * to account for cpu idle period
94 * @aperf: Difference of actual performance frequency clock count
95 * read from APERF MSR between last and current sample
96 * @mperf: Difference of maximum performance frequency clock count
97 * read from MPERF MSR between last and current sample
98 * @tsc: Difference of time stamp counter between last and
100 * @time: Current time from scheduler
102 * This structure is used in the cpudata structure to store performance sample
103 * data for choosing next P State.
106 int32_t core_avg_perf
;
115 * struct pstate_data - Store P state data
116 * @current_pstate: Current requested P state
117 * @min_pstate: Min P state possible for this platform
118 * @max_pstate: Max P state possible for this platform
119 * @max_pstate_physical:This is physical Max P state for a processor
120 * This can be higher than the max_pstate which can
121 * be limited by platform thermal design power limits
122 * @scaling: Scaling factor to convert frequency to cpufreq
124 * @turbo_pstate: Max Turbo P state possible for this platform
125 * @max_freq: @max_pstate frequency in cpufreq units
126 * @turbo_freq: @turbo_pstate frequency in cpufreq units
128 * Stores the per cpu model P state limits and current P state.
134 int max_pstate_physical
;
137 unsigned int max_freq
;
138 unsigned int turbo_freq
;
142 * struct vid_data - Stores voltage information data
143 * @min: VID data for this platform corresponding to
145 * @max: VID data corresponding to the highest P State.
146 * @turbo: VID data for turbo P state
147 * @ratio: Ratio of (vid max - vid min) /
148 * (max P state - Min P State)
150 * Stores the voltage data for DVFS (Dynamic Voltage and Frequency Scaling)
151 * This data is used in Atom platforms, where in addition to target P state,
152 * the voltage data needs to be specified to select next P State.
162 * struct _pid - Stores PID data
163 * @setpoint: Target set point for busyness or performance
164 * @integral: Storage for accumulated error values
165 * @p_gain: PID proportional gain
166 * @i_gain: PID integral gain
167 * @d_gain: PID derivative gain
168 * @deadband: PID deadband
169 * @last_err: Last error storage for integral part of PID calculation
171 * Stores PID coefficients and last error for PID controller.
184 * struct perf_limits - Store user and policy limits
185 * @no_turbo: User requested turbo state from intel_pstate sysfs
186 * @turbo_disabled: Platform turbo status either from msr
187 * MSR_IA32_MISC_ENABLE or when maximum available pstate
188 * matches the maximum turbo pstate
189 * @max_perf_pct: Effective maximum performance limit in percentage, this
190 * is minimum of either limits enforced by cpufreq policy
191 * or limits from user set limits via intel_pstate sysfs
192 * @min_perf_pct: Effective minimum performance limit in percentage, this
193 * is maximum of either limits enforced by cpufreq policy
194 * or limits from user set limits via intel_pstate sysfs
195 * @max_perf: This is a scaled value between 0 to 255 for max_perf_pct
196 * This value is used to limit max pstate
197 * @min_perf: This is a scaled value between 0 to 255 for min_perf_pct
198 * This value is used to limit min pstate
199 * @max_policy_pct: The maximum performance in percentage enforced by
200 * cpufreq setpolicy interface
201 * @max_sysfs_pct: The maximum performance in percentage enforced by
202 * intel pstate sysfs interface, unused when per cpu
203 * controls are enforced
204 * @min_policy_pct: The minimum performance in percentage enforced by
205 * cpufreq setpolicy interface
206 * @min_sysfs_pct: The minimum performance in percentage enforced by
207 * intel pstate sysfs interface, unused when per cpu
208 * controls are enforced
210 * Storage for user and policy defined limits.
226 * struct cpudata - Per CPU instance data storage
227 * @cpu: CPU number for this instance data
228 * @policy: CPUFreq policy value
229 * @update_util: CPUFreq utility callback information
230 * @update_util_set: CPUFreq utility callback is set
231 * @iowait_boost: iowait-related boost fraction
232 * @last_update: Time of the last update.
233 * @pstate: Stores P state limits for this CPU
234 * @vid: Stores VID limits for this CPU
235 * @pid: Stores PID parameters for this CPU
236 * @last_sample_time: Last Sample time
237 * @prev_aperf: Last APERF value read from APERF MSR
238 * @prev_mperf: Last MPERF value read from MPERF MSR
239 * @prev_tsc: Last timestamp counter (TSC) value
240 * @prev_cummulative_iowait: IO Wait time difference from last and
242 * @sample: Storage for storing last Sample data
243 * @perf_limits: Pointer to perf_limit unique to this CPU
244 * Not all field in the structure are applicable
245 * when per cpu controls are enforced
246 * @acpi_perf_data: Stores ACPI perf information read from _PSS
247 * @valid_pss_table: Set to true for valid ACPI _PSS entries found
248 * @epp_powersave: Last saved HWP energy performance preference
249 * (EPP) or energy performance bias (EPB),
250 * when policy switched to performance
251 * @epp_policy: Last saved policy used to set EPP/EPB
252 * @epp_default: Power on default HWP energy performance
254 * @epp_saved: Saved EPP/EPB during system suspend or CPU offline
257 * This structure stores per CPU instance data for all CPUs.
263 struct update_util_data update_util
;
264 bool update_util_set
;
266 struct pstate_data pstate
;
271 u64 last_sample_time
;
275 u64 prev_cummulative_iowait
;
276 struct sample sample
;
277 struct perf_limits
*perf_limits
;
279 struct acpi_processor_performance acpi_perf_data
;
280 bool valid_pss_table
;
282 unsigned int iowait_boost
;
289 static struct cpudata
**all_cpu_data
;
292 * struct pstate_adjust_policy - Stores static PID configuration data
293 * @sample_rate_ms: PID calculation sample rate in ms
294 * @sample_rate_ns: Sample rate calculation in ns
295 * @deadband: PID deadband
296 * @setpoint: PID Setpoint
297 * @p_gain_pct: PID proportional gain
298 * @i_gain_pct: PID integral gain
299 * @d_gain_pct: PID derivative gain
301 * Stores per CPU model static PID configuration data.
303 struct pstate_adjust_policy
{
314 * struct pstate_funcs - Per CPU model specific callbacks
315 * @get_max: Callback to get maximum non turbo effective P state
316 * @get_max_physical: Callback to get maximum non turbo physical P state
317 * @get_min: Callback to get minimum P state
318 * @get_turbo: Callback to get turbo P state
319 * @get_scaling: Callback to get frequency scaling factor
320 * @get_val: Callback to convert P state to actual MSR write value
321 * @get_vid: Callback to get VID data for Atom platforms
322 * @get_target_pstate: Callback to a function to calculate next P state to use
324 * Core and Atom CPU models have different way to get P State limits. This
325 * structure is used to store those callbacks.
327 struct pstate_funcs
{
328 int (*get_max
)(void);
329 int (*get_max_physical
)(void);
330 int (*get_min
)(void);
331 int (*get_turbo
)(void);
332 int (*get_scaling
)(void);
333 u64 (*get_val
)(struct cpudata
*, int pstate
);
334 void (*get_vid
)(struct cpudata
*);
335 int32_t (*get_target_pstate
)(struct cpudata
*);
339 * struct cpu_defaults- Per CPU model default config data
340 * @pid_policy: PID config data
341 * @funcs: Callback function data
343 struct cpu_defaults
{
344 struct pstate_adjust_policy pid_policy
;
345 struct pstate_funcs funcs
;
348 static inline int32_t get_target_pstate_use_performance(struct cpudata
*cpu
);
349 static inline int32_t get_target_pstate_use_cpu_load(struct cpudata
*cpu
);
351 static struct pstate_adjust_policy pid_params __read_mostly
;
352 static struct pstate_funcs pstate_funcs __read_mostly
;
353 static int hwp_active __read_mostly
;
354 static bool per_cpu_limits __read_mostly
;
356 static bool driver_registered __read_mostly
;
359 static bool acpi_ppc
;
362 static struct perf_limits performance_limits
= {
366 .max_perf
= int_ext_tofp(1),
368 .min_perf
= int_ext_tofp(1),
369 .max_policy_pct
= 100,
370 .max_sysfs_pct
= 100,
375 static struct perf_limits powersave_limits
= {
379 .max_perf
= int_ext_tofp(1),
382 .max_policy_pct
= 100,
383 .max_sysfs_pct
= 100,
388 #ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
389 static struct perf_limits
*limits
= &performance_limits
;
391 static struct perf_limits
*limits
= &powersave_limits
;
394 static DEFINE_MUTEX(intel_pstate_driver_lock
);
395 static DEFINE_MUTEX(intel_pstate_limits_lock
);
399 static bool intel_pstate_get_ppc_enable_status(void)
401 if (acpi_gbl_FADT
.preferred_profile
== PM_ENTERPRISE_SERVER
||
402 acpi_gbl_FADT
.preferred_profile
== PM_PERFORMANCE_SERVER
)
408 #ifdef CONFIG_ACPI_CPPC_LIB
410 /* The work item is needed to avoid CPU hotplug locking issues */
411 static void intel_pstste_sched_itmt_work_fn(struct work_struct
*work
)
413 sched_set_itmt_support();
416 static DECLARE_WORK(sched_itmt_work
, intel_pstste_sched_itmt_work_fn
);
418 static void intel_pstate_set_itmt_prio(int cpu
)
420 struct cppc_perf_caps cppc_perf
;
421 static u32 max_highest_perf
= 0, min_highest_perf
= U32_MAX
;
424 ret
= cppc_get_perf_caps(cpu
, &cppc_perf
);
429 * The priorities can be set regardless of whether or not
430 * sched_set_itmt_support(true) has been called and it is valid to
431 * update them at any time after it has been called.
433 sched_set_itmt_core_prio(cppc_perf
.highest_perf
, cpu
);
435 if (max_highest_perf
<= min_highest_perf
) {
436 if (cppc_perf
.highest_perf
> max_highest_perf
)
437 max_highest_perf
= cppc_perf
.highest_perf
;
439 if (cppc_perf
.highest_perf
< min_highest_perf
)
440 min_highest_perf
= cppc_perf
.highest_perf
;
442 if (max_highest_perf
> min_highest_perf
) {
444 * This code can be run during CPU online under the
445 * CPU hotplug locks, so sched_set_itmt_support()
446 * cannot be called from here. Queue up a work item
449 schedule_work(&sched_itmt_work
);
454 static void intel_pstate_set_itmt_prio(int cpu
)
459 static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy
*policy
)
466 intel_pstate_set_itmt_prio(policy
->cpu
);
470 if (!intel_pstate_get_ppc_enable_status())
473 cpu
= all_cpu_data
[policy
->cpu
];
475 ret
= acpi_processor_register_performance(&cpu
->acpi_perf_data
,
481 * Check if the control value in _PSS is for PERF_CTL MSR, which should
482 * guarantee that the states returned by it map to the states in our
485 if (cpu
->acpi_perf_data
.control_register
.space_id
!=
486 ACPI_ADR_SPACE_FIXED_HARDWARE
)
490 * If there is only one entry _PSS, simply ignore _PSS and continue as
491 * usual without taking _PSS into account
493 if (cpu
->acpi_perf_data
.state_count
< 2)
496 pr_debug("CPU%u - ACPI _PSS perf data\n", policy
->cpu
);
497 for (i
= 0; i
< cpu
->acpi_perf_data
.state_count
; i
++) {
498 pr_debug(" %cP%d: %u MHz, %u mW, 0x%x\n",
499 (i
== cpu
->acpi_perf_data
.state
? '*' : ' '), i
,
500 (u32
) cpu
->acpi_perf_data
.states
[i
].core_frequency
,
501 (u32
) cpu
->acpi_perf_data
.states
[i
].power
,
502 (u32
) cpu
->acpi_perf_data
.states
[i
].control
);
506 * The _PSS table doesn't contain whole turbo frequency range.
507 * This just contains +1 MHZ above the max non turbo frequency,
508 * with control value corresponding to max turbo ratio. But
509 * when cpufreq set policy is called, it will call with this
510 * max frequency, which will cause a reduced performance as
511 * this driver uses real max turbo frequency as the max
512 * frequency. So correct this frequency in _PSS table to
513 * correct max turbo frequency based on the turbo state.
514 * Also need to convert to MHz as _PSS freq is in MHz.
516 if (!limits
->turbo_disabled
)
517 cpu
->acpi_perf_data
.states
[0].core_frequency
=
518 policy
->cpuinfo
.max_freq
/ 1000;
519 cpu
->valid_pss_table
= true;
520 pr_debug("_PPC limits will be enforced\n");
525 cpu
->valid_pss_table
= false;
526 acpi_processor_unregister_performance(policy
->cpu
);
529 static void intel_pstate_exit_perf_limits(struct cpufreq_policy
*policy
)
533 cpu
= all_cpu_data
[policy
->cpu
];
534 if (!cpu
->valid_pss_table
)
537 acpi_processor_unregister_performance(policy
->cpu
);
540 static inline void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy
*policy
)
544 static inline void intel_pstate_exit_perf_limits(struct cpufreq_policy
*policy
)
549 static inline void pid_reset(struct _pid
*pid
, int setpoint
, int busy
,
550 int deadband
, int integral
) {
551 pid
->setpoint
= int_tofp(setpoint
);
552 pid
->deadband
= int_tofp(deadband
);
553 pid
->integral
= int_tofp(integral
);
554 pid
->last_err
= int_tofp(setpoint
) - int_tofp(busy
);
557 static inline void pid_p_gain_set(struct _pid
*pid
, int percent
)
559 pid
->p_gain
= div_fp(percent
, 100);
562 static inline void pid_i_gain_set(struct _pid
*pid
, int percent
)
564 pid
->i_gain
= div_fp(percent
, 100);
567 static inline void pid_d_gain_set(struct _pid
*pid
, int percent
)
569 pid
->d_gain
= div_fp(percent
, 100);
572 static signed int pid_calc(struct _pid
*pid
, int32_t busy
)
575 int32_t pterm
, dterm
, fp_error
;
576 int32_t integral_limit
;
578 fp_error
= pid
->setpoint
- busy
;
580 if (abs(fp_error
) <= pid
->deadband
)
583 pterm
= mul_fp(pid
->p_gain
, fp_error
);
585 pid
->integral
+= fp_error
;
588 * We limit the integral here so that it will never
589 * get higher than 30. This prevents it from becoming
590 * too large an input over long periods of time and allows
591 * it to get factored out sooner.
593 * The value of 30 was chosen through experimentation.
595 integral_limit
= int_tofp(30);
596 if (pid
->integral
> integral_limit
)
597 pid
->integral
= integral_limit
;
598 if (pid
->integral
< -integral_limit
)
599 pid
->integral
= -integral_limit
;
601 dterm
= mul_fp(pid
->d_gain
, fp_error
- pid
->last_err
);
602 pid
->last_err
= fp_error
;
604 result
= pterm
+ mul_fp(pid
->integral
, pid
->i_gain
) + dterm
;
605 result
= result
+ (1 << (FRAC_BITS
-1));
606 return (signed int)fp_toint(result
);
609 static inline void intel_pstate_busy_pid_reset(struct cpudata
*cpu
)
611 pid_p_gain_set(&cpu
->pid
, pid_params
.p_gain_pct
);
612 pid_d_gain_set(&cpu
->pid
, pid_params
.d_gain_pct
);
613 pid_i_gain_set(&cpu
->pid
, pid_params
.i_gain_pct
);
615 pid_reset(&cpu
->pid
, pid_params
.setpoint
, 100, pid_params
.deadband
, 0);
618 static inline void intel_pstate_reset_all_pid(void)
622 for_each_online_cpu(cpu
) {
623 if (all_cpu_data
[cpu
])
624 intel_pstate_busy_pid_reset(all_cpu_data
[cpu
]);
628 static inline void update_turbo_state(void)
633 cpu
= all_cpu_data
[0];
634 rdmsrl(MSR_IA32_MISC_ENABLE
, misc_en
);
635 limits
->turbo_disabled
=
636 (misc_en
& MSR_IA32_MISC_ENABLE_TURBO_DISABLE
||
637 cpu
->pstate
.max_pstate
== cpu
->pstate
.turbo_pstate
);
640 static s16
intel_pstate_get_epb(struct cpudata
*cpu_data
)
645 if (!static_cpu_has(X86_FEATURE_EPB
))
648 ret
= rdmsrl_on_cpu(cpu_data
->cpu
, MSR_IA32_ENERGY_PERF_BIAS
, &epb
);
652 return (s16
)(epb
& 0x0f);
655 static s16
intel_pstate_get_epp(struct cpudata
*cpu_data
, u64 hwp_req_data
)
659 if (static_cpu_has(X86_FEATURE_HWP_EPP
)) {
661 * When hwp_req_data is 0, means that caller didn't read
662 * MSR_HWP_REQUEST, so need to read and get EPP.
665 epp
= rdmsrl_on_cpu(cpu_data
->cpu
, MSR_HWP_REQUEST
,
670 epp
= (hwp_req_data
>> 24) & 0xff;
672 /* When there is no EPP present, HWP uses EPB settings */
673 epp
= intel_pstate_get_epb(cpu_data
);
679 static int intel_pstate_set_epb(int cpu
, s16 pref
)
684 if (!static_cpu_has(X86_FEATURE_EPB
))
687 ret
= rdmsrl_on_cpu(cpu
, MSR_IA32_ENERGY_PERF_BIAS
, &epb
);
691 epb
= (epb
& ~0x0f) | pref
;
692 wrmsrl_on_cpu(cpu
, MSR_IA32_ENERGY_PERF_BIAS
, epb
);
698 * EPP/EPB display strings corresponding to EPP index in the
699 * energy_perf_strings[]
701 *-------------------------------------
704 * 2 balance_performance
708 static const char * const energy_perf_strings
[] = {
711 "balance_performance",
717 static int intel_pstate_get_energy_pref_index(struct cpudata
*cpu_data
)
722 epp
= intel_pstate_get_epp(cpu_data
, 0);
726 if (static_cpu_has(X86_FEATURE_HWP_EPP
)) {
729 * 0x00-0x3F : Performance
730 * 0x40-0x7F : Balance performance
731 * 0x80-0xBF : Balance power
733 * The EPP is a 8 bit value, but our ranges restrict the
734 * value which can be set. Here only using top two bits
737 index
= (epp
>> 6) + 1;
738 } else if (static_cpu_has(X86_FEATURE_EPB
)) {
741 * 0x00-0x03 : Performance
742 * 0x04-0x07 : Balance performance
743 * 0x08-0x0B : Balance power
745 * The EPB is a 4 bit value, but our ranges restrict the
746 * value which can be set. Here only using top two bits
749 index
= (epp
>> 2) + 1;
755 static int intel_pstate_set_energy_pref_index(struct cpudata
*cpu_data
,
762 epp
= cpu_data
->epp_default
;
764 mutex_lock(&intel_pstate_limits_lock
);
766 if (static_cpu_has(X86_FEATURE_HWP_EPP
)) {
769 ret
= rdmsrl_on_cpu(cpu_data
->cpu
, MSR_HWP_REQUEST
, &value
);
773 value
&= ~GENMASK_ULL(31, 24);
776 * If epp is not default, convert from index into
777 * energy_perf_strings to epp value, by shifting 6
778 * bits left to use only top two bits in epp.
779 * The resultant epp need to shifted by 24 bits to
780 * epp position in MSR_HWP_REQUEST.
783 epp
= (pref_index
- 1) << 6;
785 value
|= (u64
)epp
<< 24;
786 ret
= wrmsrl_on_cpu(cpu_data
->cpu
, MSR_HWP_REQUEST
, value
);
789 epp
= (pref_index
- 1) << 2;
790 ret
= intel_pstate_set_epb(cpu_data
->cpu
, epp
);
793 mutex_unlock(&intel_pstate_limits_lock
);
798 static ssize_t
show_energy_performance_available_preferences(
799 struct cpufreq_policy
*policy
, char *buf
)
804 while (energy_perf_strings
[i
] != NULL
)
805 ret
+= sprintf(&buf
[ret
], "%s ", energy_perf_strings
[i
++]);
807 ret
+= sprintf(&buf
[ret
], "\n");
812 cpufreq_freq_attr_ro(energy_performance_available_preferences
);
814 static ssize_t
store_energy_performance_preference(
815 struct cpufreq_policy
*policy
, const char *buf
, size_t count
)
817 struct cpudata
*cpu_data
= all_cpu_data
[policy
->cpu
];
818 char str_preference
[21];
821 ret
= sscanf(buf
, "%20s", str_preference
);
825 while (energy_perf_strings
[i
] != NULL
) {
826 if (!strcmp(str_preference
, energy_perf_strings
[i
])) {
827 intel_pstate_set_energy_pref_index(cpu_data
, i
);
836 static ssize_t
show_energy_performance_preference(
837 struct cpufreq_policy
*policy
, char *buf
)
839 struct cpudata
*cpu_data
= all_cpu_data
[policy
->cpu
];
842 preference
= intel_pstate_get_energy_pref_index(cpu_data
);
846 return sprintf(buf
, "%s\n", energy_perf_strings
[preference
]);
849 cpufreq_freq_attr_rw(energy_performance_preference
);
851 static struct freq_attr
*hwp_cpufreq_attrs
[] = {
852 &energy_performance_preference
,
853 &energy_performance_available_preferences
,
857 static void intel_pstate_hwp_set(struct cpufreq_policy
*policy
)
859 int min
, hw_min
, max
, hw_max
, cpu
, range
, adj_range
;
860 struct perf_limits
*perf_limits
= limits
;
863 for_each_cpu(cpu
, policy
->cpus
) {
864 int max_perf_pct
, min_perf_pct
;
865 struct cpudata
*cpu_data
= all_cpu_data
[cpu
];
869 perf_limits
= all_cpu_data
[cpu
]->perf_limits
;
871 rdmsrl_on_cpu(cpu
, MSR_HWP_CAPABILITIES
, &cap
);
872 hw_min
= HWP_LOWEST_PERF(cap
);
873 if (limits
->no_turbo
)
874 hw_max
= HWP_GUARANTEED_PERF(cap
);
876 hw_max
= HWP_HIGHEST_PERF(cap
);
877 range
= hw_max
- hw_min
;
879 max_perf_pct
= perf_limits
->max_perf_pct
;
880 min_perf_pct
= perf_limits
->min_perf_pct
;
882 rdmsrl_on_cpu(cpu
, MSR_HWP_REQUEST
, &value
);
883 adj_range
= min_perf_pct
* range
/ 100;
884 min
= hw_min
+ adj_range
;
885 value
&= ~HWP_MIN_PERF(~0L);
886 value
|= HWP_MIN_PERF(min
);
888 adj_range
= max_perf_pct
* range
/ 100;
889 max
= hw_min
+ adj_range
;
891 value
&= ~HWP_MAX_PERF(~0L);
892 value
|= HWP_MAX_PERF(max
);
894 if (cpu_data
->epp_policy
== cpu_data
->policy
)
897 cpu_data
->epp_policy
= cpu_data
->policy
;
899 if (cpu_data
->epp_saved
>= 0) {
900 epp
= cpu_data
->epp_saved
;
901 cpu_data
->epp_saved
= -EINVAL
;
905 if (cpu_data
->policy
== CPUFREQ_POLICY_PERFORMANCE
) {
906 epp
= intel_pstate_get_epp(cpu_data
, value
);
907 cpu_data
->epp_powersave
= epp
;
908 /* If EPP read was failed, then don't try to write */
915 /* skip setting EPP, when saved value is invalid */
916 if (cpu_data
->epp_powersave
< 0)
920 * No need to restore EPP when it is not zero. This
922 * - Policy is not changed
923 * - user has manually changed
924 * - Error reading EPB
926 epp
= intel_pstate_get_epp(cpu_data
, value
);
930 epp
= cpu_data
->epp_powersave
;
933 if (static_cpu_has(X86_FEATURE_HWP_EPP
)) {
934 value
&= ~GENMASK_ULL(31, 24);
935 value
|= (u64
)epp
<< 24;
937 intel_pstate_set_epb(cpu
, epp
);
940 wrmsrl_on_cpu(cpu
, MSR_HWP_REQUEST
, value
);
944 static int intel_pstate_hwp_set_policy(struct cpufreq_policy
*policy
)
947 intel_pstate_hwp_set(policy
);
952 static int intel_pstate_hwp_save_state(struct cpufreq_policy
*policy
)
954 struct cpudata
*cpu_data
= all_cpu_data
[policy
->cpu
];
959 cpu_data
->epp_saved
= intel_pstate_get_epp(cpu_data
, 0);
964 static int intel_pstate_resume(struct cpufreq_policy
*policy
)
971 mutex_lock(&intel_pstate_limits_lock
);
973 all_cpu_data
[policy
->cpu
]->epp_policy
= 0;
975 ret
= intel_pstate_hwp_set_policy(policy
);
977 mutex_unlock(&intel_pstate_limits_lock
);
982 static void intel_pstate_update_policies(void)
986 for_each_possible_cpu(cpu
)
987 cpufreq_update_policy(cpu
);
990 /************************** debugfs begin ************************/
991 static int pid_param_set(void *data
, u64 val
)
994 intel_pstate_reset_all_pid();
998 static int pid_param_get(void *data
, u64
*val
)
1000 *val
= *(u32
*)data
;
1003 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param
, pid_param_get
, pid_param_set
, "%llu\n");
1005 static struct dentry
*debugfs_parent
;
1010 struct dentry
*dentry
;
1013 static struct pid_param pid_files
[] = {
1014 {"sample_rate_ms", &pid_params
.sample_rate_ms
, },
1015 {"d_gain_pct", &pid_params
.d_gain_pct
, },
1016 {"i_gain_pct", &pid_params
.i_gain_pct
, },
1017 {"deadband", &pid_params
.deadband
, },
1018 {"setpoint", &pid_params
.setpoint
, },
1019 {"p_gain_pct", &pid_params
.p_gain_pct
, },
1023 static void intel_pstate_debug_expose_params(void)
1027 debugfs_parent
= debugfs_create_dir("pstate_snb", NULL
);
1028 if (IS_ERR_OR_NULL(debugfs_parent
))
1031 for (i
= 0; pid_files
[i
].name
; i
++) {
1032 struct dentry
*dentry
;
1034 dentry
= debugfs_create_file(pid_files
[i
].name
, 0660,
1035 debugfs_parent
, pid_files
[i
].value
,
1037 if (!IS_ERR(dentry
))
1038 pid_files
[i
].dentry
= dentry
;
1042 static void intel_pstate_debug_hide_params(void)
1046 if (IS_ERR_OR_NULL(debugfs_parent
))
1049 for (i
= 0; pid_files
[i
].name
; i
++) {
1050 debugfs_remove(pid_files
[i
].dentry
);
1051 pid_files
[i
].dentry
= NULL
;
1054 debugfs_remove(debugfs_parent
);
1055 debugfs_parent
= NULL
;
1058 /************************** debugfs end ************************/
1060 /************************** sysfs begin ************************/
1061 #define show_one(file_name, object) \
1062 static ssize_t show_##file_name \
1063 (struct kobject *kobj, struct attribute *attr, char *buf) \
1065 return sprintf(buf, "%u\n", limits->object); \
1068 static ssize_t
intel_pstate_show_status(char *buf
);
1069 static int intel_pstate_update_status(const char *buf
, size_t size
);
1071 static ssize_t
show_status(struct kobject
*kobj
,
1072 struct attribute
*attr
, char *buf
)
1076 mutex_lock(&intel_pstate_driver_lock
);
1077 ret
= intel_pstate_show_status(buf
);
1078 mutex_unlock(&intel_pstate_driver_lock
);
1083 static ssize_t
store_status(struct kobject
*a
, struct attribute
*b
,
1084 const char *buf
, size_t count
)
1086 char *p
= memchr(buf
, '\n', count
);
1089 mutex_lock(&intel_pstate_driver_lock
);
1090 ret
= intel_pstate_update_status(buf
, p
? p
- buf
: count
);
1091 mutex_unlock(&intel_pstate_driver_lock
);
1093 return ret
< 0 ? ret
: count
;
1096 static ssize_t
show_turbo_pct(struct kobject
*kobj
,
1097 struct attribute
*attr
, char *buf
)
1099 struct cpudata
*cpu
;
1100 int total
, no_turbo
, turbo_pct
;
1103 mutex_lock(&intel_pstate_driver_lock
);
1105 if (!driver_registered
) {
1106 mutex_unlock(&intel_pstate_driver_lock
);
1110 cpu
= all_cpu_data
[0];
1112 total
= cpu
->pstate
.turbo_pstate
- cpu
->pstate
.min_pstate
+ 1;
1113 no_turbo
= cpu
->pstate
.max_pstate
- cpu
->pstate
.min_pstate
+ 1;
1114 turbo_fp
= div_fp(no_turbo
, total
);
1115 turbo_pct
= 100 - fp_toint(mul_fp(turbo_fp
, int_tofp(100)));
1117 mutex_unlock(&intel_pstate_driver_lock
);
1119 return sprintf(buf
, "%u\n", turbo_pct
);
1122 static ssize_t
show_num_pstates(struct kobject
*kobj
,
1123 struct attribute
*attr
, char *buf
)
1125 struct cpudata
*cpu
;
1128 mutex_lock(&intel_pstate_driver_lock
);
1130 if (!driver_registered
) {
1131 mutex_unlock(&intel_pstate_driver_lock
);
1135 cpu
= all_cpu_data
[0];
1136 total
= cpu
->pstate
.turbo_pstate
- cpu
->pstate
.min_pstate
+ 1;
1138 mutex_unlock(&intel_pstate_driver_lock
);
1140 return sprintf(buf
, "%u\n", total
);
1143 static ssize_t
show_no_turbo(struct kobject
*kobj
,
1144 struct attribute
*attr
, char *buf
)
1148 mutex_lock(&intel_pstate_driver_lock
);
1150 if (!driver_registered
) {
1151 mutex_unlock(&intel_pstate_driver_lock
);
1155 update_turbo_state();
1156 if (limits
->turbo_disabled
)
1157 ret
= sprintf(buf
, "%u\n", limits
->turbo_disabled
);
1159 ret
= sprintf(buf
, "%u\n", limits
->no_turbo
);
1161 mutex_unlock(&intel_pstate_driver_lock
);
1166 static ssize_t
store_no_turbo(struct kobject
*a
, struct attribute
*b
,
1167 const char *buf
, size_t count
)
1172 ret
= sscanf(buf
, "%u", &input
);
1176 mutex_lock(&intel_pstate_driver_lock
);
1178 if (!driver_registered
) {
1179 mutex_unlock(&intel_pstate_driver_lock
);
1183 mutex_lock(&intel_pstate_limits_lock
);
1185 update_turbo_state();
1186 if (limits
->turbo_disabled
) {
1187 pr_warn("Turbo disabled by BIOS or unavailable on processor\n");
1188 mutex_unlock(&intel_pstate_limits_lock
);
1189 mutex_unlock(&intel_pstate_driver_lock
);
1193 limits
->no_turbo
= clamp_t(int, input
, 0, 1);
1195 mutex_unlock(&intel_pstate_limits_lock
);
1197 intel_pstate_update_policies();
1199 mutex_unlock(&intel_pstate_driver_lock
);
1204 static ssize_t
store_max_perf_pct(struct kobject
*a
, struct attribute
*b
,
1205 const char *buf
, size_t count
)
1210 ret
= sscanf(buf
, "%u", &input
);
1214 mutex_lock(&intel_pstate_driver_lock
);
1216 if (!driver_registered
) {
1217 mutex_unlock(&intel_pstate_driver_lock
);
1221 mutex_lock(&intel_pstate_limits_lock
);
1223 limits
->max_sysfs_pct
= clamp_t(int, input
, 0 , 100);
1224 limits
->max_perf_pct
= min(limits
->max_policy_pct
,
1225 limits
->max_sysfs_pct
);
1226 limits
->max_perf_pct
= max(limits
->min_policy_pct
,
1227 limits
->max_perf_pct
);
1228 limits
->max_perf_pct
= max(limits
->min_perf_pct
,
1229 limits
->max_perf_pct
);
1230 limits
->max_perf
= div_ext_fp(limits
->max_perf_pct
, 100);
1232 mutex_unlock(&intel_pstate_limits_lock
);
1234 intel_pstate_update_policies();
1236 mutex_unlock(&intel_pstate_driver_lock
);
1241 static ssize_t
store_min_perf_pct(struct kobject
*a
, struct attribute
*b
,
1242 const char *buf
, size_t count
)
1247 ret
= sscanf(buf
, "%u", &input
);
1251 mutex_lock(&intel_pstate_driver_lock
);
1253 if (!driver_registered
) {
1254 mutex_unlock(&intel_pstate_driver_lock
);
1258 mutex_lock(&intel_pstate_limits_lock
);
1260 limits
->min_sysfs_pct
= clamp_t(int, input
, 0 , 100);
1261 limits
->min_perf_pct
= max(limits
->min_policy_pct
,
1262 limits
->min_sysfs_pct
);
1263 limits
->min_perf_pct
= min(limits
->max_policy_pct
,
1264 limits
->min_perf_pct
);
1265 limits
->min_perf_pct
= min(limits
->max_perf_pct
,
1266 limits
->min_perf_pct
);
1267 limits
->min_perf
= div_ext_fp(limits
->min_perf_pct
, 100);
1269 mutex_unlock(&intel_pstate_limits_lock
);
1271 intel_pstate_update_policies();
1273 mutex_unlock(&intel_pstate_driver_lock
);
1278 show_one(max_perf_pct
, max_perf_pct
);
1279 show_one(min_perf_pct
, min_perf_pct
);
1281 define_one_global_rw(status
);
1282 define_one_global_rw(no_turbo
);
1283 define_one_global_rw(max_perf_pct
);
1284 define_one_global_rw(min_perf_pct
);
1285 define_one_global_ro(turbo_pct
);
1286 define_one_global_ro(num_pstates
);
1288 static struct attribute
*intel_pstate_attributes
[] = {
1296 static struct attribute_group intel_pstate_attr_group
= {
1297 .attrs
= intel_pstate_attributes
,
1300 static void __init
intel_pstate_sysfs_expose_params(void)
1302 struct kobject
*intel_pstate_kobject
;
1305 intel_pstate_kobject
= kobject_create_and_add("intel_pstate",
1306 &cpu_subsys
.dev_root
->kobj
);
1307 if (WARN_ON(!intel_pstate_kobject
))
1310 rc
= sysfs_create_group(intel_pstate_kobject
, &intel_pstate_attr_group
);
1315 * If per cpu limits are enforced there are no global limits, so
1316 * return without creating max/min_perf_pct attributes
1321 rc
= sysfs_create_file(intel_pstate_kobject
, &max_perf_pct
.attr
);
1324 rc
= sysfs_create_file(intel_pstate_kobject
, &min_perf_pct
.attr
);
1328 /************************** sysfs end ************************/
1330 static void intel_pstate_hwp_enable(struct cpudata
*cpudata
)
1332 /* First disable HWP notification interrupt as we don't process them */
1333 if (static_cpu_has(X86_FEATURE_HWP_NOTIFY
))
1334 wrmsrl_on_cpu(cpudata
->cpu
, MSR_HWP_INTERRUPT
, 0x00);
1336 wrmsrl_on_cpu(cpudata
->cpu
, MSR_PM_ENABLE
, 0x1);
1337 cpudata
->epp_policy
= 0;
1338 if (cpudata
->epp_default
== -EINVAL
)
1339 cpudata
->epp_default
= intel_pstate_get_epp(cpudata
, 0);
1342 #define MSR_IA32_POWER_CTL_BIT_EE 19
1344 /* Disable energy efficiency optimization */
1345 static void intel_pstate_disable_ee(int cpu
)
1350 ret
= rdmsrl_on_cpu(cpu
, MSR_IA32_POWER_CTL
, &power_ctl
);
1354 if (!(power_ctl
& BIT(MSR_IA32_POWER_CTL_BIT_EE
))) {
1355 pr_info("Disabling energy efficiency optimization\n");
1356 power_ctl
|= BIT(MSR_IA32_POWER_CTL_BIT_EE
);
1357 wrmsrl_on_cpu(cpu
, MSR_IA32_POWER_CTL
, power_ctl
);
1361 static int atom_get_min_pstate(void)
1365 rdmsrl(MSR_ATOM_CORE_RATIOS
, value
);
1366 return (value
>> 8) & 0x7F;
1369 static int atom_get_max_pstate(void)
1373 rdmsrl(MSR_ATOM_CORE_RATIOS
, value
);
1374 return (value
>> 16) & 0x7F;
1377 static int atom_get_turbo_pstate(void)
1381 rdmsrl(MSR_ATOM_CORE_TURBO_RATIOS
, value
);
1382 return value
& 0x7F;
1385 static u64
atom_get_val(struct cpudata
*cpudata
, int pstate
)
1391 val
= (u64
)pstate
<< 8;
1392 if (limits
->no_turbo
&& !limits
->turbo_disabled
)
1393 val
|= (u64
)1 << 32;
1395 vid_fp
= cpudata
->vid
.min
+ mul_fp(
1396 int_tofp(pstate
- cpudata
->pstate
.min_pstate
),
1397 cpudata
->vid
.ratio
);
1399 vid_fp
= clamp_t(int32_t, vid_fp
, cpudata
->vid
.min
, cpudata
->vid
.max
);
1400 vid
= ceiling_fp(vid_fp
);
1402 if (pstate
> cpudata
->pstate
.max_pstate
)
1403 vid
= cpudata
->vid
.turbo
;
1408 static int silvermont_get_scaling(void)
1412 /* Defined in Table 35-6 from SDM (Sept 2015) */
1413 static int silvermont_freq_table
[] = {
1414 83300, 100000, 133300, 116700, 80000};
1416 rdmsrl(MSR_FSB_FREQ
, value
);
1420 return silvermont_freq_table
[i
];
1423 static int airmont_get_scaling(void)
1427 /* Defined in Table 35-10 from SDM (Sept 2015) */
1428 static int airmont_freq_table
[] = {
1429 83300, 100000, 133300, 116700, 80000,
1430 93300, 90000, 88900, 87500};
1432 rdmsrl(MSR_FSB_FREQ
, value
);
1436 return airmont_freq_table
[i
];
1439 static void atom_get_vid(struct cpudata
*cpudata
)
1443 rdmsrl(MSR_ATOM_CORE_VIDS
, value
);
1444 cpudata
->vid
.min
= int_tofp((value
>> 8) & 0x7f);
1445 cpudata
->vid
.max
= int_tofp((value
>> 16) & 0x7f);
1446 cpudata
->vid
.ratio
= div_fp(
1447 cpudata
->vid
.max
- cpudata
->vid
.min
,
1448 int_tofp(cpudata
->pstate
.max_pstate
-
1449 cpudata
->pstate
.min_pstate
));
1451 rdmsrl(MSR_ATOM_CORE_TURBO_VIDS
, value
);
1452 cpudata
->vid
.turbo
= value
& 0x7f;
1455 static int core_get_min_pstate(void)
1459 rdmsrl(MSR_PLATFORM_INFO
, value
);
1460 return (value
>> 40) & 0xFF;
1463 static int core_get_max_pstate_physical(void)
1467 rdmsrl(MSR_PLATFORM_INFO
, value
);
1468 return (value
>> 8) & 0xFF;
1471 static int core_get_tdp_ratio(u64 plat_info
)
1473 /* Check how many TDP levels present */
1474 if (plat_info
& 0x600000000) {
1480 /* Get the TDP level (0, 1, 2) to get ratios */
1481 err
= rdmsrl_safe(MSR_CONFIG_TDP_CONTROL
, &tdp_ctrl
);
1485 /* TDP MSR are continuous starting at 0x648 */
1486 tdp_msr
= MSR_CONFIG_TDP_NOMINAL
+ (tdp_ctrl
& 0x03);
1487 err
= rdmsrl_safe(tdp_msr
, &tdp_ratio
);
1491 /* For level 1 and 2, bits[23:16] contain the ratio */
1492 if (tdp_ctrl
& 0x03)
1495 tdp_ratio
&= 0xff; /* ratios are only 8 bits long */
1496 pr_debug("tdp_ratio %x\n", (int)tdp_ratio
);
1498 return (int)tdp_ratio
;
1504 static int core_get_max_pstate(void)
1512 rdmsrl(MSR_PLATFORM_INFO
, plat_info
);
1513 max_pstate
= (plat_info
>> 8) & 0xFF;
1515 tdp_ratio
= core_get_tdp_ratio(plat_info
);
1520 /* Turbo activation ratio is not used on HWP platforms */
1524 err
= rdmsrl_safe(MSR_TURBO_ACTIVATION_RATIO
, &tar
);
1528 /* Do some sanity checking for safety */
1529 tar_levels
= tar
& 0xff;
1530 if (tdp_ratio
- 1 == tar_levels
) {
1531 max_pstate
= tar_levels
;
1532 pr_debug("max_pstate=TAC %x\n", max_pstate
);
1539 static int core_get_turbo_pstate(void)
1544 rdmsrl(MSR_TURBO_RATIO_LIMIT
, value
);
1545 nont
= core_get_max_pstate();
1546 ret
= (value
) & 255;
1552 static inline int core_get_scaling(void)
1557 static u64
core_get_val(struct cpudata
*cpudata
, int pstate
)
1561 val
= (u64
)pstate
<< 8;
1562 if (limits
->no_turbo
&& !limits
->turbo_disabled
)
1563 val
|= (u64
)1 << 32;
1568 static int knl_get_turbo_pstate(void)
1573 rdmsrl(MSR_TURBO_RATIO_LIMIT
, value
);
1574 nont
= core_get_max_pstate();
1575 ret
= (((value
) >> 8) & 0xFF);
1581 static struct cpu_defaults core_params
= {
1583 .sample_rate_ms
= 10,
1591 .get_max
= core_get_max_pstate
,
1592 .get_max_physical
= core_get_max_pstate_physical
,
1593 .get_min
= core_get_min_pstate
,
1594 .get_turbo
= core_get_turbo_pstate
,
1595 .get_scaling
= core_get_scaling
,
1596 .get_val
= core_get_val
,
1597 .get_target_pstate
= get_target_pstate_use_performance
,
1601 static const struct cpu_defaults silvermont_params
= {
1603 .sample_rate_ms
= 10,
1611 .get_max
= atom_get_max_pstate
,
1612 .get_max_physical
= atom_get_max_pstate
,
1613 .get_min
= atom_get_min_pstate
,
1614 .get_turbo
= atom_get_turbo_pstate
,
1615 .get_val
= atom_get_val
,
1616 .get_scaling
= silvermont_get_scaling
,
1617 .get_vid
= atom_get_vid
,
1618 .get_target_pstate
= get_target_pstate_use_cpu_load
,
1622 static const struct cpu_defaults airmont_params
= {
1624 .sample_rate_ms
= 10,
1632 .get_max
= atom_get_max_pstate
,
1633 .get_max_physical
= atom_get_max_pstate
,
1634 .get_min
= atom_get_min_pstate
,
1635 .get_turbo
= atom_get_turbo_pstate
,
1636 .get_val
= atom_get_val
,
1637 .get_scaling
= airmont_get_scaling
,
1638 .get_vid
= atom_get_vid
,
1639 .get_target_pstate
= get_target_pstate_use_cpu_load
,
1643 static const struct cpu_defaults knl_params
= {
1645 .sample_rate_ms
= 10,
1653 .get_max
= core_get_max_pstate
,
1654 .get_max_physical
= core_get_max_pstate_physical
,
1655 .get_min
= core_get_min_pstate
,
1656 .get_turbo
= knl_get_turbo_pstate
,
1657 .get_scaling
= core_get_scaling
,
1658 .get_val
= core_get_val
,
1659 .get_target_pstate
= get_target_pstate_use_performance
,
1663 static const struct cpu_defaults bxt_params
= {
1665 .sample_rate_ms
= 10,
1673 .get_max
= core_get_max_pstate
,
1674 .get_max_physical
= core_get_max_pstate_physical
,
1675 .get_min
= core_get_min_pstate
,
1676 .get_turbo
= core_get_turbo_pstate
,
1677 .get_scaling
= core_get_scaling
,
1678 .get_val
= core_get_val
,
1679 .get_target_pstate
= get_target_pstate_use_cpu_load
,
1683 static void intel_pstate_get_min_max(struct cpudata
*cpu
, int *min
, int *max
)
1685 int max_perf
= cpu
->pstate
.turbo_pstate
;
1688 struct perf_limits
*perf_limits
= limits
;
1690 if (limits
->no_turbo
|| limits
->turbo_disabled
)
1691 max_perf
= cpu
->pstate
.max_pstate
;
1694 perf_limits
= cpu
->perf_limits
;
1697 * performance can be limited by user through sysfs, by cpufreq
1698 * policy, or by cpu specific default values determined through
1701 max_perf_adj
= fp_ext_toint(max_perf
* perf_limits
->max_perf
);
1702 *max
= clamp_t(int, max_perf_adj
,
1703 cpu
->pstate
.min_pstate
, cpu
->pstate
.turbo_pstate
);
1705 min_perf
= fp_ext_toint(max_perf
* perf_limits
->min_perf
);
1706 *min
= clamp_t(int, min_perf
, cpu
->pstate
.min_pstate
, max_perf
);
1709 static void intel_pstate_set_pstate(struct cpudata
*cpu
, int pstate
)
1711 trace_cpu_frequency(pstate
* cpu
->pstate
.scaling
, cpu
->cpu
);
1712 cpu
->pstate
.current_pstate
= pstate
;
1714 * Generally, there is no guarantee that this code will always run on
1715 * the CPU being updated, so force the register update to run on the
1718 wrmsrl_on_cpu(cpu
->cpu
, MSR_IA32_PERF_CTL
,
1719 pstate_funcs
.get_val(cpu
, pstate
));
1722 static void intel_pstate_set_min_pstate(struct cpudata
*cpu
)
1724 intel_pstate_set_pstate(cpu
, cpu
->pstate
.min_pstate
);
1727 static void intel_pstate_max_within_limits(struct cpudata
*cpu
)
1729 int min_pstate
, max_pstate
;
1731 update_turbo_state();
1732 intel_pstate_get_min_max(cpu
, &min_pstate
, &max_pstate
);
1733 intel_pstate_set_pstate(cpu
, max_pstate
);
1736 static void intel_pstate_get_cpu_pstates(struct cpudata
*cpu
)
1738 cpu
->pstate
.min_pstate
= pstate_funcs
.get_min();
1739 cpu
->pstate
.max_pstate
= pstate_funcs
.get_max();
1740 cpu
->pstate
.max_pstate_physical
= pstate_funcs
.get_max_physical();
1741 cpu
->pstate
.turbo_pstate
= pstate_funcs
.get_turbo();
1742 cpu
->pstate
.scaling
= pstate_funcs
.get_scaling();
1743 cpu
->pstate
.max_freq
= cpu
->pstate
.max_pstate
* cpu
->pstate
.scaling
;
1744 cpu
->pstate
.turbo_freq
= cpu
->pstate
.turbo_pstate
* cpu
->pstate
.scaling
;
1746 if (pstate_funcs
.get_vid
)
1747 pstate_funcs
.get_vid(cpu
);
1749 intel_pstate_set_min_pstate(cpu
);
1752 static inline void intel_pstate_calc_avg_perf(struct cpudata
*cpu
)
1754 struct sample
*sample
= &cpu
->sample
;
1756 sample
->core_avg_perf
= div_ext_fp(sample
->aperf
, sample
->mperf
);
1759 static inline bool intel_pstate_sample(struct cpudata
*cpu
, u64 time
)
1762 unsigned long flags
;
1765 local_irq_save(flags
);
1766 rdmsrl(MSR_IA32_APERF
, aperf
);
1767 rdmsrl(MSR_IA32_MPERF
, mperf
);
1769 if (cpu
->prev_mperf
== mperf
|| cpu
->prev_tsc
== tsc
) {
1770 local_irq_restore(flags
);
1773 local_irq_restore(flags
);
1775 cpu
->last_sample_time
= cpu
->sample
.time
;
1776 cpu
->sample
.time
= time
;
1777 cpu
->sample
.aperf
= aperf
;
1778 cpu
->sample
.mperf
= mperf
;
1779 cpu
->sample
.tsc
= tsc
;
1780 cpu
->sample
.aperf
-= cpu
->prev_aperf
;
1781 cpu
->sample
.mperf
-= cpu
->prev_mperf
;
1782 cpu
->sample
.tsc
-= cpu
->prev_tsc
;
1784 cpu
->prev_aperf
= aperf
;
1785 cpu
->prev_mperf
= mperf
;
1786 cpu
->prev_tsc
= tsc
;
1788 * First time this function is invoked in a given cycle, all of the
1789 * previous sample data fields are equal to zero or stale and they must
1790 * be populated with meaningful numbers for things to work, so assume
1791 * that sample.time will always be reset before setting the utilization
1792 * update hook and make the caller skip the sample then.
1794 return !!cpu
->last_sample_time
;
1797 static inline int32_t get_avg_frequency(struct cpudata
*cpu
)
1799 return mul_ext_fp(cpu
->sample
.core_avg_perf
,
1800 cpu
->pstate
.max_pstate_physical
* cpu
->pstate
.scaling
);
1803 static inline int32_t get_avg_pstate(struct cpudata
*cpu
)
1805 return mul_ext_fp(cpu
->pstate
.max_pstate_physical
,
1806 cpu
->sample
.core_avg_perf
);
1809 static inline int32_t get_target_pstate_use_cpu_load(struct cpudata
*cpu
)
1811 struct sample
*sample
= &cpu
->sample
;
1812 int32_t busy_frac
, boost
;
1813 int target
, avg_pstate
;
1815 busy_frac
= div_fp(sample
->mperf
, sample
->tsc
);
1817 boost
= cpu
->iowait_boost
;
1818 cpu
->iowait_boost
>>= 1;
1820 if (busy_frac
< boost
)
1823 sample
->busy_scaled
= busy_frac
* 100;
1825 target
= limits
->no_turbo
|| limits
->turbo_disabled
?
1826 cpu
->pstate
.max_pstate
: cpu
->pstate
.turbo_pstate
;
1827 target
+= target
>> 2;
1828 target
= mul_fp(target
, busy_frac
);
1829 if (target
< cpu
->pstate
.min_pstate
)
1830 target
= cpu
->pstate
.min_pstate
;
1833 * If the average P-state during the previous cycle was higher than the
1834 * current target, add 50% of the difference to the target to reduce
1835 * possible performance oscillations and offset possible performance
1836 * loss related to moving the workload from one CPU to another within
1839 avg_pstate
= get_avg_pstate(cpu
);
1840 if (avg_pstate
> target
)
1841 target
+= (avg_pstate
- target
) >> 1;
1846 static inline int32_t get_target_pstate_use_performance(struct cpudata
*cpu
)
1848 int32_t perf_scaled
, max_pstate
, current_pstate
, sample_ratio
;
1852 * perf_scaled is the ratio of the average P-state during the last
1853 * sampling period to the P-state requested last time (in percent).
1855 * That measures the system's response to the previous P-state
1858 max_pstate
= cpu
->pstate
.max_pstate_physical
;
1859 current_pstate
= cpu
->pstate
.current_pstate
;
1860 perf_scaled
= mul_ext_fp(cpu
->sample
.core_avg_perf
,
1861 div_fp(100 * max_pstate
, current_pstate
));
1864 * Since our utilization update callback will not run unless we are
1865 * in C0, check if the actual elapsed time is significantly greater (3x)
1866 * than our sample interval. If it is, then we were idle for a long
1867 * enough period of time to adjust our performance metric.
1869 duration_ns
= cpu
->sample
.time
- cpu
->last_sample_time
;
1870 if ((s64
)duration_ns
> pid_params
.sample_rate_ns
* 3) {
1871 sample_ratio
= div_fp(pid_params
.sample_rate_ns
, duration_ns
);
1872 perf_scaled
= mul_fp(perf_scaled
, sample_ratio
);
1874 sample_ratio
= div_fp(100 * cpu
->sample
.mperf
, cpu
->sample
.tsc
);
1875 if (sample_ratio
< int_tofp(1))
1879 cpu
->sample
.busy_scaled
= perf_scaled
;
1880 return cpu
->pstate
.current_pstate
- pid_calc(&cpu
->pid
, perf_scaled
);
1883 static int intel_pstate_prepare_request(struct cpudata
*cpu
, int pstate
)
1885 int max_perf
, min_perf
;
1887 intel_pstate_get_min_max(cpu
, &min_perf
, &max_perf
);
1888 pstate
= clamp_t(int, pstate
, min_perf
, max_perf
);
1889 trace_cpu_frequency(pstate
* cpu
->pstate
.scaling
, cpu
->cpu
);
1893 static void intel_pstate_update_pstate(struct cpudata
*cpu
, int pstate
)
1895 pstate
= intel_pstate_prepare_request(cpu
, pstate
);
1896 if (pstate
== cpu
->pstate
.current_pstate
)
1899 cpu
->pstate
.current_pstate
= pstate
;
1900 wrmsrl(MSR_IA32_PERF_CTL
, pstate_funcs
.get_val(cpu
, pstate
));
1903 static inline void intel_pstate_adjust_busy_pstate(struct cpudata
*cpu
)
1905 int from
, target_pstate
;
1906 struct sample
*sample
;
1908 from
= cpu
->pstate
.current_pstate
;
1910 target_pstate
= cpu
->policy
== CPUFREQ_POLICY_PERFORMANCE
?
1911 cpu
->pstate
.turbo_pstate
: pstate_funcs
.get_target_pstate(cpu
);
1913 update_turbo_state();
1915 intel_pstate_update_pstate(cpu
, target_pstate
);
1917 sample
= &cpu
->sample
;
1918 trace_pstate_sample(mul_ext_fp(100, sample
->core_avg_perf
),
1919 fp_toint(sample
->busy_scaled
),
1921 cpu
->pstate
.current_pstate
,
1925 get_avg_frequency(cpu
),
1926 fp_toint(cpu
->iowait_boost
* 100));
1929 static void intel_pstate_update_util(struct update_util_data
*data
, u64 time
,
1932 struct cpudata
*cpu
= container_of(data
, struct cpudata
, update_util
);
1935 if (pstate_funcs
.get_target_pstate
== get_target_pstate_use_cpu_load
) {
1936 if (flags
& SCHED_CPUFREQ_IOWAIT
) {
1937 cpu
->iowait_boost
= int_tofp(1);
1938 } else if (cpu
->iowait_boost
) {
1939 /* Clear iowait_boost if the CPU may have been idle. */
1940 delta_ns
= time
- cpu
->last_update
;
1941 if (delta_ns
> TICK_NSEC
)
1942 cpu
->iowait_boost
= 0;
1944 cpu
->last_update
= time
;
1947 delta_ns
= time
- cpu
->sample
.time
;
1948 if ((s64
)delta_ns
>= pid_params
.sample_rate_ns
) {
1949 bool sample_taken
= intel_pstate_sample(cpu
, time
);
1952 intel_pstate_calc_avg_perf(cpu
);
1954 intel_pstate_adjust_busy_pstate(cpu
);
1959 #define ICPU(model, policy) \
1960 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
1961 (unsigned long)&policy }
1963 static const struct x86_cpu_id intel_pstate_cpu_ids
[] = {
1964 ICPU(INTEL_FAM6_SANDYBRIDGE
, core_params
),
1965 ICPU(INTEL_FAM6_SANDYBRIDGE_X
, core_params
),
1966 ICPU(INTEL_FAM6_ATOM_SILVERMONT1
, silvermont_params
),
1967 ICPU(INTEL_FAM6_IVYBRIDGE
, core_params
),
1968 ICPU(INTEL_FAM6_HASWELL_CORE
, core_params
),
1969 ICPU(INTEL_FAM6_BROADWELL_CORE
, core_params
),
1970 ICPU(INTEL_FAM6_IVYBRIDGE_X
, core_params
),
1971 ICPU(INTEL_FAM6_HASWELL_X
, core_params
),
1972 ICPU(INTEL_FAM6_HASWELL_ULT
, core_params
),
1973 ICPU(INTEL_FAM6_HASWELL_GT3E
, core_params
),
1974 ICPU(INTEL_FAM6_BROADWELL_GT3E
, core_params
),
1975 ICPU(INTEL_FAM6_ATOM_AIRMONT
, airmont_params
),
1976 ICPU(INTEL_FAM6_SKYLAKE_MOBILE
, core_params
),
1977 ICPU(INTEL_FAM6_BROADWELL_X
, core_params
),
1978 ICPU(INTEL_FAM6_SKYLAKE_DESKTOP
, core_params
),
1979 ICPU(INTEL_FAM6_BROADWELL_XEON_D
, core_params
),
1980 ICPU(INTEL_FAM6_XEON_PHI_KNL
, knl_params
),
1981 ICPU(INTEL_FAM6_XEON_PHI_KNM
, knl_params
),
1982 ICPU(INTEL_FAM6_ATOM_GOLDMONT
, bxt_params
),
1985 MODULE_DEVICE_TABLE(x86cpu
, intel_pstate_cpu_ids
);
1987 static const struct x86_cpu_id intel_pstate_cpu_oob_ids
[] __initconst
= {
1988 ICPU(INTEL_FAM6_BROADWELL_XEON_D
, core_params
),
1989 ICPU(INTEL_FAM6_BROADWELL_X
, core_params
),
1990 ICPU(INTEL_FAM6_SKYLAKE_X
, core_params
),
1994 static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids
[] = {
1995 ICPU(INTEL_FAM6_KABYLAKE_DESKTOP
, core_params
),
1999 static int intel_pstate_init_cpu(unsigned int cpunum
)
2001 struct cpudata
*cpu
;
2003 cpu
= all_cpu_data
[cpunum
];
2006 unsigned int size
= sizeof(struct cpudata
);
2009 size
+= sizeof(struct perf_limits
);
2011 cpu
= kzalloc(size
, GFP_KERNEL
);
2015 all_cpu_data
[cpunum
] = cpu
;
2017 cpu
->perf_limits
= (struct perf_limits
*)(cpu
+ 1);
2019 cpu
->epp_default
= -EINVAL
;
2020 cpu
->epp_powersave
= -EINVAL
;
2021 cpu
->epp_saved
= -EINVAL
;
2024 cpu
= all_cpu_data
[cpunum
];
2029 const struct x86_cpu_id
*id
;
2031 id
= x86_match_cpu(intel_pstate_cpu_ee_disable_ids
);
2033 intel_pstate_disable_ee(cpunum
);
2035 intel_pstate_hwp_enable(cpu
);
2036 pid_params
.sample_rate_ms
= 50;
2037 pid_params
.sample_rate_ns
= 50 * NSEC_PER_MSEC
;
2040 intel_pstate_get_cpu_pstates(cpu
);
2042 intel_pstate_busy_pid_reset(cpu
);
2044 pr_debug("controlling: cpu %d\n", cpunum
);
2049 static unsigned int intel_pstate_get(unsigned int cpu_num
)
2051 struct cpudata
*cpu
= all_cpu_data
[cpu_num
];
2053 return cpu
? get_avg_frequency(cpu
) : 0;
2056 static void intel_pstate_set_update_util_hook(unsigned int cpu_num
)
2058 struct cpudata
*cpu
= all_cpu_data
[cpu_num
];
2060 if (cpu
->update_util_set
)
2063 /* Prevent intel_pstate_update_util() from using stale data. */
2064 cpu
->sample
.time
= 0;
2065 cpufreq_add_update_util_hook(cpu_num
, &cpu
->update_util
,
2066 intel_pstate_update_util
);
2067 cpu
->update_util_set
= true;
2070 static void intel_pstate_clear_update_util_hook(unsigned int cpu
)
2072 struct cpudata
*cpu_data
= all_cpu_data
[cpu
];
2074 if (!cpu_data
->update_util_set
)
2077 cpufreq_remove_update_util_hook(cpu
);
2078 cpu_data
->update_util_set
= false;
2079 synchronize_sched();
2082 static void intel_pstate_set_performance_limits(struct perf_limits
*limits
)
2084 limits
->no_turbo
= 0;
2085 limits
->turbo_disabled
= 0;
2086 limits
->max_perf_pct
= 100;
2087 limits
->max_perf
= int_ext_tofp(1);
2088 limits
->min_perf_pct
= 100;
2089 limits
->min_perf
= int_ext_tofp(1);
2090 limits
->max_policy_pct
= 100;
2091 limits
->max_sysfs_pct
= 100;
2092 limits
->min_policy_pct
= 0;
2093 limits
->min_sysfs_pct
= 0;
2096 static void intel_pstate_update_perf_limits(struct cpufreq_policy
*policy
,
2097 struct perf_limits
*limits
)
2100 limits
->max_policy_pct
= DIV_ROUND_UP(policy
->max
* 100,
2101 policy
->cpuinfo
.max_freq
);
2102 limits
->max_policy_pct
= clamp_t(int, limits
->max_policy_pct
, 0, 100);
2103 if (policy
->max
== policy
->min
) {
2104 limits
->min_policy_pct
= limits
->max_policy_pct
;
2106 limits
->min_policy_pct
= DIV_ROUND_UP(policy
->min
* 100,
2107 policy
->cpuinfo
.max_freq
);
2108 limits
->min_policy_pct
= clamp_t(int, limits
->min_policy_pct
,
2112 /* Normalize user input to [min_policy_pct, max_policy_pct] */
2113 limits
->min_perf_pct
= max(limits
->min_policy_pct
,
2114 limits
->min_sysfs_pct
);
2115 limits
->min_perf_pct
= min(limits
->max_policy_pct
,
2116 limits
->min_perf_pct
);
2117 limits
->max_perf_pct
= min(limits
->max_policy_pct
,
2118 limits
->max_sysfs_pct
);
2119 limits
->max_perf_pct
= max(limits
->min_policy_pct
,
2120 limits
->max_perf_pct
);
2122 /* Make sure min_perf_pct <= max_perf_pct */
2123 limits
->min_perf_pct
= min(limits
->max_perf_pct
, limits
->min_perf_pct
);
2125 limits
->min_perf
= div_ext_fp(limits
->min_perf_pct
, 100);
2126 limits
->max_perf
= div_ext_fp(limits
->max_perf_pct
, 100);
2127 limits
->max_perf
= round_up(limits
->max_perf
, EXT_FRAC_BITS
);
2128 limits
->min_perf
= round_up(limits
->min_perf
, EXT_FRAC_BITS
);
2130 pr_debug("cpu:%d max_perf_pct:%d min_perf_pct:%d\n", policy
->cpu
,
2131 limits
->max_perf_pct
, limits
->min_perf_pct
);
2134 static int intel_pstate_set_policy(struct cpufreq_policy
*policy
)
2136 struct cpudata
*cpu
;
2137 struct perf_limits
*perf_limits
= NULL
;
2139 if (!policy
->cpuinfo
.max_freq
)
2142 pr_debug("set_policy cpuinfo.max %u policy->max %u\n",
2143 policy
->cpuinfo
.max_freq
, policy
->max
);
2145 cpu
= all_cpu_data
[policy
->cpu
];
2146 cpu
->policy
= policy
->policy
;
2148 if (cpu
->pstate
.max_pstate_physical
> cpu
->pstate
.max_pstate
&&
2149 policy
->max
< policy
->cpuinfo
.max_freq
&&
2150 policy
->max
> cpu
->pstate
.max_pstate
* cpu
->pstate
.scaling
) {
2151 pr_debug("policy->max > max non turbo frequency\n");
2152 policy
->max
= policy
->cpuinfo
.max_freq
;
2156 perf_limits
= cpu
->perf_limits
;
2158 mutex_lock(&intel_pstate_limits_lock
);
2160 if (policy
->policy
== CPUFREQ_POLICY_PERFORMANCE
) {
2162 limits
= &performance_limits
;
2163 perf_limits
= limits
;
2165 if (policy
->max
>= policy
->cpuinfo
.max_freq
&&
2166 !limits
->no_turbo
) {
2167 pr_debug("set performance\n");
2168 intel_pstate_set_performance_limits(perf_limits
);
2172 pr_debug("set powersave\n");
2174 limits
= &powersave_limits
;
2175 perf_limits
= limits
;
2180 intel_pstate_update_perf_limits(policy
, perf_limits
);
2182 if (cpu
->policy
== CPUFREQ_POLICY_PERFORMANCE
) {
2184 * NOHZ_FULL CPUs need this as the governor callback may not
2185 * be invoked on them.
2187 intel_pstate_clear_update_util_hook(policy
->cpu
);
2188 intel_pstate_max_within_limits(cpu
);
2191 intel_pstate_set_update_util_hook(policy
->cpu
);
2193 intel_pstate_hwp_set_policy(policy
);
2195 mutex_unlock(&intel_pstate_limits_lock
);
2200 static int intel_pstate_verify_policy(struct cpufreq_policy
*policy
)
2202 struct cpudata
*cpu
= all_cpu_data
[policy
->cpu
];
2203 struct perf_limits
*perf_limits
;
2205 if (policy
->policy
== CPUFREQ_POLICY_PERFORMANCE
)
2206 perf_limits
= &performance_limits
;
2208 perf_limits
= &powersave_limits
;
2210 update_turbo_state();
2211 policy
->cpuinfo
.max_freq
= perf_limits
->turbo_disabled
||
2212 perf_limits
->no_turbo
?
2213 cpu
->pstate
.max_freq
:
2214 cpu
->pstate
.turbo_freq
;
2216 cpufreq_verify_within_cpu_limits(policy
);
2218 if (policy
->policy
!= CPUFREQ_POLICY_POWERSAVE
&&
2219 policy
->policy
!= CPUFREQ_POLICY_PERFORMANCE
)
2222 /* When per-CPU limits are used, sysfs limits are not used */
2223 if (!per_cpu_limits
) {
2224 unsigned int max_freq
, min_freq
;
2226 max_freq
= policy
->cpuinfo
.max_freq
*
2227 limits
->max_sysfs_pct
/ 100;
2228 min_freq
= policy
->cpuinfo
.max_freq
*
2229 limits
->min_sysfs_pct
/ 100;
2230 cpufreq_verify_within_limits(policy
, min_freq
, max_freq
);
2236 static void intel_cpufreq_stop_cpu(struct cpufreq_policy
*policy
)
2238 intel_pstate_set_min_pstate(all_cpu_data
[policy
->cpu
]);
2241 static void intel_pstate_stop_cpu(struct cpufreq_policy
*policy
)
2243 pr_debug("CPU %d exiting\n", policy
->cpu
);
2245 intel_pstate_clear_update_util_hook(policy
->cpu
);
2247 intel_pstate_hwp_save_state(policy
);
2249 intel_cpufreq_stop_cpu(policy
);
2252 static int intel_pstate_cpu_exit(struct cpufreq_policy
*policy
)
2254 intel_pstate_exit_perf_limits(policy
);
2256 policy
->fast_switch_possible
= false;
2261 static int __intel_pstate_cpu_init(struct cpufreq_policy
*policy
)
2263 struct cpudata
*cpu
;
2266 rc
= intel_pstate_init_cpu(policy
->cpu
);
2270 cpu
= all_cpu_data
[policy
->cpu
];
2273 * We need sane value in the cpu->perf_limits, so inherit from global
2274 * perf_limits limits, which are seeded with values based on the
2275 * CONFIG_CPU_FREQ_DEFAULT_GOV_*, during boot up.
2278 memcpy(cpu
->perf_limits
, limits
, sizeof(struct perf_limits
));
2280 policy
->min
= cpu
->pstate
.min_pstate
* cpu
->pstate
.scaling
;
2281 policy
->max
= cpu
->pstate
.turbo_pstate
* cpu
->pstate
.scaling
;
2283 /* cpuinfo and default policy values */
2284 policy
->cpuinfo
.min_freq
= cpu
->pstate
.min_pstate
* cpu
->pstate
.scaling
;
2285 update_turbo_state();
2286 policy
->cpuinfo
.max_freq
= limits
->turbo_disabled
?
2287 cpu
->pstate
.max_pstate
: cpu
->pstate
.turbo_pstate
;
2288 policy
->cpuinfo
.max_freq
*= cpu
->pstate
.scaling
;
2290 intel_pstate_init_acpi_perf_limits(policy
);
2291 cpumask_set_cpu(policy
->cpu
, policy
->cpus
);
2293 policy
->fast_switch_possible
= true;
2298 static int intel_pstate_cpu_init(struct cpufreq_policy
*policy
)
2300 int ret
= __intel_pstate_cpu_init(policy
);
2305 policy
->cpuinfo
.transition_latency
= CPUFREQ_ETERNAL
;
2306 if (limits
->min_perf_pct
== 100 && limits
->max_perf_pct
== 100)
2307 policy
->policy
= CPUFREQ_POLICY_PERFORMANCE
;
2309 policy
->policy
= CPUFREQ_POLICY_POWERSAVE
;
2314 static struct cpufreq_driver intel_pstate
= {
2315 .flags
= CPUFREQ_CONST_LOOPS
,
2316 .verify
= intel_pstate_verify_policy
,
2317 .setpolicy
= intel_pstate_set_policy
,
2318 .suspend
= intel_pstate_hwp_save_state
,
2319 .resume
= intel_pstate_resume
,
2320 .get
= intel_pstate_get
,
2321 .init
= intel_pstate_cpu_init
,
2322 .exit
= intel_pstate_cpu_exit
,
2323 .stop_cpu
= intel_pstate_stop_cpu
,
2324 .name
= "intel_pstate",
2327 static int intel_cpufreq_verify_policy(struct cpufreq_policy
*policy
)
2329 struct cpudata
*cpu
= all_cpu_data
[policy
->cpu
];
2330 struct perf_limits
*perf_limits
= limits
;
2332 update_turbo_state();
2333 policy
->cpuinfo
.max_freq
= limits
->turbo_disabled
?
2334 cpu
->pstate
.max_freq
: cpu
->pstate
.turbo_freq
;
2336 cpufreq_verify_within_cpu_limits(policy
);
2339 perf_limits
= cpu
->perf_limits
;
2341 mutex_lock(&intel_pstate_limits_lock
);
2343 intel_pstate_update_perf_limits(policy
, perf_limits
);
2345 mutex_unlock(&intel_pstate_limits_lock
);
2350 static unsigned int intel_cpufreq_turbo_update(struct cpudata
*cpu
,
2351 struct cpufreq_policy
*policy
,
2352 unsigned int target_freq
)
2354 unsigned int max_freq
;
2356 update_turbo_state();
2358 max_freq
= limits
->no_turbo
|| limits
->turbo_disabled
?
2359 cpu
->pstate
.max_freq
: cpu
->pstate
.turbo_freq
;
2360 policy
->cpuinfo
.max_freq
= max_freq
;
2361 if (policy
->max
> max_freq
)
2362 policy
->max
= max_freq
;
2364 if (target_freq
> max_freq
)
2365 target_freq
= max_freq
;
2370 static int intel_cpufreq_target(struct cpufreq_policy
*policy
,
2371 unsigned int target_freq
,
2372 unsigned int relation
)
2374 struct cpudata
*cpu
= all_cpu_data
[policy
->cpu
];
2375 struct cpufreq_freqs freqs
;
2378 freqs
.old
= policy
->cur
;
2379 freqs
.new = intel_cpufreq_turbo_update(cpu
, policy
, target_freq
);
2381 cpufreq_freq_transition_begin(policy
, &freqs
);
2383 case CPUFREQ_RELATION_L
:
2384 target_pstate
= DIV_ROUND_UP(freqs
.new, cpu
->pstate
.scaling
);
2386 case CPUFREQ_RELATION_H
:
2387 target_pstate
= freqs
.new / cpu
->pstate
.scaling
;
2390 target_pstate
= DIV_ROUND_CLOSEST(freqs
.new, cpu
->pstate
.scaling
);
2393 target_pstate
= intel_pstate_prepare_request(cpu
, target_pstate
);
2394 if (target_pstate
!= cpu
->pstate
.current_pstate
) {
2395 cpu
->pstate
.current_pstate
= target_pstate
;
2396 wrmsrl_on_cpu(policy
->cpu
, MSR_IA32_PERF_CTL
,
2397 pstate_funcs
.get_val(cpu
, target_pstate
));
2399 cpufreq_freq_transition_end(policy
, &freqs
, false);
2404 static unsigned int intel_cpufreq_fast_switch(struct cpufreq_policy
*policy
,
2405 unsigned int target_freq
)
2407 struct cpudata
*cpu
= all_cpu_data
[policy
->cpu
];
2410 target_freq
= intel_cpufreq_turbo_update(cpu
, policy
, target_freq
);
2411 target_pstate
= DIV_ROUND_UP(target_freq
, cpu
->pstate
.scaling
);
2412 intel_pstate_update_pstate(cpu
, target_pstate
);
2416 static int intel_cpufreq_cpu_init(struct cpufreq_policy
*policy
)
2418 int ret
= __intel_pstate_cpu_init(policy
);
2423 policy
->cpuinfo
.transition_latency
= INTEL_CPUFREQ_TRANSITION_LATENCY
;
2424 /* This reflects the intel_pstate_get_cpu_pstates() setting. */
2425 policy
->cur
= policy
->cpuinfo
.min_freq
;
2430 static struct cpufreq_driver intel_cpufreq
= {
2431 .flags
= CPUFREQ_CONST_LOOPS
,
2432 .verify
= intel_cpufreq_verify_policy
,
2433 .target
= intel_cpufreq_target
,
2434 .fast_switch
= intel_cpufreq_fast_switch
,
2435 .init
= intel_cpufreq_cpu_init
,
2436 .exit
= intel_pstate_cpu_exit
,
2437 .stop_cpu
= intel_cpufreq_stop_cpu
,
2438 .name
= "intel_cpufreq",
2441 static struct cpufreq_driver
*intel_pstate_driver
= &intel_pstate
;
2443 static void intel_pstate_driver_cleanup(void)
2448 for_each_online_cpu(cpu
) {
2449 if (all_cpu_data
[cpu
]) {
2450 if (intel_pstate_driver
== &intel_pstate
)
2451 intel_pstate_clear_update_util_hook(cpu
);
2453 kfree(all_cpu_data
[cpu
]);
2454 all_cpu_data
[cpu
] = NULL
;
2460 static int intel_pstate_register_driver(void)
2464 ret
= cpufreq_register_driver(intel_pstate_driver
);
2466 intel_pstate_driver_cleanup();
2470 mutex_lock(&intel_pstate_limits_lock
);
2471 driver_registered
= true;
2472 mutex_unlock(&intel_pstate_limits_lock
);
2474 if (intel_pstate_driver
== &intel_pstate
&& !hwp_active
&&
2475 pstate_funcs
.get_target_pstate
!= get_target_pstate_use_cpu_load
)
2476 intel_pstate_debug_expose_params();
2481 static int intel_pstate_unregister_driver(void)
2486 if (intel_pstate_driver
== &intel_pstate
&& !hwp_active
&&
2487 pstate_funcs
.get_target_pstate
!= get_target_pstate_use_cpu_load
)
2488 intel_pstate_debug_hide_params();
2490 mutex_lock(&intel_pstate_limits_lock
);
2491 driver_registered
= false;
2492 mutex_unlock(&intel_pstate_limits_lock
);
2494 cpufreq_unregister_driver(intel_pstate_driver
);
2495 intel_pstate_driver_cleanup();
2500 static ssize_t
intel_pstate_show_status(char *buf
)
2502 if (!driver_registered
)
2503 return sprintf(buf
, "off\n");
2505 return sprintf(buf
, "%s\n", intel_pstate_driver
== &intel_pstate
?
2506 "active" : "passive");
2509 static int intel_pstate_update_status(const char *buf
, size_t size
)
2513 if (size
== 3 && !strncmp(buf
, "off", size
))
2514 return driver_registered
?
2515 intel_pstate_unregister_driver() : -EINVAL
;
2517 if (size
== 6 && !strncmp(buf
, "active", size
)) {
2518 if (driver_registered
) {
2519 if (intel_pstate_driver
== &intel_pstate
)
2522 ret
= intel_pstate_unregister_driver();
2527 intel_pstate_driver
= &intel_pstate
;
2528 return intel_pstate_register_driver();
2531 if (size
== 7 && !strncmp(buf
, "passive", size
)) {
2532 if (driver_registered
) {
2533 if (intel_pstate_driver
!= &intel_pstate
)
2536 ret
= intel_pstate_unregister_driver();
2541 intel_pstate_driver
= &intel_cpufreq
;
2542 return intel_pstate_register_driver();
2548 static int no_load __initdata
;
2549 static int no_hwp __initdata
;
2550 static int hwp_only __initdata
;
2551 static unsigned int force_load __initdata
;
2553 static int __init
intel_pstate_msrs_not_valid(void)
2555 if (!pstate_funcs
.get_max() ||
2556 !pstate_funcs
.get_min() ||
2557 !pstate_funcs
.get_turbo())
2563 static void __init
copy_pid_params(struct pstate_adjust_policy
*policy
)
2565 pid_params
.sample_rate_ms
= policy
->sample_rate_ms
;
2566 pid_params
.sample_rate_ns
= pid_params
.sample_rate_ms
* NSEC_PER_MSEC
;
2567 pid_params
.p_gain_pct
= policy
->p_gain_pct
;
2568 pid_params
.i_gain_pct
= policy
->i_gain_pct
;
2569 pid_params
.d_gain_pct
= policy
->d_gain_pct
;
2570 pid_params
.deadband
= policy
->deadband
;
2571 pid_params
.setpoint
= policy
->setpoint
;
2575 static void intel_pstate_use_acpi_profile(void)
2577 if (acpi_gbl_FADT
.preferred_profile
== PM_MOBILE
)
2578 pstate_funcs
.get_target_pstate
=
2579 get_target_pstate_use_cpu_load
;
2582 static void intel_pstate_use_acpi_profile(void)
2587 static void __init
copy_cpu_funcs(struct pstate_funcs
*funcs
)
2589 pstate_funcs
.get_max
= funcs
->get_max
;
2590 pstate_funcs
.get_max_physical
= funcs
->get_max_physical
;
2591 pstate_funcs
.get_min
= funcs
->get_min
;
2592 pstate_funcs
.get_turbo
= funcs
->get_turbo
;
2593 pstate_funcs
.get_scaling
= funcs
->get_scaling
;
2594 pstate_funcs
.get_val
= funcs
->get_val
;
2595 pstate_funcs
.get_vid
= funcs
->get_vid
;
2596 pstate_funcs
.get_target_pstate
= funcs
->get_target_pstate
;
2598 intel_pstate_use_acpi_profile();
2603 static bool __init
intel_pstate_no_acpi_pss(void)
2607 for_each_possible_cpu(i
) {
2609 union acpi_object
*pss
;
2610 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
2611 struct acpi_processor
*pr
= per_cpu(processors
, i
);
2616 status
= acpi_evaluate_object(pr
->handle
, "_PSS", NULL
, &buffer
);
2617 if (ACPI_FAILURE(status
))
2620 pss
= buffer
.pointer
;
2621 if (pss
&& pss
->type
== ACPI_TYPE_PACKAGE
) {
2632 static bool __init
intel_pstate_has_acpi_ppc(void)
2636 for_each_possible_cpu(i
) {
2637 struct acpi_processor
*pr
= per_cpu(processors
, i
);
2641 if (acpi_has_method(pr
->handle
, "_PPC"))
2652 struct hw_vendor_info
{
2654 char oem_id
[ACPI_OEM_ID_SIZE
];
2655 char oem_table_id
[ACPI_OEM_TABLE_ID_SIZE
];
2659 /* Hardware vendor-specific info that has its own power management modes */
2660 static struct hw_vendor_info vendor_info
[] __initdata
= {
2661 {1, "HP ", "ProLiant", PSS
},
2662 {1, "ORACLE", "X4-2 ", PPC
},
2663 {1, "ORACLE", "X4-2L ", PPC
},
2664 {1, "ORACLE", "X4-2B ", PPC
},
2665 {1, "ORACLE", "X3-2 ", PPC
},
2666 {1, "ORACLE", "X3-2L ", PPC
},
2667 {1, "ORACLE", "X3-2B ", PPC
},
2668 {1, "ORACLE", "X4470M2 ", PPC
},
2669 {1, "ORACLE", "X4270M3 ", PPC
},
2670 {1, "ORACLE", "X4270M2 ", PPC
},
2671 {1, "ORACLE", "X4170M2 ", PPC
},
2672 {1, "ORACLE", "X4170 M3", PPC
},
2673 {1, "ORACLE", "X4275 M3", PPC
},
2674 {1, "ORACLE", "X6-2 ", PPC
},
2675 {1, "ORACLE", "Sudbury ", PPC
},
2679 static bool __init
intel_pstate_platform_pwr_mgmt_exists(void)
2681 struct acpi_table_header hdr
;
2682 struct hw_vendor_info
*v_info
;
2683 const struct x86_cpu_id
*id
;
2686 id
= x86_match_cpu(intel_pstate_cpu_oob_ids
);
2688 rdmsrl(MSR_MISC_PWR_MGMT
, misc_pwr
);
2689 if ( misc_pwr
& (1 << 8))
2693 if (acpi_disabled
||
2694 ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT
, 0, &hdr
)))
2697 for (v_info
= vendor_info
; v_info
->valid
; v_info
++) {
2698 if (!strncmp(hdr
.oem_id
, v_info
->oem_id
, ACPI_OEM_ID_SIZE
) &&
2699 !strncmp(hdr
.oem_table_id
, v_info
->oem_table_id
,
2700 ACPI_OEM_TABLE_ID_SIZE
))
2701 switch (v_info
->oem_pwr_table
) {
2703 return intel_pstate_no_acpi_pss();
2705 return intel_pstate_has_acpi_ppc() &&
2713 static void intel_pstate_request_control_from_smm(void)
2716 * It may be unsafe to request P-states control from SMM if _PPC support
2717 * has not been enabled.
2720 acpi_processor_pstate_control();
2722 #else /* CONFIG_ACPI not enabled */
2723 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
2724 static inline bool intel_pstate_has_acpi_ppc(void) { return false; }
2725 static inline void intel_pstate_request_control_from_smm(void) {}
2726 #endif /* CONFIG_ACPI */
2728 static const struct x86_cpu_id hwp_support_ids
[] __initconst
= {
2729 { X86_VENDOR_INTEL
, 6, X86_MODEL_ANY
, X86_FEATURE_HWP
},
2733 static int __init
intel_pstate_init(void)
2735 const struct x86_cpu_id
*id
;
2736 struct cpu_defaults
*cpu_def
;
2742 if (x86_match_cpu(hwp_support_ids
) && !no_hwp
) {
2743 copy_cpu_funcs(&core_params
.funcs
);
2745 intel_pstate
.attr
= hwp_cpufreq_attrs
;
2746 goto hwp_cpu_matched
;
2749 id
= x86_match_cpu(intel_pstate_cpu_ids
);
2753 cpu_def
= (struct cpu_defaults
*)id
->driver_data
;
2755 copy_pid_params(&cpu_def
->pid_policy
);
2756 copy_cpu_funcs(&cpu_def
->funcs
);
2758 if (intel_pstate_msrs_not_valid())
2763 * The Intel pstate driver will be ignored if the platform
2764 * firmware has its own power management modes.
2766 if (intel_pstate_platform_pwr_mgmt_exists())
2769 if (!hwp_active
&& hwp_only
)
2772 pr_info("Intel P-state driver initializing\n");
2774 all_cpu_data
= vzalloc(sizeof(void *) * num_possible_cpus());
2778 intel_pstate_request_control_from_smm();
2780 intel_pstate_sysfs_expose_params();
2782 mutex_lock(&intel_pstate_driver_lock
);
2783 rc
= intel_pstate_register_driver();
2784 mutex_unlock(&intel_pstate_driver_lock
);
2789 pr_info("HWP enabled\n");
2793 device_initcall(intel_pstate_init
);
2795 static int __init
intel_pstate_setup(char *str
)
2800 if (!strcmp(str
, "disable")) {
2802 } else if (!strcmp(str
, "passive")) {
2803 pr_info("Passive mode enabled\n");
2804 intel_pstate_driver
= &intel_cpufreq
;
2807 if (!strcmp(str
, "no_hwp")) {
2808 pr_info("HWP disabled\n");
2811 if (!strcmp(str
, "force"))
2813 if (!strcmp(str
, "hwp_only"))
2815 if (!strcmp(str
, "per_cpu_perf_limits"))
2816 per_cpu_limits
= true;
2819 if (!strcmp(str
, "support_acpi_ppc"))
2825 early_param("intel_pstate", intel_pstate_setup
);
2827 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
2828 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
2829 MODULE_LICENSE("GPL");