2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/kernel.h>
16 #include <linux/kernel_stat.h>
17 #include <linux/module.h>
18 #include <linux/ktime.h>
19 #include <linux/hrtimer.h>
20 #include <linux/tick.h>
21 #include <linux/slab.h>
22 #include <linux/sched.h>
23 #include <linux/list.h>
24 #include <linux/cpu.h>
25 #include <linux/cpufreq.h>
26 #include <linux/sysfs.h>
27 #include <linux/types.h>
29 #include <linux/debugfs.h>
30 #include <linux/acpi.h>
31 #include <linux/vmalloc.h>
32 #include <trace/events/power.h>
34 #include <asm/div64.h>
36 #include <asm/cpu_device_id.h>
37 #include <asm/cpufeature.h>
38 #include <asm/intel-family.h>
40 #define ATOM_RATIOS 0x66a
41 #define ATOM_VIDS 0x66b
42 #define ATOM_TURBO_RATIOS 0x66c
43 #define ATOM_TURBO_VIDS 0x66d
46 #include <acpi/processor.h>
50 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
51 #define fp_toint(X) ((X) >> FRAC_BITS)
54 #define EXT_FRAC_BITS (EXT_BITS + FRAC_BITS)
56 static inline int32_t mul_fp(int32_t x
, int32_t y
)
58 return ((int64_t)x
* (int64_t)y
) >> FRAC_BITS
;
61 static inline int32_t div_fp(s64 x
, s64 y
)
63 return div64_s64((int64_t)x
<< FRAC_BITS
, y
);
66 static inline int ceiling_fp(int32_t x
)
71 mask
= (1 << FRAC_BITS
) - 1;
77 static inline u64
mul_ext_fp(u64 x
, u64 y
)
79 return (x
* y
) >> EXT_FRAC_BITS
;
82 static inline u64
div_ext_fp(u64 x
, u64 y
)
84 return div64_u64(x
<< EXT_FRAC_BITS
, y
);
88 * struct sample - Store performance sample
89 * @core_avg_perf: Ratio of APERF/MPERF which is the actual average
90 * performance during last sample period
91 * @busy_scaled: Scaled busy value which is used to calculate next
92 * P state. This can be different than core_avg_perf
93 * to account for cpu idle period
94 * @aperf: Difference of actual performance frequency clock count
95 * read from APERF MSR between last and current sample
96 * @mperf: Difference of maximum performance frequency clock count
97 * read from MPERF MSR between last and current sample
98 * @tsc: Difference of time stamp counter between last and
100 * @time: Current time from scheduler
102 * This structure is used in the cpudata structure to store performance sample
103 * data for choosing next P State.
106 int32_t core_avg_perf
;
115 * struct pstate_data - Store P state data
116 * @current_pstate: Current requested P state
117 * @min_pstate: Min P state possible for this platform
118 * @max_pstate: Max P state possible for this platform
119 * @max_pstate_physical:This is physical Max P state for a processor
120 * This can be higher than the max_pstate which can
121 * be limited by platform thermal design power limits
122 * @scaling: Scaling factor to convert frequency to cpufreq
124 * @turbo_pstate: Max Turbo P state possible for this platform
126 * Stores the per cpu model P state limits and current P state.
132 int max_pstate_physical
;
138 * struct vid_data - Stores voltage information data
139 * @min: VID data for this platform corresponding to
141 * @max: VID data corresponding to the highest P State.
142 * @turbo: VID data for turbo P state
143 * @ratio: Ratio of (vid max - vid min) /
144 * (max P state - Min P State)
146 * Stores the voltage data for DVFS (Dynamic Voltage and Frequency Scaling)
147 * This data is used in Atom platforms, where in addition to target P state,
148 * the voltage data needs to be specified to select next P State.
158 * struct _pid - Stores PID data
159 * @setpoint: Target set point for busyness or performance
160 * @integral: Storage for accumulated error values
161 * @p_gain: PID proportional gain
162 * @i_gain: PID integral gain
163 * @d_gain: PID derivative gain
164 * @deadband: PID deadband
165 * @last_err: Last error storage for integral part of PID calculation
167 * Stores PID coefficients and last error for PID controller.
180 * struct perf_limits - Store user and policy limits
181 * @no_turbo: User requested turbo state from intel_pstate sysfs
182 * @turbo_disabled: Platform turbo status either from msr
183 * MSR_IA32_MISC_ENABLE or when maximum available pstate
184 * matches the maximum turbo pstate
185 * @max_perf_pct: Effective maximum performance limit in percentage, this
186 * is minimum of either limits enforced by cpufreq policy
187 * or limits from user set limits via intel_pstate sysfs
188 * @min_perf_pct: Effective minimum performance limit in percentage, this
189 * is maximum of either limits enforced by cpufreq policy
190 * or limits from user set limits via intel_pstate sysfs
191 * @max_perf: This is a scaled value between 0 to 255 for max_perf_pct
192 * This value is used to limit max pstate
193 * @min_perf: This is a scaled value between 0 to 255 for min_perf_pct
194 * This value is used to limit min pstate
195 * @max_policy_pct: The maximum performance in percentage enforced by
196 * cpufreq setpolicy interface
197 * @max_sysfs_pct: The maximum performance in percentage enforced by
198 * intel pstate sysfs interface, unused when per cpu
199 * controls are enforced
200 * @min_policy_pct: The minimum performance in percentage enforced by
201 * cpufreq setpolicy interface
202 * @min_sysfs_pct: The minimum performance in percentage enforced by
203 * intel pstate sysfs interface, unused when per cpu
204 * controls are enforced
206 * Storage for user and policy defined limits.
222 * struct cpudata - Per CPU instance data storage
223 * @cpu: CPU number for this instance data
224 * @policy: CPUFreq policy value
225 * @update_util: CPUFreq utility callback information
226 * @update_util_set: CPUFreq utility callback is set
227 * @iowait_boost: iowait-related boost fraction
228 * @last_update: Time of the last update.
229 * @pstate: Stores P state limits for this CPU
230 * @vid: Stores VID limits for this CPU
231 * @pid: Stores PID parameters for this CPU
232 * @last_sample_time: Last Sample time
233 * @prev_aperf: Last APERF value read from APERF MSR
234 * @prev_mperf: Last MPERF value read from MPERF MSR
235 * @prev_tsc: Last timestamp counter (TSC) value
236 * @prev_cummulative_iowait: IO Wait time difference from last and
238 * @sample: Storage for storing last Sample data
239 * @perf_limits: Pointer to perf_limit unique to this CPU
240 * Not all field in the structure are applicable
241 * when per cpu controls are enforced
242 * @acpi_perf_data: Stores ACPI perf information read from _PSS
243 * @valid_pss_table: Set to true for valid ACPI _PSS entries found
245 * This structure stores per CPU instance data for all CPUs.
251 struct update_util_data update_util
;
252 bool update_util_set
;
254 struct pstate_data pstate
;
259 u64 last_sample_time
;
263 u64 prev_cummulative_iowait
;
264 struct sample sample
;
265 struct perf_limits
*perf_limits
;
267 struct acpi_processor_performance acpi_perf_data
;
268 bool valid_pss_table
;
270 unsigned int iowait_boost
;
273 static struct cpudata
**all_cpu_data
;
276 * struct pstate_adjust_policy - Stores static PID configuration data
277 * @sample_rate_ms: PID calculation sample rate in ms
278 * @sample_rate_ns: Sample rate calculation in ns
279 * @deadband: PID deadband
280 * @setpoint: PID Setpoint
281 * @p_gain_pct: PID proportional gain
282 * @i_gain_pct: PID integral gain
283 * @d_gain_pct: PID derivative gain
285 * Stores per CPU model static PID configuration data.
287 struct pstate_adjust_policy
{
298 * struct pstate_funcs - Per CPU model specific callbacks
299 * @get_max: Callback to get maximum non turbo effective P state
300 * @get_max_physical: Callback to get maximum non turbo physical P state
301 * @get_min: Callback to get minimum P state
302 * @get_turbo: Callback to get turbo P state
303 * @get_scaling: Callback to get frequency scaling factor
304 * @get_val: Callback to convert P state to actual MSR write value
305 * @get_vid: Callback to get VID data for Atom platforms
306 * @get_target_pstate: Callback to a function to calculate next P state to use
308 * Core and Atom CPU models have different way to get P State limits. This
309 * structure is used to store those callbacks.
311 struct pstate_funcs
{
312 int (*get_max
)(void);
313 int (*get_max_physical
)(void);
314 int (*get_min
)(void);
315 int (*get_turbo
)(void);
316 int (*get_scaling
)(void);
317 u64 (*get_val
)(struct cpudata
*, int pstate
);
318 void (*get_vid
)(struct cpudata
*);
319 int32_t (*get_target_pstate
)(struct cpudata
*);
323 * struct cpu_defaults- Per CPU model default config data
324 * @pid_policy: PID config data
325 * @funcs: Callback function data
327 struct cpu_defaults
{
328 struct pstate_adjust_policy pid_policy
;
329 struct pstate_funcs funcs
;
332 static inline int32_t get_target_pstate_use_performance(struct cpudata
*cpu
);
333 static inline int32_t get_target_pstate_use_cpu_load(struct cpudata
*cpu
);
335 static struct pstate_adjust_policy pid_params __read_mostly
;
336 static struct pstate_funcs pstate_funcs __read_mostly
;
337 static int hwp_active __read_mostly
;
338 static bool per_cpu_limits __read_mostly
;
341 static bool acpi_ppc
;
344 static struct perf_limits performance_limits
= {
348 .max_perf
= int_tofp(1),
350 .min_perf
= int_tofp(1),
351 .max_policy_pct
= 100,
352 .max_sysfs_pct
= 100,
357 static struct perf_limits powersave_limits
= {
361 .max_perf
= int_tofp(1),
364 .max_policy_pct
= 100,
365 .max_sysfs_pct
= 100,
370 #ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
371 static struct perf_limits
*limits
= &performance_limits
;
373 static struct perf_limits
*limits
= &powersave_limits
;
376 static DEFINE_MUTEX(intel_pstate_limits_lock
);
380 static bool intel_pstate_get_ppc_enable_status(void)
382 if (acpi_gbl_FADT
.preferred_profile
== PM_ENTERPRISE_SERVER
||
383 acpi_gbl_FADT
.preferred_profile
== PM_PERFORMANCE_SERVER
)
389 static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy
*policy
)
398 if (!intel_pstate_get_ppc_enable_status())
401 cpu
= all_cpu_data
[policy
->cpu
];
403 ret
= acpi_processor_register_performance(&cpu
->acpi_perf_data
,
409 * Check if the control value in _PSS is for PERF_CTL MSR, which should
410 * guarantee that the states returned by it map to the states in our
413 if (cpu
->acpi_perf_data
.control_register
.space_id
!=
414 ACPI_ADR_SPACE_FIXED_HARDWARE
)
418 * If there is only one entry _PSS, simply ignore _PSS and continue as
419 * usual without taking _PSS into account
421 if (cpu
->acpi_perf_data
.state_count
< 2)
424 pr_debug("CPU%u - ACPI _PSS perf data\n", policy
->cpu
);
425 for (i
= 0; i
< cpu
->acpi_perf_data
.state_count
; i
++) {
426 pr_debug(" %cP%d: %u MHz, %u mW, 0x%x\n",
427 (i
== cpu
->acpi_perf_data
.state
? '*' : ' '), i
,
428 (u32
) cpu
->acpi_perf_data
.states
[i
].core_frequency
,
429 (u32
) cpu
->acpi_perf_data
.states
[i
].power
,
430 (u32
) cpu
->acpi_perf_data
.states
[i
].control
);
434 * The _PSS table doesn't contain whole turbo frequency range.
435 * This just contains +1 MHZ above the max non turbo frequency,
436 * with control value corresponding to max turbo ratio. But
437 * when cpufreq set policy is called, it will call with this
438 * max frequency, which will cause a reduced performance as
439 * this driver uses real max turbo frequency as the max
440 * frequency. So correct this frequency in _PSS table to
441 * correct max turbo frequency based on the turbo state.
442 * Also need to convert to MHz as _PSS freq is in MHz.
444 if (!limits
->turbo_disabled
)
445 cpu
->acpi_perf_data
.states
[0].core_frequency
=
446 policy
->cpuinfo
.max_freq
/ 1000;
447 cpu
->valid_pss_table
= true;
448 pr_debug("_PPC limits will be enforced\n");
453 cpu
->valid_pss_table
= false;
454 acpi_processor_unregister_performance(policy
->cpu
);
457 static void intel_pstate_exit_perf_limits(struct cpufreq_policy
*policy
)
461 cpu
= all_cpu_data
[policy
->cpu
];
462 if (!cpu
->valid_pss_table
)
465 acpi_processor_unregister_performance(policy
->cpu
);
469 static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy
*policy
)
473 static void intel_pstate_exit_perf_limits(struct cpufreq_policy
*policy
)
478 static inline void pid_reset(struct _pid
*pid
, int setpoint
, int busy
,
479 int deadband
, int integral
) {
480 pid
->setpoint
= int_tofp(setpoint
);
481 pid
->deadband
= int_tofp(deadband
);
482 pid
->integral
= int_tofp(integral
);
483 pid
->last_err
= int_tofp(setpoint
) - int_tofp(busy
);
486 static inline void pid_p_gain_set(struct _pid
*pid
, int percent
)
488 pid
->p_gain
= div_fp(percent
, 100);
491 static inline void pid_i_gain_set(struct _pid
*pid
, int percent
)
493 pid
->i_gain
= div_fp(percent
, 100);
496 static inline void pid_d_gain_set(struct _pid
*pid
, int percent
)
498 pid
->d_gain
= div_fp(percent
, 100);
501 static signed int pid_calc(struct _pid
*pid
, int32_t busy
)
504 int32_t pterm
, dterm
, fp_error
;
505 int32_t integral_limit
;
507 fp_error
= pid
->setpoint
- busy
;
509 if (abs(fp_error
) <= pid
->deadband
)
512 pterm
= mul_fp(pid
->p_gain
, fp_error
);
514 pid
->integral
+= fp_error
;
517 * We limit the integral here so that it will never
518 * get higher than 30. This prevents it from becoming
519 * too large an input over long periods of time and allows
520 * it to get factored out sooner.
522 * The value of 30 was chosen through experimentation.
524 integral_limit
= int_tofp(30);
525 if (pid
->integral
> integral_limit
)
526 pid
->integral
= integral_limit
;
527 if (pid
->integral
< -integral_limit
)
528 pid
->integral
= -integral_limit
;
530 dterm
= mul_fp(pid
->d_gain
, fp_error
- pid
->last_err
);
531 pid
->last_err
= fp_error
;
533 result
= pterm
+ mul_fp(pid
->integral
, pid
->i_gain
) + dterm
;
534 result
= result
+ (1 << (FRAC_BITS
-1));
535 return (signed int)fp_toint(result
);
538 static inline void intel_pstate_busy_pid_reset(struct cpudata
*cpu
)
540 pid_p_gain_set(&cpu
->pid
, pid_params
.p_gain_pct
);
541 pid_d_gain_set(&cpu
->pid
, pid_params
.d_gain_pct
);
542 pid_i_gain_set(&cpu
->pid
, pid_params
.i_gain_pct
);
544 pid_reset(&cpu
->pid
, pid_params
.setpoint
, 100, pid_params
.deadband
, 0);
547 static inline void intel_pstate_reset_all_pid(void)
551 for_each_online_cpu(cpu
) {
552 if (all_cpu_data
[cpu
])
553 intel_pstate_busy_pid_reset(all_cpu_data
[cpu
]);
557 static inline void update_turbo_state(void)
562 cpu
= all_cpu_data
[0];
563 rdmsrl(MSR_IA32_MISC_ENABLE
, misc_en
);
564 limits
->turbo_disabled
=
565 (misc_en
& MSR_IA32_MISC_ENABLE_TURBO_DISABLE
||
566 cpu
->pstate
.max_pstate
== cpu
->pstate
.turbo_pstate
);
569 static void intel_pstate_hwp_set(const struct cpumask
*cpumask
)
571 int min
, hw_min
, max
, hw_max
, cpu
, range
, adj_range
;
572 struct perf_limits
*perf_limits
= limits
;
575 for_each_cpu(cpu
, cpumask
) {
576 int max_perf_pct
, min_perf_pct
;
579 perf_limits
= all_cpu_data
[cpu
]->perf_limits
;
581 rdmsrl_on_cpu(cpu
, MSR_HWP_CAPABILITIES
, &cap
);
582 hw_min
= HWP_LOWEST_PERF(cap
);
583 hw_max
= HWP_HIGHEST_PERF(cap
);
584 range
= hw_max
- hw_min
;
586 max_perf_pct
= perf_limits
->max_perf_pct
;
587 min_perf_pct
= perf_limits
->min_perf_pct
;
589 rdmsrl_on_cpu(cpu
, MSR_HWP_REQUEST
, &value
);
590 adj_range
= min_perf_pct
* range
/ 100;
591 min
= hw_min
+ adj_range
;
592 value
&= ~HWP_MIN_PERF(~0L);
593 value
|= HWP_MIN_PERF(min
);
595 adj_range
= max_perf_pct
* range
/ 100;
596 max
= hw_min
+ adj_range
;
597 if (limits
->no_turbo
) {
598 hw_max
= HWP_GUARANTEED_PERF(cap
);
603 value
&= ~HWP_MAX_PERF(~0L);
604 value
|= HWP_MAX_PERF(max
);
605 wrmsrl_on_cpu(cpu
, MSR_HWP_REQUEST
, value
);
609 static int intel_pstate_hwp_set_policy(struct cpufreq_policy
*policy
)
612 intel_pstate_hwp_set(policy
->cpus
);
617 static void intel_pstate_hwp_set_online_cpus(void)
620 intel_pstate_hwp_set(cpu_online_mask
);
624 /************************** debugfs begin ************************/
625 static int pid_param_set(void *data
, u64 val
)
628 intel_pstate_reset_all_pid();
632 static int pid_param_get(void *data
, u64
*val
)
637 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param
, pid_param_get
, pid_param_set
, "%llu\n");
644 static struct pid_param pid_files
[] = {
645 {"sample_rate_ms", &pid_params
.sample_rate_ms
},
646 {"d_gain_pct", &pid_params
.d_gain_pct
},
647 {"i_gain_pct", &pid_params
.i_gain_pct
},
648 {"deadband", &pid_params
.deadband
},
649 {"setpoint", &pid_params
.setpoint
},
650 {"p_gain_pct", &pid_params
.p_gain_pct
},
654 static void __init
intel_pstate_debug_expose_params(void)
656 struct dentry
*debugfs_parent
;
660 pstate_funcs
.get_target_pstate
== get_target_pstate_use_cpu_load
)
663 debugfs_parent
= debugfs_create_dir("pstate_snb", NULL
);
664 if (IS_ERR_OR_NULL(debugfs_parent
))
666 while (pid_files
[i
].name
) {
667 debugfs_create_file(pid_files
[i
].name
, 0660,
668 debugfs_parent
, pid_files
[i
].value
,
674 /************************** debugfs end ************************/
676 /************************** sysfs begin ************************/
677 #define show_one(file_name, object) \
678 static ssize_t show_##file_name \
679 (struct kobject *kobj, struct attribute *attr, char *buf) \
681 return sprintf(buf, "%u\n", limits->object); \
684 static ssize_t
show_turbo_pct(struct kobject
*kobj
,
685 struct attribute
*attr
, char *buf
)
688 int total
, no_turbo
, turbo_pct
;
691 cpu
= all_cpu_data
[0];
693 total
= cpu
->pstate
.turbo_pstate
- cpu
->pstate
.min_pstate
+ 1;
694 no_turbo
= cpu
->pstate
.max_pstate
- cpu
->pstate
.min_pstate
+ 1;
695 turbo_fp
= div_fp(no_turbo
, total
);
696 turbo_pct
= 100 - fp_toint(mul_fp(turbo_fp
, int_tofp(100)));
697 return sprintf(buf
, "%u\n", turbo_pct
);
700 static ssize_t
show_num_pstates(struct kobject
*kobj
,
701 struct attribute
*attr
, char *buf
)
706 cpu
= all_cpu_data
[0];
707 total
= cpu
->pstate
.turbo_pstate
- cpu
->pstate
.min_pstate
+ 1;
708 return sprintf(buf
, "%u\n", total
);
711 static ssize_t
show_no_turbo(struct kobject
*kobj
,
712 struct attribute
*attr
, char *buf
)
716 update_turbo_state();
717 if (limits
->turbo_disabled
)
718 ret
= sprintf(buf
, "%u\n", limits
->turbo_disabled
);
720 ret
= sprintf(buf
, "%u\n", limits
->no_turbo
);
725 static ssize_t
store_no_turbo(struct kobject
*a
, struct attribute
*b
,
726 const char *buf
, size_t count
)
731 ret
= sscanf(buf
, "%u", &input
);
735 mutex_lock(&intel_pstate_limits_lock
);
737 update_turbo_state();
738 if (limits
->turbo_disabled
) {
739 pr_warn("Turbo disabled by BIOS or unavailable on processor\n");
740 mutex_unlock(&intel_pstate_limits_lock
);
744 limits
->no_turbo
= clamp_t(int, input
, 0, 1);
746 mutex_unlock(&intel_pstate_limits_lock
);
749 intel_pstate_hwp_set_online_cpus();
754 static ssize_t
store_max_perf_pct(struct kobject
*a
, struct attribute
*b
,
755 const char *buf
, size_t count
)
760 ret
= sscanf(buf
, "%u", &input
);
764 mutex_lock(&intel_pstate_limits_lock
);
766 limits
->max_sysfs_pct
= clamp_t(int, input
, 0 , 100);
767 limits
->max_perf_pct
= min(limits
->max_policy_pct
,
768 limits
->max_sysfs_pct
);
769 limits
->max_perf_pct
= max(limits
->min_policy_pct
,
770 limits
->max_perf_pct
);
771 limits
->max_perf_pct
= max(limits
->min_perf_pct
,
772 limits
->max_perf_pct
);
773 limits
->max_perf
= div_fp(limits
->max_perf_pct
, 100);
775 mutex_unlock(&intel_pstate_limits_lock
);
778 intel_pstate_hwp_set_online_cpus();
782 static ssize_t
store_min_perf_pct(struct kobject
*a
, struct attribute
*b
,
783 const char *buf
, size_t count
)
788 ret
= sscanf(buf
, "%u", &input
);
792 mutex_lock(&intel_pstate_limits_lock
);
794 limits
->min_sysfs_pct
= clamp_t(int, input
, 0 , 100);
795 limits
->min_perf_pct
= max(limits
->min_policy_pct
,
796 limits
->min_sysfs_pct
);
797 limits
->min_perf_pct
= min(limits
->max_policy_pct
,
798 limits
->min_perf_pct
);
799 limits
->min_perf_pct
= min(limits
->max_perf_pct
,
800 limits
->min_perf_pct
);
801 limits
->min_perf
= div_fp(limits
->min_perf_pct
, 100);
803 mutex_unlock(&intel_pstate_limits_lock
);
806 intel_pstate_hwp_set_online_cpus();
810 show_one(max_perf_pct
, max_perf_pct
);
811 show_one(min_perf_pct
, min_perf_pct
);
813 define_one_global_rw(no_turbo
);
814 define_one_global_rw(max_perf_pct
);
815 define_one_global_rw(min_perf_pct
);
816 define_one_global_ro(turbo_pct
);
817 define_one_global_ro(num_pstates
);
819 static struct attribute
*intel_pstate_attributes
[] = {
826 static struct attribute_group intel_pstate_attr_group
= {
827 .attrs
= intel_pstate_attributes
,
830 static void __init
intel_pstate_sysfs_expose_params(void)
832 struct kobject
*intel_pstate_kobject
;
835 intel_pstate_kobject
= kobject_create_and_add("intel_pstate",
836 &cpu_subsys
.dev_root
->kobj
);
837 if (WARN_ON(!intel_pstate_kobject
))
840 rc
= sysfs_create_group(intel_pstate_kobject
, &intel_pstate_attr_group
);
845 * If per cpu limits are enforced there are no global limits, so
846 * return without creating max/min_perf_pct attributes
851 rc
= sysfs_create_file(intel_pstate_kobject
, &max_perf_pct
.attr
);
854 rc
= sysfs_create_file(intel_pstate_kobject
, &min_perf_pct
.attr
);
858 /************************** sysfs end ************************/
860 static void intel_pstate_hwp_enable(struct cpudata
*cpudata
)
862 /* First disable HWP notification interrupt as we don't process them */
863 if (static_cpu_has(X86_FEATURE_HWP_NOTIFY
))
864 wrmsrl_on_cpu(cpudata
->cpu
, MSR_HWP_INTERRUPT
, 0x00);
866 wrmsrl_on_cpu(cpudata
->cpu
, MSR_PM_ENABLE
, 0x1);
869 static int atom_get_min_pstate(void)
873 rdmsrl(ATOM_RATIOS
, value
);
874 return (value
>> 8) & 0x7F;
877 static int atom_get_max_pstate(void)
881 rdmsrl(ATOM_RATIOS
, value
);
882 return (value
>> 16) & 0x7F;
885 static int atom_get_turbo_pstate(void)
889 rdmsrl(ATOM_TURBO_RATIOS
, value
);
893 static u64
atom_get_val(struct cpudata
*cpudata
, int pstate
)
899 val
= (u64
)pstate
<< 8;
900 if (limits
->no_turbo
&& !limits
->turbo_disabled
)
903 vid_fp
= cpudata
->vid
.min
+ mul_fp(
904 int_tofp(pstate
- cpudata
->pstate
.min_pstate
),
907 vid_fp
= clamp_t(int32_t, vid_fp
, cpudata
->vid
.min
, cpudata
->vid
.max
);
908 vid
= ceiling_fp(vid_fp
);
910 if (pstate
> cpudata
->pstate
.max_pstate
)
911 vid
= cpudata
->vid
.turbo
;
916 static int silvermont_get_scaling(void)
920 /* Defined in Table 35-6 from SDM (Sept 2015) */
921 static int silvermont_freq_table
[] = {
922 83300, 100000, 133300, 116700, 80000};
924 rdmsrl(MSR_FSB_FREQ
, value
);
928 return silvermont_freq_table
[i
];
931 static int airmont_get_scaling(void)
935 /* Defined in Table 35-10 from SDM (Sept 2015) */
936 static int airmont_freq_table
[] = {
937 83300, 100000, 133300, 116700, 80000,
938 93300, 90000, 88900, 87500};
940 rdmsrl(MSR_FSB_FREQ
, value
);
944 return airmont_freq_table
[i
];
947 static void atom_get_vid(struct cpudata
*cpudata
)
951 rdmsrl(ATOM_VIDS
, value
);
952 cpudata
->vid
.min
= int_tofp((value
>> 8) & 0x7f);
953 cpudata
->vid
.max
= int_tofp((value
>> 16) & 0x7f);
954 cpudata
->vid
.ratio
= div_fp(
955 cpudata
->vid
.max
- cpudata
->vid
.min
,
956 int_tofp(cpudata
->pstate
.max_pstate
-
957 cpudata
->pstate
.min_pstate
));
959 rdmsrl(ATOM_TURBO_VIDS
, value
);
960 cpudata
->vid
.turbo
= value
& 0x7f;
963 static int core_get_min_pstate(void)
967 rdmsrl(MSR_PLATFORM_INFO
, value
);
968 return (value
>> 40) & 0xFF;
971 static int core_get_max_pstate_physical(void)
975 rdmsrl(MSR_PLATFORM_INFO
, value
);
976 return (value
>> 8) & 0xFF;
979 static int core_get_max_pstate(void)
986 rdmsrl(MSR_PLATFORM_INFO
, plat_info
);
987 max_pstate
= (plat_info
>> 8) & 0xFF;
989 err
= rdmsrl_safe(MSR_TURBO_ACTIVATION_RATIO
, &tar
);
991 /* Do some sanity checking for safety */
992 if (plat_info
& 0x600000000) {
997 err
= rdmsrl_safe(MSR_CONFIG_TDP_CONTROL
, &tdp_ctrl
);
1001 tdp_msr
= MSR_CONFIG_TDP_NOMINAL
+ (tdp_ctrl
& 0x3);
1002 err
= rdmsrl_safe(tdp_msr
, &tdp_ratio
);
1006 /* For level 1 and 2, bits[23:16] contain the ratio */
1010 tdp_ratio
&= 0xff; /* ratios are only 8 bits long */
1011 if (tdp_ratio
- 1 == tar
) {
1013 pr_debug("max_pstate=TAC %x\n", max_pstate
);
1024 static int core_get_turbo_pstate(void)
1029 rdmsrl(MSR_TURBO_RATIO_LIMIT
, value
);
1030 nont
= core_get_max_pstate();
1031 ret
= (value
) & 255;
1037 static inline int core_get_scaling(void)
1042 static u64
core_get_val(struct cpudata
*cpudata
, int pstate
)
1046 val
= (u64
)pstate
<< 8;
1047 if (limits
->no_turbo
&& !limits
->turbo_disabled
)
1048 val
|= (u64
)1 << 32;
1053 static int knl_get_turbo_pstate(void)
1058 rdmsrl(MSR_TURBO_RATIO_LIMIT
, value
);
1059 nont
= core_get_max_pstate();
1060 ret
= (((value
) >> 8) & 0xFF);
1066 static struct cpu_defaults core_params
= {
1068 .sample_rate_ms
= 10,
1076 .get_max
= core_get_max_pstate
,
1077 .get_max_physical
= core_get_max_pstate_physical
,
1078 .get_min
= core_get_min_pstate
,
1079 .get_turbo
= core_get_turbo_pstate
,
1080 .get_scaling
= core_get_scaling
,
1081 .get_val
= core_get_val
,
1082 .get_target_pstate
= get_target_pstate_use_performance
,
1086 static const struct cpu_defaults silvermont_params
= {
1088 .sample_rate_ms
= 10,
1096 .get_max
= atom_get_max_pstate
,
1097 .get_max_physical
= atom_get_max_pstate
,
1098 .get_min
= atom_get_min_pstate
,
1099 .get_turbo
= atom_get_turbo_pstate
,
1100 .get_val
= atom_get_val
,
1101 .get_scaling
= silvermont_get_scaling
,
1102 .get_vid
= atom_get_vid
,
1103 .get_target_pstate
= get_target_pstate_use_cpu_load
,
1107 static const struct cpu_defaults airmont_params
= {
1109 .sample_rate_ms
= 10,
1117 .get_max
= atom_get_max_pstate
,
1118 .get_max_physical
= atom_get_max_pstate
,
1119 .get_min
= atom_get_min_pstate
,
1120 .get_turbo
= atom_get_turbo_pstate
,
1121 .get_val
= atom_get_val
,
1122 .get_scaling
= airmont_get_scaling
,
1123 .get_vid
= atom_get_vid
,
1124 .get_target_pstate
= get_target_pstate_use_cpu_load
,
1128 static const struct cpu_defaults knl_params
= {
1130 .sample_rate_ms
= 10,
1138 .get_max
= core_get_max_pstate
,
1139 .get_max_physical
= core_get_max_pstate_physical
,
1140 .get_min
= core_get_min_pstate
,
1141 .get_turbo
= knl_get_turbo_pstate
,
1142 .get_scaling
= core_get_scaling
,
1143 .get_val
= core_get_val
,
1144 .get_target_pstate
= get_target_pstate_use_performance
,
1148 static const struct cpu_defaults bxt_params
= {
1150 .sample_rate_ms
= 10,
1158 .get_max
= core_get_max_pstate
,
1159 .get_max_physical
= core_get_max_pstate_physical
,
1160 .get_min
= core_get_min_pstate
,
1161 .get_turbo
= core_get_turbo_pstate
,
1162 .get_scaling
= core_get_scaling
,
1163 .get_val
= core_get_val
,
1164 .get_target_pstate
= get_target_pstate_use_cpu_load
,
1168 static void intel_pstate_get_min_max(struct cpudata
*cpu
, int *min
, int *max
)
1170 int max_perf
= cpu
->pstate
.turbo_pstate
;
1173 struct perf_limits
*perf_limits
= limits
;
1175 if (limits
->no_turbo
|| limits
->turbo_disabled
)
1176 max_perf
= cpu
->pstate
.max_pstate
;
1179 perf_limits
= cpu
->perf_limits
;
1182 * performance can be limited by user through sysfs, by cpufreq
1183 * policy, or by cpu specific default values determined through
1186 max_perf_adj
= fp_toint(max_perf
* perf_limits
->max_perf
);
1187 *max
= clamp_t(int, max_perf_adj
,
1188 cpu
->pstate
.min_pstate
, cpu
->pstate
.turbo_pstate
);
1190 min_perf
= fp_toint(max_perf
* perf_limits
->min_perf
);
1191 *min
= clamp_t(int, min_perf
, cpu
->pstate
.min_pstate
, max_perf
);
1194 static void intel_pstate_set_pstate(struct cpudata
*cpu
, int pstate
)
1196 trace_cpu_frequency(pstate
* cpu
->pstate
.scaling
, cpu
->cpu
);
1197 cpu
->pstate
.current_pstate
= pstate
;
1199 * Generally, there is no guarantee that this code will always run on
1200 * the CPU being updated, so force the register update to run on the
1203 wrmsrl_on_cpu(cpu
->cpu
, MSR_IA32_PERF_CTL
,
1204 pstate_funcs
.get_val(cpu
, pstate
));
1207 static void intel_pstate_set_min_pstate(struct cpudata
*cpu
)
1209 intel_pstate_set_pstate(cpu
, cpu
->pstate
.min_pstate
);
1212 static void intel_pstate_max_within_limits(struct cpudata
*cpu
)
1214 int min_pstate
, max_pstate
;
1216 update_turbo_state();
1217 intel_pstate_get_min_max(cpu
, &min_pstate
, &max_pstate
);
1218 intel_pstate_set_pstate(cpu
, max_pstate
);
1221 static void intel_pstate_get_cpu_pstates(struct cpudata
*cpu
)
1223 cpu
->pstate
.min_pstate
= pstate_funcs
.get_min();
1224 cpu
->pstate
.max_pstate
= pstate_funcs
.get_max();
1225 cpu
->pstate
.max_pstate_physical
= pstate_funcs
.get_max_physical();
1226 cpu
->pstate
.turbo_pstate
= pstate_funcs
.get_turbo();
1227 cpu
->pstate
.scaling
= pstate_funcs
.get_scaling();
1229 if (pstate_funcs
.get_vid
)
1230 pstate_funcs
.get_vid(cpu
);
1232 intel_pstate_set_min_pstate(cpu
);
1235 static inline void intel_pstate_calc_avg_perf(struct cpudata
*cpu
)
1237 struct sample
*sample
= &cpu
->sample
;
1239 sample
->core_avg_perf
= div_ext_fp(sample
->aperf
, sample
->mperf
);
1242 static inline bool intel_pstate_sample(struct cpudata
*cpu
, u64 time
)
1245 unsigned long flags
;
1248 local_irq_save(flags
);
1249 rdmsrl(MSR_IA32_APERF
, aperf
);
1250 rdmsrl(MSR_IA32_MPERF
, mperf
);
1252 if (cpu
->prev_mperf
== mperf
|| cpu
->prev_tsc
== tsc
) {
1253 local_irq_restore(flags
);
1256 local_irq_restore(flags
);
1258 cpu
->last_sample_time
= cpu
->sample
.time
;
1259 cpu
->sample
.time
= time
;
1260 cpu
->sample
.aperf
= aperf
;
1261 cpu
->sample
.mperf
= mperf
;
1262 cpu
->sample
.tsc
= tsc
;
1263 cpu
->sample
.aperf
-= cpu
->prev_aperf
;
1264 cpu
->sample
.mperf
-= cpu
->prev_mperf
;
1265 cpu
->sample
.tsc
-= cpu
->prev_tsc
;
1267 cpu
->prev_aperf
= aperf
;
1268 cpu
->prev_mperf
= mperf
;
1269 cpu
->prev_tsc
= tsc
;
1271 * First time this function is invoked in a given cycle, all of the
1272 * previous sample data fields are equal to zero or stale and they must
1273 * be populated with meaningful numbers for things to work, so assume
1274 * that sample.time will always be reset before setting the utilization
1275 * update hook and make the caller skip the sample then.
1277 return !!cpu
->last_sample_time
;
1280 static inline int32_t get_avg_frequency(struct cpudata
*cpu
)
1282 return mul_ext_fp(cpu
->sample
.core_avg_perf
,
1283 cpu
->pstate
.max_pstate_physical
* cpu
->pstate
.scaling
);
1286 static inline int32_t get_avg_pstate(struct cpudata
*cpu
)
1288 return mul_ext_fp(cpu
->pstate
.max_pstate_physical
,
1289 cpu
->sample
.core_avg_perf
);
1292 static inline int32_t get_target_pstate_use_cpu_load(struct cpudata
*cpu
)
1294 struct sample
*sample
= &cpu
->sample
;
1295 int32_t busy_frac
, boost
;
1296 int target
, avg_pstate
;
1298 busy_frac
= div_fp(sample
->mperf
, sample
->tsc
);
1300 boost
= cpu
->iowait_boost
;
1301 cpu
->iowait_boost
>>= 1;
1303 if (busy_frac
< boost
)
1306 sample
->busy_scaled
= busy_frac
* 100;
1308 target
= limits
->no_turbo
|| limits
->turbo_disabled
?
1309 cpu
->pstate
.max_pstate
: cpu
->pstate
.turbo_pstate
;
1310 target
+= target
>> 2;
1311 target
= mul_fp(target
, busy_frac
);
1312 if (target
< cpu
->pstate
.min_pstate
)
1313 target
= cpu
->pstate
.min_pstate
;
1316 * If the average P-state during the previous cycle was higher than the
1317 * current target, add 50% of the difference to the target to reduce
1318 * possible performance oscillations and offset possible performance
1319 * loss related to moving the workload from one CPU to another within
1322 avg_pstate
= get_avg_pstate(cpu
);
1323 if (avg_pstate
> target
)
1324 target
+= (avg_pstate
- target
) >> 1;
1329 static inline int32_t get_target_pstate_use_performance(struct cpudata
*cpu
)
1331 int32_t perf_scaled
, max_pstate
, current_pstate
, sample_ratio
;
1335 * perf_scaled is the ratio of the average P-state during the last
1336 * sampling period to the P-state requested last time (in percent).
1338 * That measures the system's response to the previous P-state
1341 max_pstate
= cpu
->pstate
.max_pstate_physical
;
1342 current_pstate
= cpu
->pstate
.current_pstate
;
1343 perf_scaled
= mul_ext_fp(cpu
->sample
.core_avg_perf
,
1344 div_fp(100 * max_pstate
, current_pstate
));
1347 * Since our utilization update callback will not run unless we are
1348 * in C0, check if the actual elapsed time is significantly greater (3x)
1349 * than our sample interval. If it is, then we were idle for a long
1350 * enough period of time to adjust our performance metric.
1352 duration_ns
= cpu
->sample
.time
- cpu
->last_sample_time
;
1353 if ((s64
)duration_ns
> pid_params
.sample_rate_ns
* 3) {
1354 sample_ratio
= div_fp(pid_params
.sample_rate_ns
, duration_ns
);
1355 perf_scaled
= mul_fp(perf_scaled
, sample_ratio
);
1357 sample_ratio
= div_fp(100 * cpu
->sample
.mperf
, cpu
->sample
.tsc
);
1358 if (sample_ratio
< int_tofp(1))
1362 cpu
->sample
.busy_scaled
= perf_scaled
;
1363 return cpu
->pstate
.current_pstate
- pid_calc(&cpu
->pid
, perf_scaled
);
1366 static inline void intel_pstate_update_pstate(struct cpudata
*cpu
, int pstate
)
1368 int max_perf
, min_perf
;
1370 update_turbo_state();
1372 intel_pstate_get_min_max(cpu
, &min_perf
, &max_perf
);
1373 pstate
= clamp_t(int, pstate
, min_perf
, max_perf
);
1374 trace_cpu_frequency(pstate
* cpu
->pstate
.scaling
, cpu
->cpu
);
1375 if (pstate
== cpu
->pstate
.current_pstate
)
1378 cpu
->pstate
.current_pstate
= pstate
;
1379 wrmsrl(MSR_IA32_PERF_CTL
, pstate_funcs
.get_val(cpu
, pstate
));
1382 static inline void intel_pstate_adjust_busy_pstate(struct cpudata
*cpu
)
1384 int from
, target_pstate
;
1385 struct sample
*sample
;
1387 from
= cpu
->pstate
.current_pstate
;
1389 target_pstate
= cpu
->policy
== CPUFREQ_POLICY_PERFORMANCE
?
1390 cpu
->pstate
.turbo_pstate
: pstate_funcs
.get_target_pstate(cpu
);
1392 intel_pstate_update_pstate(cpu
, target_pstate
);
1394 sample
= &cpu
->sample
;
1395 trace_pstate_sample(mul_ext_fp(100, sample
->core_avg_perf
),
1396 fp_toint(sample
->busy_scaled
),
1398 cpu
->pstate
.current_pstate
,
1402 get_avg_frequency(cpu
),
1403 fp_toint(cpu
->iowait_boost
* 100));
1406 static void intel_pstate_update_util(struct update_util_data
*data
, u64 time
,
1409 struct cpudata
*cpu
= container_of(data
, struct cpudata
, update_util
);
1412 if (pstate_funcs
.get_target_pstate
== get_target_pstate_use_cpu_load
) {
1413 if (flags
& SCHED_CPUFREQ_IOWAIT
) {
1414 cpu
->iowait_boost
= int_tofp(1);
1415 } else if (cpu
->iowait_boost
) {
1416 /* Clear iowait_boost if the CPU may have been idle. */
1417 delta_ns
= time
- cpu
->last_update
;
1418 if (delta_ns
> TICK_NSEC
)
1419 cpu
->iowait_boost
= 0;
1421 cpu
->last_update
= time
;
1424 delta_ns
= time
- cpu
->sample
.time
;
1425 if ((s64
)delta_ns
>= pid_params
.sample_rate_ns
) {
1426 bool sample_taken
= intel_pstate_sample(cpu
, time
);
1429 intel_pstate_calc_avg_perf(cpu
);
1431 intel_pstate_adjust_busy_pstate(cpu
);
1436 #define ICPU(model, policy) \
1437 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
1438 (unsigned long)&policy }
1440 static const struct x86_cpu_id intel_pstate_cpu_ids
[] = {
1441 ICPU(INTEL_FAM6_SANDYBRIDGE
, core_params
),
1442 ICPU(INTEL_FAM6_SANDYBRIDGE_X
, core_params
),
1443 ICPU(INTEL_FAM6_ATOM_SILVERMONT1
, silvermont_params
),
1444 ICPU(INTEL_FAM6_IVYBRIDGE
, core_params
),
1445 ICPU(INTEL_FAM6_HASWELL_CORE
, core_params
),
1446 ICPU(INTEL_FAM6_BROADWELL_CORE
, core_params
),
1447 ICPU(INTEL_FAM6_IVYBRIDGE_X
, core_params
),
1448 ICPU(INTEL_FAM6_HASWELL_X
, core_params
),
1449 ICPU(INTEL_FAM6_HASWELL_ULT
, core_params
),
1450 ICPU(INTEL_FAM6_HASWELL_GT3E
, core_params
),
1451 ICPU(INTEL_FAM6_BROADWELL_GT3E
, core_params
),
1452 ICPU(INTEL_FAM6_ATOM_AIRMONT
, airmont_params
),
1453 ICPU(INTEL_FAM6_SKYLAKE_MOBILE
, core_params
),
1454 ICPU(INTEL_FAM6_BROADWELL_X
, core_params
),
1455 ICPU(INTEL_FAM6_SKYLAKE_DESKTOP
, core_params
),
1456 ICPU(INTEL_FAM6_BROADWELL_XEON_D
, core_params
),
1457 ICPU(INTEL_FAM6_XEON_PHI_KNL
, knl_params
),
1458 ICPU(INTEL_FAM6_ATOM_GOLDMONT
, bxt_params
),
1461 MODULE_DEVICE_TABLE(x86cpu
, intel_pstate_cpu_ids
);
1463 static const struct x86_cpu_id intel_pstate_cpu_oob_ids
[] __initconst
= {
1464 ICPU(INTEL_FAM6_BROADWELL_XEON_D
, core_params
),
1465 ICPU(INTEL_FAM6_BROADWELL_X
, core_params
),
1466 ICPU(INTEL_FAM6_SKYLAKE_X
, core_params
),
1470 static int intel_pstate_init_cpu(unsigned int cpunum
)
1472 struct cpudata
*cpu
;
1474 cpu
= all_cpu_data
[cpunum
];
1477 unsigned int size
= sizeof(struct cpudata
);
1480 size
+= sizeof(struct perf_limits
);
1482 cpu
= kzalloc(size
, GFP_KERNEL
);
1486 all_cpu_data
[cpunum
] = cpu
;
1488 cpu
->perf_limits
= (struct perf_limits
*)(cpu
+ 1);
1492 cpu
= all_cpu_data
[cpunum
];
1497 intel_pstate_hwp_enable(cpu
);
1498 pid_params
.sample_rate_ms
= 50;
1499 pid_params
.sample_rate_ns
= 50 * NSEC_PER_MSEC
;
1502 intel_pstate_get_cpu_pstates(cpu
);
1504 intel_pstate_busy_pid_reset(cpu
);
1506 pr_debug("controlling: cpu %d\n", cpunum
);
1511 static unsigned int intel_pstate_get(unsigned int cpu_num
)
1513 struct cpudata
*cpu
= all_cpu_data
[cpu_num
];
1515 return cpu
? get_avg_frequency(cpu
) : 0;
1518 static void intel_pstate_set_update_util_hook(unsigned int cpu_num
)
1520 struct cpudata
*cpu
= all_cpu_data
[cpu_num
];
1522 if (cpu
->update_util_set
)
1525 /* Prevent intel_pstate_update_util() from using stale data. */
1526 cpu
->sample
.time
= 0;
1527 cpufreq_add_update_util_hook(cpu_num
, &cpu
->update_util
,
1528 intel_pstate_update_util
);
1529 cpu
->update_util_set
= true;
1532 static void intel_pstate_clear_update_util_hook(unsigned int cpu
)
1534 struct cpudata
*cpu_data
= all_cpu_data
[cpu
];
1536 if (!cpu_data
->update_util_set
)
1539 cpufreq_remove_update_util_hook(cpu
);
1540 cpu_data
->update_util_set
= false;
1541 synchronize_sched();
1544 static void intel_pstate_set_performance_limits(struct perf_limits
*limits
)
1546 mutex_lock(&intel_pstate_limits_lock
);
1547 limits
->no_turbo
= 0;
1548 limits
->turbo_disabled
= 0;
1549 limits
->max_perf_pct
= 100;
1550 limits
->max_perf
= int_tofp(1);
1551 limits
->min_perf_pct
= 100;
1552 limits
->min_perf
= int_tofp(1);
1553 limits
->max_policy_pct
= 100;
1554 limits
->max_sysfs_pct
= 100;
1555 limits
->min_policy_pct
= 0;
1556 limits
->min_sysfs_pct
= 0;
1557 mutex_unlock(&intel_pstate_limits_lock
);
1560 static void intel_pstate_update_perf_limits(struct cpufreq_policy
*policy
,
1561 struct perf_limits
*limits
)
1564 mutex_lock(&intel_pstate_limits_lock
);
1566 limits
->max_policy_pct
= DIV_ROUND_UP(policy
->max
* 100,
1567 policy
->cpuinfo
.max_freq
);
1568 limits
->max_policy_pct
= clamp_t(int, limits
->max_policy_pct
, 0, 100);
1569 if (policy
->max
== policy
->min
) {
1570 limits
->min_policy_pct
= limits
->max_policy_pct
;
1572 limits
->min_policy_pct
= (policy
->min
* 100) /
1573 policy
->cpuinfo
.max_freq
;
1574 limits
->min_policy_pct
= clamp_t(int, limits
->min_policy_pct
,
1578 /* Normalize user input to [min_policy_pct, max_policy_pct] */
1579 limits
->min_perf_pct
= max(limits
->min_policy_pct
,
1580 limits
->min_sysfs_pct
);
1581 limits
->min_perf_pct
= min(limits
->max_policy_pct
,
1582 limits
->min_perf_pct
);
1583 limits
->max_perf_pct
= min(limits
->max_policy_pct
,
1584 limits
->max_sysfs_pct
);
1585 limits
->max_perf_pct
= max(limits
->min_policy_pct
,
1586 limits
->max_perf_pct
);
1588 /* Make sure min_perf_pct <= max_perf_pct */
1589 limits
->min_perf_pct
= min(limits
->max_perf_pct
, limits
->min_perf_pct
);
1591 limits
->min_perf
= div_fp(limits
->min_perf_pct
, 100);
1592 limits
->max_perf
= div_fp(limits
->max_perf_pct
, 100);
1593 limits
->max_perf
= round_up(limits
->max_perf
, FRAC_BITS
);
1595 mutex_unlock(&intel_pstate_limits_lock
);
1597 pr_debug("cpu:%d max_perf_pct:%d min_perf_pct:%d\n", policy
->cpu
,
1598 limits
->max_perf_pct
, limits
->min_perf_pct
);
1601 static int intel_pstate_set_policy(struct cpufreq_policy
*policy
)
1603 struct cpudata
*cpu
;
1604 struct perf_limits
*perf_limits
= NULL
;
1606 if (!policy
->cpuinfo
.max_freq
)
1609 pr_debug("set_policy cpuinfo.max %u policy->max %u\n",
1610 policy
->cpuinfo
.max_freq
, policy
->max
);
1612 cpu
= all_cpu_data
[policy
->cpu
];
1613 cpu
->policy
= policy
->policy
;
1615 if (cpu
->pstate
.max_pstate_physical
> cpu
->pstate
.max_pstate
&&
1616 policy
->max
< policy
->cpuinfo
.max_freq
&&
1617 policy
->max
> cpu
->pstate
.max_pstate
* cpu
->pstate
.scaling
) {
1618 pr_debug("policy->max > max non turbo frequency\n");
1619 policy
->max
= policy
->cpuinfo
.max_freq
;
1623 perf_limits
= cpu
->perf_limits
;
1625 if (policy
->policy
== CPUFREQ_POLICY_PERFORMANCE
) {
1627 limits
= &performance_limits
;
1628 perf_limits
= limits
;
1630 if (policy
->max
>= policy
->cpuinfo
.max_freq
) {
1631 pr_debug("set performance\n");
1632 intel_pstate_set_performance_limits(perf_limits
);
1636 pr_debug("set powersave\n");
1638 limits
= &powersave_limits
;
1639 perf_limits
= limits
;
1644 intel_pstate_update_perf_limits(policy
, perf_limits
);
1646 if (cpu
->policy
== CPUFREQ_POLICY_PERFORMANCE
) {
1648 * NOHZ_FULL CPUs need this as the governor callback may not
1649 * be invoked on them.
1651 intel_pstate_clear_update_util_hook(policy
->cpu
);
1652 intel_pstate_max_within_limits(cpu
);
1655 intel_pstate_set_update_util_hook(policy
->cpu
);
1657 intel_pstate_hwp_set_policy(policy
);
1662 static int intel_pstate_verify_policy(struct cpufreq_policy
*policy
)
1664 cpufreq_verify_within_cpu_limits(policy
);
1666 if (policy
->policy
!= CPUFREQ_POLICY_POWERSAVE
&&
1667 policy
->policy
!= CPUFREQ_POLICY_PERFORMANCE
)
1673 static void intel_pstate_stop_cpu(struct cpufreq_policy
*policy
)
1675 int cpu_num
= policy
->cpu
;
1676 struct cpudata
*cpu
= all_cpu_data
[cpu_num
];
1678 pr_debug("CPU %d exiting\n", cpu_num
);
1680 intel_pstate_clear_update_util_hook(cpu_num
);
1685 intel_pstate_set_min_pstate(cpu
);
1688 static int intel_pstate_cpu_init(struct cpufreq_policy
*policy
)
1690 struct cpudata
*cpu
;
1693 rc
= intel_pstate_init_cpu(policy
->cpu
);
1697 cpu
= all_cpu_data
[policy
->cpu
];
1699 if (limits
->min_perf_pct
== 100 && limits
->max_perf_pct
== 100)
1700 policy
->policy
= CPUFREQ_POLICY_PERFORMANCE
;
1702 policy
->policy
= CPUFREQ_POLICY_POWERSAVE
;
1705 * We need sane value in the cpu->perf_limits, so inherit from global
1706 * perf_limits limits, which are seeded with values based on the
1707 * CONFIG_CPU_FREQ_DEFAULT_GOV_*, during boot up.
1710 memcpy(cpu
->perf_limits
, limits
, sizeof(struct perf_limits
));
1712 policy
->min
= cpu
->pstate
.min_pstate
* cpu
->pstate
.scaling
;
1713 policy
->max
= cpu
->pstate
.turbo_pstate
* cpu
->pstate
.scaling
;
1715 /* cpuinfo and default policy values */
1716 policy
->cpuinfo
.min_freq
= cpu
->pstate
.min_pstate
* cpu
->pstate
.scaling
;
1717 update_turbo_state();
1718 policy
->cpuinfo
.max_freq
= limits
->turbo_disabled
?
1719 cpu
->pstate
.max_pstate
: cpu
->pstate
.turbo_pstate
;
1720 policy
->cpuinfo
.max_freq
*= cpu
->pstate
.scaling
;
1722 intel_pstate_init_acpi_perf_limits(policy
);
1723 policy
->cpuinfo
.transition_latency
= CPUFREQ_ETERNAL
;
1724 cpumask_set_cpu(policy
->cpu
, policy
->cpus
);
1729 static int intel_pstate_cpu_exit(struct cpufreq_policy
*policy
)
1731 intel_pstate_exit_perf_limits(policy
);
1736 static struct cpufreq_driver intel_pstate_driver
= {
1737 .flags
= CPUFREQ_CONST_LOOPS
,
1738 .verify
= intel_pstate_verify_policy
,
1739 .setpolicy
= intel_pstate_set_policy
,
1740 .resume
= intel_pstate_hwp_set_policy
,
1741 .get
= intel_pstate_get
,
1742 .init
= intel_pstate_cpu_init
,
1743 .exit
= intel_pstate_cpu_exit
,
1744 .stop_cpu
= intel_pstate_stop_cpu
,
1745 .name
= "intel_pstate",
1748 static int no_load __initdata
;
1749 static int no_hwp __initdata
;
1750 static int hwp_only __initdata
;
1751 static unsigned int force_load __initdata
;
1753 static int __init
intel_pstate_msrs_not_valid(void)
1755 if (!pstate_funcs
.get_max() ||
1756 !pstate_funcs
.get_min() ||
1757 !pstate_funcs
.get_turbo())
1763 static void __init
copy_pid_params(struct pstate_adjust_policy
*policy
)
1765 pid_params
.sample_rate_ms
= policy
->sample_rate_ms
;
1766 pid_params
.sample_rate_ns
= pid_params
.sample_rate_ms
* NSEC_PER_MSEC
;
1767 pid_params
.p_gain_pct
= policy
->p_gain_pct
;
1768 pid_params
.i_gain_pct
= policy
->i_gain_pct
;
1769 pid_params
.d_gain_pct
= policy
->d_gain_pct
;
1770 pid_params
.deadband
= policy
->deadband
;
1771 pid_params
.setpoint
= policy
->setpoint
;
1775 static void intel_pstate_use_acpi_profile(void)
1777 if (acpi_gbl_FADT
.preferred_profile
== PM_MOBILE
)
1778 pstate_funcs
.get_target_pstate
=
1779 get_target_pstate_use_cpu_load
;
1782 static void intel_pstate_use_acpi_profile(void)
1787 static void __init
copy_cpu_funcs(struct pstate_funcs
*funcs
)
1789 pstate_funcs
.get_max
= funcs
->get_max
;
1790 pstate_funcs
.get_max_physical
= funcs
->get_max_physical
;
1791 pstate_funcs
.get_min
= funcs
->get_min
;
1792 pstate_funcs
.get_turbo
= funcs
->get_turbo
;
1793 pstate_funcs
.get_scaling
= funcs
->get_scaling
;
1794 pstate_funcs
.get_val
= funcs
->get_val
;
1795 pstate_funcs
.get_vid
= funcs
->get_vid
;
1796 pstate_funcs
.get_target_pstate
= funcs
->get_target_pstate
;
1798 intel_pstate_use_acpi_profile();
1803 static bool __init
intel_pstate_no_acpi_pss(void)
1807 for_each_possible_cpu(i
) {
1809 union acpi_object
*pss
;
1810 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
1811 struct acpi_processor
*pr
= per_cpu(processors
, i
);
1816 status
= acpi_evaluate_object(pr
->handle
, "_PSS", NULL
, &buffer
);
1817 if (ACPI_FAILURE(status
))
1820 pss
= buffer
.pointer
;
1821 if (pss
&& pss
->type
== ACPI_TYPE_PACKAGE
) {
1832 static bool __init
intel_pstate_has_acpi_ppc(void)
1836 for_each_possible_cpu(i
) {
1837 struct acpi_processor
*pr
= per_cpu(processors
, i
);
1841 if (acpi_has_method(pr
->handle
, "_PPC"))
1852 struct hw_vendor_info
{
1854 char oem_id
[ACPI_OEM_ID_SIZE
];
1855 char oem_table_id
[ACPI_OEM_TABLE_ID_SIZE
];
1859 /* Hardware vendor-specific info that has its own power management modes */
1860 static struct hw_vendor_info vendor_info
[] __initdata
= {
1861 {1, "HP ", "ProLiant", PSS
},
1862 {1, "ORACLE", "X4-2 ", PPC
},
1863 {1, "ORACLE", "X4-2L ", PPC
},
1864 {1, "ORACLE", "X4-2B ", PPC
},
1865 {1, "ORACLE", "X3-2 ", PPC
},
1866 {1, "ORACLE", "X3-2L ", PPC
},
1867 {1, "ORACLE", "X3-2B ", PPC
},
1868 {1, "ORACLE", "X4470M2 ", PPC
},
1869 {1, "ORACLE", "X4270M3 ", PPC
},
1870 {1, "ORACLE", "X4270M2 ", PPC
},
1871 {1, "ORACLE", "X4170M2 ", PPC
},
1872 {1, "ORACLE", "X4170 M3", PPC
},
1873 {1, "ORACLE", "X4275 M3", PPC
},
1874 {1, "ORACLE", "X6-2 ", PPC
},
1875 {1, "ORACLE", "Sudbury ", PPC
},
1879 static bool __init
intel_pstate_platform_pwr_mgmt_exists(void)
1881 struct acpi_table_header hdr
;
1882 struct hw_vendor_info
*v_info
;
1883 const struct x86_cpu_id
*id
;
1886 id
= x86_match_cpu(intel_pstate_cpu_oob_ids
);
1888 rdmsrl(MSR_MISC_PWR_MGMT
, misc_pwr
);
1889 if ( misc_pwr
& (1 << 8))
1893 if (acpi_disabled
||
1894 ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT
, 0, &hdr
)))
1897 for (v_info
= vendor_info
; v_info
->valid
; v_info
++) {
1898 if (!strncmp(hdr
.oem_id
, v_info
->oem_id
, ACPI_OEM_ID_SIZE
) &&
1899 !strncmp(hdr
.oem_table_id
, v_info
->oem_table_id
,
1900 ACPI_OEM_TABLE_ID_SIZE
))
1901 switch (v_info
->oem_pwr_table
) {
1903 return intel_pstate_no_acpi_pss();
1905 return intel_pstate_has_acpi_ppc() &&
1913 static void intel_pstate_request_control_from_smm(void)
1916 * It may be unsafe to request P-states control from SMM if _PPC support
1917 * has not been enabled.
1920 acpi_processor_pstate_control();
1922 #else /* CONFIG_ACPI not enabled */
1923 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
1924 static inline bool intel_pstate_has_acpi_ppc(void) { return false; }
1925 static inline void intel_pstate_request_control_from_smm(void) {}
1926 #endif /* CONFIG_ACPI */
1928 static const struct x86_cpu_id hwp_support_ids
[] __initconst
= {
1929 { X86_VENDOR_INTEL
, 6, X86_MODEL_ANY
, X86_FEATURE_HWP
},
1933 static int __init
intel_pstate_init(void)
1936 const struct x86_cpu_id
*id
;
1937 struct cpu_defaults
*cpu_def
;
1942 if (x86_match_cpu(hwp_support_ids
) && !no_hwp
) {
1943 copy_cpu_funcs(&core_params
.funcs
);
1945 goto hwp_cpu_matched
;
1948 id
= x86_match_cpu(intel_pstate_cpu_ids
);
1952 cpu_def
= (struct cpu_defaults
*)id
->driver_data
;
1954 copy_pid_params(&cpu_def
->pid_policy
);
1955 copy_cpu_funcs(&cpu_def
->funcs
);
1957 if (intel_pstate_msrs_not_valid())
1962 * The Intel pstate driver will be ignored if the platform
1963 * firmware has its own power management modes.
1965 if (intel_pstate_platform_pwr_mgmt_exists())
1968 pr_info("Intel P-state driver initializing\n");
1970 all_cpu_data
= vzalloc(sizeof(void *) * num_possible_cpus());
1974 if (!hwp_active
&& hwp_only
)
1977 intel_pstate_request_control_from_smm();
1979 rc
= cpufreq_register_driver(&intel_pstate_driver
);
1983 intel_pstate_debug_expose_params();
1984 intel_pstate_sysfs_expose_params();
1987 pr_info("HWP enabled\n");
1992 for_each_online_cpu(cpu
) {
1993 if (all_cpu_data
[cpu
]) {
1994 intel_pstate_clear_update_util_hook(cpu
);
1995 kfree(all_cpu_data
[cpu
]);
2000 vfree(all_cpu_data
);
2003 device_initcall(intel_pstate_init
);
2005 static int __init
intel_pstate_setup(char *str
)
2010 if (!strcmp(str
, "disable"))
2012 if (!strcmp(str
, "no_hwp")) {
2013 pr_info("HWP disabled\n");
2016 if (!strcmp(str
, "force"))
2018 if (!strcmp(str
, "hwp_only"))
2020 if (!strcmp(str
, "per_cpu_perf_limits"))
2021 per_cpu_limits
= true;
2024 if (!strcmp(str
, "support_acpi_ppc"))
2030 early_param("intel_pstate", intel_pstate_setup
);
2032 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
2033 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
2034 MODULE_LICENSE("GPL");