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[mirror_ubuntu-bionic-kernel.git] / drivers / cpufreq / omap-cpufreq.c
1 /*
2 * CPU frequency scaling for OMAP using OPP information
3 *
4 * Copyright (C) 2005 Nokia Corporation
5 * Written by Tony Lindgren <tony@atomide.com>
6 *
7 * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
8 *
9 * Copyright (C) 2007-2011 Texas Instruments, Inc.
10 * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/sched.h>
19 #include <linux/cpufreq.h>
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/err.h>
23 #include <linux/clk.h>
24 #include <linux/io.h>
25 #include <linux/opp.h>
26 #include <linux/cpu.h>
27 #include <linux/module.h>
28 #include <linux/regulator/consumer.h>
29
30 #include <asm/system.h>
31 #include <asm/smp_plat.h>
32 #include <asm/cpu.h>
33
34 #include <plat/clock.h>
35 #include <plat/omap-pm.h>
36 #include <plat/common.h>
37 #include <plat/omap_device.h>
38
39 #include <mach/hardware.h>
40
41 /* OPP tolerance in percentage */
42 #define OPP_TOLERANCE 4
43
44 #ifdef CONFIG_SMP
45 struct lpj_info {
46 unsigned long ref;
47 unsigned int freq;
48 };
49
50 static DEFINE_PER_CPU(struct lpj_info, lpj_ref);
51 static struct lpj_info global_lpj_ref;
52 #endif
53
54 static struct cpufreq_frequency_table *freq_table;
55 static atomic_t freq_table_users = ATOMIC_INIT(0);
56 static struct clk *mpu_clk;
57 static char *mpu_clk_name;
58 static struct device *mpu_dev;
59 static struct regulator *mpu_reg;
60
61 static int omap_verify_speed(struct cpufreq_policy *policy)
62 {
63 if (!freq_table)
64 return -EINVAL;
65 return cpufreq_frequency_table_verify(policy, freq_table);
66 }
67
68 static unsigned int omap_getspeed(unsigned int cpu)
69 {
70 unsigned long rate;
71
72 if (cpu >= NR_CPUS)
73 return 0;
74
75 rate = clk_get_rate(mpu_clk) / 1000;
76 return rate;
77 }
78
79 static int omap_target(struct cpufreq_policy *policy,
80 unsigned int target_freq,
81 unsigned int relation)
82 {
83 unsigned int i;
84 int r, ret = 0;
85 struct cpufreq_freqs freqs;
86 struct opp *opp;
87 unsigned long freq, volt = 0, volt_old = 0, tol = 0;
88
89 if (!freq_table) {
90 dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__,
91 policy->cpu);
92 return -EINVAL;
93 }
94
95 ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
96 relation, &i);
97 if (ret) {
98 dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n",
99 __func__, policy->cpu, target_freq, ret);
100 return ret;
101 }
102 freqs.new = freq_table[i].frequency;
103 if (!freqs.new) {
104 dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__,
105 policy->cpu, target_freq);
106 return -EINVAL;
107 }
108
109 freqs.old = omap_getspeed(policy->cpu);
110 freqs.cpu = policy->cpu;
111
112 if (freqs.old == freqs.new && policy->cur == freqs.new)
113 return ret;
114
115 /* notifiers */
116 for_each_cpu(i, policy->cpus) {
117 freqs.cpu = i;
118 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
119 }
120
121 freq = freqs.new * 1000;
122
123 if (mpu_reg) {
124 opp = opp_find_freq_ceil(mpu_dev, &freq);
125 if (IS_ERR(opp)) {
126 dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n",
127 __func__, freqs.new);
128 return -EINVAL;
129 }
130 volt = opp_get_voltage(opp);
131 tol = volt * OPP_TOLERANCE / 100;
132 volt_old = regulator_get_voltage(mpu_reg);
133 }
134
135 dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n",
136 freqs.old / 1000, volt_old ? volt_old / 1000 : -1,
137 freqs.new / 1000, volt ? volt / 1000 : -1);
138
139 /* scaling up? scale voltage before frequency */
140 if (mpu_reg && (freqs.new > freqs.old)) {
141 r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
142 if (r < 0) {
143 dev_warn(mpu_dev, "%s: unable to scale voltage up.\n",
144 __func__);
145 freqs.new = freqs.old;
146 goto done;
147 }
148 }
149
150 ret = clk_set_rate(mpu_clk, freqs.new * 1000);
151
152 /* scaling down? scale voltage after frequency */
153 if (mpu_reg && (freqs.new < freqs.old)) {
154 r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
155 if (r < 0) {
156 dev_warn(mpu_dev, "%s: unable to scale voltage down.\n",
157 __func__);
158 ret = clk_set_rate(mpu_clk, freqs.old * 1000);
159 freqs.new = freqs.old;
160 goto done;
161 }
162 }
163
164 freqs.new = omap_getspeed(policy->cpu);
165 #ifdef CONFIG_SMP
166 /*
167 * Note that loops_per_jiffy is not updated on SMP systems in
168 * cpufreq driver. So, update the per-CPU loops_per_jiffy value
169 * on frequency transition. We need to update all dependent CPUs.
170 */
171 for_each_cpu(i, policy->cpus) {
172 struct lpj_info *lpj = &per_cpu(lpj_ref, i);
173 if (!lpj->freq) {
174 lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy;
175 lpj->freq = freqs.old;
176 }
177
178 per_cpu(cpu_data, i).loops_per_jiffy =
179 cpufreq_scale(lpj->ref, lpj->freq, freqs.new);
180 }
181
182 /* And don't forget to adjust the global one */
183 if (!global_lpj_ref.freq) {
184 global_lpj_ref.ref = loops_per_jiffy;
185 global_lpj_ref.freq = freqs.old;
186 }
187 loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq,
188 freqs.new);
189 #endif
190
191 done:
192 /* notifiers */
193 for_each_cpu(i, policy->cpus) {
194 freqs.cpu = i;
195 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
196 }
197
198 return ret;
199 }
200
201 static inline void freq_table_free(void)
202 {
203 if (atomic_dec_and_test(&freq_table_users))
204 opp_free_cpufreq_table(mpu_dev, &freq_table);
205 }
206
207 static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
208 {
209 int result = 0;
210
211 mpu_clk = clk_get(NULL, mpu_clk_name);
212 if (IS_ERR(mpu_clk))
213 return PTR_ERR(mpu_clk);
214
215 if (policy->cpu >= NR_CPUS) {
216 result = -EINVAL;
217 goto fail_ck;
218 }
219
220 policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
221
222 if (atomic_inc_return(&freq_table_users) == 1)
223 result = opp_init_cpufreq_table(mpu_dev, &freq_table);
224
225 if (result) {
226 dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n",
227 __func__, policy->cpu, result);
228 goto fail_ck;
229 }
230
231 result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
232 if (result)
233 goto fail_table;
234
235 cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
236
237 policy->min = policy->cpuinfo.min_freq;
238 policy->max = policy->cpuinfo.max_freq;
239 policy->cur = omap_getspeed(policy->cpu);
240
241 /*
242 * On OMAP SMP configuartion, both processors share the voltage
243 * and clock. So both CPUs needs to be scaled together and hence
244 * needs software co-ordination. Use cpufreq affected_cpus
245 * interface to handle this scenario. Additional is_smp() check
246 * is to keep SMP_ON_UP build working.
247 */
248 if (is_smp()) {
249 policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
250 cpumask_setall(policy->cpus);
251 }
252
253 /* FIXME: what's the actual transition time? */
254 policy->cpuinfo.transition_latency = 300 * 1000;
255
256 return 0;
257
258 fail_table:
259 freq_table_free();
260 fail_ck:
261 clk_put(mpu_clk);
262 return result;
263 }
264
265 static int omap_cpu_exit(struct cpufreq_policy *policy)
266 {
267 freq_table_free();
268 clk_put(mpu_clk);
269 return 0;
270 }
271
272 static struct freq_attr *omap_cpufreq_attr[] = {
273 &cpufreq_freq_attr_scaling_available_freqs,
274 NULL,
275 };
276
277 static struct cpufreq_driver omap_driver = {
278 .flags = CPUFREQ_STICKY,
279 .verify = omap_verify_speed,
280 .target = omap_target,
281 .get = omap_getspeed,
282 .init = omap_cpu_init,
283 .exit = omap_cpu_exit,
284 .name = "omap",
285 .attr = omap_cpufreq_attr,
286 };
287
288 static int __init omap_cpufreq_init(void)
289 {
290 if (cpu_is_omap24xx())
291 mpu_clk_name = "virt_prcm_set";
292 else if (cpu_is_omap34xx())
293 mpu_clk_name = "dpll1_ck";
294 else if (cpu_is_omap44xx())
295 mpu_clk_name = "dpll_mpu_ck";
296
297 if (!mpu_clk_name) {
298 pr_err("%s: unsupported Silicon?\n", __func__);
299 return -EINVAL;
300 }
301
302 mpu_dev = omap_device_get_by_hwmod_name("mpu");
303 if (!mpu_dev) {
304 pr_warning("%s: unable to get the mpu device\n", __func__);
305 return -EINVAL;
306 }
307
308 mpu_reg = regulator_get(mpu_dev, "vcc");
309 if (IS_ERR(mpu_reg)) {
310 pr_warning("%s: unable to get MPU regulator\n", __func__);
311 mpu_reg = NULL;
312 } else {
313 /*
314 * Ensure physical regulator is present.
315 * (e.g. could be dummy regulator.)
316 */
317 if (regulator_get_voltage(mpu_reg) < 0) {
318 pr_warn("%s: physical regulator not present for MPU\n",
319 __func__);
320 regulator_put(mpu_reg);
321 mpu_reg = NULL;
322 }
323 }
324
325 return cpufreq_register_driver(&omap_driver);
326 }
327
328 static void __exit omap_cpufreq_exit(void)
329 {
330 cpufreq_unregister_driver(&omap_driver);
331 }
332
333 MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
334 MODULE_LICENSE("GPL");
335 module_init(omap_cpufreq_init);
336 module_exit(omap_cpufreq_exit);