drivers/cpufreq/pmac32-cpufreq.c

   1 /*
   2  *  Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
   3  *  Copyright (C) 2004        John Steele Scott <toojays@toojays.net>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * TODO: Need a big cleanup here. Basically, we need to have different
  10  * cpufreq_driver structures for the different type of HW instead of the
  11  * current mess. We also need to better deal with the detection of the
  12  * type of machine.
  13  *
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/types.h>
  18 #include <linux/errno.h>
  19 #include <linux/kernel.h>
  20 #include <linux/delay.h>
  21 #include <linux/sched.h>
  22 #include <linux/adb.h>
  23 #include <linux/pmu.h>
  24 #include <linux/cpufreq.h>
  25 #include <linux/init.h>
  26 #include <linux/device.h>
  27 #include <linux/hardirq.h>
  28 #include <linux/of_device.h>
  29 #include <asm/prom.h>
  30 #include <asm/machdep.h>
  31 #include <asm/irq.h>
  32 #include <asm/pmac_feature.h>
  33 #include <asm/mmu_context.h>
  34 #include <asm/sections.h>
  35 #include <asm/cputable.h>
  36 #include <asm/time.h>
  37 #include <asm/mpic.h>
  38 #include <asm/keylargo.h>
  39 #include <asm/switch_to.h>
  40
  41 /* WARNING !!! This will cause calibrate_delay() to be called,
  42  * but this is an __init function ! So you MUST go edit
  43  * init/main.c to make it non-init before enabling DEBUG_FREQ
  44  */
  45 #undef DEBUG_FREQ
  46
  47 extern void low_choose_7447a_dfs(int dfs);
  48 extern void low_choose_750fx_pll(int pll);
  49 extern void low_sleep_handler(void);
  50
  51 /*
  52  * Currently, PowerMac cpufreq supports only high & low frequencies
  53  * that are set by the firmware
  54  */
  55 static unsigned int low_freq;
  56 static unsigned int hi_freq;
  57 static unsigned int cur_freq;
  58 static unsigned int sleep_freq;
  59 static unsigned long transition_latency;
  60
  61 /*
  62  * Different models uses different mechanisms to switch the frequency
  63  */
  64 static int (*set_speed_proc)(int low_speed);
  65 static unsigned int (*get_speed_proc)(void);
  66
  67 /*
  68  * Some definitions used by the various speedprocs
  69  */
  70 static u32 voltage_gpio;
  71 static u32 frequency_gpio;
  72 static u32 slew_done_gpio;
  73 static int no_schedule;
  74 static int has_cpu_l2lve;
  75 static int is_pmu_based;
  76
  77 /* There are only two frequency states for each processor. Values
  78  * are in kHz for the time being.
  79  */
  80 #define CPUFREQ_HIGH                  0
  81 #define CPUFREQ_LOW                   1
  82
  83 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  84         {CPUFREQ_HIGH,          0},
  85         {CPUFREQ_LOW,           0},
  86         {0,                     CPUFREQ_TABLE_END},
  87 };
  88
  89 static inline void local_delay(unsigned long ms)
  90 {
  91         if (no_schedule)
  92                 mdelay(ms);
  93         else
  94                 msleep(ms);
  95 }
  96
  97 #ifdef DEBUG_FREQ
  98 static inline void debug_calc_bogomips(void)
  99 {
 100         /* This will cause a recalc of bogomips and display the
 101          * result. We backup/restore the value to avoid affecting the
 102          * core cpufreq framework's own calculation.
 103          */
 104         unsigned long save_lpj = loops_per_jiffy;
 105         calibrate_delay();
 106         loops_per_jiffy = save_lpj;
 107 }
 108 #endif /* DEBUG_FREQ */
 109
 110 /* Switch CPU speed under 750FX CPU control
 111  */
 112 static int cpu_750fx_cpu_speed(int low_speed)
 113 {
 114         u32 hid2;
 115
 116         if (low_speed == 0) {
 117                 /* ramping up, set voltage first */
 118                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
 119                 /* Make sure we sleep for at least 1ms */
 120                 local_delay(10);
 121
 122                 /* tweak L2 for high voltage */
 123                 if (has_cpu_l2lve) {
 124                         hid2 = mfspr(SPRN_HID2);
 125                         hid2 &= ~0x2000;
 126                         mtspr(SPRN_HID2, hid2);
 127                 }
 128         }
 129 #ifdef CONFIG_6xx
 130         low_choose_750fx_pll(low_speed);
 131 #endif
 132         if (low_speed == 1) {
 133                 /* tweak L2 for low voltage */
 134                 if (has_cpu_l2lve) {
 135                         hid2 = mfspr(SPRN_HID2);
 136                         hid2 |= 0x2000;
 137                         mtspr(SPRN_HID2, hid2);
 138                 }
 139
 140                 /* ramping down, set voltage last */
 141                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
 142                 local_delay(10);
 143         }
 144
 145         return 0;
 146 }
 147
 148 static unsigned int cpu_750fx_get_cpu_speed(void)
 149 {
 150         if (mfspr(SPRN_HID1) & HID1_PS)
 151                 return low_freq;
 152         else
 153                 return hi_freq;
 154 }
 155
 156 /* Switch CPU speed using DFS */
 157 static int dfs_set_cpu_speed(int low_speed)
 158 {
 159         if (low_speed == 0) {
 160                 /* ramping up, set voltage first */
 161                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
 162                 /* Make sure we sleep for at least 1ms */
 163                 local_delay(1);
 164         }
 165
 166         /* set frequency */
 167 #ifdef CONFIG_6xx
 168         low_choose_7447a_dfs(low_speed);
 169 #endif
 170         udelay(100);
 171
 172         if (low_speed == 1) {
 173                 /* ramping down, set voltage last */
 174                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
 175                 local_delay(1);
 176         }
 177
 178         return 0;
 179 }
 180
 181 static unsigned int dfs_get_cpu_speed(void)
 182 {
 183         if (mfspr(SPRN_HID1) & HID1_DFS)
 184                 return low_freq;
 185         else
 186                 return hi_freq;
 187 }
 188
 189
 190 /* Switch CPU speed using slewing GPIOs
 191  */
 192 static int gpios_set_cpu_speed(int low_speed)
 193 {
 194         int gpio, timeout = 0;
 195
 196         /* If ramping up, set voltage first */
 197         if (low_speed == 0) {
 198                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
 199                 /* Delay is way too big but it's ok, we schedule */
 200                 local_delay(10);
 201         }
 202
 203         /* Set frequency */
 204         gpio =  pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
 205         if (low_speed == ((gpio & 0x01) == 0))
 206                 goto skip;
 207
 208         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
 209                           low_speed ? 0x04 : 0x05);
 210         udelay(200);
 211         do {
 212                 if (++timeout > 100)
 213                         break;
 214                 local_delay(1);
 215                 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
 216         } while((gpio & 0x02) == 0);
 217  skip:
 218         /* If ramping down, set voltage last */
 219         if (low_speed == 1) {
 220                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
 221                 /* Delay is way too big but it's ok, we schedule */
 222                 local_delay(10);
 223         }
 224
 225 #ifdef DEBUG_FREQ
 226         debug_calc_bogomips();
 227 #endif
 228
 229         return 0;
 230 }
 231
 232 /* Switch CPU speed under PMU control
 233  */
 234 static int pmu_set_cpu_speed(int low_speed)
 235 {
 236         struct adb_request req;
 237         unsigned long save_l2cr;
 238         unsigned long save_l3cr;
 239         unsigned int pic_prio;
 240         unsigned long flags;
 241
 242         preempt_disable();
 243
 244 #ifdef DEBUG_FREQ
 245         printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
 246 #endif
 247         pmu_suspend();
 248
 249         /* Disable all interrupt sources on openpic */
 250         pic_prio = mpic_cpu_get_priority();
 251         mpic_cpu_set_priority(0xf);
 252
 253         /* Make sure the decrementer won't interrupt us */
 254         asm volatile("mtdec %0" : : "r" (0x7fffffff));
 255         /* Make sure any pending DEC interrupt occurring while we did
 256          * the above didn't re-enable the DEC */
 257         mb();
 258         asm volatile("mtdec %0" : : "r" (0x7fffffff));
 259
 260         /* We can now disable MSR_EE */
 261         local_irq_save(flags);
 262
 263         /* Giveup the FPU & vec */
 264         enable_kernel_fp();
 265
 266 #ifdef CONFIG_ALTIVEC
 267         if (cpu_has_feature(CPU_FTR_ALTIVEC))
 268                 enable_kernel_altivec();
 269 #endif /* CONFIG_ALTIVEC */
 270
 271         /* Save & disable L2 and L3 caches */
 272         save_l3cr = _get_L3CR();        /* (returns -1 if not available) */
 273         save_l2cr = _get_L2CR();        /* (returns -1 if not available) */
 274
 275         /* Send the new speed command. My assumption is that this command
 276          * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
 277          */
 278         pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
 279         while (!req.complete)
 280                 pmu_poll();
 281
 282         /* Prepare the northbridge for the speed transition */
 283         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
 284
 285         /* Call low level code to backup CPU state and recover from
 286          * hardware reset
 287          */
 288         low_sleep_handler();
 289
 290         /* Restore the northbridge */
 291         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
 292
 293         /* Restore L2 cache */
 294         if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
 295                 _set_L2CR(save_l2cr);
 296         /* Restore L3 cache */
 297         if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
 298                 _set_L3CR(save_l3cr);
 299
 300         /* Restore userland MMU context */
 301         switch_mmu_context(NULL, current->active_mm);
 302
 303 #ifdef DEBUG_FREQ
 304         printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
 305 #endif
 306
 307         /* Restore low level PMU operations */
 308         pmu_unlock();
 309
 310         /*
 311          * Restore decrementer; we'll take a decrementer interrupt
 312          * as soon as interrupts are re-enabled and the generic
 313          * clockevents code will reprogram it with the right value.
 314          */
 315         set_dec(1);
 316
 317         /* Restore interrupts */
 318         mpic_cpu_set_priority(pic_prio);
 319
 320         /* Let interrupts flow again ... */
 321         local_irq_restore(flags);
 322
 323 #ifdef DEBUG_FREQ
 324         debug_calc_bogomips();
 325 #endif
 326
 327         pmu_resume();
 328
 329         preempt_enable();
 330
 331         return 0;
 332 }
 333
 334 static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode,
 335                 int notify)
 336 {
 337         struct cpufreq_freqs freqs;
 338         unsigned long l3cr;
 339         static unsigned long prev_l3cr;
 340
 341         freqs.old = cur_freq;
 342         freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
 343
 344         if (freqs.old == freqs.new)
 345                 return 0;
 346
 347         if (notify)
 348                 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
 349         if (speed_mode == CPUFREQ_LOW &&
 350             cpu_has_feature(CPU_FTR_L3CR)) {
 351                 l3cr = _get_L3CR();
 352                 if (l3cr & L3CR_L3E) {
 353                         prev_l3cr = l3cr;
 354                         _set_L3CR(0);
 355                 }
 356         }
 357         set_speed_proc(speed_mode == CPUFREQ_LOW);
 358         if (speed_mode == CPUFREQ_HIGH &&
 359             cpu_has_feature(CPU_FTR_L3CR)) {
 360                 l3cr = _get_L3CR();
 361                 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
 362                         _set_L3CR(prev_l3cr);
 363         }
 364         if (notify)
 365                 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
 366         cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
 367
 368         return 0;
 369 }
 370
 371 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
 372 {
 373         return cur_freq;
 374 }
 375
 376 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
 377                                         unsigned int index)
 378 {
 379         int             rc;
 380
 381         rc = do_set_cpu_speed(policy, index, 1);
 382
 383         ppc_proc_freq = cur_freq * 1000ul;
 384         return rc;
 385 }
 386
 387 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
 388 {
 389         return cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency);
 390 }
 391
 392 static u32 read_gpio(struct device_node *np)
 393 {
 394         const u32 *reg = of_get_property(np, "reg", NULL);
 395         u32 offset;
 396
 397         if (reg == NULL)
 398                 return 0;
 399         /* That works for all keylargos but shall be fixed properly
 400          * some day... The problem is that it seems we can't rely
 401          * on the "reg" property of the GPIO nodes, they are either
 402          * relative to the base of KeyLargo or to the base of the
 403          * GPIO space, and the device-tree doesn't help.
 404          */
 405         offset = *reg;
 406         if (offset < KEYLARGO_GPIO_LEVELS0)
 407                 offset += KEYLARGO_GPIO_LEVELS0;
 408         return offset;
 409 }
 410
 411 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
 412 {
 413         /* Ok, this could be made a bit smarter, but let's be robust for now. We
 414          * always force a speed change to high speed before sleep, to make sure
 415          * we have appropriate voltage and/or bus speed for the wakeup process,
 416          * and to make sure our loops_per_jiffies are "good enough", that is will
 417          * not cause too short delays if we sleep in low speed and wake in high
 418          * speed..
 419          */
 420         no_schedule = 1;
 421         sleep_freq = cur_freq;
 422         if (cur_freq == low_freq && !is_pmu_based)
 423                 do_set_cpu_speed(policy, CPUFREQ_HIGH, 0);
 424         return 0;
 425 }
 426
 427 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
 428 {
 429         /* If we resume, first check if we have a get() function */
 430         if (get_speed_proc)
 431                 cur_freq = get_speed_proc();
 432         else
 433                 cur_freq = 0;
 434
 435         /* We don't, hrm... we don't really know our speed here, best
 436          * is that we force a switch to whatever it was, which is
 437          * probably high speed due to our suspend() routine
 438          */
 439         do_set_cpu_speed(policy, sleep_freq == low_freq ?
 440                          CPUFREQ_LOW : CPUFREQ_HIGH, 0);
 441
 442         ppc_proc_freq = cur_freq * 1000ul;
 443
 444         no_schedule = 0;
 445         return 0;
 446 }
 447
 448 static struct cpufreq_driver pmac_cpufreq_driver = {
 449         .verify         = cpufreq_generic_frequency_table_verify,
 450         .target_index   = pmac_cpufreq_target,
 451         .get            = pmac_cpufreq_get_speed,
 452         .init           = pmac_cpufreq_cpu_init,
 453         .suspend        = pmac_cpufreq_suspend,
 454         .resume         = pmac_cpufreq_resume,
 455         .flags          = CPUFREQ_PM_NO_WARN,
 456         .attr           = cpufreq_generic_attr,
 457         .name           = "powermac",
 458 };
 459
 460
 461 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
 462 {
 463         struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
 464                                                                 "voltage-gpio");
 465         struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
 466                                                                 "frequency-gpio");
 467         struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
 468                                                                      "slewing-done");
 469         const u32 *value;
 470
 471         /*
 472          * Check to see if it's GPIO driven or PMU only
 473          *
 474          * The way we extract the GPIO address is slightly hackish, but it
 475          * works well enough for now. We need to abstract the whole GPIO
 476          * stuff sooner or later anyway
 477          */
 478
 479         if (volt_gpio_np)
 480                 voltage_gpio = read_gpio(volt_gpio_np);
 481         if (freq_gpio_np)
 482                 frequency_gpio = read_gpio(freq_gpio_np);
 483         if (slew_done_gpio_np)
 484                 slew_done_gpio = read_gpio(slew_done_gpio_np);
 485
 486         /* If we use the frequency GPIOs, calculate the min/max speeds based
 487          * on the bus frequencies
 488          */
 489         if (frequency_gpio && slew_done_gpio) {
 490                 int lenp, rc;
 491                 const u32 *freqs, *ratio;
 492
 493                 freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
 494                 lenp /= sizeof(u32);
 495                 if (freqs == NULL || lenp != 2) {
 496                         printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
 497                         return 1;
 498                 }
 499                 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
 500                                                 NULL);
 501                 if (ratio == NULL) {
 502                         printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
 503                         return 1;
 504                 }
 505
 506                 /* Get the min/max bus frequencies */
 507                 low_freq = min(freqs[0], freqs[1]);
 508                 hi_freq = max(freqs[0], freqs[1]);
 509
 510                 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
 511                  * frequency, it claims it to be around 84Mhz on some models while
 512                  * it appears to be approx. 101Mhz on all. Let's hack around here...
 513                  * fortunately, we don't need to be too precise
 514                  */
 515                 if (low_freq < 98000000)
 516                         low_freq = 101000000;
 517
 518                 /* Convert those to CPU core clocks */
 519                 low_freq = (low_freq * (*ratio)) / 2000;
 520                 hi_freq = (hi_freq * (*ratio)) / 2000;
 521
 522                 /* Now we get the frequencies, we read the GPIO to see what is out current
 523                  * speed
 524                  */
 525                 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
 526                 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
 527
 528                 set_speed_proc = gpios_set_cpu_speed;
 529                 return 1;
 530         }
 531
 532         /* If we use the PMU, look for the min & max frequencies in the
 533          * device-tree
 534          */
 535         value = of_get_property(cpunode, "min-clock-frequency", NULL);
 536         if (!value)
 537                 return 1;
 538         low_freq = (*value) / 1000;
 539         /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
 540          * here */
 541         if (low_freq < 100000)
 542                 low_freq *= 10;
 543
 544         value = of_get_property(cpunode, "max-clock-frequency", NULL);
 545         if (!value)
 546                 return 1;
 547         hi_freq = (*value) / 1000;
 548         set_speed_proc = pmu_set_cpu_speed;
 549         is_pmu_based = 1;
 550
 551         return 0;
 552 }
 553
 554 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
 555 {
 556         struct device_node *volt_gpio_np;
 557
 558         if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
 559                 return 1;
 560
 561         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
 562         if (volt_gpio_np)
 563                 voltage_gpio = read_gpio(volt_gpio_np);
 564         if (!voltage_gpio){
 565                 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
 566                 return 1;
 567         }
 568
 569         /* OF only reports the high frequency */
 570         hi_freq = cur_freq;
 571         low_freq = cur_freq/2;
 572
 573         /* Read actual frequency from CPU */
 574         cur_freq = dfs_get_cpu_speed();
 575         set_speed_proc = dfs_set_cpu_speed;
 576         get_speed_proc = dfs_get_cpu_speed;
 577
 578         return 0;
 579 }
 580
 581 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
 582 {
 583         struct device_node *volt_gpio_np;
 584         u32 pvr;
 585         const u32 *value;
 586
 587         if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
 588                 return 1;
 589
 590         hi_freq = cur_freq;
 591         value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
 592         if (!value)
 593                 return 1;
 594         low_freq = (*value) / 1000;
 595
 596         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
 597         if (volt_gpio_np)
 598                 voltage_gpio = read_gpio(volt_gpio_np);
 599
 600         pvr = mfspr(SPRN_PVR);
 601         has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
 602
 603         set_speed_proc = cpu_750fx_cpu_speed;
 604         get_speed_proc = cpu_750fx_get_cpu_speed;
 605         cur_freq = cpu_750fx_get_cpu_speed();
 606
 607         return 0;
 608 }
 609
 610 /* Currently, we support the following machines:
 611  *
 612  *  - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
 613  *  - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
 614  *  - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
 615  *  - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
 616  *  - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
 617  *  - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
 618  *  - Recent MacRISC3 laptops
 619  *  - All new machines with 7447A CPUs
 620  */
 621 static int __init pmac_cpufreq_setup(void)
 622 {
 623         struct device_node      *cpunode;
 624         const u32               *value;
 625
 626         if (strstr(cmd_line, "nocpufreq"))
 627                 return 0;
 628
 629         /* Get first CPU node */
 630         cpunode = of_cpu_device_node_get(0);
 631         if (!cpunode)
 632                 goto out;
 633
 634         /* Get current cpu clock freq */
 635         value = of_get_property(cpunode, "clock-frequency", NULL);
 636         if (!value)
 637                 goto out;
 638         cur_freq = (*value) / 1000;
 639         transition_latency = CPUFREQ_ETERNAL;
 640
 641         /*  Check for 7447A based MacRISC3 */
 642         if (of_machine_is_compatible("MacRISC3") &&
 643             of_get_property(cpunode, "dynamic-power-step", NULL) &&
 644             PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
 645                 pmac_cpufreq_init_7447A(cpunode);
 646                 transition_latency = 8000000;
 647         /* Check for other MacRISC3 machines */
 648         } else if (of_machine_is_compatible("PowerBook3,4") ||
 649                    of_machine_is_compatible("PowerBook3,5") ||
 650                    of_machine_is_compatible("MacRISC3")) {
 651                 pmac_cpufreq_init_MacRISC3(cpunode);
 652         /* Else check for iBook2 500/600 */
 653         } else if (of_machine_is_compatible("PowerBook4,1")) {
 654                 hi_freq = cur_freq;
 655                 low_freq = 400000;
 656                 set_speed_proc = pmu_set_cpu_speed;
 657                 is_pmu_based = 1;
 658         }
 659         /* Else check for TiPb 550 */
 660         else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
 661                 hi_freq = cur_freq;
 662                 low_freq = 500000;
 663                 set_speed_proc = pmu_set_cpu_speed;
 664                 is_pmu_based = 1;
 665         }
 666         /* Else check for TiPb 400 & 500 */
 667         else if (of_machine_is_compatible("PowerBook3,2")) {
 668                 /* We only know about the 400 MHz and the 500Mhz model
 669                  * they both have 300 MHz as low frequency
 670                  */
 671                 if (cur_freq < 350000 || cur_freq > 550000)
 672                         goto out;
 673                 hi_freq = cur_freq;
 674                 low_freq = 300000;
 675                 set_speed_proc = pmu_set_cpu_speed;
 676                 is_pmu_based = 1;
 677         }
 678         /* Else check for 750FX */
 679         else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
 680                 pmac_cpufreq_init_750FX(cpunode);
 681 out:
 682         of_node_put(cpunode);
 683         if (set_speed_proc == NULL)
 684                 return -ENODEV;
 685
 686         pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
 687         pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
 688         ppc_proc_freq = cur_freq * 1000ul;
 689
 690         printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
 691         printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
 692                low_freq/1000, hi_freq/1000, cur_freq/1000);
 693
 694         return cpufreq_register_driver(&pmac_cpufreq_driver);
 695 }
 696
 697 module_init(pmac_cpufreq_setup);
 698