2 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * TODO: Need a big cleanup here. Basically, we need to have different
10 * cpufreq_driver structures for the different type of HW instead of the
11 * current mess. We also need to better deal with the detection of the
16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18 #include <linux/module.h>
19 #include <linux/types.h>
20 #include <linux/errno.h>
21 #include <linux/kernel.h>
22 #include <linux/delay.h>
23 #include <linux/sched.h>
24 #include <linux/adb.h>
25 #include <linux/pmu.h>
26 #include <linux/cpufreq.h>
27 #include <linux/init.h>
28 #include <linux/device.h>
29 #include <linux/hardirq.h>
30 #include <linux/of_device.h>
32 #include <asm/machdep.h>
34 #include <asm/pmac_feature.h>
35 #include <asm/mmu_context.h>
36 #include <asm/sections.h>
37 #include <asm/cputable.h>
40 #include <asm/keylargo.h>
41 #include <asm/switch_to.h>
43 /* WARNING !!! This will cause calibrate_delay() to be called,
44 * but this is an __init function ! So you MUST go edit
45 * init/main.c to make it non-init before enabling DEBUG_FREQ
49 extern void low_choose_7447a_dfs(int dfs
);
50 extern void low_choose_750fx_pll(int pll
);
51 extern void low_sleep_handler(void);
54 * Currently, PowerMac cpufreq supports only high & low frequencies
55 * that are set by the firmware
57 static unsigned int low_freq
;
58 static unsigned int hi_freq
;
59 static unsigned int cur_freq
;
60 static unsigned int sleep_freq
;
61 static unsigned long transition_latency
;
64 * Different models uses different mechanisms to switch the frequency
66 static int (*set_speed_proc
)(int low_speed
);
67 static unsigned int (*get_speed_proc
)(void);
70 * Some definitions used by the various speedprocs
72 static u32 voltage_gpio
;
73 static u32 frequency_gpio
;
74 static u32 slew_done_gpio
;
75 static int no_schedule
;
76 static int has_cpu_l2lve
;
77 static int is_pmu_based
;
79 /* There are only two frequency states for each processor. Values
80 * are in kHz for the time being.
82 #define CPUFREQ_HIGH 0
85 static struct cpufreq_frequency_table pmac_cpu_freqs
[] = {
88 {0, 0, CPUFREQ_TABLE_END
},
91 static inline void local_delay(unsigned long ms
)
100 static inline void debug_calc_bogomips(void)
102 /* This will cause a recalc of bogomips and display the
103 * result. We backup/restore the value to avoid affecting the
104 * core cpufreq framework's own calculation.
106 unsigned long save_lpj
= loops_per_jiffy
;
108 loops_per_jiffy
= save_lpj
;
110 #endif /* DEBUG_FREQ */
112 /* Switch CPU speed under 750FX CPU control
114 static int cpu_750fx_cpu_speed(int low_speed
)
118 if (low_speed
== 0) {
119 /* ramping up, set voltage first */
120 pmac_call_feature(PMAC_FTR_WRITE_GPIO
, NULL
, voltage_gpio
, 0x05);
121 /* Make sure we sleep for at least 1ms */
124 /* tweak L2 for high voltage */
126 hid2
= mfspr(SPRN_HID2
);
128 mtspr(SPRN_HID2
, hid2
);
131 #ifdef CONFIG_PPC_BOOK3S_32
132 low_choose_750fx_pll(low_speed
);
134 if (low_speed
== 1) {
135 /* tweak L2 for low voltage */
137 hid2
= mfspr(SPRN_HID2
);
139 mtspr(SPRN_HID2
, hid2
);
142 /* ramping down, set voltage last */
143 pmac_call_feature(PMAC_FTR_WRITE_GPIO
, NULL
, voltage_gpio
, 0x04);
150 static unsigned int cpu_750fx_get_cpu_speed(void)
152 if (mfspr(SPRN_HID1
) & HID1_PS
)
158 /* Switch CPU speed using DFS */
159 static int dfs_set_cpu_speed(int low_speed
)
161 if (low_speed
== 0) {
162 /* ramping up, set voltage first */
163 pmac_call_feature(PMAC_FTR_WRITE_GPIO
, NULL
, voltage_gpio
, 0x05);
164 /* Make sure we sleep for at least 1ms */
169 #ifdef CONFIG_PPC_BOOK3S_32
170 low_choose_7447a_dfs(low_speed
);
174 if (low_speed
== 1) {
175 /* ramping down, set voltage last */
176 pmac_call_feature(PMAC_FTR_WRITE_GPIO
, NULL
, voltage_gpio
, 0x04);
183 static unsigned int dfs_get_cpu_speed(void)
185 if (mfspr(SPRN_HID1
) & HID1_DFS
)
192 /* Switch CPU speed using slewing GPIOs
194 static int gpios_set_cpu_speed(int low_speed
)
196 int gpio
, timeout
= 0;
198 /* If ramping up, set voltage first */
199 if (low_speed
== 0) {
200 pmac_call_feature(PMAC_FTR_WRITE_GPIO
, NULL
, voltage_gpio
, 0x05);
201 /* Delay is way too big but it's ok, we schedule */
206 gpio
= pmac_call_feature(PMAC_FTR_READ_GPIO
, NULL
, frequency_gpio
, 0);
207 if (low_speed
== ((gpio
& 0x01) == 0))
210 pmac_call_feature(PMAC_FTR_WRITE_GPIO
, NULL
, frequency_gpio
,
211 low_speed
? 0x04 : 0x05);
217 gpio
= pmac_call_feature(PMAC_FTR_READ_GPIO
, NULL
, slew_done_gpio
, 0);
218 } while((gpio
& 0x02) == 0);
220 /* If ramping down, set voltage last */
221 if (low_speed
== 1) {
222 pmac_call_feature(PMAC_FTR_WRITE_GPIO
, NULL
, voltage_gpio
, 0x04);
223 /* Delay is way too big but it's ok, we schedule */
228 debug_calc_bogomips();
234 /* Switch CPU speed under PMU control
236 static int pmu_set_cpu_speed(int low_speed
)
238 struct adb_request req
;
239 unsigned long save_l2cr
;
240 unsigned long save_l3cr
;
241 unsigned int pic_prio
;
247 printk(KERN_DEBUG
"HID1, before: %x\n", mfspr(SPRN_HID1
));
251 /* Disable all interrupt sources on openpic */
252 pic_prio
= mpic_cpu_get_priority();
253 mpic_cpu_set_priority(0xf);
255 /* Make sure the decrementer won't interrupt us */
256 asm volatile("mtdec %0" : : "r" (0x7fffffff));
257 /* Make sure any pending DEC interrupt occurring while we did
258 * the above didn't re-enable the DEC */
260 asm volatile("mtdec %0" : : "r" (0x7fffffff));
262 /* We can now disable MSR_EE */
263 local_irq_save(flags
);
265 /* Giveup the FPU & vec */
268 #ifdef CONFIG_ALTIVEC
269 if (cpu_has_feature(CPU_FTR_ALTIVEC
))
270 enable_kernel_altivec();
271 #endif /* CONFIG_ALTIVEC */
273 /* Save & disable L2 and L3 caches */
274 save_l3cr
= _get_L3CR(); /* (returns -1 if not available) */
275 save_l2cr
= _get_L2CR(); /* (returns -1 if not available) */
277 /* Send the new speed command. My assumption is that this command
278 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
280 pmu_request(&req
, NULL
, 6, PMU_CPU_SPEED
, 'W', 'O', 'O', 'F', low_speed
);
281 while (!req
.complete
)
284 /* Prepare the northbridge for the speed transition */
285 pmac_call_feature(PMAC_FTR_SLEEP_STATE
,NULL
,1,1);
287 /* Call low level code to backup CPU state and recover from
292 /* Restore the northbridge */
293 pmac_call_feature(PMAC_FTR_SLEEP_STATE
,NULL
,1,0);
295 /* Restore L2 cache */
296 if (save_l2cr
!= 0xffffffff && (save_l2cr
& L2CR_L2E
) != 0)
297 _set_L2CR(save_l2cr
);
298 /* Restore L3 cache */
299 if (save_l3cr
!= 0xffffffff && (save_l3cr
& L3CR_L3E
) != 0)
300 _set_L3CR(save_l3cr
);
302 /* Restore userland MMU context */
303 switch_mmu_context(NULL
, current
->active_mm
, NULL
);
306 printk(KERN_DEBUG
"HID1, after: %x\n", mfspr(SPRN_HID1
));
309 /* Restore low level PMU operations */
313 * Restore decrementer; we'll take a decrementer interrupt
314 * as soon as interrupts are re-enabled and the generic
315 * clockevents code will reprogram it with the right value.
319 /* Restore interrupts */
320 mpic_cpu_set_priority(pic_prio
);
322 /* Let interrupts flow again ... */
323 local_irq_restore(flags
);
326 debug_calc_bogomips();
336 static int do_set_cpu_speed(struct cpufreq_policy
*policy
, int speed_mode
)
339 static unsigned long prev_l3cr
;
341 if (speed_mode
== CPUFREQ_LOW
&&
342 cpu_has_feature(CPU_FTR_L3CR
)) {
344 if (l3cr
& L3CR_L3E
) {
349 set_speed_proc(speed_mode
== CPUFREQ_LOW
);
350 if (speed_mode
== CPUFREQ_HIGH
&&
351 cpu_has_feature(CPU_FTR_L3CR
)) {
353 if ((prev_l3cr
& L3CR_L3E
) && l3cr
!= prev_l3cr
)
354 _set_L3CR(prev_l3cr
);
356 cur_freq
= (speed_mode
== CPUFREQ_HIGH
) ? hi_freq
: low_freq
;
361 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu
)
366 static int pmac_cpufreq_target( struct cpufreq_policy
*policy
,
371 rc
= do_set_cpu_speed(policy
, index
);
373 ppc_proc_freq
= cur_freq
* 1000ul;
377 static int pmac_cpufreq_cpu_init(struct cpufreq_policy
*policy
)
379 return cpufreq_generic_init(policy
, pmac_cpu_freqs
, transition_latency
);
382 static u32
read_gpio(struct device_node
*np
)
384 const u32
*reg
= of_get_property(np
, "reg", NULL
);
389 /* That works for all keylargos but shall be fixed properly
390 * some day... The problem is that it seems we can't rely
391 * on the "reg" property of the GPIO nodes, they are either
392 * relative to the base of KeyLargo or to the base of the
393 * GPIO space, and the device-tree doesn't help.
396 if (offset
< KEYLARGO_GPIO_LEVELS0
)
397 offset
+= KEYLARGO_GPIO_LEVELS0
;
401 static int pmac_cpufreq_suspend(struct cpufreq_policy
*policy
)
403 /* Ok, this could be made a bit smarter, but let's be robust for now. We
404 * always force a speed change to high speed before sleep, to make sure
405 * we have appropriate voltage and/or bus speed for the wakeup process,
406 * and to make sure our loops_per_jiffies are "good enough", that is will
407 * not cause too short delays if we sleep in low speed and wake in high
411 sleep_freq
= cur_freq
;
412 if (cur_freq
== low_freq
&& !is_pmu_based
)
413 do_set_cpu_speed(policy
, CPUFREQ_HIGH
);
417 static int pmac_cpufreq_resume(struct cpufreq_policy
*policy
)
419 /* If we resume, first check if we have a get() function */
421 cur_freq
= get_speed_proc();
425 /* We don't, hrm... we don't really know our speed here, best
426 * is that we force a switch to whatever it was, which is
427 * probably high speed due to our suspend() routine
429 do_set_cpu_speed(policy
, sleep_freq
== low_freq
?
430 CPUFREQ_LOW
: CPUFREQ_HIGH
);
432 ppc_proc_freq
= cur_freq
* 1000ul;
438 static struct cpufreq_driver pmac_cpufreq_driver
= {
439 .verify
= cpufreq_generic_frequency_table_verify
,
440 .target_index
= pmac_cpufreq_target
,
441 .get
= pmac_cpufreq_get_speed
,
442 .init
= pmac_cpufreq_cpu_init
,
443 .suspend
= pmac_cpufreq_suspend
,
444 .resume
= pmac_cpufreq_resume
,
445 .flags
= CPUFREQ_PM_NO_WARN
|
446 CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING
,
447 .attr
= cpufreq_generic_attr
,
452 static int pmac_cpufreq_init_MacRISC3(struct device_node
*cpunode
)
454 struct device_node
*volt_gpio_np
= of_find_node_by_name(NULL
,
456 struct device_node
*freq_gpio_np
= of_find_node_by_name(NULL
,
458 struct device_node
*slew_done_gpio_np
= of_find_node_by_name(NULL
,
463 * Check to see if it's GPIO driven or PMU only
465 * The way we extract the GPIO address is slightly hackish, but it
466 * works well enough for now. We need to abstract the whole GPIO
467 * stuff sooner or later anyway
471 voltage_gpio
= read_gpio(volt_gpio_np
);
473 frequency_gpio
= read_gpio(freq_gpio_np
);
474 if (slew_done_gpio_np
)
475 slew_done_gpio
= read_gpio(slew_done_gpio_np
);
477 /* If we use the frequency GPIOs, calculate the min/max speeds based
478 * on the bus frequencies
480 if (frequency_gpio
&& slew_done_gpio
) {
482 const u32
*freqs
, *ratio
;
484 freqs
= of_get_property(cpunode
, "bus-frequencies", &lenp
);
486 if (freqs
== NULL
|| lenp
!= 2) {
487 pr_err("bus-frequencies incorrect or missing\n");
490 ratio
= of_get_property(cpunode
, "processor-to-bus-ratio*2",
493 pr_err("processor-to-bus-ratio*2 missing\n");
497 /* Get the min/max bus frequencies */
498 low_freq
= min(freqs
[0], freqs
[1]);
499 hi_freq
= max(freqs
[0], freqs
[1]);
501 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
502 * frequency, it claims it to be around 84Mhz on some models while
503 * it appears to be approx. 101Mhz on all. Let's hack around here...
504 * fortunately, we don't need to be too precise
506 if (low_freq
< 98000000)
507 low_freq
= 101000000;
509 /* Convert those to CPU core clocks */
510 low_freq
= (low_freq
* (*ratio
)) / 2000;
511 hi_freq
= (hi_freq
* (*ratio
)) / 2000;
513 /* Now we get the frequencies, we read the GPIO to see what is out current
516 rc
= pmac_call_feature(PMAC_FTR_READ_GPIO
, NULL
, frequency_gpio
, 0);
517 cur_freq
= (rc
& 0x01) ? hi_freq
: low_freq
;
519 set_speed_proc
= gpios_set_cpu_speed
;
523 /* If we use the PMU, look for the min & max frequencies in the
526 value
= of_get_property(cpunode
, "min-clock-frequency", NULL
);
529 low_freq
= (*value
) / 1000;
530 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
532 if (low_freq
< 100000)
535 value
= of_get_property(cpunode
, "max-clock-frequency", NULL
);
538 hi_freq
= (*value
) / 1000;
539 set_speed_proc
= pmu_set_cpu_speed
;
545 static int pmac_cpufreq_init_7447A(struct device_node
*cpunode
)
547 struct device_node
*volt_gpio_np
;
549 if (of_get_property(cpunode
, "dynamic-power-step", NULL
) == NULL
)
552 volt_gpio_np
= of_find_node_by_name(NULL
, "cpu-vcore-select");
554 voltage_gpio
= read_gpio(volt_gpio_np
);
555 of_node_put(volt_gpio_np
);
557 pr_err("missing cpu-vcore-select gpio\n");
561 /* OF only reports the high frequency */
563 low_freq
= cur_freq
/2;
565 /* Read actual frequency from CPU */
566 cur_freq
= dfs_get_cpu_speed();
567 set_speed_proc
= dfs_set_cpu_speed
;
568 get_speed_proc
= dfs_get_cpu_speed
;
573 static int pmac_cpufreq_init_750FX(struct device_node
*cpunode
)
575 struct device_node
*volt_gpio_np
;
579 if (of_get_property(cpunode
, "dynamic-power-step", NULL
) == NULL
)
583 value
= of_get_property(cpunode
, "reduced-clock-frequency", NULL
);
586 low_freq
= (*value
) / 1000;
588 volt_gpio_np
= of_find_node_by_name(NULL
, "cpu-vcore-select");
590 voltage_gpio
= read_gpio(volt_gpio_np
);
592 of_node_put(volt_gpio_np
);
593 pvr
= mfspr(SPRN_PVR
);
594 has_cpu_l2lve
= !((pvr
& 0xf00) == 0x100);
596 set_speed_proc
= cpu_750fx_cpu_speed
;
597 get_speed_proc
= cpu_750fx_get_cpu_speed
;
598 cur_freq
= cpu_750fx_get_cpu_speed();
603 /* Currently, we support the following machines:
605 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
606 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
607 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
608 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
609 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
610 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
611 * - Recent MacRISC3 laptops
612 * - All new machines with 7447A CPUs
614 static int __init
pmac_cpufreq_setup(void)
616 struct device_node
*cpunode
;
619 if (strstr(boot_command_line
, "nocpufreq"))
622 /* Get first CPU node */
623 cpunode
= of_cpu_device_node_get(0);
627 /* Get current cpu clock freq */
628 value
= of_get_property(cpunode
, "clock-frequency", NULL
);
631 cur_freq
= (*value
) / 1000;
633 /* Check for 7447A based MacRISC3 */
634 if (of_machine_is_compatible("MacRISC3") &&
635 of_get_property(cpunode
, "dynamic-power-step", NULL
) &&
636 PVR_VER(mfspr(SPRN_PVR
)) == 0x8003) {
637 pmac_cpufreq_init_7447A(cpunode
);
639 /* Allow dynamic switching */
640 transition_latency
= 8000000;
641 pmac_cpufreq_driver
.flags
&= ~CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING
;
642 /* Check for other MacRISC3 machines */
643 } else if (of_machine_is_compatible("PowerBook3,4") ||
644 of_machine_is_compatible("PowerBook3,5") ||
645 of_machine_is_compatible("MacRISC3")) {
646 pmac_cpufreq_init_MacRISC3(cpunode
);
647 /* Else check for iBook2 500/600 */
648 } else if (of_machine_is_compatible("PowerBook4,1")) {
651 set_speed_proc
= pmu_set_cpu_speed
;
654 /* Else check for TiPb 550 */
655 else if (of_machine_is_compatible("PowerBook3,3") && cur_freq
== 550000) {
658 set_speed_proc
= pmu_set_cpu_speed
;
661 /* Else check for TiPb 400 & 500 */
662 else if (of_machine_is_compatible("PowerBook3,2")) {
663 /* We only know about the 400 MHz and the 500Mhz model
664 * they both have 300 MHz as low frequency
666 if (cur_freq
< 350000 || cur_freq
> 550000)
670 set_speed_proc
= pmu_set_cpu_speed
;
673 /* Else check for 750FX */
674 else if (PVR_VER(mfspr(SPRN_PVR
)) == 0x7000)
675 pmac_cpufreq_init_750FX(cpunode
);
677 of_node_put(cpunode
);
678 if (set_speed_proc
== NULL
)
681 pmac_cpu_freqs
[CPUFREQ_LOW
].frequency
= low_freq
;
682 pmac_cpu_freqs
[CPUFREQ_HIGH
].frequency
= hi_freq
;
683 ppc_proc_freq
= cur_freq
* 1000ul;
685 pr_info("Registering PowerMac CPU frequency driver\n");
686 pr_info("Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
687 low_freq
/1000, hi_freq
/1000, cur_freq
/1000);
689 return cpufreq_register_driver(&pmac_cpufreq_driver
);
692 module_init(pmac_cpufreq_setup
);