drivers/crypto/Kconfig

   1 # SPDX-License-Identifier: GPL-2.0-only
   2
   3 menuconfig CRYPTO_HW
   4         bool "Hardware crypto devices"
   5         default y
   6         ---help---
   7           Say Y here to get to see options for hardware crypto devices and
   8           processors. This option alone does not add any kernel code.
   9
  10           If you say N, all options in this submenu will be skipped and disabled.
  11
  12 if CRYPTO_HW
  13
  14 source "drivers/crypto/allwinner/Kconfig"
  15
  16 config CRYPTO_DEV_PADLOCK
  17         tristate "Support for VIA PadLock ACE"
  18         depends on X86 && !UML
  19         help
  20           Some VIA processors come with an integrated crypto engine
  21           (so called VIA PadLock ACE, Advanced Cryptography Engine)
  22           that provides instructions for very fast cryptographic
  23           operations with supported algorithms.
  24
  25           The instructions are used only when the CPU supports them.
  26           Otherwise software encryption is used.
  27
  28 config CRYPTO_DEV_PADLOCK_AES
  29         tristate "PadLock driver for AES algorithm"
  30         depends on CRYPTO_DEV_PADLOCK
  31         select CRYPTO_SKCIPHER
  32         select CRYPTO_LIB_AES
  33         help
  34           Use VIA PadLock for AES algorithm.
  35
  36           Available in VIA C3 and newer CPUs.
  37
  38           If unsure say M. The compiled module will be
  39           called padlock-aes.
  40
  41 config CRYPTO_DEV_PADLOCK_SHA
  42         tristate "PadLock driver for SHA1 and SHA256 algorithms"
  43         depends on CRYPTO_DEV_PADLOCK
  44         select CRYPTO_HASH
  45         select CRYPTO_SHA1
  46         select CRYPTO_SHA256
  47         help
  48           Use VIA PadLock for SHA1/SHA256 algorithms.
  49
  50           Available in VIA C7 and newer processors.
  51
  52           If unsure say M. The compiled module will be
  53           called padlock-sha.
  54
  55 config CRYPTO_DEV_GEODE
  56         tristate "Support for the Geode LX AES engine"
  57         depends on X86_32 && PCI
  58         select CRYPTO_ALGAPI
  59         select CRYPTO_SKCIPHER
  60         help
  61           Say 'Y' here to use the AMD Geode LX processor on-board AES
  62           engine for the CryptoAPI AES algorithm.
  63
  64           To compile this driver as a module, choose M here: the module
  65           will be called geode-aes.
  66
  67 config ZCRYPT
  68         tristate "Support for s390 cryptographic adapters"
  69         depends on S390
  70         select HW_RANDOM
  71         help
  72           Select this option if you want to enable support for
  73           s390 cryptographic adapters like:
  74           + PCI-X Cryptographic Coprocessor (PCIXCC)
  75           + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
  76           + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
  77           + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
  78
  79 config ZCRYPT_MULTIDEVNODES
  80         bool "Support for multiple zcrypt device nodes"
  81         default y
  82         depends on S390
  83         depends on ZCRYPT
  84         help
  85           With this option enabled the zcrypt device driver can
  86           provide multiple devices nodes in /dev. Each device
  87           node can get customized to limit access and narrow
  88           down the use of the available crypto hardware.
  89
  90 config PKEY
  91         tristate "Kernel API for protected key handling"
  92         depends on S390
  93         depends on ZCRYPT
  94         help
  95           With this option enabled the pkey kernel module provides an API
  96           for creation and handling of protected keys. Other parts of the
  97           kernel or userspace applications may use these functions.
  98
  99           Select this option if you want to enable the kernel and userspace
 100           API for proteced key handling.
 101
 102           Please note that creation of protected keys from secure keys
 103           requires to have at least one CEX card in coprocessor mode
 104           available at runtime.
 105
 106 config CRYPTO_PAES_S390
 107         tristate "PAES cipher algorithms"
 108         depends on S390
 109         depends on ZCRYPT
 110         depends on PKEY
 111         select CRYPTO_ALGAPI
 112         select CRYPTO_SKCIPHER
 113         help
 114           This is the s390 hardware accelerated implementation of the
 115           AES cipher algorithms for use with protected key.
 116
 117           Select this option if you want to use the paes cipher
 118           for example to use protected key encrypted devices.
 119
 120 config CRYPTO_SHA1_S390
 121         tristate "SHA1 digest algorithm"
 122         depends on S390
 123         select CRYPTO_HASH
 124         help
 125           This is the s390 hardware accelerated implementation of the
 126           SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
 127
 128           It is available as of z990.
 129
 130 config CRYPTO_SHA256_S390
 131         tristate "SHA256 digest algorithm"
 132         depends on S390
 133         select CRYPTO_HASH
 134         help
 135           This is the s390 hardware accelerated implementation of the
 136           SHA256 secure hash standard (DFIPS 180-2).
 137
 138           It is available as of z9.
 139
 140 config CRYPTO_SHA512_S390
 141         tristate "SHA384 and SHA512 digest algorithm"
 142         depends on S390
 143         select CRYPTO_HASH
 144         help
 145           This is the s390 hardware accelerated implementation of the
 146           SHA512 secure hash standard.
 147
 148           It is available as of z10.
 149
 150 config CRYPTO_SHA3_256_S390
 151         tristate "SHA3_224 and SHA3_256 digest algorithm"
 152         depends on S390
 153         select CRYPTO_HASH
 154         help
 155           This is the s390 hardware accelerated implementation of the
 156           SHA3_256 secure hash standard.
 157
 158           It is available as of z14.
 159
 160 config CRYPTO_SHA3_512_S390
 161         tristate "SHA3_384 and SHA3_512 digest algorithm"
 162         depends on S390
 163         select CRYPTO_HASH
 164         help
 165           This is the s390 hardware accelerated implementation of the
 166           SHA3_512 secure hash standard.
 167
 168           It is available as of z14.
 169
 170 config CRYPTO_DES_S390
 171         tristate "DES and Triple DES cipher algorithms"
 172         depends on S390
 173         select CRYPTO_ALGAPI
 174         select CRYPTO_SKCIPHER
 175         select CRYPTO_LIB_DES
 176         help
 177           This is the s390 hardware accelerated implementation of the
 178           DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
 179
 180           As of z990 the ECB and CBC mode are hardware accelerated.
 181           As of z196 the CTR mode is hardware accelerated.
 182
 183 config CRYPTO_AES_S390
 184         tristate "AES cipher algorithms"
 185         depends on S390
 186         select CRYPTO_ALGAPI
 187         select CRYPTO_SKCIPHER
 188         help
 189           This is the s390 hardware accelerated implementation of the
 190           AES cipher algorithms (FIPS-197).
 191
 192           As of z9 the ECB and CBC modes are hardware accelerated
 193           for 128 bit keys.
 194           As of z10 the ECB and CBC modes are hardware accelerated
 195           for all AES key sizes.
 196           As of z196 the CTR mode is hardware accelerated for all AES
 197           key sizes and XTS mode is hardware accelerated for 256 and
 198           512 bit keys.
 199
 200 config S390_PRNG
 201         tristate "Pseudo random number generator device driver"
 202         depends on S390
 203         default "m"
 204         help
 205           Select this option if you want to use the s390 pseudo random number
 206           generator. The PRNG is part of the cryptographic processor functions
 207           and uses triple-DES to generate secure random numbers like the
 208           ANSI X9.17 standard. User-space programs access the
 209           pseudo-random-number device through the char device /dev/prandom.
 210
 211           It is available as of z9.
 212
 213 config CRYPTO_GHASH_S390
 214         tristate "GHASH hash function"
 215         depends on S390
 216         select CRYPTO_HASH
 217         help
 218           This is the s390 hardware accelerated implementation of GHASH,
 219           the hash function used in GCM (Galois/Counter mode).
 220
 221           It is available as of z196.
 222
 223 config CRYPTO_CRC32_S390
 224         tristate "CRC-32 algorithms"
 225         depends on S390
 226         select CRYPTO_HASH
 227         select CRC32
 228         help
 229           Select this option if you want to use hardware accelerated
 230           implementations of CRC algorithms.  With this option, you
 231           can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
 232           and CRC-32C (Castagnoli).
 233
 234           It is available with IBM z13 or later.
 235
 236 config CRYPTO_DEV_NIAGARA2
 237         tristate "Niagara2 Stream Processing Unit driver"
 238         select CRYPTO_LIB_DES
 239         select CRYPTO_SKCIPHER
 240         select CRYPTO_HASH
 241         select CRYPTO_MD5
 242         select CRYPTO_SHA1
 243         select CRYPTO_SHA256
 244         depends on SPARC64
 245         help
 246           Each core of a Niagara2 processor contains a Stream
 247           Processing Unit, which itself contains several cryptographic
 248           sub-units.  One set provides the Modular Arithmetic Unit,
 249           used for SSL offload.  The other set provides the Cipher
 250           Group, which can perform encryption, decryption, hashing,
 251           checksumming, and raw copies.
 252
 253 config CRYPTO_DEV_HIFN_795X
 254         tristate "Driver HIFN 795x crypto accelerator chips"
 255         select CRYPTO_LIB_DES
 256         select CRYPTO_SKCIPHER
 257         select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
 258         depends on PCI
 259         depends on !ARCH_DMA_ADDR_T_64BIT
 260         help
 261           This option allows you to have support for HIFN 795x crypto adapters.
 262
 263 config CRYPTO_DEV_HIFN_795X_RNG
 264         bool "HIFN 795x random number generator"
 265         depends on CRYPTO_DEV_HIFN_795X
 266         help
 267           Select this option if you want to enable the random number generator
 268           on the HIFN 795x crypto adapters.
 269
 270 source "drivers/crypto/caam/Kconfig"
 271
 272 config CRYPTO_DEV_TALITOS
 273         tristate "Talitos Freescale Security Engine (SEC)"
 274         select CRYPTO_AEAD
 275         select CRYPTO_AUTHENC
 276         select CRYPTO_SKCIPHER
 277         select CRYPTO_HASH
 278         select CRYPTO_LIB_DES
 279         select HW_RANDOM
 280         depends on FSL_SOC
 281         help
 282           Say 'Y' here to use the Freescale Security Engine (SEC)
 283           to offload cryptographic algorithm computation.
 284
 285           The Freescale SEC is present on PowerQUICC 'E' processors, such
 286           as the MPC8349E and MPC8548E.
 287
 288           To compile this driver as a module, choose M here: the module
 289           will be called talitos.
 290
 291 config CRYPTO_DEV_TALITOS1
 292         bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
 293         depends on CRYPTO_DEV_TALITOS
 294         depends on PPC_8xx || PPC_82xx
 295         default y
 296         help
 297           Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
 298           found on MPC82xx or the Freescale Security Engine (SEC Lite)
 299           version 1.2 found on MPC8xx
 300
 301 config CRYPTO_DEV_TALITOS2
 302         bool "SEC2+ (SEC version 2.0 or upper)"
 303         depends on CRYPTO_DEV_TALITOS
 304         default y if !PPC_8xx
 305         help
 306           Say 'Y' here to use the Freescale Security Engine (SEC)
 307           version 2 and following as found on MPC83xx, MPC85xx, etc ...
 308
 309 config CRYPTO_DEV_IXP4XX
 310         tristate "Driver for IXP4xx crypto hardware acceleration"
 311         depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
 312         select CRYPTO_LIB_DES
 313         select CRYPTO_AEAD
 314         select CRYPTO_AUTHENC
 315         select CRYPTO_SKCIPHER
 316         help
 317           Driver for the IXP4xx NPE crypto engine.
 318
 319 config CRYPTO_DEV_PPC4XX
 320         tristate "Driver AMCC PPC4xx crypto accelerator"
 321         depends on PPC && 4xx
 322         select CRYPTO_HASH
 323         select CRYPTO_AEAD
 324         select CRYPTO_AES
 325         select CRYPTO_LIB_AES
 326         select CRYPTO_CCM
 327         select CRYPTO_CTR
 328         select CRYPTO_GCM
 329         select CRYPTO_SKCIPHER
 330         help
 331           This option allows you to have support for AMCC crypto acceleration.
 332
 333 config HW_RANDOM_PPC4XX
 334         bool "PowerPC 4xx generic true random number generator support"
 335         depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
 336         default y
 337         ---help---
 338          This option provides the kernel-side support for the TRNG hardware
 339          found in the security function of some PowerPC 4xx SoCs.
 340
 341 config CRYPTO_DEV_OMAP
 342         tristate "Support for OMAP crypto HW accelerators"
 343         depends on ARCH_OMAP2PLUS
 344         help
 345           OMAP processors have various crypto HW accelerators. Select this if
 346           you want to use the OMAP modules for any of the crypto algorithms.
 347
 348 if CRYPTO_DEV_OMAP
 349
 350 config CRYPTO_DEV_OMAP_SHAM
 351         tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
 352         depends on ARCH_OMAP2PLUS
 353         select CRYPTO_SHA1
 354         select CRYPTO_MD5
 355         select CRYPTO_SHA256
 356         select CRYPTO_SHA512
 357         select CRYPTO_HMAC
 358         help
 359           OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
 360           want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
 361
 362 config CRYPTO_DEV_OMAP_AES
 363         tristate "Support for OMAP AES hw engine"
 364         depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
 365         select CRYPTO_AES
 366         select CRYPTO_SKCIPHER
 367         select CRYPTO_ENGINE
 368         select CRYPTO_CBC
 369         select CRYPTO_ECB
 370         select CRYPTO_CTR
 371         select CRYPTO_AEAD
 372         help
 373           OMAP processors have AES module accelerator. Select this if you
 374           want to use the OMAP module for AES algorithms.
 375
 376 config CRYPTO_DEV_OMAP_DES
 377         tristate "Support for OMAP DES/3DES hw engine"
 378         depends on ARCH_OMAP2PLUS
 379         select CRYPTO_LIB_DES
 380         select CRYPTO_SKCIPHER
 381         select CRYPTO_ENGINE
 382         help
 383           OMAP processors have DES/3DES module accelerator. Select this if you
 384           want to use the OMAP module for DES and 3DES algorithms. Currently
 385           the ECB and CBC modes of operation are supported by the driver. Also
 386           accesses made on unaligned boundaries are supported.
 387
 388 endif # CRYPTO_DEV_OMAP
 389
 390 config CRYPTO_DEV_PICOXCELL
 391         tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
 392         depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
 393         select CRYPTO_AEAD
 394         select CRYPTO_AES
 395         select CRYPTO_AUTHENC
 396         select CRYPTO_SKCIPHER
 397         select CRYPTO_LIB_DES
 398         select CRYPTO_CBC
 399         select CRYPTO_ECB
 400         select CRYPTO_SEQIV
 401         help
 402           This option enables support for the hardware offload engines in the
 403           Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
 404           and for 3gpp Layer 2 ciphering support.
 405
 406           Saying m here will build a module named picoxcell_crypto.
 407
 408 config CRYPTO_DEV_SAHARA
 409         tristate "Support for SAHARA crypto accelerator"
 410         depends on ARCH_MXC && OF
 411         select CRYPTO_SKCIPHER
 412         select CRYPTO_AES
 413         select CRYPTO_ECB
 414         help
 415           This option enables support for the SAHARA HW crypto accelerator
 416           found in some Freescale i.MX chips.
 417
 418 config CRYPTO_DEV_EXYNOS_RNG
 419         tristate "Exynos HW pseudo random number generator support"
 420         depends on ARCH_EXYNOS || COMPILE_TEST
 421         depends on HAS_IOMEM
 422         select CRYPTO_RNG
 423         ---help---
 424           This driver provides kernel-side support through the
 425           cryptographic API for the pseudo random number generator hardware
 426           found on Exynos SoCs.
 427
 428           To compile this driver as a module, choose M here: the
 429           module will be called exynos-rng.
 430
 431           If unsure, say Y.
 432
 433 config CRYPTO_DEV_S5P
 434         tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
 435         depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
 436         depends on HAS_IOMEM
 437         select CRYPTO_AES
 438         select CRYPTO_SKCIPHER
 439         help
 440           This option allows you to have support for S5P crypto acceleration.
 441           Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
 442           algorithms execution.
 443
 444 config CRYPTO_DEV_EXYNOS_HASH
 445         bool "Support for Samsung Exynos HASH accelerator"
 446         depends on CRYPTO_DEV_S5P
 447         depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
 448         select CRYPTO_SHA1
 449         select CRYPTO_MD5
 450         select CRYPTO_SHA256
 451         help
 452           Select this to offload Exynos from HASH MD5/SHA1/SHA256.
 453           This will select software SHA1, MD5 and SHA256 as they are
 454           needed for small and zero-size messages.
 455           HASH algorithms will be disabled if EXYNOS_RNG
 456           is enabled due to hw conflict.
 457
 458 config CRYPTO_DEV_NX
 459         bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
 460         depends on PPC64
 461         help
 462           This enables support for the NX hardware cryptographic accelerator
 463           coprocessor that is in IBM PowerPC P7+ or later processors.  This
 464           does not actually enable any drivers, it only allows you to select
 465           which acceleration type (encryption and/or compression) to enable.
 466
 467 if CRYPTO_DEV_NX
 468         source "drivers/crypto/nx/Kconfig"
 469 endif
 470
 471 config CRYPTO_DEV_UX500
 472         tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
 473         depends on ARCH_U8500
 474         help
 475           Driver for ST-Ericsson UX500 crypto engine.
 476
 477 if CRYPTO_DEV_UX500
 478         source "drivers/crypto/ux500/Kconfig"
 479 endif # if CRYPTO_DEV_UX500
 480
 481 config CRYPTO_DEV_ATMEL_AUTHENC
 482         bool "Support for Atmel IPSEC/SSL hw accelerator"
 483         depends on ARCH_AT91 || COMPILE_TEST
 484         depends on CRYPTO_DEV_ATMEL_AES
 485         help
 486           Some Atmel processors can combine the AES and SHA hw accelerators
 487           to enhance support of IPSEC/SSL.
 488           Select this if you want to use the Atmel modules for
 489           authenc(hmac(shaX),Y(cbc)) algorithms.
 490
 491 config CRYPTO_DEV_ATMEL_AES
 492         tristate "Support for Atmel AES hw accelerator"
 493         depends on ARCH_AT91 || COMPILE_TEST
 494         select CRYPTO_AES
 495         select CRYPTO_AEAD
 496         select CRYPTO_SKCIPHER
 497         select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
 498         select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
 499         help
 500           Some Atmel processors have AES hw accelerator.
 501           Select this if you want to use the Atmel module for
 502           AES algorithms.
 503
 504           To compile this driver as a module, choose M here: the module
 505           will be called atmel-aes.
 506
 507 config CRYPTO_DEV_ATMEL_TDES
 508         tristate "Support for Atmel DES/TDES hw accelerator"
 509         depends on ARCH_AT91 || COMPILE_TEST
 510         select CRYPTO_LIB_DES
 511         select CRYPTO_SKCIPHER
 512         help
 513           Some Atmel processors have DES/TDES hw accelerator.
 514           Select this if you want to use the Atmel module for
 515           DES/TDES algorithms.
 516
 517           To compile this driver as a module, choose M here: the module
 518           will be called atmel-tdes.
 519
 520 config CRYPTO_DEV_ATMEL_SHA
 521         tristate "Support for Atmel SHA hw accelerator"
 522         depends on ARCH_AT91 || COMPILE_TEST
 523         select CRYPTO_HASH
 524         help
 525           Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
 526           hw accelerator.
 527           Select this if you want to use the Atmel module for
 528           SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
 529
 530           To compile this driver as a module, choose M here: the module
 531           will be called atmel-sha.
 532
 533 config CRYPTO_DEV_ATMEL_I2C
 534         tristate
 535
 536 config CRYPTO_DEV_ATMEL_ECC
 537         tristate "Support for Microchip / Atmel ECC hw accelerator"
 538         depends on I2C
 539         select CRYPTO_DEV_ATMEL_I2C
 540         select CRYPTO_ECDH
 541         select CRC16
 542         help
 543           Microhip / Atmel ECC hw accelerator.
 544           Select this if you want to use the Microchip / Atmel module for
 545           ECDH algorithm.
 546
 547           To compile this driver as a module, choose M here: the module
 548           will be called atmel-ecc.
 549
 550 config CRYPTO_DEV_ATMEL_SHA204A
 551         tristate "Support for Microchip / Atmel SHA accelerator and RNG"
 552         depends on I2C
 553         select CRYPTO_DEV_ATMEL_I2C
 554         select HW_RANDOM
 555         select CRC16
 556         help
 557           Microhip / Atmel SHA accelerator and RNG.
 558           Select this if you want to use the Microchip / Atmel SHA204A
 559           module as a random number generator. (Other functions of the
 560           chip are currently not exposed by this driver)
 561
 562           To compile this driver as a module, choose M here: the module
 563           will be called atmel-sha204a.
 564
 565 config CRYPTO_DEV_CCP
 566         bool "Support for AMD Secure Processor"
 567         depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
 568         help
 569           The AMD Secure Processor provides support for the Cryptographic Coprocessor
 570           (CCP) and the Platform Security Processor (PSP) devices.
 571
 572 if CRYPTO_DEV_CCP
 573         source "drivers/crypto/ccp/Kconfig"
 574 endif
 575
 576 config CRYPTO_DEV_MXS_DCP
 577         tristate "Support for Freescale MXS DCP"
 578         depends on (ARCH_MXS || ARCH_MXC)
 579         select STMP_DEVICE
 580         select CRYPTO_CBC
 581         select CRYPTO_ECB
 582         select CRYPTO_AES
 583         select CRYPTO_SKCIPHER
 584         select CRYPTO_HASH
 585         help
 586           The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
 587           co-processor on the die.
 588
 589           To compile this driver as a module, choose M here: the module
 590           will be called mxs-dcp.
 591
 592 source "drivers/crypto/qat/Kconfig"
 593 source "drivers/crypto/cavium/cpt/Kconfig"
 594 source "drivers/crypto/cavium/nitrox/Kconfig"
 595 source "drivers/crypto/marvell/Kconfig"
 596
 597 config CRYPTO_DEV_CAVIUM_ZIP
 598         tristate "Cavium ZIP driver"
 599         depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
 600         ---help---
 601           Select this option if you want to enable compression/decompression
 602           acceleration on Cavium's ARM based SoCs
 603
 604 config CRYPTO_DEV_QCE
 605         tristate "Qualcomm crypto engine accelerator"
 606         depends on ARCH_QCOM || COMPILE_TEST
 607         depends on HAS_IOMEM
 608         help
 609           This driver supports Qualcomm crypto engine accelerator
 610           hardware. To compile this driver as a module, choose M here. The
 611           module will be called qcrypto.
 612
 613 config CRYPTO_DEV_QCE_SKCIPHER
 614         bool
 615         depends on CRYPTO_DEV_QCE
 616         select CRYPTO_AES
 617         select CRYPTO_LIB_DES
 618         select CRYPTO_ECB
 619         select CRYPTO_CBC
 620         select CRYPTO_XTS
 621         select CRYPTO_CTR
 622         select CRYPTO_SKCIPHER
 623
 624 config CRYPTO_DEV_QCE_SHA
 625         bool
 626         depends on CRYPTO_DEV_QCE
 627
 628 choice
 629         prompt "Algorithms enabled for QCE acceleration"
 630         default CRYPTO_DEV_QCE_ENABLE_ALL
 631         depends on CRYPTO_DEV_QCE
 632         help
 633           This option allows to choose whether to build support for all algorihtms
 634           (default), hashes-only, or skciphers-only.
 635
 636           The QCE engine does not appear to scale as well as the CPU to handle
 637           multiple crypto requests.  While the ipq40xx chips have 4-core CPUs, the
 638           QCE handles only 2 requests in parallel.
 639
 640           Ipsec throughput seems to improve when disabling either family of
 641           algorithms, sharing the load with the CPU.  Enabling skciphers-only
 642           appears to work best.
 643
 644         config CRYPTO_DEV_QCE_ENABLE_ALL
 645                 bool "All supported algorithms"
 646                 select CRYPTO_DEV_QCE_SKCIPHER
 647                 select CRYPTO_DEV_QCE_SHA
 648                 help
 649                   Enable all supported algorithms:
 650                         - AES (CBC, CTR, ECB, XTS)
 651                         - 3DES (CBC, ECB)
 652                         - DES (CBC, ECB)
 653                         - SHA1, HMAC-SHA1
 654                         - SHA256, HMAC-SHA256
 655
 656         config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
 657                 bool "Symmetric-key ciphers only"
 658                 select CRYPTO_DEV_QCE_SKCIPHER
 659                 help
 660                   Enable symmetric-key ciphers only:
 661                         - AES (CBC, CTR, ECB, XTS)
 662                         - 3DES (ECB, CBC)
 663                         - DES (ECB, CBC)
 664
 665         config CRYPTO_DEV_QCE_ENABLE_SHA
 666                 bool "Hash/HMAC only"
 667                 select CRYPTO_DEV_QCE_SHA
 668                 help
 669                   Enable hashes/HMAC algorithms only:
 670                         - SHA1, HMAC-SHA1
 671                         - SHA256, HMAC-SHA256
 672
 673 endchoice
 674
 675 config CRYPTO_DEV_QCE_SW_MAX_LEN
 676         int "Default maximum request size to use software for AES"
 677         depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
 678         default 512
 679         help
 680           This sets the default maximum request size to perform AES requests
 681           using software instead of the crypto engine.  It can be changed by
 682           setting the aes_sw_max_len parameter.
 683
 684           Small blocks are processed faster in software than hardware.
 685           Considering the 256-bit ciphers, software is 2-3 times faster than
 686           qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
 687           With 128-bit keys, the break-even point would be around 1024-bytes.
 688
 689           The default is set a little lower, to 512 bytes, to balance the
 690           cost in CPU usage.  The minimum recommended setting is 16-bytes
 691           (1 AES block), since AES-GCM will fail if you set it lower.
 692           Setting this to zero will send all requests to the hardware.
 693
 694           Note that 192-bit keys are not supported by the hardware and are
 695           always processed by the software fallback, and all DES requests
 696           are done by the hardware.
 697
 698 config CRYPTO_DEV_QCOM_RNG
 699         tristate "Qualcomm Random Number Generator Driver"
 700         depends on ARCH_QCOM || COMPILE_TEST
 701         select CRYPTO_RNG
 702         help
 703           This driver provides support for the Random Number
 704           Generator hardware found on Qualcomm SoCs.
 705
 706           To compile this driver as a module, choose M here. The
 707           module will be called qcom-rng. If unsure, say N.
 708
 709 config CRYPTO_DEV_VMX
 710         bool "Support for VMX cryptographic acceleration instructions"
 711         depends on PPC64 && VSX
 712         help
 713           Support for VMX cryptographic acceleration instructions.
 714
 715 source "drivers/crypto/vmx/Kconfig"
 716
 717 config CRYPTO_DEV_IMGTEC_HASH
 718         tristate "Imagination Technologies hardware hash accelerator"
 719         depends on MIPS || COMPILE_TEST
 720         select CRYPTO_MD5
 721         select CRYPTO_SHA1
 722         select CRYPTO_SHA256
 723         select CRYPTO_HASH
 724         help
 725           This driver interfaces with the Imagination Technologies
 726           hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
 727           hashing algorithms.
 728
 729 config CRYPTO_DEV_ROCKCHIP
 730         tristate "Rockchip's Cryptographic Engine driver"
 731         depends on OF && ARCH_ROCKCHIP
 732         select CRYPTO_AES
 733         select CRYPTO_LIB_DES
 734         select CRYPTO_MD5
 735         select CRYPTO_SHA1
 736         select CRYPTO_SHA256
 737         select CRYPTO_HASH
 738         select CRYPTO_SKCIPHER
 739
 740         help
 741           This driver interfaces with the hardware crypto accelerator.
 742           Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
 743
 744 config CRYPTO_DEV_ZYNQMP_AES
 745         tristate "Support for Xilinx ZynqMP AES hw accelerator"
 746         depends on ZYNQMP_FIRMWARE || COMPILE_TEST
 747         select CRYPTO_AES
 748         select CRYPTO_ENGINE
 749         select CRYPTO_AEAD
 750         help
 751           Xilinx ZynqMP has AES-GCM engine used for symmetric key
 752           encryption and decryption. This driver interfaces with AES hw
 753           accelerator. Select this if you want to use the ZynqMP module
 754           for AES algorithms.
 755
 756 config CRYPTO_DEV_MEDIATEK
 757         tristate "MediaTek's EIP97 Cryptographic Engine driver"
 758         depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
 759         select CRYPTO_AES
 760         select CRYPTO_AEAD
 761         select CRYPTO_SKCIPHER
 762         select CRYPTO_CTR
 763         select CRYPTO_SHA1
 764         select CRYPTO_SHA256
 765         select CRYPTO_SHA512
 766         select CRYPTO_HMAC
 767         help
 768           This driver allows you to utilize the hardware crypto accelerator
 769           EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
 770           Select this if you want to use it for AES/SHA1/SHA2 algorithms.
 771
 772 source "drivers/crypto/chelsio/Kconfig"
 773
 774 source "drivers/crypto/virtio/Kconfig"
 775
 776 config CRYPTO_DEV_BCM_SPU
 777         tristate "Broadcom symmetric crypto/hash acceleration support"
 778         depends on ARCH_BCM_IPROC
 779         depends on MAILBOX
 780         default m
 781         select CRYPTO_AUTHENC
 782         select CRYPTO_LIB_DES
 783         select CRYPTO_MD5
 784         select CRYPTO_SHA1
 785         select CRYPTO_SHA256
 786         select CRYPTO_SHA512
 787         help
 788           This driver provides support for Broadcom crypto acceleration using the
 789           Secure Processing Unit (SPU). The SPU driver registers skcipher,
 790           ahash, and aead algorithms with the kernel cryptographic API.
 791
 792 source "drivers/crypto/stm32/Kconfig"
 793
 794 config CRYPTO_DEV_SAFEXCEL
 795         tristate "Inside Secure's SafeXcel cryptographic engine driver"
 796         depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
 797         select CRYPTO_LIB_AES
 798         select CRYPTO_AUTHENC
 799         select CRYPTO_SKCIPHER
 800         select CRYPTO_LIB_DES
 801         select CRYPTO_HASH
 802         select CRYPTO_HMAC
 803         select CRYPTO_MD5
 804         select CRYPTO_SHA1
 805         select CRYPTO_SHA256
 806         select CRYPTO_SHA512
 807         select CRYPTO_CHACHA20POLY1305
 808         select CRYPTO_SHA3
 809         help
 810           This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
 811           engines designed by Inside Secure. It currently accelerates DES, 3DES and
 812           AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
 813           SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
 814           Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
 815
 816 config CRYPTO_DEV_ARTPEC6
 817         tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
 818         depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
 819         depends on OF
 820         select CRYPTO_AEAD
 821         select CRYPTO_AES
 822         select CRYPTO_ALGAPI
 823         select CRYPTO_SKCIPHER
 824         select CRYPTO_CTR
 825         select CRYPTO_HASH
 826         select CRYPTO_SHA1
 827         select CRYPTO_SHA256
 828         select CRYPTO_SHA512
 829         help
 830           Enables the driver for the on-chip crypto accelerator
 831           of Axis ARTPEC SoCs.
 832
 833           To compile this driver as a module, choose M here.
 834
 835 config CRYPTO_DEV_CCREE
 836         tristate "Support for ARM TrustZone CryptoCell family of security processors"
 837         depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
 838         default n
 839         select CRYPTO_HASH
 840         select CRYPTO_SKCIPHER
 841         select CRYPTO_LIB_DES
 842         select CRYPTO_AEAD
 843         select CRYPTO_AUTHENC
 844         select CRYPTO_SHA1
 845         select CRYPTO_MD5
 846         select CRYPTO_SHA256
 847         select CRYPTO_SHA512
 848         select CRYPTO_HMAC
 849         select CRYPTO_AES
 850         select CRYPTO_CBC
 851         select CRYPTO_ECB
 852         select CRYPTO_CTR
 853         select CRYPTO_XTS
 854         select CRYPTO_SM4
 855         select CRYPTO_SM3
 856         help
 857           Say 'Y' to enable a driver for the REE interface of the Arm
 858           TrustZone CryptoCell family of processors. Currently the
 859           CryptoCell 713, 703, 712, 710 and 630 are supported.
 860           Choose this if you wish to use hardware acceleration of
 861           cryptographic operations on the system REE.
 862           If unsure say Y.
 863
 864 source "drivers/crypto/hisilicon/Kconfig"
 865
 866 source "drivers/crypto/amlogic/Kconfig"
 867
 868 endif # CRYPTO_HW