3 bool "Hardware crypto devices"
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
9 If you say N, all options in this submenu will be skipped and disabled.
13 config CRYPTO_DEV_PADLOCK
14 tristate "Support for VIA PadLock ACE"
15 depends on X86 && !UML
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
22 The instructions are used only when the CPU supports them.
23 Otherwise software encryption is used.
25 config CRYPTO_DEV_PADLOCK_AES
26 tristate "PadLock driver for AES algorithm"
27 depends on CRYPTO_DEV_PADLOCK
28 select CRYPTO_BLKCIPHER
31 Use VIA PadLock for AES algorithm.
33 Available in VIA C3 and newer CPUs.
35 If unsure say M. The compiled module will be
38 config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
45 Use VIA PadLock for SHA1/SHA256 algorithms.
47 Available in VIA C7 and newer processors.
49 If unsure say M. The compiled module will be
52 config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
54 depends on X86_32 && PCI
56 select CRYPTO_BLKCIPHER
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
59 engine for the CryptoAPI AES algorithm.
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
65 tristate "Support for s390 cryptographic adapters"
69 Select this option if you want to enable support for
70 s390 cryptographic adapters like:
71 + PCI-X Cryptographic Coprocessor (PCIXCC)
72 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
77 tristate "Kernel API for protected key handling"
81 With this option enabled the pkey kernel module provides an API
82 for creation and handling of protected keys. Other parts of the
83 kernel or userspace applications may use these functions.
85 Select this option if you want to enable the kernel and userspace
86 API for proteced key handling.
88 Please note that creation of protected keys from secure keys
89 requires to have at least one CEX card in coprocessor mode
92 config CRYPTO_SHA1_S390
93 tristate "SHA1 digest algorithm"
97 This is the s390 hardware accelerated implementation of the
98 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
100 It is available as of z990.
102 config CRYPTO_SHA256_S390
103 tristate "SHA256 digest algorithm"
107 This is the s390 hardware accelerated implementation of the
108 SHA256 secure hash standard (DFIPS 180-2).
110 It is available as of z9.
112 config CRYPTO_SHA512_S390
113 tristate "SHA384 and SHA512 digest algorithm"
117 This is the s390 hardware accelerated implementation of the
118 SHA512 secure hash standard.
120 It is available as of z10.
122 config CRYPTO_DES_S390
123 tristate "DES and Triple DES cipher algorithms"
126 select CRYPTO_BLKCIPHER
129 This is the s390 hardware accelerated implementation of the
130 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
132 As of z990 the ECB and CBC mode are hardware accelerated.
133 As of z196 the CTR mode is hardware accelerated.
135 config CRYPTO_AES_S390
136 tristate "AES cipher algorithms"
139 select CRYPTO_BLKCIPHER
142 This is the s390 hardware accelerated implementation of the
143 AES cipher algorithms (FIPS-197).
145 As of z9 the ECB and CBC modes are hardware accelerated
147 As of z10 the ECB and CBC modes are hardware accelerated
148 for all AES key sizes.
149 As of z196 the CTR mode is hardware accelerated for all AES
150 key sizes and XTS mode is hardware accelerated for 256 and
154 tristate "Pseudo random number generator device driver"
158 Select this option if you want to use the s390 pseudo random number
159 generator. The PRNG is part of the cryptographic processor functions
160 and uses triple-DES to generate secure random numbers like the
161 ANSI X9.17 standard. User-space programs access the
162 pseudo-random-number device through the char device /dev/prandom.
164 It is available as of z9.
166 config CRYPTO_GHASH_S390
167 tristate "GHASH digest algorithm"
171 This is the s390 hardware accelerated implementation of the
172 GHASH message digest algorithm for GCM (Galois/Counter Mode).
174 It is available as of z196.
176 config CRYPTO_CRC32_S390
177 tristate "CRC-32 algorithms"
182 Select this option if you want to use hardware accelerated
183 implementations of CRC algorithms. With this option, you
184 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
185 and CRC-32C (Castagnoli).
187 It is available with IBM z13 or later.
189 config CRYPTO_DEV_MV_CESA
190 tristate "Marvell's Cryptographic Engine"
191 depends on PLAT_ORION
193 select CRYPTO_BLKCIPHER
197 This driver allows you to utilize the Cryptographic Engines and
198 Security Accelerator (CESA) which can be found on the Marvell Orion
199 and Kirkwood SoCs, such as QNAP's TS-209.
201 Currently the driver supports AES in ECB and CBC mode without DMA.
203 config CRYPTO_DEV_MARVELL_CESA
204 tristate "New Marvell's Cryptographic Engine driver"
205 depends on PLAT_ORION || ARCH_MVEBU
208 select CRYPTO_BLKCIPHER
212 This driver allows you to utilize the Cryptographic Engines and
213 Security Accelerator (CESA) which can be found on the Armada 370.
214 This driver supports CPU offload through DMA transfers.
216 This driver is aimed at replacing the mv_cesa driver. This will only
217 happen once it has received proper testing.
219 config CRYPTO_DEV_NIAGARA2
220 tristate "Niagara2 Stream Processing Unit driver"
222 select CRYPTO_BLKCIPHER
229 Each core of a Niagara2 processor contains a Stream
230 Processing Unit, which itself contains several cryptographic
231 sub-units. One set provides the Modular Arithmetic Unit,
232 used for SSL offload. The other set provides the Cipher
233 Group, which can perform encryption, decryption, hashing,
234 checksumming, and raw copies.
236 config CRYPTO_DEV_HIFN_795X
237 tristate "Driver HIFN 795x crypto accelerator chips"
239 select CRYPTO_BLKCIPHER
240 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
242 depends on !ARCH_DMA_ADDR_T_64BIT
244 This option allows you to have support for HIFN 795x crypto adapters.
246 config CRYPTO_DEV_HIFN_795X_RNG
247 bool "HIFN 795x random number generator"
248 depends on CRYPTO_DEV_HIFN_795X
250 Select this option if you want to enable the random number generator
251 on the HIFN 795x crypto adapters.
253 source drivers/crypto/caam/Kconfig
255 config CRYPTO_DEV_TALITOS
256 tristate "Talitos Freescale Security Engine (SEC)"
258 select CRYPTO_AUTHENC
259 select CRYPTO_BLKCIPHER
264 Say 'Y' here to use the Freescale Security Engine (SEC)
265 to offload cryptographic algorithm computation.
267 The Freescale SEC is present on PowerQUICC 'E' processors, such
268 as the MPC8349E and MPC8548E.
270 To compile this driver as a module, choose M here: the module
271 will be called talitos.
273 config CRYPTO_DEV_TALITOS1
274 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
275 depends on CRYPTO_DEV_TALITOS
276 depends on PPC_8xx || PPC_82xx
279 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
280 found on MPC82xx or the Freescale Security Engine (SEC Lite)
281 version 1.2 found on MPC8xx
283 config CRYPTO_DEV_TALITOS2
284 bool "SEC2+ (SEC version 2.0 or upper)"
285 depends on CRYPTO_DEV_TALITOS
286 default y if !PPC_8xx
288 Say 'Y' here to use the Freescale Security Engine (SEC)
289 version 2 and following as found on MPC83xx, MPC85xx, etc ...
291 config CRYPTO_DEV_IXP4XX
292 tristate "Driver for IXP4xx crypto hardware acceleration"
293 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
296 select CRYPTO_AUTHENC
297 select CRYPTO_BLKCIPHER
299 Driver for the IXP4xx NPE crypto engine.
301 config CRYPTO_DEV_PPC4XX
302 tristate "Driver AMCC PPC4xx crypto accelerator"
303 depends on PPC && 4xx
305 select CRYPTO_BLKCIPHER
307 This option allows you to have support for AMCC crypto acceleration.
309 config HW_RANDOM_PPC4XX
310 bool "PowerPC 4xx generic true random number generator support"
311 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
314 This option provides the kernel-side support for the TRNG hardware
315 found in the security function of some PowerPC 4xx SoCs.
317 config CRYPTO_DEV_OMAP_SHAM
318 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
319 depends on ARCH_OMAP2PLUS
326 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
327 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
329 config CRYPTO_DEV_OMAP_AES
330 tristate "Support for OMAP AES hw engine"
331 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
333 select CRYPTO_BLKCIPHER
339 OMAP processors have AES module accelerator. Select this if you
340 want to use the OMAP module for AES algorithms.
342 config CRYPTO_DEV_OMAP_DES
343 tristate "Support for OMAP DES/3DES hw engine"
344 depends on ARCH_OMAP2PLUS
346 select CRYPTO_BLKCIPHER
349 OMAP processors have DES/3DES module accelerator. Select this if you
350 want to use the OMAP module for DES and 3DES algorithms. Currently
351 the ECB and CBC modes of operation are supported by the driver. Also
352 accesses made on unaligned boundaries are supported.
354 config CRYPTO_DEV_PICOXCELL
355 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
356 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
359 select CRYPTO_AUTHENC
360 select CRYPTO_BLKCIPHER
366 This option enables support for the hardware offload engines in the
367 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
368 and for 3gpp Layer 2 ciphering support.
370 Saying m here will build a module named pipcoxcell_crypto.
372 config CRYPTO_DEV_SAHARA
373 tristate "Support for SAHARA crypto accelerator"
374 depends on ARCH_MXC && OF
375 select CRYPTO_BLKCIPHER
379 This option enables support for the SAHARA HW crypto accelerator
380 found in some Freescale i.MX chips.
382 config CRYPTO_DEV_MXC_SCC
383 tristate "Support for Freescale Security Controller (SCC)"
384 depends on ARCH_MXC && OF
385 select CRYPTO_BLKCIPHER
388 This option enables support for the Security Controller (SCC)
389 found in Freescale i.MX25 chips.
391 config CRYPTO_DEV_S5P
392 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
393 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
394 depends on HAS_IOMEM && HAS_DMA
396 select CRYPTO_BLKCIPHER
398 This option allows you to have support for S5P crypto acceleration.
399 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
400 algorithms execution.
403 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
406 This enables support for the NX hardware cryptographic accelerator
407 coprocessor that is in IBM PowerPC P7+ or later processors. This
408 does not actually enable any drivers, it only allows you to select
409 which acceleration type (encryption and/or compression) to enable.
412 source "drivers/crypto/nx/Kconfig"
415 config CRYPTO_DEV_UX500
416 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
417 depends on ARCH_U8500
419 Driver for ST-Ericsson UX500 crypto engine.
422 source "drivers/crypto/ux500/Kconfig"
423 endif # if CRYPTO_DEV_UX500
425 config CRYPTO_DEV_BFIN_CRC
426 tristate "Support for Blackfin CRC hardware"
429 Newer Blackfin processors have CRC hardware. Select this if you
430 want to use the Blackfin CRC module.
432 config CRYPTO_DEV_ATMEL_AUTHENC
433 tristate "Support for Atmel IPSEC/SSL hw accelerator"
435 depends on ARCH_AT91 || COMPILE_TEST
436 select CRYPTO_AUTHENC
437 select CRYPTO_DEV_ATMEL_AES
438 select CRYPTO_DEV_ATMEL_SHA
440 Some Atmel processors can combine the AES and SHA hw accelerators
441 to enhance support of IPSEC/SSL.
442 Select this if you want to use the Atmel modules for
443 authenc(hmac(shaX),Y(cbc)) algorithms.
445 config CRYPTO_DEV_ATMEL_AES
446 tristate "Support for Atmel AES hw accelerator"
448 depends on ARCH_AT91 || COMPILE_TEST
451 select CRYPTO_BLKCIPHER
453 Some Atmel processors have AES hw accelerator.
454 Select this if you want to use the Atmel module for
457 To compile this driver as a module, choose M here: the module
458 will be called atmel-aes.
460 config CRYPTO_DEV_ATMEL_TDES
461 tristate "Support for Atmel DES/TDES hw accelerator"
463 depends on ARCH_AT91 || COMPILE_TEST
465 select CRYPTO_BLKCIPHER
467 Some Atmel processors have DES/TDES hw accelerator.
468 Select this if you want to use the Atmel module for
471 To compile this driver as a module, choose M here: the module
472 will be called atmel-tdes.
474 config CRYPTO_DEV_ATMEL_SHA
475 tristate "Support for Atmel SHA hw accelerator"
477 depends on ARCH_AT91 || COMPILE_TEST
480 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
482 Select this if you want to use the Atmel module for
483 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
485 To compile this driver as a module, choose M here: the module
486 will be called atmel-sha.
488 config CRYPTO_DEV_CCP
489 bool "Support for AMD Cryptographic Coprocessor"
490 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
492 The AMD Cryptographic Coprocessor provides hardware offload support
493 for encryption, hashing and related operations.
496 source "drivers/crypto/ccp/Kconfig"
499 config CRYPTO_DEV_MXS_DCP
500 tristate "Support for Freescale MXS DCP"
501 depends on (ARCH_MXS || ARCH_MXC)
506 select CRYPTO_BLKCIPHER
509 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
510 co-processor on the die.
512 To compile this driver as a module, choose M here: the module
513 will be called mxs-dcp.
515 source "drivers/crypto/qat/Kconfig"
516 source "drivers/crypto/cavium/cpt/Kconfig"
518 config CRYPTO_DEV_QCE
519 tristate "Qualcomm crypto engine accelerator"
520 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
527 select CRYPTO_BLKCIPHER
529 This driver supports Qualcomm crypto engine accelerator
530 hardware. To compile this driver as a module, choose M here. The
531 module will be called qcrypto.
533 config CRYPTO_DEV_VMX
534 bool "Support for VMX cryptographic acceleration instructions"
535 depends on PPC64 && VSX
537 Support for VMX cryptographic acceleration instructions.
539 source "drivers/crypto/vmx/Kconfig"
541 config CRYPTO_DEV_IMGTEC_HASH
542 tristate "Imagination Technologies hardware hash accelerator"
543 depends on MIPS || COMPILE_TEST
550 This driver interfaces with the Imagination Technologies
551 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
554 config CRYPTO_DEV_SUN4I_SS
555 tristate "Support for Allwinner Security System cryptographic accelerator"
556 depends on ARCH_SUNXI && !64BIT
561 select CRYPTO_BLKCIPHER
563 Some Allwinner SoC have a crypto accelerator named
564 Security System. Select this if you want to use it.
565 The Security System handle AES/DES/3DES ciphers in CBC mode
566 and SHA1 and MD5 hash algorithms.
568 To compile this driver as a module, choose M here: the module
569 will be called sun4i-ss.
571 config CRYPTO_DEV_ROCKCHIP
572 tristate "Rockchip's Cryptographic Engine driver"
573 depends on OF && ARCH_ROCKCHIP
580 select CRYPTO_BLKCIPHER
583 This driver interfaces with the hardware crypto accelerator.
584 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
586 config CRYPTO_DEV_MEDIATEK
587 tristate "MediaTek's EIP97 Cryptographic Engine driver"
589 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
592 select CRYPTO_BLKCIPHER
599 This driver allows you to utilize the hardware crypto accelerator
600 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
601 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
603 source "drivers/crypto/chelsio/Kconfig"
605 source "drivers/crypto/virtio/Kconfig"
607 config CRYPTO_DEV_BCM_SPU
608 tristate "Broadcom symmetric crypto/hash acceleration support"
609 depends on ARCH_BCM_IPROC
610 depends on BCM_PDC_MBOX
618 This driver provides support for Broadcom crypto acceleration using the
619 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
620 ahash, and aead algorithms with the kernel cryptographic API.