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1 /*
2 * CAAM control-plane driver backend
3 * Controller-level driver, kernel property detection, initialization
4 *
5 * Copyright 2008-2011 Freescale Semiconductor, Inc.
6 */
7
8 #include "compat.h"
9 #include "regs.h"
10 #include "intern.h"
11 #include "jr.h"
12
13 static int caam_remove(struct platform_device *pdev)
14 {
15 struct device *ctrldev;
16 struct caam_drv_private *ctrlpriv;
17 struct caam_drv_private_jr *jrpriv;
18 struct caam_full __iomem *topregs;
19 int ring, ret = 0;
20
21 ctrldev = &pdev->dev;
22 ctrlpriv = dev_get_drvdata(ctrldev);
23 topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
24
25 /* shut down JobRs */
26 for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
27 ret |= caam_jr_shutdown(ctrlpriv->jrdev[ring]);
28 jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]);
29 irq_dispose_mapping(jrpriv->irq);
30 }
31
32 /* Shut down debug views */
33 #ifdef CONFIG_DEBUG_FS
34 debugfs_remove_recursive(ctrlpriv->dfs_root);
35 #endif
36
37 /* Unmap controller region */
38 iounmap(&topregs->ctrl);
39
40 kfree(ctrlpriv->jrdev);
41 kfree(ctrlpriv);
42
43 return ret;
44 }
45
46 /* Probe routine for CAAM top (controller) level */
47 static int caam_probe(struct platform_device *pdev,
48 const struct of_device_id *devmatch)
49 {
50 int d, ring, rspec;
51 struct device *dev;
52 struct device_node *nprop, *np;
53 struct caam_ctrl __iomem *ctrl;
54 struct caam_full __iomem *topregs;
55 struct caam_drv_private *ctrlpriv;
56 struct caam_perfmon *perfmon;
57 struct caam_deco **deco;
58 u32 deconum;
59
60 ctrlpriv = kzalloc(sizeof(struct caam_drv_private), GFP_KERNEL);
61 if (!ctrlpriv)
62 return -ENOMEM;
63
64 dev = &pdev->dev;
65 dev_set_drvdata(dev, ctrlpriv);
66 ctrlpriv->pdev = pdev;
67 nprop = pdev->dev.of_node;
68
69 /* Get configuration properties from device tree */
70 /* First, get register page */
71 ctrl = of_iomap(nprop, 0);
72 if (ctrl == NULL) {
73 dev_err(dev, "caam: of_iomap() failed\n");
74 return -ENOMEM;
75 }
76 ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
77
78 /* topregs used to derive pointers to CAAM sub-blocks only */
79 topregs = (struct caam_full __iomem *)ctrl;
80
81 /* Get the IRQ of the controller (for security violations only) */
82 ctrlpriv->secvio_irq = of_irq_to_resource(nprop, 0, NULL);
83
84 /*
85 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
86 * 36-bit pointers in master configuration register
87 */
88 setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE |
89 (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
90
91 if (sizeof(dma_addr_t) == sizeof(u64))
92 dma_set_mask(dev, DMA_BIT_MASK(36));
93
94 /* Find out how many DECOs are present */
95 deconum = (rd_reg64(&topregs->ctrl.perfmon.cha_num) &
96 CHA_NUM_DECONUM_MASK) >> CHA_NUM_DECONUM_SHIFT;
97
98 ctrlpriv->deco = kmalloc(deconum * sizeof(struct caam_deco *),
99 GFP_KERNEL);
100
101 deco = (struct caam_deco __force **)&topregs->deco;
102 for (d = 0; d < deconum; d++)
103 ctrlpriv->deco[d] = deco[d];
104
105 /*
106 * Detect and enable JobRs
107 * First, find out how many ring spec'ed, allocate references
108 * for all, then go probe each one.
109 */
110 rspec = 0;
111 for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring")
112 rspec++;
113 ctrlpriv->jrdev = kzalloc(sizeof(struct device *) * rspec, GFP_KERNEL);
114 if (ctrlpriv->jrdev == NULL) {
115 iounmap(&topregs->ctrl);
116 return -ENOMEM;
117 }
118
119 ring = 0;
120 ctrlpriv->total_jobrs = 0;
121 for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring") {
122 caam_jr_probe(pdev, np, ring);
123 ctrlpriv->total_jobrs++;
124 ring++;
125 }
126
127 /* Check to see if QI present. If so, enable */
128 ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) &
129 CTPR_QI_MASK);
130 if (ctrlpriv->qi_present) {
131 ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi;
132 /* This is all that's required to physically enable QI */
133 wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN);
134 }
135
136 /* If no QI and no rings specified, quit and go home */
137 if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
138 dev_err(dev, "no queues configured, terminating\n");
139 caam_remove(pdev);
140 return -ENOMEM;
141 }
142
143 /* NOTE: RTIC detection ought to go here, around Si time */
144
145 /* Initialize queue allocator lock */
146 spin_lock_init(&ctrlpriv->jr_alloc_lock);
147
148 /* Report "alive" for developer to see */
149 dev_info(dev, "device ID = 0x%016llx\n",
150 rd_reg64(&topregs->ctrl.perfmon.caam_id));
151 dev_info(dev, "job rings = %d, qi = %d\n",
152 ctrlpriv->total_jobrs, ctrlpriv->qi_present);
153
154 #ifdef CONFIG_DEBUG_FS
155 /*
156 * FIXME: needs better naming distinction, as some amalgamation of
157 * "caam" and nprop->full_name. The OF name isn't distinctive,
158 * but does separate instances
159 */
160 perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
161
162 ctrlpriv->dfs_root = debugfs_create_dir("caam", NULL);
163 ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
164
165 /* Controller-level - performance monitor counters */
166 ctrlpriv->ctl_rq_dequeued =
167 debugfs_create_u64("rq_dequeued",
168 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
169 ctrlpriv->ctl, &perfmon->req_dequeued);
170 ctrlpriv->ctl_ob_enc_req =
171 debugfs_create_u64("ob_rq_encrypted",
172 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
173 ctrlpriv->ctl, &perfmon->ob_enc_req);
174 ctrlpriv->ctl_ib_dec_req =
175 debugfs_create_u64("ib_rq_decrypted",
176 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
177 ctrlpriv->ctl, &perfmon->ib_dec_req);
178 ctrlpriv->ctl_ob_enc_bytes =
179 debugfs_create_u64("ob_bytes_encrypted",
180 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
181 ctrlpriv->ctl, &perfmon->ob_enc_bytes);
182 ctrlpriv->ctl_ob_prot_bytes =
183 debugfs_create_u64("ob_bytes_protected",
184 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
185 ctrlpriv->ctl, &perfmon->ob_prot_bytes);
186 ctrlpriv->ctl_ib_dec_bytes =
187 debugfs_create_u64("ib_bytes_decrypted",
188 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
189 ctrlpriv->ctl, &perfmon->ib_dec_bytes);
190 ctrlpriv->ctl_ib_valid_bytes =
191 debugfs_create_u64("ib_bytes_validated",
192 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
193 ctrlpriv->ctl, &perfmon->ib_valid_bytes);
194
195 /* Controller level - global status values */
196 ctrlpriv->ctl_faultaddr =
197 debugfs_create_u64("fault_addr",
198 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
199 ctrlpriv->ctl, &perfmon->faultaddr);
200 ctrlpriv->ctl_faultdetail =
201 debugfs_create_u32("fault_detail",
202 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
203 ctrlpriv->ctl, &perfmon->faultdetail);
204 ctrlpriv->ctl_faultstatus =
205 debugfs_create_u32("fault_status",
206 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH,
207 ctrlpriv->ctl, &perfmon->status);
208
209 /* Internal covering keys (useful in non-secure mode only) */
210 ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
211 ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
212 ctrlpriv->ctl_kek = debugfs_create_blob("kek",
213 S_IFCHR | S_IRUSR |
214 S_IRGRP | S_IROTH,
215 ctrlpriv->ctl,
216 &ctrlpriv->ctl_kek_wrap);
217
218 ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
219 ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
220 ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
221 S_IFCHR | S_IRUSR |
222 S_IRGRP | S_IROTH,
223 ctrlpriv->ctl,
224 &ctrlpriv->ctl_tkek_wrap);
225
226 ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
227 ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
228 ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
229 S_IFCHR | S_IRUSR |
230 S_IRGRP | S_IROTH,
231 ctrlpriv->ctl,
232 &ctrlpriv->ctl_tdsk_wrap);
233 #endif
234 return 0;
235 }
236
237 static struct of_device_id caam_match[] = {
238 {
239 .compatible = "fsl,sec4.0",
240 },
241 {},
242 };
243 MODULE_DEVICE_TABLE(of, caam_match);
244
245 static struct of_platform_driver caam_driver = {
246 .driver = {
247 .name = "caam",
248 .owner = THIS_MODULE,
249 .of_match_table = caam_match,
250 },
251 .probe = caam_probe,
252 .remove = __devexit_p(caam_remove),
253 };
254
255 static int __init caam_base_init(void)
256 {
257 return of_register_platform_driver(&caam_driver);
258 }
259
260 static void __exit caam_base_exit(void)
261 {
262 return of_unregister_platform_driver(&caam_driver);
263 }
264
265 module_init(caam_base_init);
266 module_exit(caam_base_exit);
267
268 MODULE_LICENSE("GPL");
269 MODULE_DESCRIPTION("FSL CAAM request backend");
270 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");