1 /* * CAAM control-plane driver backend
2 * Controller-level driver, kernel property detection, initialization
4 * Copyright 2008-2012 Freescale Semiconductor, Inc.
7 #include <linux/device.h>
8 #include <linux/of_address.h>
9 #include <linux/of_irq.h>
15 #include "desc_constr.h"
19 * Descriptor to instantiate RNG State Handle 0 in normal mode and
20 * load the JDKEK, TDKEK and TDSK registers
22 static void build_instantiation_desc(u32
*desc
, int handle
, int do_sk
)
24 u32
*jump_cmd
, op_flags
;
26 init_job_desc(desc
, 0);
28 op_flags
= OP_TYPE_CLASS1_ALG
| OP_ALG_ALGSEL_RNG
|
29 (handle
<< OP_ALG_AAI_SHIFT
) | OP_ALG_AS_INIT
;
31 /* INIT RNG in non-test mode */
32 append_operation(desc
, op_flags
);
34 if (!handle
&& do_sk
) {
36 * For SH0, Secure Keys must be generated as well
40 jump_cmd
= append_jump(desc
, JUMP_CLASS_CLASS1
);
41 set_jump_tgt_here(desc
, jump_cmd
);
44 * load 1 to clear written reg:
45 * resets the done interrrupt and returns the RNG to idle.
47 append_load_imm_u32(desc
, 1, LDST_SRCDST_WORD_CLRW
);
49 /* Initialize State Handle */
50 append_operation(desc
, OP_TYPE_CLASS1_ALG
| OP_ALG_ALGSEL_RNG
|
54 append_jump(desc
, JUMP_CLASS_CLASS1
| JUMP_TYPE_HALT
);
57 /* Descriptor for deinstantiation of State Handle 0 of the RNG block. */
58 static void build_deinstantiation_desc(u32
*desc
, int handle
)
60 init_job_desc(desc
, 0);
62 /* Uninstantiate State Handle 0 */
63 append_operation(desc
, OP_TYPE_CLASS1_ALG
| OP_ALG_ALGSEL_RNG
|
64 (handle
<< OP_ALG_AAI_SHIFT
) | OP_ALG_AS_INITFINAL
);
66 append_jump(desc
, JUMP_CLASS_CLASS1
| JUMP_TYPE_HALT
);
70 * run_descriptor_deco0 - runs a descriptor on DECO0, under direct control of
71 * the software (no JR/QI used).
72 * @ctrldev - pointer to device
73 * @status - descriptor status, after being run
75 * Return: - 0 if no error occurred
76 * - -ENODEV if the DECO couldn't be acquired
77 * - -EAGAIN if an error occurred while executing the descriptor
79 static inline int run_descriptor_deco0(struct device
*ctrldev
, u32
*desc
,
82 struct caam_drv_private
*ctrlpriv
= dev_get_drvdata(ctrldev
);
83 struct caam_ctrl __iomem
*ctrl
= ctrlpriv
->ctrl
;
84 struct caam_deco __iomem
*deco
= ctrlpriv
->deco
;
85 unsigned int timeout
= 100000;
86 u32 deco_dbg_reg
, flags
;
90 if (ctrlpriv
->virt_en
== 1) {
91 setbits32(&ctrl
->deco_rsr
, DECORSR_JR0
);
93 while (!(rd_reg32(&ctrl
->deco_rsr
) & DECORSR_VALID
) &&
100 setbits32(&ctrl
->deco_rq
, DECORR_RQD0ENABLE
);
102 while (!(rd_reg32(&ctrl
->deco_rq
) & DECORR_DEN0
) &&
107 dev_err(ctrldev
, "failed to acquire DECO 0\n");
108 clrbits32(&ctrl
->deco_rq
, DECORR_RQD0ENABLE
);
112 for (i
= 0; i
< desc_len(desc
); i
++)
113 wr_reg32(&deco
->descbuf
[i
], *(desc
+ i
));
115 flags
= DECO_JQCR_WHL
;
117 * If the descriptor length is longer than 4 words, then the
118 * FOUR bit in JRCTRL register must be set.
120 if (desc_len(desc
) >= 4)
121 flags
|= DECO_JQCR_FOUR
;
123 /* Instruct the DECO to execute it */
124 wr_reg32(&deco
->jr_ctl_hi
, flags
);
128 deco_dbg_reg
= rd_reg32(&deco
->desc_dbg
);
130 * If an error occured in the descriptor, then
131 * the DECO status field will be set to 0x0D
133 if ((deco_dbg_reg
& DESC_DBG_DECO_STAT_MASK
) ==
134 DESC_DBG_DECO_STAT_HOST_ERR
)
137 } while ((deco_dbg_reg
& DESC_DBG_DECO_STAT_VALID
) && --timeout
);
139 *status
= rd_reg32(&deco
->op_status_hi
) &
140 DECO_OP_STATUS_HI_ERR_MASK
;
142 if (ctrlpriv
->virt_en
== 1)
143 clrbits32(&ctrl
->deco_rsr
, DECORSR_JR0
);
145 /* Mark the DECO as free */
146 clrbits32(&ctrl
->deco_rq
, DECORR_RQD0ENABLE
);
155 * instantiate_rng - builds and executes a descriptor on DECO0,
156 * which initializes the RNG block.
157 * @ctrldev - pointer to device
158 * @state_handle_mask - bitmask containing the instantiation status
159 * for the RNG4 state handles which exist in
160 * the RNG4 block: 1 if it's been instantiated
161 * by an external entry, 0 otherwise.
162 * @gen_sk - generate data to be loaded into the JDKEK, TDKEK and TDSK;
163 * Caution: this can be done only once; if the keys need to be
164 * regenerated, a POR is required
166 * Return: - 0 if no error occurred
167 * - -ENOMEM if there isn't enough memory to allocate the descriptor
168 * - -ENODEV if DECO0 couldn't be acquired
169 * - -EAGAIN if an error occurred when executing the descriptor
170 * f.i. there was a RNG hardware error due to not "good enough"
171 * entropy being aquired.
173 static int instantiate_rng(struct device
*ctrldev
, int state_handle_mask
,
176 struct caam_drv_private
*ctrlpriv
= dev_get_drvdata(ctrldev
);
177 struct caam_ctrl __iomem
*ctrl
;
178 u32
*desc
, status
, rdsta_val
;
181 ctrl
= (struct caam_ctrl __iomem
*)ctrlpriv
->ctrl
;
182 desc
= kmalloc(CAAM_CMD_SZ
* 7, GFP_KERNEL
);
186 for (sh_idx
= 0; sh_idx
< RNG4_MAX_HANDLES
; sh_idx
++) {
188 * If the corresponding bit is set, this state handle
189 * was initialized by somebody else, so it's left alone.
191 if ((1 << sh_idx
) & state_handle_mask
)
194 /* Create the descriptor for instantiating RNG State Handle */
195 build_instantiation_desc(desc
, sh_idx
, gen_sk
);
197 /* Try to run it through DECO0 */
198 ret
= run_descriptor_deco0(ctrldev
, desc
, &status
);
201 * If ret is not 0, or descriptor status is not 0, then
202 * something went wrong. No need to try the next state
203 * handle (if available), bail out here.
204 * Also, if for some reason, the State Handle didn't get
205 * instantiated although the descriptor has finished
206 * without any error (HW optimizations for later
207 * CAAM eras), then try again.
209 rdsta_val
= rd_reg32(&ctrl
->r4tst
[0].rdsta
) & RDSTA_IFMASK
;
210 if (status
|| !(rdsta_val
& (1 << sh_idx
)))
214 dev_info(ctrldev
, "Instantiated RNG4 SH%d\n", sh_idx
);
215 /* Clear the contents before recreating the descriptor */
216 memset(desc
, 0x00, CAAM_CMD_SZ
* 7);
225 * deinstantiate_rng - builds and executes a descriptor on DECO0,
226 * which deinitializes the RNG block.
227 * @ctrldev - pointer to device
228 * @state_handle_mask - bitmask containing the instantiation status
229 * for the RNG4 state handles which exist in
230 * the RNG4 block: 1 if it's been instantiated
232 * Return: - 0 if no error occurred
233 * - -ENOMEM if there isn't enough memory to allocate the descriptor
234 * - -ENODEV if DECO0 couldn't be acquired
235 * - -EAGAIN if an error occurred when executing the descriptor
237 static int deinstantiate_rng(struct device
*ctrldev
, int state_handle_mask
)
242 desc
= kmalloc(CAAM_CMD_SZ
* 3, GFP_KERNEL
);
246 for (sh_idx
= 0; sh_idx
< RNG4_MAX_HANDLES
; sh_idx
++) {
248 * If the corresponding bit is set, then it means the state
249 * handle was initialized by us, and thus it needs to be
250 * deintialized as well
252 if ((1 << sh_idx
) & state_handle_mask
) {
254 * Create the descriptor for deinstantating this state
257 build_deinstantiation_desc(desc
, sh_idx
);
259 /* Try to run it through DECO0 */
260 ret
= run_descriptor_deco0(ctrldev
, desc
, &status
);
264 "Failed to deinstantiate RNG4 SH%d\n",
268 dev_info(ctrldev
, "Deinstantiated RNG4 SH%d\n", sh_idx
);
277 static int caam_remove(struct platform_device
*pdev
)
279 struct device
*ctrldev
;
280 struct caam_drv_private
*ctrlpriv
;
281 struct caam_ctrl __iomem
*ctrl
;
284 ctrldev
= &pdev
->dev
;
285 ctrlpriv
= dev_get_drvdata(ctrldev
);
286 ctrl
= (struct caam_ctrl __iomem
*)ctrlpriv
->ctrl
;
288 /* Remove platform devices for JobRs */
289 for (ring
= 0; ring
< ctrlpriv
->total_jobrs
; ring
++) {
290 if (ctrlpriv
->jrpdev
[ring
])
291 of_device_unregister(ctrlpriv
->jrpdev
[ring
]);
294 /* De-initialize RNG state handles initialized by this driver. */
295 if (ctrlpriv
->rng4_sh_init
)
296 deinstantiate_rng(ctrldev
, ctrlpriv
->rng4_sh_init
);
298 /* Shut down debug views */
299 #ifdef CONFIG_DEBUG_FS
300 debugfs_remove_recursive(ctrlpriv
->dfs_root
);
303 /* Unmap controller region */
310 * kick_trng - sets the various parameters for enabling the initialization
311 * of the RNG4 block in CAAM
312 * @pdev - pointer to the platform device
313 * @ent_delay - Defines the length (in system clocks) of each entropy sample.
315 static void kick_trng(struct platform_device
*pdev
, int ent_delay
)
317 struct device
*ctrldev
= &pdev
->dev
;
318 struct caam_drv_private
*ctrlpriv
= dev_get_drvdata(ctrldev
);
319 struct caam_ctrl __iomem
*ctrl
;
320 struct rng4tst __iomem
*r4tst
;
323 ctrl
= (struct caam_ctrl __iomem
*)ctrlpriv
->ctrl
;
324 r4tst
= &ctrl
->r4tst
[0];
326 /* put RNG4 into program mode */
327 setbits32(&r4tst
->rtmctl
, RTMCTL_PRGM
);
330 * Performance-wise, it does not make sense to
331 * set the delay to a value that is lower
332 * than the last one that worked (i.e. the state handles
333 * were instantiated properly. Thus, instead of wasting
334 * time trying to set the values controlling the sample
335 * frequency, the function simply returns.
337 val
= (rd_reg32(&r4tst
->rtsdctl
) & RTSDCTL_ENT_DLY_MASK
)
338 >> RTSDCTL_ENT_DLY_SHIFT
;
339 if (ent_delay
<= val
) {
340 /* put RNG4 into run mode */
341 clrbits32(&r4tst
->rtmctl
, RTMCTL_PRGM
);
345 val
= rd_reg32(&r4tst
->rtsdctl
);
346 val
= (val
& ~RTSDCTL_ENT_DLY_MASK
) |
347 (ent_delay
<< RTSDCTL_ENT_DLY_SHIFT
);
348 wr_reg32(&r4tst
->rtsdctl
, val
);
349 /* min. freq. count, equal to 1/4 of the entropy sample length */
350 wr_reg32(&r4tst
->rtfrqmin
, ent_delay
>> 2);
351 /* disable maximum frequency count */
352 wr_reg32(&r4tst
->rtfrqmax
, RTFRQMAX_DISABLE
);
353 /* read the control register */
354 val
= rd_reg32(&r4tst
->rtmctl
);
356 * select raw sampling in both entropy shifter
357 * and statistical checker
359 setbits32(&val
, RTMCTL_SAMP_MODE_RAW_ES_SC
);
360 /* put RNG4 into run mode */
361 clrbits32(&val
, RTMCTL_PRGM
);
362 /* write back the control register */
363 wr_reg32(&r4tst
->rtmctl
, val
);
367 * caam_get_era() - Return the ERA of the SEC on SoC, based
368 * on "sec-era" propery in the DTS. This property is updated by u-boot.
370 int caam_get_era(void)
372 struct device_node
*caam_node
;
373 for_each_compatible_node(caam_node
, NULL
, "fsl,sec-v4.0") {
374 const uint32_t *prop
= (uint32_t *)of_get_property(caam_node
,
377 return prop
? *prop
: -ENOTSUPP
;
382 EXPORT_SYMBOL(caam_get_era
);
384 /* Probe routine for CAAM top (controller) level */
385 static int caam_probe(struct platform_device
*pdev
)
387 int ret
, ring
, rspec
, gen_sk
, ent_delay
= RTSDCTL_ENT_DLY_MIN
;
390 struct device_node
*nprop
, *np
;
391 struct caam_ctrl __iomem
*ctrl
;
392 struct caam_drv_private
*ctrlpriv
;
393 #ifdef CONFIG_DEBUG_FS
394 struct caam_perfmon
*perfmon
;
396 u32 scfgr
, comp_params
;
399 int BLOCK_OFFSET
= 0;
401 ctrlpriv
= devm_kzalloc(&pdev
->dev
, sizeof(struct caam_drv_private
),
407 dev_set_drvdata(dev
, ctrlpriv
);
408 ctrlpriv
->pdev
= pdev
;
409 nprop
= pdev
->dev
.of_node
;
411 /* Get configuration properties from device tree */
412 /* First, get register page */
413 ctrl
= of_iomap(nprop
, 0);
415 dev_err(dev
, "caam: of_iomap() failed\n");
418 /* Finding the page size for using the CTPR_MS register */
419 comp_params
= rd_reg32(&ctrl
->perfmon
.comp_parms_ms
);
420 pg_size
= (comp_params
& CTPR_MS_PG_SZ_MASK
) >> CTPR_MS_PG_SZ_SHIFT
;
422 /* Allocating the BLOCK_OFFSET based on the supported page size on
426 BLOCK_OFFSET
= PG_SIZE_4K
;
428 BLOCK_OFFSET
= PG_SIZE_64K
;
430 ctrlpriv
->ctrl
= (struct caam_ctrl __force
*)ctrl
;
431 ctrlpriv
->assure
= (struct caam_assurance __force
*)
433 BLOCK_OFFSET
* ASSURE_BLOCK_NUMBER
435 ctrlpriv
->deco
= (struct caam_deco __force
*)
437 BLOCK_OFFSET
* DECO_BLOCK_NUMBER
440 /* Get the IRQ of the controller (for security violations only) */
441 ctrlpriv
->secvio_irq
= irq_of_parse_and_map(nprop
, 0);
444 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
445 * long pointers in master configuration register
447 setbits32(&ctrl
->mcr
, MCFGR_WDENABLE
|
448 (sizeof(dma_addr_t
) == sizeof(u64
) ? MCFGR_LONG_PTR
: 0));
451 * Read the Compile Time paramters and SCFGR to determine
452 * if Virtualization is enabled for this platform
454 scfgr
= rd_reg32(&ctrl
->scfgr
);
456 ctrlpriv
->virt_en
= 0;
457 if (comp_params
& CTPR_MS_VIRT_EN_INCL
) {
458 /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or
459 * VIRT_EN_INCL = 1 & VIRT_EN_POR = 0 & SCFGR_VIRT_EN = 1
461 if ((comp_params
& CTPR_MS_VIRT_EN_POR
) ||
462 (!(comp_params
& CTPR_MS_VIRT_EN_POR
) &&
463 (scfgr
& SCFGR_VIRT_EN
)))
464 ctrlpriv
->virt_en
= 1;
466 /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */
467 if (comp_params
& CTPR_MS_VIRT_EN_POR
)
468 ctrlpriv
->virt_en
= 1;
471 if (ctrlpriv
->virt_en
== 1)
472 setbits32(&ctrl
->jrstart
, JRSTART_JR0_START
|
473 JRSTART_JR1_START
| JRSTART_JR2_START
|
476 if (sizeof(dma_addr_t
) == sizeof(u64
))
477 if (of_device_is_compatible(nprop
, "fsl,sec-v5.0"))
478 dma_set_mask_and_coherent(dev
, DMA_BIT_MASK(40));
480 dma_set_mask_and_coherent(dev
, DMA_BIT_MASK(36));
482 dma_set_mask_and_coherent(dev
, DMA_BIT_MASK(32));
485 * Detect and enable JobRs
486 * First, find out how many ring spec'ed, allocate references
487 * for all, then go probe each one.
490 for_each_available_child_of_node(nprop
, np
)
491 if (of_device_is_compatible(np
, "fsl,sec-v4.0-job-ring") ||
492 of_device_is_compatible(np
, "fsl,sec4.0-job-ring"))
495 ctrlpriv
->jrpdev
= devm_kzalloc(&pdev
->dev
,
496 sizeof(struct platform_device
*) * rspec
,
498 if (ctrlpriv
->jrpdev
== NULL
) {
504 ctrlpriv
->total_jobrs
= 0;
505 for_each_available_child_of_node(nprop
, np
)
506 if (of_device_is_compatible(np
, "fsl,sec-v4.0-job-ring") ||
507 of_device_is_compatible(np
, "fsl,sec4.0-job-ring")) {
508 ctrlpriv
->jrpdev
[ring
] =
509 of_platform_device_create(np
, NULL
, dev
);
510 if (!ctrlpriv
->jrpdev
[ring
]) {
511 pr_warn("JR%d Platform device creation error\n",
515 ctrlpriv
->jr
[ring
] = (struct caam_job_ring __force
*)
517 (ring
+ JR_BLOCK_NUMBER
) *
520 ctrlpriv
->total_jobrs
++;
524 /* Check to see if QI present. If so, enable */
525 ctrlpriv
->qi_present
=
526 !!(rd_reg32(&ctrl
->perfmon
.comp_parms_ms
) &
528 if (ctrlpriv
->qi_present
) {
529 ctrlpriv
->qi
= (struct caam_queue_if __force
*)
531 BLOCK_OFFSET
* QI_BLOCK_NUMBER
533 /* This is all that's required to physically enable QI */
534 wr_reg32(&ctrlpriv
->qi
->qi_control_lo
, QICTL_DQEN
);
537 /* If no QI and no rings specified, quit and go home */
538 if ((!ctrlpriv
->qi_present
) && (!ctrlpriv
->total_jobrs
)) {
539 dev_err(dev
, "no queues configured, terminating\n");
544 cha_vid_ls
= rd_reg32(&ctrl
->perfmon
.cha_id_ls
);
547 * If SEC has RNG version >= 4 and RNG state handle has not been
548 * already instantiated, do RNG instantiation
550 if ((cha_vid_ls
& CHA_ID_LS_RNG_MASK
) >> CHA_ID_LS_RNG_SHIFT
>= 4) {
551 ctrlpriv
->rng4_sh_init
=
552 rd_reg32(&ctrl
->r4tst
[0].rdsta
);
554 * If the secure keys (TDKEK, JDKEK, TDSK), were already
555 * generated, signal this to the function that is instantiating
556 * the state handles. An error would occur if RNG4 attempts
557 * to regenerate these keys before the next POR.
559 gen_sk
= ctrlpriv
->rng4_sh_init
& RDSTA_SKVN
? 0 : 1;
560 ctrlpriv
->rng4_sh_init
&= RDSTA_IFMASK
;
563 rd_reg32(&ctrl
->r4tst
[0].rdsta
) &
566 * If either SH were instantiated by somebody else
567 * (e.g. u-boot) then it is assumed that the entropy
568 * parameters are properly set and thus the function
569 * setting these (kick_trng(...)) is skipped.
570 * Also, if a handle was instantiated, do not change
571 * the TRNG parameters.
573 if (!(ctrlpriv
->rng4_sh_init
|| inst_handles
)) {
575 "Entropy delay = %u\n",
577 kick_trng(pdev
, ent_delay
);
581 * if instantiate_rng(...) fails, the loop will rerun
582 * and the kick_trng(...) function will modfiy the
583 * upper and lower limits of the entropy sampling
584 * interval, leading to a sucessful initialization of
587 ret
= instantiate_rng(dev
, inst_handles
,
591 * if here, the loop will rerun,
592 * so don't hog the CPU
595 } while ((ret
== -EAGAIN
) && (ent_delay
< RTSDCTL_ENT_DLY_MAX
));
597 dev_err(dev
, "failed to instantiate RNG");
602 * Set handles init'ed by this module as the complement of the
603 * already initialized ones
605 ctrlpriv
->rng4_sh_init
= ~ctrlpriv
->rng4_sh_init
& RDSTA_IFMASK
;
607 /* Enable RDB bit so that RNG works faster */
608 setbits32(&ctrl
->scfgr
, SCFGR_RDBENABLE
);
611 /* NOTE: RTIC detection ought to go here, around Si time */
613 caam_id
= (u64
)rd_reg32(&ctrl
->perfmon
.caam_id_ms
) << 32 |
614 (u64
)rd_reg32(&ctrl
->perfmon
.caam_id_ls
);
616 /* Report "alive" for developer to see */
617 dev_info(dev
, "device ID = 0x%016llx (Era %d)\n", caam_id
,
619 dev_info(dev
, "job rings = %d, qi = %d\n",
620 ctrlpriv
->total_jobrs
, ctrlpriv
->qi_present
);
622 #ifdef CONFIG_DEBUG_FS
624 * FIXME: needs better naming distinction, as some amalgamation of
625 * "caam" and nprop->full_name. The OF name isn't distinctive,
626 * but does separate instances
628 perfmon
= (struct caam_perfmon __force
*)&ctrl
->perfmon
;
630 ctrlpriv
->dfs_root
= debugfs_create_dir(dev_name(dev
), NULL
);
631 ctrlpriv
->ctl
= debugfs_create_dir("ctl", ctrlpriv
->dfs_root
);
633 /* Controller-level - performance monitor counters */
634 ctrlpriv
->ctl_rq_dequeued
=
635 debugfs_create_u64("rq_dequeued",
636 S_IRUSR
| S_IRGRP
| S_IROTH
,
637 ctrlpriv
->ctl
, &perfmon
->req_dequeued
);
638 ctrlpriv
->ctl_ob_enc_req
=
639 debugfs_create_u64("ob_rq_encrypted",
640 S_IRUSR
| S_IRGRP
| S_IROTH
,
641 ctrlpriv
->ctl
, &perfmon
->ob_enc_req
);
642 ctrlpriv
->ctl_ib_dec_req
=
643 debugfs_create_u64("ib_rq_decrypted",
644 S_IRUSR
| S_IRGRP
| S_IROTH
,
645 ctrlpriv
->ctl
, &perfmon
->ib_dec_req
);
646 ctrlpriv
->ctl_ob_enc_bytes
=
647 debugfs_create_u64("ob_bytes_encrypted",
648 S_IRUSR
| S_IRGRP
| S_IROTH
,
649 ctrlpriv
->ctl
, &perfmon
->ob_enc_bytes
);
650 ctrlpriv
->ctl_ob_prot_bytes
=
651 debugfs_create_u64("ob_bytes_protected",
652 S_IRUSR
| S_IRGRP
| S_IROTH
,
653 ctrlpriv
->ctl
, &perfmon
->ob_prot_bytes
);
654 ctrlpriv
->ctl_ib_dec_bytes
=
655 debugfs_create_u64("ib_bytes_decrypted",
656 S_IRUSR
| S_IRGRP
| S_IROTH
,
657 ctrlpriv
->ctl
, &perfmon
->ib_dec_bytes
);
658 ctrlpriv
->ctl_ib_valid_bytes
=
659 debugfs_create_u64("ib_bytes_validated",
660 S_IRUSR
| S_IRGRP
| S_IROTH
,
661 ctrlpriv
->ctl
, &perfmon
->ib_valid_bytes
);
663 /* Controller level - global status values */
664 ctrlpriv
->ctl_faultaddr
=
665 debugfs_create_u64("fault_addr",
666 S_IRUSR
| S_IRGRP
| S_IROTH
,
667 ctrlpriv
->ctl
, &perfmon
->faultaddr
);
668 ctrlpriv
->ctl_faultdetail
=
669 debugfs_create_u32("fault_detail",
670 S_IRUSR
| S_IRGRP
| S_IROTH
,
671 ctrlpriv
->ctl
, &perfmon
->faultdetail
);
672 ctrlpriv
->ctl_faultstatus
=
673 debugfs_create_u32("fault_status",
674 S_IRUSR
| S_IRGRP
| S_IROTH
,
675 ctrlpriv
->ctl
, &perfmon
->status
);
677 /* Internal covering keys (useful in non-secure mode only) */
678 ctrlpriv
->ctl_kek_wrap
.data
= &ctrlpriv
->ctrl
->kek
[0];
679 ctrlpriv
->ctl_kek_wrap
.size
= KEK_KEY_SIZE
* sizeof(u32
);
680 ctrlpriv
->ctl_kek
= debugfs_create_blob("kek",
684 &ctrlpriv
->ctl_kek_wrap
);
686 ctrlpriv
->ctl_tkek_wrap
.data
= &ctrlpriv
->ctrl
->tkek
[0];
687 ctrlpriv
->ctl_tkek_wrap
.size
= KEK_KEY_SIZE
* sizeof(u32
);
688 ctrlpriv
->ctl_tkek
= debugfs_create_blob("tkek",
692 &ctrlpriv
->ctl_tkek_wrap
);
694 ctrlpriv
->ctl_tdsk_wrap
.data
= &ctrlpriv
->ctrl
->tdsk
[0];
695 ctrlpriv
->ctl_tdsk_wrap
.size
= KEK_KEY_SIZE
* sizeof(u32
);
696 ctrlpriv
->ctl_tdsk
= debugfs_create_blob("tdsk",
700 &ctrlpriv
->ctl_tdsk_wrap
);
705 static struct of_device_id caam_match
[] = {
707 .compatible
= "fsl,sec-v4.0",
710 .compatible
= "fsl,sec4.0",
714 MODULE_DEVICE_TABLE(of
, caam_match
);
716 static struct platform_driver caam_driver
= {
719 .of_match_table
= caam_match
,
722 .remove
= caam_remove
,
725 module_platform_driver(caam_driver
);
727 MODULE_LICENSE("GPL");
728 MODULE_DESCRIPTION("FSL CAAM request backend");
729 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");