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1 /*
2 * AMD Cryptographic Coprocessor (CCP) driver
3 *
4 * Copyright (C) 2016,2017 Advanced Micro Devices, Inc.
5 *
6 * Author: Gary R Hook <gary.hook@amd.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/dmaengine.h>
16 #include <linux/spinlock.h>
17 #include <linux/mutex.h>
18 #include <linux/ccp.h>
19
20 #include "ccp-dev.h"
21 #include "../../dma/dmaengine.h"
22
23 #define CCP_DMA_WIDTH(_mask) \
24 ({ \
25 u64 mask = _mask + 1; \
26 (mask == 0) ? 64 : fls64(mask); \
27 })
28
29 /* The CCP as a DMA provider can be configured for public or private
30 * channels. Default is specified in the vdata for the device (PCI ID).
31 * This module parameter will override for all channels on all devices:
32 * dma_chan_attr = 0x2 to force all channels public
33 * = 0x1 to force all channels private
34 * = 0x0 to defer to the vdata setting
35 * = any other value: warning, revert to 0x0
36 */
37 static unsigned int dma_chan_attr = CCP_DMA_DFLT;
38 module_param(dma_chan_attr, uint, 0444);
39 MODULE_PARM_DESC(dma_chan_attr, "Set DMA channel visibility: 0 (default) = device defaults, 1 = make private, 2 = make public");
40
41 unsigned int ccp_get_dma_chan_attr(struct ccp_device *ccp)
42 {
43 switch (dma_chan_attr) {
44 case CCP_DMA_DFLT:
45 return ccp->vdata->dma_chan_attr;
46
47 case CCP_DMA_PRIV:
48 return DMA_PRIVATE;
49
50 case CCP_DMA_PUB:
51 return 0;
52
53 default:
54 dev_info_once(ccp->dev, "Invalid value for dma_chan_attr: %d\n",
55 dma_chan_attr);
56 return ccp->vdata->dma_chan_attr;
57 }
58 }
59
60 static void ccp_free_cmd_resources(struct ccp_device *ccp,
61 struct list_head *list)
62 {
63 struct ccp_dma_cmd *cmd, *ctmp;
64
65 list_for_each_entry_safe(cmd, ctmp, list, entry) {
66 list_del(&cmd->entry);
67 kmem_cache_free(ccp->dma_cmd_cache, cmd);
68 }
69 }
70
71 static void ccp_free_desc_resources(struct ccp_device *ccp,
72 struct list_head *list)
73 {
74 struct ccp_dma_desc *desc, *dtmp;
75
76 list_for_each_entry_safe(desc, dtmp, list, entry) {
77 ccp_free_cmd_resources(ccp, &desc->active);
78 ccp_free_cmd_resources(ccp, &desc->pending);
79
80 list_del(&desc->entry);
81 kmem_cache_free(ccp->dma_desc_cache, desc);
82 }
83 }
84
85 static void ccp_free_chan_resources(struct dma_chan *dma_chan)
86 {
87 struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
88 dma_chan);
89 unsigned long flags;
90
91 dev_dbg(chan->ccp->dev, "%s - chan=%p\n", __func__, chan);
92
93 spin_lock_irqsave(&chan->lock, flags);
94
95 ccp_free_desc_resources(chan->ccp, &chan->complete);
96 ccp_free_desc_resources(chan->ccp, &chan->active);
97 ccp_free_desc_resources(chan->ccp, &chan->pending);
98 ccp_free_desc_resources(chan->ccp, &chan->created);
99
100 spin_unlock_irqrestore(&chan->lock, flags);
101 }
102
103 static void ccp_cleanup_desc_resources(struct ccp_device *ccp,
104 struct list_head *list)
105 {
106 struct ccp_dma_desc *desc, *dtmp;
107
108 list_for_each_entry_safe_reverse(desc, dtmp, list, entry) {
109 if (!async_tx_test_ack(&desc->tx_desc))
110 continue;
111
112 dev_dbg(ccp->dev, "%s - desc=%p\n", __func__, desc);
113
114 ccp_free_cmd_resources(ccp, &desc->active);
115 ccp_free_cmd_resources(ccp, &desc->pending);
116
117 list_del(&desc->entry);
118 kmem_cache_free(ccp->dma_desc_cache, desc);
119 }
120 }
121
122 static void ccp_do_cleanup(unsigned long data)
123 {
124 struct ccp_dma_chan *chan = (struct ccp_dma_chan *)data;
125 unsigned long flags;
126
127 dev_dbg(chan->ccp->dev, "%s - chan=%s\n", __func__,
128 dma_chan_name(&chan->dma_chan));
129
130 spin_lock_irqsave(&chan->lock, flags);
131
132 ccp_cleanup_desc_resources(chan->ccp, &chan->complete);
133
134 spin_unlock_irqrestore(&chan->lock, flags);
135 }
136
137 static int ccp_issue_next_cmd(struct ccp_dma_desc *desc)
138 {
139 struct ccp_dma_cmd *cmd;
140 int ret;
141
142 cmd = list_first_entry(&desc->pending, struct ccp_dma_cmd, entry);
143 list_move(&cmd->entry, &desc->active);
144
145 dev_dbg(desc->ccp->dev, "%s - tx %d, cmd=%p\n", __func__,
146 desc->tx_desc.cookie, cmd);
147
148 ret = ccp_enqueue_cmd(&cmd->ccp_cmd);
149 if (!ret || (ret == -EINPROGRESS) || (ret == -EBUSY))
150 return 0;
151
152 dev_dbg(desc->ccp->dev, "%s - error: ret=%d, tx %d, cmd=%p\n", __func__,
153 ret, desc->tx_desc.cookie, cmd);
154
155 return ret;
156 }
157
158 static void ccp_free_active_cmd(struct ccp_dma_desc *desc)
159 {
160 struct ccp_dma_cmd *cmd;
161
162 cmd = list_first_entry_or_null(&desc->active, struct ccp_dma_cmd,
163 entry);
164 if (!cmd)
165 return;
166
167 dev_dbg(desc->ccp->dev, "%s - freeing tx %d cmd=%p\n",
168 __func__, desc->tx_desc.cookie, cmd);
169
170 list_del(&cmd->entry);
171 kmem_cache_free(desc->ccp->dma_cmd_cache, cmd);
172 }
173
174 static struct ccp_dma_desc *__ccp_next_dma_desc(struct ccp_dma_chan *chan,
175 struct ccp_dma_desc *desc)
176 {
177 /* Move current DMA descriptor to the complete list */
178 if (desc)
179 list_move(&desc->entry, &chan->complete);
180
181 /* Get the next DMA descriptor on the active list */
182 desc = list_first_entry_or_null(&chan->active, struct ccp_dma_desc,
183 entry);
184
185 return desc;
186 }
187
188 static struct ccp_dma_desc *ccp_handle_active_desc(struct ccp_dma_chan *chan,
189 struct ccp_dma_desc *desc)
190 {
191 struct dma_async_tx_descriptor *tx_desc;
192 unsigned long flags;
193
194 /* Loop over descriptors until one is found with commands */
195 do {
196 if (desc) {
197 /* Remove the DMA command from the list and free it */
198 ccp_free_active_cmd(desc);
199
200 if (!list_empty(&desc->pending)) {
201 /* No errors, keep going */
202 if (desc->status != DMA_ERROR)
203 return desc;
204
205 /* Error, free remaining commands and move on */
206 ccp_free_cmd_resources(desc->ccp,
207 &desc->pending);
208 }
209
210 tx_desc = &desc->tx_desc;
211 } else {
212 tx_desc = NULL;
213 }
214
215 spin_lock_irqsave(&chan->lock, flags);
216
217 if (desc) {
218 if (desc->status != DMA_ERROR)
219 desc->status = DMA_COMPLETE;
220
221 dev_dbg(desc->ccp->dev,
222 "%s - tx %d complete, status=%u\n", __func__,
223 desc->tx_desc.cookie, desc->status);
224
225 dma_cookie_complete(tx_desc);
226 dma_descriptor_unmap(tx_desc);
227 }
228
229 desc = __ccp_next_dma_desc(chan, desc);
230
231 spin_unlock_irqrestore(&chan->lock, flags);
232
233 if (tx_desc) {
234 dmaengine_desc_get_callback_invoke(tx_desc, NULL);
235
236 dma_run_dependencies(tx_desc);
237 }
238 } while (desc);
239
240 return NULL;
241 }
242
243 static struct ccp_dma_desc *__ccp_pending_to_active(struct ccp_dma_chan *chan)
244 {
245 struct ccp_dma_desc *desc;
246
247 if (list_empty(&chan->pending))
248 return NULL;
249
250 desc = list_empty(&chan->active)
251 ? list_first_entry(&chan->pending, struct ccp_dma_desc, entry)
252 : NULL;
253
254 list_splice_tail_init(&chan->pending, &chan->active);
255
256 return desc;
257 }
258
259 static void ccp_cmd_callback(void *data, int err)
260 {
261 struct ccp_dma_desc *desc = data;
262 struct ccp_dma_chan *chan;
263 int ret;
264
265 if (err == -EINPROGRESS)
266 return;
267
268 chan = container_of(desc->tx_desc.chan, struct ccp_dma_chan,
269 dma_chan);
270
271 dev_dbg(chan->ccp->dev, "%s - tx %d callback, err=%d\n",
272 __func__, desc->tx_desc.cookie, err);
273
274 if (err)
275 desc->status = DMA_ERROR;
276
277 while (true) {
278 /* Check for DMA descriptor completion */
279 desc = ccp_handle_active_desc(chan, desc);
280
281 /* Don't submit cmd if no descriptor or DMA is paused */
282 if (!desc || (chan->status == DMA_PAUSED))
283 break;
284
285 ret = ccp_issue_next_cmd(desc);
286 if (!ret)
287 break;
288
289 desc->status = DMA_ERROR;
290 }
291
292 tasklet_schedule(&chan->cleanup_tasklet);
293 }
294
295 static dma_cookie_t ccp_tx_submit(struct dma_async_tx_descriptor *tx_desc)
296 {
297 struct ccp_dma_desc *desc = container_of(tx_desc, struct ccp_dma_desc,
298 tx_desc);
299 struct ccp_dma_chan *chan;
300 dma_cookie_t cookie;
301 unsigned long flags;
302
303 chan = container_of(tx_desc->chan, struct ccp_dma_chan, dma_chan);
304
305 spin_lock_irqsave(&chan->lock, flags);
306
307 cookie = dma_cookie_assign(tx_desc);
308 list_del(&desc->entry);
309 list_add_tail(&desc->entry, &chan->pending);
310
311 spin_unlock_irqrestore(&chan->lock, flags);
312
313 dev_dbg(chan->ccp->dev, "%s - added tx descriptor %d to pending list\n",
314 __func__, cookie);
315
316 return cookie;
317 }
318
319 static struct ccp_dma_cmd *ccp_alloc_dma_cmd(struct ccp_dma_chan *chan)
320 {
321 struct ccp_dma_cmd *cmd;
322
323 cmd = kmem_cache_alloc(chan->ccp->dma_cmd_cache, GFP_NOWAIT);
324 if (cmd)
325 memset(cmd, 0, sizeof(*cmd));
326
327 return cmd;
328 }
329
330 static struct ccp_dma_desc *ccp_alloc_dma_desc(struct ccp_dma_chan *chan,
331 unsigned long flags)
332 {
333 struct ccp_dma_desc *desc;
334
335 desc = kmem_cache_zalloc(chan->ccp->dma_desc_cache, GFP_NOWAIT);
336 if (!desc)
337 return NULL;
338
339 dma_async_tx_descriptor_init(&desc->tx_desc, &chan->dma_chan);
340 desc->tx_desc.flags = flags;
341 desc->tx_desc.tx_submit = ccp_tx_submit;
342 desc->ccp = chan->ccp;
343 INIT_LIST_HEAD(&desc->entry);
344 INIT_LIST_HEAD(&desc->pending);
345 INIT_LIST_HEAD(&desc->active);
346 desc->status = DMA_IN_PROGRESS;
347
348 return desc;
349 }
350
351 static struct ccp_dma_desc *ccp_create_desc(struct dma_chan *dma_chan,
352 struct scatterlist *dst_sg,
353 unsigned int dst_nents,
354 struct scatterlist *src_sg,
355 unsigned int src_nents,
356 unsigned long flags)
357 {
358 struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
359 dma_chan);
360 struct ccp_device *ccp = chan->ccp;
361 struct ccp_dma_desc *desc;
362 struct ccp_dma_cmd *cmd;
363 struct ccp_cmd *ccp_cmd;
364 struct ccp_passthru_nomap_engine *ccp_pt;
365 unsigned int src_offset, src_len;
366 unsigned int dst_offset, dst_len;
367 unsigned int len;
368 unsigned long sflags;
369 size_t total_len;
370
371 if (!dst_sg || !src_sg)
372 return NULL;
373
374 if (!dst_nents || !src_nents)
375 return NULL;
376
377 desc = ccp_alloc_dma_desc(chan, flags);
378 if (!desc)
379 return NULL;
380
381 total_len = 0;
382
383 src_len = sg_dma_len(src_sg);
384 src_offset = 0;
385
386 dst_len = sg_dma_len(dst_sg);
387 dst_offset = 0;
388
389 while (true) {
390 if (!src_len) {
391 src_nents--;
392 if (!src_nents)
393 break;
394
395 src_sg = sg_next(src_sg);
396 if (!src_sg)
397 break;
398
399 src_len = sg_dma_len(src_sg);
400 src_offset = 0;
401 continue;
402 }
403
404 if (!dst_len) {
405 dst_nents--;
406 if (!dst_nents)
407 break;
408
409 dst_sg = sg_next(dst_sg);
410 if (!dst_sg)
411 break;
412
413 dst_len = sg_dma_len(dst_sg);
414 dst_offset = 0;
415 continue;
416 }
417
418 len = min(dst_len, src_len);
419
420 cmd = ccp_alloc_dma_cmd(chan);
421 if (!cmd)
422 goto err;
423
424 ccp_cmd = &cmd->ccp_cmd;
425 ccp_cmd->ccp = chan->ccp;
426 ccp_pt = &ccp_cmd->u.passthru_nomap;
427 ccp_cmd->flags = CCP_CMD_MAY_BACKLOG;
428 ccp_cmd->flags |= CCP_CMD_PASSTHRU_NO_DMA_MAP;
429 ccp_cmd->engine = CCP_ENGINE_PASSTHRU;
430 ccp_pt->bit_mod = CCP_PASSTHRU_BITWISE_NOOP;
431 ccp_pt->byte_swap = CCP_PASSTHRU_BYTESWAP_NOOP;
432 ccp_pt->src_dma = sg_dma_address(src_sg) + src_offset;
433 ccp_pt->dst_dma = sg_dma_address(dst_sg) + dst_offset;
434 ccp_pt->src_len = len;
435 ccp_pt->final = 1;
436 ccp_cmd->callback = ccp_cmd_callback;
437 ccp_cmd->data = desc;
438
439 list_add_tail(&cmd->entry, &desc->pending);
440
441 dev_dbg(ccp->dev,
442 "%s - cmd=%p, src=%pad, dst=%pad, len=%llu\n", __func__,
443 cmd, &ccp_pt->src_dma,
444 &ccp_pt->dst_dma, ccp_pt->src_len);
445
446 total_len += len;
447
448 src_len -= len;
449 src_offset += len;
450
451 dst_len -= len;
452 dst_offset += len;
453 }
454
455 desc->len = total_len;
456
457 if (list_empty(&desc->pending))
458 goto err;
459
460 dev_dbg(ccp->dev, "%s - desc=%p\n", __func__, desc);
461
462 spin_lock_irqsave(&chan->lock, sflags);
463
464 list_add_tail(&desc->entry, &chan->created);
465
466 spin_unlock_irqrestore(&chan->lock, sflags);
467
468 return desc;
469
470 err:
471 ccp_free_cmd_resources(ccp, &desc->pending);
472 kmem_cache_free(ccp->dma_desc_cache, desc);
473
474 return NULL;
475 }
476
477 static struct dma_async_tx_descriptor *ccp_prep_dma_memcpy(
478 struct dma_chan *dma_chan, dma_addr_t dst, dma_addr_t src, size_t len,
479 unsigned long flags)
480 {
481 struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
482 dma_chan);
483 struct ccp_dma_desc *desc;
484 struct scatterlist dst_sg, src_sg;
485
486 dev_dbg(chan->ccp->dev,
487 "%s - src=%pad, dst=%pad, len=%zu, flags=%#lx\n",
488 __func__, &src, &dst, len, flags);
489
490 sg_init_table(&dst_sg, 1);
491 sg_dma_address(&dst_sg) = dst;
492 sg_dma_len(&dst_sg) = len;
493
494 sg_init_table(&src_sg, 1);
495 sg_dma_address(&src_sg) = src;
496 sg_dma_len(&src_sg) = len;
497
498 desc = ccp_create_desc(dma_chan, &dst_sg, 1, &src_sg, 1, flags);
499 if (!desc)
500 return NULL;
501
502 return &desc->tx_desc;
503 }
504
505 static struct dma_async_tx_descriptor *ccp_prep_dma_interrupt(
506 struct dma_chan *dma_chan, unsigned long flags)
507 {
508 struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
509 dma_chan);
510 struct ccp_dma_desc *desc;
511
512 desc = ccp_alloc_dma_desc(chan, flags);
513 if (!desc)
514 return NULL;
515
516 return &desc->tx_desc;
517 }
518
519 static void ccp_issue_pending(struct dma_chan *dma_chan)
520 {
521 struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
522 dma_chan);
523 struct ccp_dma_desc *desc;
524 unsigned long flags;
525
526 dev_dbg(chan->ccp->dev, "%s\n", __func__);
527
528 spin_lock_irqsave(&chan->lock, flags);
529
530 desc = __ccp_pending_to_active(chan);
531
532 spin_unlock_irqrestore(&chan->lock, flags);
533
534 /* If there was nothing active, start processing */
535 if (desc)
536 ccp_cmd_callback(desc, 0);
537 }
538
539 static enum dma_status ccp_tx_status(struct dma_chan *dma_chan,
540 dma_cookie_t cookie,
541 struct dma_tx_state *state)
542 {
543 struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
544 dma_chan);
545 struct ccp_dma_desc *desc;
546 enum dma_status ret;
547 unsigned long flags;
548
549 if (chan->status == DMA_PAUSED) {
550 ret = DMA_PAUSED;
551 goto out;
552 }
553
554 ret = dma_cookie_status(dma_chan, cookie, state);
555 if (ret == DMA_COMPLETE) {
556 spin_lock_irqsave(&chan->lock, flags);
557
558 /* Get status from complete chain, if still there */
559 list_for_each_entry(desc, &chan->complete, entry) {
560 if (desc->tx_desc.cookie != cookie)
561 continue;
562
563 ret = desc->status;
564 break;
565 }
566
567 spin_unlock_irqrestore(&chan->lock, flags);
568 }
569
570 out:
571 dev_dbg(chan->ccp->dev, "%s - %u\n", __func__, ret);
572
573 return ret;
574 }
575
576 static int ccp_pause(struct dma_chan *dma_chan)
577 {
578 struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
579 dma_chan);
580
581 chan->status = DMA_PAUSED;
582
583 /*TODO: Wait for active DMA to complete before returning? */
584
585 return 0;
586 }
587
588 static int ccp_resume(struct dma_chan *dma_chan)
589 {
590 struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
591 dma_chan);
592 struct ccp_dma_desc *desc;
593 unsigned long flags;
594
595 spin_lock_irqsave(&chan->lock, flags);
596
597 desc = list_first_entry_or_null(&chan->active, struct ccp_dma_desc,
598 entry);
599
600 spin_unlock_irqrestore(&chan->lock, flags);
601
602 /* Indicate the channel is running again */
603 chan->status = DMA_IN_PROGRESS;
604
605 /* If there was something active, re-start */
606 if (desc)
607 ccp_cmd_callback(desc, 0);
608
609 return 0;
610 }
611
612 static int ccp_terminate_all(struct dma_chan *dma_chan)
613 {
614 struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
615 dma_chan);
616 unsigned long flags;
617
618 dev_dbg(chan->ccp->dev, "%s\n", __func__);
619
620 /*TODO: Wait for active DMA to complete before continuing */
621
622 spin_lock_irqsave(&chan->lock, flags);
623
624 /*TODO: Purge the complete list? */
625 ccp_free_desc_resources(chan->ccp, &chan->active);
626 ccp_free_desc_resources(chan->ccp, &chan->pending);
627 ccp_free_desc_resources(chan->ccp, &chan->created);
628
629 spin_unlock_irqrestore(&chan->lock, flags);
630
631 return 0;
632 }
633
634 int ccp_dmaengine_register(struct ccp_device *ccp)
635 {
636 struct ccp_dma_chan *chan;
637 struct dma_device *dma_dev = &ccp->dma_dev;
638 struct dma_chan *dma_chan;
639 char *dma_cmd_cache_name;
640 char *dma_desc_cache_name;
641 unsigned int i;
642 int ret;
643
644 ccp->ccp_dma_chan = devm_kcalloc(ccp->dev, ccp->cmd_q_count,
645 sizeof(*(ccp->ccp_dma_chan)),
646 GFP_KERNEL);
647 if (!ccp->ccp_dma_chan)
648 return -ENOMEM;
649
650 dma_cmd_cache_name = devm_kasprintf(ccp->dev, GFP_KERNEL,
651 "%s-dmaengine-cmd-cache",
652 ccp->name);
653 if (!dma_cmd_cache_name)
654 return -ENOMEM;
655
656 ccp->dma_cmd_cache = kmem_cache_create(dma_cmd_cache_name,
657 sizeof(struct ccp_dma_cmd),
658 sizeof(void *),
659 SLAB_HWCACHE_ALIGN, NULL);
660 if (!ccp->dma_cmd_cache)
661 return -ENOMEM;
662
663 dma_desc_cache_name = devm_kasprintf(ccp->dev, GFP_KERNEL,
664 "%s-dmaengine-desc-cache",
665 ccp->name);
666 if (!dma_desc_cache_name) {
667 ret = -ENOMEM;
668 goto err_cache;
669 }
670
671 ccp->dma_desc_cache = kmem_cache_create(dma_desc_cache_name,
672 sizeof(struct ccp_dma_desc),
673 sizeof(void *),
674 SLAB_HWCACHE_ALIGN, NULL);
675 if (!ccp->dma_desc_cache) {
676 ret = -ENOMEM;
677 goto err_cache;
678 }
679
680 dma_dev->dev = ccp->dev;
681 dma_dev->src_addr_widths = CCP_DMA_WIDTH(dma_get_mask(ccp->dev));
682 dma_dev->dst_addr_widths = CCP_DMA_WIDTH(dma_get_mask(ccp->dev));
683 dma_dev->directions = DMA_MEM_TO_MEM;
684 dma_dev->residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
685 dma_cap_set(DMA_MEMCPY, dma_dev->cap_mask);
686 dma_cap_set(DMA_INTERRUPT, dma_dev->cap_mask);
687
688 /* The DMA channels for this device can be set to public or private,
689 * and overridden by the module parameter dma_chan_attr.
690 * Default: according to the value in vdata (dma_chan_attr=0)
691 * dma_chan_attr=0x1: all channels private (override vdata)
692 * dma_chan_attr=0x2: all channels public (override vdata)
693 */
694 if (ccp_get_dma_chan_attr(ccp) == DMA_PRIVATE)
695 dma_cap_set(DMA_PRIVATE, dma_dev->cap_mask);
696
697 INIT_LIST_HEAD(&dma_dev->channels);
698 for (i = 0; i < ccp->cmd_q_count; i++) {
699 chan = ccp->ccp_dma_chan + i;
700 dma_chan = &chan->dma_chan;
701
702 chan->ccp = ccp;
703
704 spin_lock_init(&chan->lock);
705 INIT_LIST_HEAD(&chan->created);
706 INIT_LIST_HEAD(&chan->pending);
707 INIT_LIST_HEAD(&chan->active);
708 INIT_LIST_HEAD(&chan->complete);
709
710 tasklet_init(&chan->cleanup_tasklet, ccp_do_cleanup,
711 (unsigned long)chan);
712
713 dma_chan->device = dma_dev;
714 dma_cookie_init(dma_chan);
715
716 list_add_tail(&dma_chan->device_node, &dma_dev->channels);
717 }
718
719 dma_dev->device_free_chan_resources = ccp_free_chan_resources;
720 dma_dev->device_prep_dma_memcpy = ccp_prep_dma_memcpy;
721 dma_dev->device_prep_dma_interrupt = ccp_prep_dma_interrupt;
722 dma_dev->device_issue_pending = ccp_issue_pending;
723 dma_dev->device_tx_status = ccp_tx_status;
724 dma_dev->device_pause = ccp_pause;
725 dma_dev->device_resume = ccp_resume;
726 dma_dev->device_terminate_all = ccp_terminate_all;
727
728 ret = dma_async_device_register(dma_dev);
729 if (ret)
730 goto err_reg;
731
732 return 0;
733
734 err_reg:
735 kmem_cache_destroy(ccp->dma_desc_cache);
736
737 err_cache:
738 kmem_cache_destroy(ccp->dma_cmd_cache);
739
740 return ret;
741 }
742
743 void ccp_dmaengine_unregister(struct ccp_device *ccp)
744 {
745 struct dma_device *dma_dev = &ccp->dma_dev;
746
747 dma_async_device_unregister(dma_dev);
748
749 kmem_cache_destroy(ccp->dma_desc_cache);
750 kmem_cache_destroy(ccp->dma_cmd_cache);
751 }