drivers/crypto/nx/nx-842.h

   1
   2 #ifndef __NX_842_H__
   3 #define __NX_842_H__
   4
   5 #include <linux/kernel.h>
   6 #include <linux/module.h>
   7 #include <linux/sw842.h>
   8 #include <linux/of.h>
   9 #include <linux/slab.h>
  10 #include <linux/io.h>
  11 #include <linux/mm.h>
  12 #include <linux/ratelimit.h>
  13
  14 #define __NX842_PSERIES_MEM_COMPRESS    (10240)
  15 #define __NX842_POWERNV_MEM_COMPRESS    (1024)
  16
  17 #define NX842_MEM_COMPRESS      (max_t(unsigned int,                    \
  18         __NX842_PSERIES_MEM_COMPRESS, __NX842_POWERNV_MEM_COMPRESS))
  19
  20 /* Restrictions on Data Descriptor List (DDL) and Entry (DDE) buffers
  21  *
  22  * From NX P8 workbook, sec 4.9.1 "842 details"
  23  *   Each DDE buffer is 128 byte aligned
  24  *   Each DDE buffer size is a multiple of 32 bytes (except the last)
  25  *   The last DDE buffer size is a multiple of 8 bytes
  26  */
  27 #define DDE_BUFFER_ALIGN        (128)
  28 #define DDE_BUFFER_SIZE_MULT    (32)
  29 #define DDE_BUFFER_LAST_MULT    (8)
  30
  31 /* Arbitrary DDL length limit
  32  * Allows max buffer size of MAX-1 to MAX pages
  33  * (depending on alignment)
  34  */
  35 #define DDL_LEN_MAX             (17)
  36
  37 /* CCW 842 CI/FC masks
  38  * NX P8 workbook, section 4.3.1, figure 4-6
  39  * "CI/FC Boundary by NX CT type"
  40  */
  41 #define CCW_CI_842              (0x00003ff8)
  42 #define CCW_FC_842              (0x00000007)
  43
  44 /* CCW Function Codes (FC) for 842
  45  * NX P8 workbook, section 4.9, table 4-28
  46  * "Function Code Definitions for 842 Memory Compression"
  47  */
  48 #define CCW_FC_842_COMP_NOCRC   (0)
  49 #define CCW_FC_842_COMP_CRC     (1)
  50 #define CCW_FC_842_DECOMP_NOCRC (2)
  51 #define CCW_FC_842_DECOMP_CRC   (3)
  52 #define CCW_FC_842_MOVE         (4)
  53
  54 /* CSB CC Error Types for 842
  55  * NX P8 workbook, section 4.10.3, table 4-30
  56  * "Reported Error Types Summary Table"
  57  */
  58 /* These are all duplicates of existing codes defined in icswx.h. */
  59 #define CSB_CC_TRANSLATION_DUP1 (80)
  60 #define CSB_CC_TRANSLATION_DUP2 (82)
  61 #define CSB_CC_TRANSLATION_DUP3 (84)
  62 #define CSB_CC_TRANSLATION_DUP4 (86)
  63 #define CSB_CC_TRANSLATION_DUP5 (92)
  64 #define CSB_CC_TRANSLATION_DUP6 (94)
  65 #define CSB_CC_PROTECTION_DUP1  (81)
  66 #define CSB_CC_PROTECTION_DUP2  (83)
  67 #define CSB_CC_PROTECTION_DUP3  (85)
  68 #define CSB_CC_PROTECTION_DUP4  (87)
  69 #define CSB_CC_PROTECTION_DUP5  (93)
  70 #define CSB_CC_PROTECTION_DUP6  (95)
  71 #define CSB_CC_RD_EXTERNAL_DUP1 (89)
  72 #define CSB_CC_RD_EXTERNAL_DUP2 (90)
  73 #define CSB_CC_RD_EXTERNAL_DUP3 (91)
  74 /* These are specific to NX */
  75 /* 842 codes */
  76 #define CSB_CC_TPBC_GT_SPBC     (64) /* no error, but >1 comp ratio */
  77 #define CSB_CC_CRC_MISMATCH     (65) /* decomp crc mismatch */
  78 #define CSB_CC_TEMPL_INVALID    (66) /* decomp invalid template value */
  79 #define CSB_CC_TEMPL_OVERFLOW   (67) /* decomp template shows data after end */
  80 /* sym crypt codes */
  81 #define CSB_CC_DECRYPT_OVERFLOW (64)
  82 /* asym crypt codes */
  83 #define CSB_CC_MINV_OVERFLOW    (128)
  84 /* These are reserved for hypervisor use */
  85 #define CSB_CC_HYP_RESERVE_START        (240)
  86 #define CSB_CC_HYP_RESERVE_END          (253)
  87 #define CSB_CC_HYP_NO_HW                (254)
  88 #define CSB_CC_HYP_HANG_ABORTED         (255)
  89
  90 /* CCB Completion Modes (CM) for 842
  91  * NX P8 workbook, section 4.3, figure 4-5
  92  * "CRB Details - Normal Cop_Req (CL=00, C=1)"
  93  */
  94 #define CCB_CM_EXTRA_WRITE      (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_STORE)
  95 #define CCB_CM_INTERRUPT        (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_INTERRUPT)
  96
  97 #define LEN_ON_PAGE(pa)         (PAGE_SIZE - ((pa) & ~PAGE_MASK))
  98
  99 static inline unsigned long nx842_get_pa(void *addr)
 100 {
 101         if (!is_vmalloc_addr(addr))
 102                 return __pa(addr);
 103
 104         return page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr);
 105 }
 106
 107 /* Get/Set bit fields */
 108 #define MASK_LSH(m)             (__builtin_ffsl(m) - 1)
 109 #define GET_FIELD(v, m)         (((v) & (m)) >> MASK_LSH(m))
 110 #define SET_FIELD(v, m, val)    (((v) & ~(m)) | (((val) << MASK_LSH(m)) & (m)))
 111
 112 struct nx842_constraints {
 113         int alignment;
 114         int multiple;
 115         int minimum;
 116         int maximum;
 117 };
 118
 119 struct nx842_driver {
 120         char *name;
 121         struct module *owner;
 122
 123         struct nx842_constraints *constraints;
 124
 125         int (*compress)(const unsigned char *in, unsigned int in_len,
 126                         unsigned char *out, unsigned int *out_len,
 127                         void *wrkmem);
 128         int (*decompress)(const unsigned char *in, unsigned int in_len,
 129                           unsigned char *out, unsigned int *out_len,
 130                           void *wrkmem);
 131 };
 132
 133 struct nx842_driver *nx842_platform_driver(void);
 134 bool nx842_platform_driver_set(struct nx842_driver *driver);
 135 void nx842_platform_driver_unset(struct nx842_driver *driver);
 136 bool nx842_platform_driver_get(void);
 137 void nx842_platform_driver_put(void);
 138
 139 int nx842_constraints(struct nx842_constraints *constraints);
 140
 141 int nx842_compress(const unsigned char *in, unsigned int in_len,
 142                    unsigned char *out, unsigned int *out_len, void *wrkmem);
 143 int nx842_decompress(const unsigned char *in, unsigned int in_len,
 144                      unsigned char *out, unsigned int *out_len, void *wrkmem);
 145
 146 #endif /* __NX_842_H__ */