2 * SHA-256 routines supporting the Power 7+ Nest Accelerators driver
4 * Copyright (C) 2011-2012 International Business Machines Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 only.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Author: Kent Yoder <yoder1@us.ibm.com>
22 #include <crypto/internal/hash.h>
23 #include <crypto/sha.h>
24 #include <linux/module.h>
26 #include <asm/byteorder.h>
28 #include "nx_csbcpb.h"
32 static int nx_sha256_init(struct shash_desc
*desc
)
34 struct sha256_state
*sctx
= shash_desc_ctx(desc
);
35 struct nx_crypto_ctx
*nx_ctx
= crypto_tfm_ctx(&desc
->tfm
->base
);
39 nx_ctx_init(nx_ctx
, HCOP_FC_SHA
);
41 memset(sctx
, 0, sizeof *sctx
);
43 nx_ctx
->ap
= &nx_ctx
->props
[NX_PROPS_SHA256
];
45 NX_CPB_SET_DIGEST_SIZE(nx_ctx
->csbcpb
, NX_DS_SHA256
);
47 len
= SHA256_DIGEST_SIZE
;
48 rc
= nx_sha_build_sg_list(nx_ctx
, nx_ctx
->out_sg
,
57 sctx
->state
[0] = __cpu_to_be32(SHA256_H0
);
58 sctx
->state
[1] = __cpu_to_be32(SHA256_H1
);
59 sctx
->state
[2] = __cpu_to_be32(SHA256_H2
);
60 sctx
->state
[3] = __cpu_to_be32(SHA256_H3
);
61 sctx
->state
[4] = __cpu_to_be32(SHA256_H4
);
62 sctx
->state
[5] = __cpu_to_be32(SHA256_H5
);
63 sctx
->state
[6] = __cpu_to_be32(SHA256_H6
);
64 sctx
->state
[7] = __cpu_to_be32(SHA256_H7
);
71 static int nx_sha256_update(struct shash_desc
*desc
, const u8
*data
,
74 struct sha256_state
*sctx
= shash_desc_ctx(desc
);
75 struct nx_crypto_ctx
*nx_ctx
= crypto_tfm_ctx(&desc
->tfm
->base
);
76 struct nx_csbcpb
*csbcpb
= (struct nx_csbcpb
*)nx_ctx
->csbcpb
;
77 u64 to_process
= 0, leftover
, total
;
78 unsigned long irq_flags
;
81 u64 buf_len
= (sctx
->count
% SHA256_BLOCK_SIZE
);
83 spin_lock_irqsave(&nx_ctx
->lock
, irq_flags
);
85 /* 2 cases for total data len:
86 * 1: < SHA256_BLOCK_SIZE: copy into state, return 0
87 * 2: >= SHA256_BLOCK_SIZE: process X blocks, copy in leftover
89 total
= (sctx
->count
% SHA256_BLOCK_SIZE
) + len
;
90 if (total
< SHA256_BLOCK_SIZE
) {
91 memcpy(sctx
->buf
+ buf_len
, data
, len
);
96 memcpy(csbcpb
->cpb
.sha256
.message_digest
, sctx
->state
, SHA256_DIGEST_SIZE
);
97 NX_CPB_FDM(csbcpb
) |= NX_FDM_INTERMEDIATE
;
98 NX_CPB_FDM(csbcpb
) |= NX_FDM_CONTINUATION
;
102 * to_process: the SHA256_BLOCK_SIZE data chunk to process in
103 * this update. This value is also restricted by the sg list
106 to_process
= total
- to_process
;
107 to_process
= to_process
& ~(SHA256_BLOCK_SIZE
- 1);
111 rc
= nx_sha_build_sg_list(nx_ctx
, nx_ctx
->in_sg
,
117 if (rc
|| data_len
!= buf_len
)
121 data_len
= to_process
- buf_len
;
122 rc
= nx_sha_build_sg_list(nx_ctx
, nx_ctx
->in_sg
,
131 to_process
= (data_len
+ buf_len
);
132 leftover
= total
- to_process
;
135 * we've hit the nx chip previously and we're updating
136 * again, so copy over the partial digest.
138 memcpy(csbcpb
->cpb
.sha256
.input_partial_digest
,
139 csbcpb
->cpb
.sha256
.message_digest
,
142 if (!nx_ctx
->op
.inlen
|| !nx_ctx
->op
.outlen
) {
147 rc
= nx_hcall_sync(nx_ctx
, &nx_ctx
->op
,
148 desc
->flags
& CRYPTO_TFM_REQ_MAY_SLEEP
);
152 atomic_inc(&(nx_ctx
->stats
->sha256_ops
));
155 data
+= to_process
- buf_len
;
158 } while (leftover
>= SHA256_BLOCK_SIZE
);
160 /* copy the leftover back into the state struct */
162 memcpy(sctx
->buf
, data
, leftover
);
165 memcpy(sctx
->state
, csbcpb
->cpb
.sha256
.message_digest
, SHA256_DIGEST_SIZE
);
167 spin_unlock_irqrestore(&nx_ctx
->lock
, irq_flags
);
171 static int nx_sha256_final(struct shash_desc
*desc
, u8
*out
)
173 struct sha256_state
*sctx
= shash_desc_ctx(desc
);
174 struct nx_crypto_ctx
*nx_ctx
= crypto_tfm_ctx(&desc
->tfm
->base
);
175 struct nx_csbcpb
*csbcpb
= (struct nx_csbcpb
*)nx_ctx
->csbcpb
;
176 unsigned long irq_flags
;
180 spin_lock_irqsave(&nx_ctx
->lock
, irq_flags
);
182 /* final is represented by continuing the operation and indicating that
183 * this is not an intermediate operation */
184 if (sctx
->count
>= SHA256_BLOCK_SIZE
) {
185 /* we've hit the nx chip previously, now we're finalizing,
186 * so copy over the partial digest */
187 memcpy(csbcpb
->cpb
.sha256
.input_partial_digest
, sctx
->state
, SHA256_DIGEST_SIZE
);
188 NX_CPB_FDM(csbcpb
) &= ~NX_FDM_INTERMEDIATE
;
189 NX_CPB_FDM(csbcpb
) |= NX_FDM_CONTINUATION
;
191 NX_CPB_FDM(csbcpb
) &= ~NX_FDM_INTERMEDIATE
;
192 NX_CPB_FDM(csbcpb
) &= ~NX_FDM_CONTINUATION
;
195 csbcpb
->cpb
.sha256
.message_bit_length
= (u64
) (sctx
->count
* 8);
197 len
= sctx
->count
& (SHA256_BLOCK_SIZE
- 1);
198 rc
= nx_sha_build_sg_list(nx_ctx
, nx_ctx
->in_sg
,
204 if (rc
|| len
!= (sctx
->count
& (SHA256_BLOCK_SIZE
- 1)))
207 len
= SHA256_DIGEST_SIZE
;
208 rc
= nx_sha_build_sg_list(nx_ctx
, nx_ctx
->out_sg
,
214 if (rc
|| len
!= SHA256_DIGEST_SIZE
)
217 if (!nx_ctx
->op
.outlen
) {
222 rc
= nx_hcall_sync(nx_ctx
, &nx_ctx
->op
,
223 desc
->flags
& CRYPTO_TFM_REQ_MAY_SLEEP
);
227 atomic_inc(&(nx_ctx
->stats
->sha256_ops
));
229 atomic64_add(sctx
->count
, &(nx_ctx
->stats
->sha256_bytes
));
230 memcpy(out
, csbcpb
->cpb
.sha256
.message_digest
, SHA256_DIGEST_SIZE
);
232 spin_unlock_irqrestore(&nx_ctx
->lock
, irq_flags
);
236 static int nx_sha256_export(struct shash_desc
*desc
, void *out
)
238 struct sha256_state
*sctx
= shash_desc_ctx(desc
);
240 memcpy(out
, sctx
, sizeof(*sctx
));
245 static int nx_sha256_import(struct shash_desc
*desc
, const void *in
)
247 struct sha256_state
*sctx
= shash_desc_ctx(desc
);
249 memcpy(sctx
, in
, sizeof(*sctx
));
254 struct shash_alg nx_shash_sha256_alg
= {
255 .digestsize
= SHA256_DIGEST_SIZE
,
256 .init
= nx_sha256_init
,
257 .update
= nx_sha256_update
,
258 .final
= nx_sha256_final
,
259 .export
= nx_sha256_export
,
260 .import
= nx_sha256_import
,
261 .descsize
= sizeof(struct sha256_state
),
262 .statesize
= sizeof(struct sha256_state
),
264 .cra_name
= "sha256",
265 .cra_driver_name
= "sha256-nx",
267 .cra_flags
= CRYPTO_ALG_TYPE_SHASH
,
268 .cra_blocksize
= SHA256_BLOCK_SIZE
,
269 .cra_module
= THIS_MODULE
,
270 .cra_ctxsize
= sizeof(struct nx_crypto_ctx
),
271 .cra_init
= nx_crypto_ctx_sha_init
,
272 .cra_exit
= nx_crypto_ctx_exit
,