4 * Support for VIA PadLock hardware crypto engine.
6 * Copyright (c) 2004 Michal Ludvig <michal@logix.cz>
8 * Key expansion routine taken from crypto/aes.c
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * ---------------------------------------------------------------------------
16 * Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
17 * All rights reserved.
21 * The free distribution and use of this software in both source and binary
22 * form is allowed (with or without changes) provided that:
24 * 1. distributions of this source code include the above copyright
25 * notice, this list of conditions and the following disclaimer;
27 * 2. distributions in binary form include the above copyright
28 * notice, this list of conditions and the following disclaimer
29 * in the documentation and/or other associated materials;
31 * 3. the copyright holder's name is not used to endorse products
32 * built using this software without specific written permission.
34 * ALTERNATIVELY, provided that this notice is retained in full, this product
35 * may be distributed under the terms of the GNU General Public License (GPL),
36 * in which case the provisions of the GPL apply INSTEAD OF those given above.
40 * This software is provided 'as is' with no explicit or implied warranties
41 * in respect of its properties, including, but not limited to, correctness
42 * and/or fitness for purpose.
43 * ---------------------------------------------------------------------------
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/types.h>
49 #include <linux/errno.h>
50 #include <linux/crypto.h>
51 #include <linux/interrupt.h>
52 #include <linux/kernel.h>
53 #include <asm/byteorder.h>
56 #define AES_MIN_KEY_SIZE 16 /* in uint8_t units */
57 #define AES_MAX_KEY_SIZE 32 /* ditto */
58 #define AES_BLOCK_SIZE 16 /* ditto */
59 #define AES_EXTENDED_KEY_SIZE 64 /* in uint32_t units */
60 #define AES_EXTENDED_KEY_SIZE_B (AES_EXTENDED_KEY_SIZE * sizeof(uint32_t))
63 uint32_t e_data
[AES_EXTENDED_KEY_SIZE
];
64 uint32_t d_data
[AES_EXTENDED_KEY_SIZE
];
74 /* ====== Key management routines ====== */
76 static inline uint32_t
77 generic_rotr32 (const uint32_t x
, const unsigned bits
)
79 const unsigned n
= bits
% 32;
80 return (x
>> n
) | (x
<< (32 - n
));
83 static inline uint32_t
84 generic_rotl32 (const uint32_t x
, const unsigned bits
)
86 const unsigned n
= bits
% 32;
87 return (x
<< n
) | (x
>> (32 - n
));
90 #define rotl generic_rotl32
91 #define rotr generic_rotr32
94 * #define byte(x, nr) ((unsigned char)((x) >> (nr*8)))
97 byte(const uint32_t x
, const unsigned n
)
105 static uint8_t pow_tab
[256];
106 static uint8_t log_tab
[256];
107 static uint8_t sbx_tab
[256];
108 static uint8_t isb_tab
[256];
109 static uint32_t rco_tab
[10];
110 static uint32_t ft_tab
[4][256];
111 static uint32_t it_tab
[4][256];
113 static uint32_t fl_tab
[4][256];
114 static uint32_t il_tab
[4][256];
116 static inline uint8_t
117 f_mult (uint8_t a
, uint8_t b
)
119 uint8_t aa
= log_tab
[a
], cc
= aa
+ log_tab
[b
];
121 return pow_tab
[cc
+ (cc
< aa
? 1 : 0)];
124 #define ff_mult(a,b) (a && b ? f_mult(a, b) : 0)
126 #define f_rn(bo, bi, n, k) \
127 bo[n] = ft_tab[0][byte(bi[n],0)] ^ \
128 ft_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
129 ft_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
130 ft_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
132 #define i_rn(bo, bi, n, k) \
133 bo[n] = it_tab[0][byte(bi[n],0)] ^ \
134 it_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
135 it_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
136 it_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
139 ( fl_tab[0][byte(x, 0)] ^ \
140 fl_tab[1][byte(x, 1)] ^ \
141 fl_tab[2][byte(x, 2)] ^ \
142 fl_tab[3][byte(x, 3)] )
144 #define f_rl(bo, bi, n, k) \
145 bo[n] = fl_tab[0][byte(bi[n],0)] ^ \
146 fl_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
147 fl_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
148 fl_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
150 #define i_rl(bo, bi, n, k) \
151 bo[n] = il_tab[0][byte(bi[n],0)] ^ \
152 il_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
153 il_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
154 il_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
162 /* log and power tables for GF(2**8) finite field with
163 0x011b as modular polynomial - the simplest prmitive
164 root is 0x03, used here to generate the tables */
166 for (i
= 0, p
= 1; i
< 256; ++i
) {
167 pow_tab
[i
] = (uint8_t) p
;
168 log_tab
[p
] = (uint8_t) i
;
170 p
^= (p
<< 1) ^ (p
& 0x80 ? 0x01b : 0);
175 for (i
= 0, p
= 1; i
< 10; ++i
) {
178 p
= (p
<< 1) ^ (p
& 0x80 ? 0x01b : 0);
181 for (i
= 0; i
< 256; ++i
) {
182 p
= (i
? pow_tab
[255 - log_tab
[i
]] : 0);
183 q
= ((p
>> 7) | (p
<< 1)) ^ ((p
>> 6) | (p
<< 2));
184 p
^= 0x63 ^ q
^ ((q
>> 6) | (q
<< 2));
186 isb_tab
[p
] = (uint8_t) i
;
189 for (i
= 0; i
< 256; ++i
) {
194 fl_tab
[1][i
] = rotl (t
, 8);
195 fl_tab
[2][i
] = rotl (t
, 16);
196 fl_tab
[3][i
] = rotl (t
, 24);
198 t
= ((uint32_t) ff_mult (2, p
)) |
199 ((uint32_t) p
<< 8) |
200 ((uint32_t) p
<< 16) | ((uint32_t) ff_mult (3, p
) << 24);
203 ft_tab
[1][i
] = rotl (t
, 8);
204 ft_tab
[2][i
] = rotl (t
, 16);
205 ft_tab
[3][i
] = rotl (t
, 24);
211 il_tab
[1][i
] = rotl (t
, 8);
212 il_tab
[2][i
] = rotl (t
, 16);
213 il_tab
[3][i
] = rotl (t
, 24);
215 t
= ((uint32_t) ff_mult (14, p
)) |
216 ((uint32_t) ff_mult (9, p
) << 8) |
217 ((uint32_t) ff_mult (13, p
) << 16) |
218 ((uint32_t) ff_mult (11, p
) << 24);
221 it_tab
[1][i
] = rotl (t
, 8);
222 it_tab
[2][i
] = rotl (t
, 16);
223 it_tab
[3][i
] = rotl (t
, 24);
227 #define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b)
229 #define imix_col(y,x) \
235 (y) ^= rotr(u ^ t, 8) ^ \
239 /* initialise the key schedule from the user supplied key */
242 { t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
243 t ^= E_KEY[4 * i]; E_KEY[4 * i + 4] = t; \
244 t ^= E_KEY[4 * i + 1]; E_KEY[4 * i + 5] = t; \
245 t ^= E_KEY[4 * i + 2]; E_KEY[4 * i + 6] = t; \
246 t ^= E_KEY[4 * i + 3]; E_KEY[4 * i + 7] = t; \
250 { t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
251 t ^= E_KEY[6 * i]; E_KEY[6 * i + 6] = t; \
252 t ^= E_KEY[6 * i + 1]; E_KEY[6 * i + 7] = t; \
253 t ^= E_KEY[6 * i + 2]; E_KEY[6 * i + 8] = t; \
254 t ^= E_KEY[6 * i + 3]; E_KEY[6 * i + 9] = t; \
255 t ^= E_KEY[6 * i + 4]; E_KEY[6 * i + 10] = t; \
256 t ^= E_KEY[6 * i + 5]; E_KEY[6 * i + 11] = t; \
260 { t = rotr(t, 8); ; t = ls_box(t) ^ rco_tab[i]; \
261 t ^= E_KEY[8 * i]; E_KEY[8 * i + 8] = t; \
262 t ^= E_KEY[8 * i + 1]; E_KEY[8 * i + 9] = t; \
263 t ^= E_KEY[8 * i + 2]; E_KEY[8 * i + 10] = t; \
264 t ^= E_KEY[8 * i + 3]; E_KEY[8 * i + 11] = t; \
265 t = E_KEY[8 * i + 4] ^ ls_box(t); \
266 E_KEY[8 * i + 12] = t; \
267 t ^= E_KEY[8 * i + 5]; E_KEY[8 * i + 13] = t; \
268 t ^= E_KEY[8 * i + 6]; E_KEY[8 * i + 14] = t; \
269 t ^= E_KEY[8 * i + 7]; E_KEY[8 * i + 15] = t; \
272 /* Tells whether the ACE is capable to generate
273 the extended key for a given key_len. */
275 aes_hw_extkey_available(uint8_t key_len
)
277 /* TODO: We should check the actual CPU model/stepping
278 as it's possible that the capability will be
279 added in the next CPU revisions. */
285 static inline struct aes_ctx
*aes_ctx(struct crypto_tfm
*tfm
)
287 unsigned long addr
= (unsigned long)crypto_tfm_ctx(tfm
);
288 unsigned long align
= PADLOCK_ALIGNMENT
;
290 if (align
<= crypto_tfm_ctx_alignment())
292 return (struct aes_ctx
*)ALIGN(addr
, align
);
295 static int aes_set_key(struct crypto_tfm
*tfm
, const u8
*in_key
,
296 unsigned int key_len
, u32
*flags
)
298 struct aes_ctx
*ctx
= aes_ctx(tfm
);
299 const __le32
*key
= (const __le32
*)in_key
;
300 uint32_t i
, t
, u
, v
, w
;
301 uint32_t P
[AES_EXTENDED_KEY_SIZE
];
304 if (key_len
!= 16 && key_len
!= 24 && key_len
!= 32) {
305 *flags
|= CRYPTO_TFM_RES_BAD_KEY_LEN
;
309 ctx
->key_length
= key_len
;
312 * If the hardware is capable of generating the extended key
313 * itself we must supply the plain key for both encryption
316 ctx
->E
= ctx
->e_data
;
317 ctx
->D
= ctx
->e_data
;
319 E_KEY
[0] = le32_to_cpu(key
[0]);
320 E_KEY
[1] = le32_to_cpu(key
[1]);
321 E_KEY
[2] = le32_to_cpu(key
[2]);
322 E_KEY
[3] = le32_to_cpu(key
[3]);
324 /* Prepare control words. */
325 memset(&ctx
->cword
, 0, sizeof(ctx
->cword
));
327 ctx
->cword
.decrypt
.encdec
= 1;
328 ctx
->cword
.encrypt
.rounds
= 10 + (key_len
- 16) / 4;
329 ctx
->cword
.decrypt
.rounds
= ctx
->cword
.encrypt
.rounds
;
330 ctx
->cword
.encrypt
.ksize
= (key_len
- 16) / 8;
331 ctx
->cword
.decrypt
.ksize
= ctx
->cword
.encrypt
.ksize
;
333 /* Don't generate extended keys if the hardware can do it. */
334 if (aes_hw_extkey_available(key_len
))
337 ctx
->D
= ctx
->d_data
;
338 ctx
->cword
.encrypt
.keygen
= 1;
339 ctx
->cword
.decrypt
.keygen
= 1;
344 for (i
= 0; i
< 10; ++i
)
349 E_KEY
[4] = le32_to_cpu(key
[4]);
350 t
= E_KEY
[5] = le32_to_cpu(key
[5]);
351 for (i
= 0; i
< 8; ++i
)
356 E_KEY
[4] = le32_to_cpu(key
[4]);
357 E_KEY
[5] = le32_to_cpu(key
[5]);
358 E_KEY
[6] = le32_to_cpu(key
[6]);
359 t
= E_KEY
[7] = le32_to_cpu(key
[7]);
360 for (i
= 0; i
< 7; ++i
)
370 for (i
= 4; i
< key_len
+ 24; ++i
) {
371 imix_col (D_KEY
[i
], E_KEY
[i
]);
374 /* PadLock needs a different format of the decryption key. */
375 rounds
= 10 + (key_len
- 16) / 4;
377 for (i
= 0; i
< rounds
; i
++) {
378 P
[((i
+ 1) * 4) + 0] = D_KEY
[((rounds
- i
- 1) * 4) + 0];
379 P
[((i
+ 1) * 4) + 1] = D_KEY
[((rounds
- i
- 1) * 4) + 1];
380 P
[((i
+ 1) * 4) + 2] = D_KEY
[((rounds
- i
- 1) * 4) + 2];
381 P
[((i
+ 1) * 4) + 3] = D_KEY
[((rounds
- i
- 1) * 4) + 3];
384 P
[0] = E_KEY
[(rounds
* 4) + 0];
385 P
[1] = E_KEY
[(rounds
* 4) + 1];
386 P
[2] = E_KEY
[(rounds
* 4) + 2];
387 P
[3] = E_KEY
[(rounds
* 4) + 3];
389 memcpy(D_KEY
, P
, AES_EXTENDED_KEY_SIZE_B
);
394 /* ====== Encryption/decryption routines ====== */
396 /* These are the real call to PadLock. */
397 static inline void padlock_xcrypt_ecb(const u8
*input
, u8
*output
, void *key
,
398 void *control_word
, u32 count
)
400 asm volatile ("pushfl; popfl"); /* enforce key reload. */
401 asm volatile (".byte 0xf3,0x0f,0xa7,0xc8" /* rep xcryptecb */
402 : "+S"(input
), "+D"(output
)
403 : "d"(control_word
), "b"(key
), "c"(count
));
406 static inline u8
*padlock_xcrypt_cbc(const u8
*input
, u8
*output
, void *key
,
407 u8
*iv
, void *control_word
, u32 count
)
409 /* Enforce key reload. */
410 asm volatile ("pushfl; popfl");
412 asm volatile (".byte 0xf3,0x0f,0xa7,0xd0"
413 : "+S" (input
), "+D" (output
), "+a" (iv
)
414 : "d" (control_word
), "b" (key
), "c" (count
));
418 static void aes_encrypt(struct crypto_tfm
*tfm
, u8
*out
, const u8
*in
)
420 struct aes_ctx
*ctx
= aes_ctx(tfm
);
421 padlock_xcrypt_ecb(in
, out
, ctx
->E
, &ctx
->cword
.encrypt
, 1);
424 static void aes_decrypt(struct crypto_tfm
*tfm
, u8
*out
, const u8
*in
)
426 struct aes_ctx
*ctx
= aes_ctx(tfm
);
427 padlock_xcrypt_ecb(in
, out
, ctx
->D
, &ctx
->cword
.decrypt
, 1);
430 static unsigned int aes_encrypt_ecb(const struct cipher_desc
*desc
, u8
*out
,
431 const u8
*in
, unsigned int nbytes
)
433 struct aes_ctx
*ctx
= aes_ctx(desc
->tfm
);
434 padlock_xcrypt_ecb(in
, out
, ctx
->E
, &ctx
->cword
.encrypt
,
435 nbytes
/ AES_BLOCK_SIZE
);
436 return nbytes
& ~(AES_BLOCK_SIZE
- 1);
439 static unsigned int aes_decrypt_ecb(const struct cipher_desc
*desc
, u8
*out
,
440 const u8
*in
, unsigned int nbytes
)
442 struct aes_ctx
*ctx
= aes_ctx(desc
->tfm
);
443 padlock_xcrypt_ecb(in
, out
, ctx
->D
, &ctx
->cword
.decrypt
,
444 nbytes
/ AES_BLOCK_SIZE
);
445 return nbytes
& ~(AES_BLOCK_SIZE
- 1);
448 static unsigned int aes_encrypt_cbc(const struct cipher_desc
*desc
, u8
*out
,
449 const u8
*in
, unsigned int nbytes
)
451 struct aes_ctx
*ctx
= aes_ctx(desc
->tfm
);
454 iv
= padlock_xcrypt_cbc(in
, out
, ctx
->E
, desc
->info
,
455 &ctx
->cword
.encrypt
, nbytes
/ AES_BLOCK_SIZE
);
456 memcpy(desc
->info
, iv
, AES_BLOCK_SIZE
);
458 return nbytes
& ~(AES_BLOCK_SIZE
- 1);
461 static unsigned int aes_decrypt_cbc(const struct cipher_desc
*desc
, u8
*out
,
462 const u8
*in
, unsigned int nbytes
)
464 struct aes_ctx
*ctx
= aes_ctx(desc
->tfm
);
465 padlock_xcrypt_cbc(in
, out
, ctx
->D
, desc
->info
, &ctx
->cword
.decrypt
,
466 nbytes
/ AES_BLOCK_SIZE
);
467 return nbytes
& ~(AES_BLOCK_SIZE
- 1);
470 static struct crypto_alg aes_alg
= {
472 .cra_driver_name
= "aes-padlock",
474 .cra_flags
= CRYPTO_ALG_TYPE_CIPHER
,
475 .cra_blocksize
= AES_BLOCK_SIZE
,
476 .cra_ctxsize
= sizeof(struct aes_ctx
),
477 .cra_alignmask
= PADLOCK_ALIGNMENT
- 1,
478 .cra_module
= THIS_MODULE
,
479 .cra_list
= LIST_HEAD_INIT(aes_alg
.cra_list
),
482 .cia_min_keysize
= AES_MIN_KEY_SIZE
,
483 .cia_max_keysize
= AES_MAX_KEY_SIZE
,
484 .cia_setkey
= aes_set_key
,
485 .cia_encrypt
= aes_encrypt
,
486 .cia_decrypt
= aes_decrypt
,
487 .cia_encrypt_ecb
= aes_encrypt_ecb
,
488 .cia_decrypt_ecb
= aes_decrypt_ecb
,
489 .cia_encrypt_cbc
= aes_encrypt_cbc
,
490 .cia_decrypt_cbc
= aes_decrypt_cbc
,
495 int __init
padlock_init_aes(void)
497 printk(KERN_NOTICE PFX
"Using VIA PadLock ACE for AES algorithm.\n");
500 return crypto_register_alg(&aes_alg
);
503 void __exit
padlock_fini_aes(void)
505 crypto_unregister_alg(&aes_alg
);